openMMC
Open Source Modular MMC for AMCs
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pin_mapping.h
Go to the documentation of this file.
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/*
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* openMMC -- Open Source modular IPM Controller firmware
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*
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* Copyright (C) 2016 Henrique Silva <henrique.silva@lnls.br>
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*
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* This program is free software: you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation, either version 3 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*
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* @license GPL-3.0+ <http://spdx.org/licenses/GPL-3.0+>
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*/
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#ifndef PIN_MAPPING_H_
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#define PIN_MAPPING_H_
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/* SPI Interfaces */
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#define FPGA_SPI 0
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#define FLASH_SPI 1
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/* UART Interfaces */
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#define UART_DEBUG 3
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/* Pin definitions */
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/* I2C ports */
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#define I2C0_SDA PIN_DEF( PORT0, 27, (IOCON_FUNC1 | IOCON_MODE_INACT), NON_GPIO )
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#define I2C0_SCL PIN_DEF( PORT0, 28, (IOCON_FUNC1 | IOCON_MODE_INACT), NON_GPIO )
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#define I2C1_SDA PIN_DEF( PORT0, 0, (IOCON_FUNC3 | IOCON_MODE_INACT), NON_GPIO )
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#define I2C1_SCL PIN_DEF( PORT0, 1, (IOCON_FUNC3 | IOCON_MODE_INACT), NON_GPIO )
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#define I2C2_SDA PIN_DEF( PORT0, 10, (IOCON_FUNC2 | IOCON_MODE_INACT), NON_GPIO )
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#define I2C2_SCL PIN_DEF( PORT0, 11, (IOCON_FUNC2 | IOCON_MODE_INACT), NON_GPIO )
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/* UART Debug port */
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#define UART_DEBUG_TXD PIN_DEF( PORT4, 28, (IOCON_FUNC3 | IOCON_MODE_INACT), NON_GPIO )
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#define UART_DEBUG_RXD PIN_DEF( PORT4, 29, (IOCON_FUNC3 | IOCON_MODE_INACT), NON_GPIO )
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/* SSP Ports */
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/* FPGA SPI Port (SSEL is GPIO for word transfers larger than 8bits) */
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#define SSP0_SCK PIN_DEF( PORT1, 20, (IOCON_FUNC3 | IOCON_MODE_INACT), NON_GPIO )
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#define SSP0_SSEL PIN_DEF( PORT1, 21, (IOCON_FUNC0 | IOCON_MODE_INACT), GPIO_DIR_OUTPUT )
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#define SSP0_MISO PIN_DEF( PORT1, 23, (IOCON_FUNC3 | IOCON_MODE_INACT), NON_GPIO )
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#define SSP0_MOSI PIN_DEF( PORT1, 24, (IOCON_FUNC3 | IOCON_MODE_INACT), NON_GPIO )
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/* Flash SPI Port (SSEL is GPIO for word transfers larger than 8bits) */
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#define SSP1_SCK PIN_DEF( PORT0, 7, (IOCON_FUNC2 | IOCON_MODE_INACT), NON_GPIO )
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#define SSP1_SSEL PIN_DEF( PORT0, 6, (IOCON_FUNC0 | IOCON_MODE_INACT), GPIO_DIR_OUTPUT )
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#define SSP1_MISO PIN_DEF( PORT0, 8, (IOCON_FUNC2 | IOCON_MODE_INACT), NON_GPIO )
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#define SSP1_MOSI PIN_DEF( PORT0, 9, (IOCON_FUNC2 | IOCON_MODE_INACT), NON_GPIO )
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/* SPI Legacy port - should be updated to SSP interface */
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/* DAC SPI Port (SSEL is GPIO for word transfers larger than 8bits) */
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#define SPI_SCK PIN_DEF( PORT0, 15, (IOCON_FUNC3 | IOCON_MODE_INACT), NON_GPIO )
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#define SPI_SSEL PIN_DEF( PORT0, 16, (IOCON_FUNC0 | IOCON_MODE_INACT), GPIO_DIR_OUTPUT )
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//#define SPI_MISO PIN_DEF( PORT0, 17, (IOCON_FUNC3 | IOCON_MODE_INACT), NON_GPIO )
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#define SPI_MOSI PIN_DEF( PORT0, 18, (IOCON_FUNC3 | IOCON_MODE_INACT), NON_GPIO )
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/* GPIO definitions */
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/* Geographic Address pin definitions */
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#define GPIO_GA0 PIN_DEF( PORT1, 0, (IOCON_FUNC0 | IOCON_MODE_INACT), GPIO_DIR_INPUT )
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#define GPIO_GA1 PIN_DEF( PORT1, 1, (IOCON_FUNC0 | IOCON_MODE_INACT), GPIO_DIR_INPUT )
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#define GPIO_GA2 PIN_DEF( PORT1, 4, (IOCON_FUNC0 | IOCON_MODE_INACT), GPIO_DIR_INPUT )
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#define GPIO_GA_TEST PIN_DEF( PORT1, 8, (IOCON_FUNC0 | IOCON_MODE_INACT), GPIO_DIR_OUTPUT )
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/* Board LEDs */
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#define GPIO_LEDBLUE PIN_DEF( PORT1, 9, (IOCON_FUNC0 | IOCON_MODE_PULLUP), GPIO_DIR_OUTPUT )
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#define GPIO_LEDGREEN PIN_DEF( PORT1, 10, (IOCON_FUNC0 | IOCON_MODE_PULLDOWN), GPIO_DIR_OUTPUT )
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#define GPIO_LEDRED PIN_DEF( PORT1, 25, (IOCON_FUNC0 | IOCON_MODE_PULLDOWN), GPIO_DIR_OUTPUT )
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/* Front Panel BUTTON */
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#define GPIO_FRONT_BUTTON PIN_DEF( PORT2, 12, (IOCON_FUNC0 | IOCON_MODE_PULLUP), GPIO_DIR_INPUT )
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/* Hot swap handle */
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#define GPIO_HOT_SWAP_HANDLE PIN_DEF( PORT2, 13, (IOCON_FUNC0 | IOCON_MODE_PULLUP), GPIO_DIR_INPUT )
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/* FPGA DCDC converters */
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#define GPIO_EN_P1V0 PIN_DEF( PORT3, 25, (IOCON_FUNC0 | IOCON_MODE_PULLDOWN), GPIO_DIR_OUTPUT )
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#define GPIO_EN_P1V2 PIN_DEF( PORT0, 23, (IOCON_FUNC0 | IOCON_MODE_PULLDOWN), GPIO_DIR_OUTPUT )
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#define GPIO_EN_P1V8 PIN_DEF( PORT0, 24, (IOCON_FUNC0 | IOCON_MODE_PULLDOWN), GPIO_DIR_OUTPUT )
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#define GPIO_EN_P3V3 PIN_DEF( PORT1, 27, (IOCON_FUNC0 | IOCON_MODE_PULLDOWN), GPIO_DIR_OUTPUT )
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#define GPIO_EN_P1V5_VTT PIN_DEF( PORT1, 29, (IOCON_FUNC0 | IOCON_MODE_PULLDOWN), GPIO_DIR_OUTPUT )
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#define GPIO_DCDC_PGOOD PIN_DEF( PORT3, 26, (IOCON_FUNC0 | IOCON_MODE_PULLDOWN), GPIO_DIR_INPUT )
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/* FMC1 DCDC Converters */
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#define GPIO_EN_FMC1_P12V PIN_DEF( PORT0, 4, (IOCON_FUNC0 | IOCON_MODE_PULLDOWN), GPIO_DIR_OUTPUT )
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#define GPIO_EN_FMC1_P3V3 PIN_DEF( PORT0, 25, (IOCON_FUNC0 | IOCON_MODE_PULLDOWN), GPIO_DIR_OUTPUT )
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#define GPIO_EN_FMC1_PVADJ PIN_DEF( PORT1, 31, (IOCON_FUNC0 | IOCON_MODE_PULLDOWN), GPIO_DIR_OUTPUT )
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/* FMC2 DCDC Converters */
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#define GPIO_EN_FMC2_P12V PIN_DEF( PORT0, 5, (IOCON_FUNC0 | IOCON_MODE_PULLDOWN), GPIO_DIR_OUTPUT )
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#define GPIO_EN_FMC2_P3V3 PIN_DEF( PORT0, 26, (IOCON_FUNC0 | IOCON_MODE_PULLDOWN), GPIO_DIR_OUTPUT )
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#define GPIO_EN_FMC2_PVADJ PIN_DEF( PORT1, 28, (IOCON_FUNC0 | IOCON_MODE_PULLDOWN), GPIO_DIR_OUTPUT )
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/* RTM */
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#define GPIO_EN_RTM_PWR PIN_DEF( PORT1, 30, (IOCON_FUNC0 | IOCON_MODE_PULLDOWN), GPIO_DIR_OUTPUT )
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/* NOTE: Due to a hardware limitation, pins 29 and 30 from port 0 will have the same direction, even if set differently in the register */
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#define GPIO_RTM_PS PIN_DEF( PORT0, 29, (IOCON_FUNC0 | IOCON_MODE_PULLUP), GPIO_DIR_INPUT )
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#define GPIO_EN_RTM_I2C PIN_DEF( PORT0, 30, (IOCON_FUNC0 | IOCON_MODE_PULLDOWN), GPIO_DIR_OUTPUT )
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/* FPGA Control */
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#define GPIO_FPGA_PROGRAM_B PIN_DEF( PORT0, 17, (IOCON_FUNC0 | IOCON_MODE_PULLDOWN), GPIO_DIR_OUTPUT )
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#define GPIO_FPGA_DONE_B PIN_DEF( PORT0, 22, (IOCON_FUNC0 | IOCON_MODE_INACT), GPIO_DIR_INPUT )
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#define GPIO_FPGA_RESET PIN_DEF( PORT2, 9, (IOCON_FUNC0 | IOCON_MODE_PULLDOWN), GPIO_DIR_OUTPUT )
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#define GPIO_FPGA_INITB PIN_DEF( PORT0, 20, (IOCON_FUNC0 | IOCON_MODE_INACT), GPIO_DIR_INPUT )
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#define GPIO_FLASH_CS_MUX PIN_DEF( PORT0, 19, (IOCON_FUNC0 | IOCON_MODE_INACT), GPIO_DIR_INPUT )
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/* VADJ DAC */
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#define GPIO_DAC_VADJ_RST PIN_DEF( PORT0, 21, (IOCON_FUNC0 | IOCON_MODE_PULLUP), GPIO_DIR_OUTPUT )
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#define GPIO_DAC_VADJ_CSN PIN_DEF( PORT0, 16, (IOCON_FUNC0 | IOCON_MODE_PULLUP), GPIO_DIR_OUTPUT )
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/* ADN4604 Clock Switch */
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#define GPIO_ADN_UPDATE PIN_DEF( PORT1, 26, (IOCON_FUNC0 | IOCON_MODE_PULLUP), GPIO_DIR_OUTPUT )
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#define GPIO_ADN_RESETN PIN_DEF( PORT1, 22, (IOCON_FUNC0 | IOCON_MODE_PULLUP), GPIO_DIR_INPUT )
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/* SCANSTA1101 JTAG Switch */
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#define GPIO_SCANSTA1101_ADDR0 PIN_DEF( PORT2, 0, (IOCON_FUNC0 | IOCON_MODE_PULLDOWN), GPIO_DIR_OUTPUT )
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#define GPIO_SCANSTA1101_ADDR1 PIN_DEF( PORT2, 1, (IOCON_FUNC0 | IOCON_MODE_PULLDOWN), GPIO_DIR_OUTPUT )
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#define GPIO_SCANSTA1101_ADDR2 PIN_DEF( PORT2, 2, (IOCON_FUNC0 | IOCON_MODE_PULLDOWN), GPIO_DIR_OUTPUT )
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#define GPIO_SCANSTA1101_ADDR3 PIN_DEF( PORT2, 3, (IOCON_FUNC0 | IOCON_MODE_PULLDOWN), GPIO_DIR_OUTPUT )
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#define GPIO_SCANSTA1101_ADDR4 PIN_DEF( PORT2, 4, (IOCON_FUNC0 | IOCON_MODE_PULLDOWN), GPIO_DIR_OUTPUT )
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#define GPIO_SCANSTA1101_ADDR5 PIN_DEF( PORT2, 5, (IOCON_FUNC0 | IOCON_MODE_PULLDOWN), GPIO_DIR_OUTPUT )
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#define GPIO_SCANSTA1101_ADDR6 PIN_DEF( PORT2, 6, (IOCON_FUNC0 | IOCON_MODE_PULLDOWN), GPIO_DIR_OUTPUT )
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#define GPIO_SCANSTA1101_TRIST_B PIN_DEF( PORT2, 7, (IOCON_FUNC0 | IOCON_MODE_INACT), GPIO_DIR_INPUT )
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/* MMC ENABLE# */
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#define GPIO_MMC_ENABLE PIN_DEF( PORT2, 8, (IOCON_FUNC0 | IOCON_MODE_PULLUP), GPIO_DIR_INPUT )
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/* Overtemp signal */
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#define GPIO_OVERTEMPn PIN_DEF( PORT2, 10, (IOCON_FUNC0 | IOCON_MODE_PULLUP), GPIO_DIR_INPUT )
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/* FMC Present signals */
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#define GPIO_FMC1_PRSNT_M2C PIN_DEF( PORT1, 14, (IOCON_FUNC0 | IOCON_MODE_PULLUP), GPIO_DIR_INPUT )
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#define GPIO_FMC2_PRSNT_M2C PIN_DEF( PORT1, 15, (IOCON_FUNC0 | IOCON_MODE_PULLUP), GPIO_DIR_INPUT )
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/* FMC Power Good signals */
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#define GPIO_FMC1_PG_M2C PIN_DEF( PORT1, 16, (IOCON_FUNC0 | IOCON_MODE_PULLUP), GPIO_DIR_INPUT )
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#define GPIO_FMC2_PG_M2C PIN_DEF( PORT1, 17, (IOCON_FUNC0 | IOCON_MODE_PULLUP), GPIO_DIR_INPUT )
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#define GPIO_FMC1_PG_C2M PIN_DEF( PORT1, 18, (IOCON_FUNC0 | IOCON_MODE_PULLUP), GPIO_DIR_OUTPUT )
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#define GPIO_FMC2_PG_C2M PIN_DEF( PORT1, 19, (IOCON_FUNC0 | IOCON_MODE_PULLUP), GPIO_DIR_OUTPUT )
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/* Pin initialization (config) list */
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#define PIN_CFG_LIST \
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I2C0_SDA, \
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I2C0_SCL, \
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I2C1_SDA, \
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I2C1_SCL, \
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I2C2_SDA, \
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I2C2_SCL, \
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UART_DEBUG_TXD, \
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UART_DEBUG_RXD, \
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SSP0_SCK, \
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SSP0_SSEL, \
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SSP0_MISO, \
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SSP0_MOSI, \
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SSP1_SCK, \
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SSP1_SSEL, \
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SSP1_MISO, \
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SSP1_MOSI, \
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SPI_SCK, \
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SPI_SSEL, \
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SPI_MOSI, \
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GPIO_GA0, \
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GPIO_GA1, \
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GPIO_GA2, \
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GPIO_GA_TEST, \
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GPIO_LEDBLUE, \
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GPIO_LEDGREEN, \
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GPIO_LEDRED, \
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GPIO_FRONT_BUTTON, \
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GPIO_HOT_SWAP_HANDLE, \
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GPIO_EN_P1V0, \
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GPIO_EN_P1V2, \
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GPIO_EN_P1V8, \
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GPIO_EN_P3V3, \
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GPIO_EN_P1V5_VTT, \
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GPIO_DCDC_PGOOD, \
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GPIO_EN_FMC1_P12V, \
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GPIO_EN_FMC1_P3V3, \
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GPIO_EN_FMC1_PVADJ, \
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GPIO_EN_FMC2_P12V, \
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GPIO_EN_FMC2_P3V3, \
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GPIO_EN_FMC2_PVADJ, \
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GPIO_EN_RTM_PWR, \
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GPIO_RTM_PS, \
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GPIO_EN_RTM_I2C, \
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GPIO_FPGA_PROGRAM_B, \
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GPIO_FPGA_DONE_B, \
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GPIO_FPGA_RESET, \
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GPIO_FPGA_INITB, \
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GPIO_FLASH_CS_MUX, \
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GPIO_DAC_VADJ_RST, \
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GPIO_DAC_VADJ_CSN, \
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GPIO_ADN_UPDATE, \
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GPIO_ADN_RESETN, \
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GPIO_SCANSTA1101_ADDR0, \
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GPIO_SCANSTA1101_ADDR1, \
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GPIO_SCANSTA1101_ADDR2, \
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GPIO_SCANSTA1101_ADDR3, \
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GPIO_SCANSTA1101_ADDR4, \
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GPIO_SCANSTA1101_ADDR5, \
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GPIO_SCANSTA1101_ADDR6, \
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GPIO_SCANSTA1101_TRIST_B, \
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GPIO_MMC_ENABLE, \
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GPIO_FMC1_PRSNT_M2C, \
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GPIO_FMC2_PRSNT_M2C, \
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GPIO_FMC1_PG_M2C, \
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GPIO_FMC2_PG_M2C, \
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GPIO_FMC1_PG_C2M, \
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GPIO_FMC2_PG_C2M
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#endif
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port
board
afc-v3
pin_mapping.h
Generated on Wed Jul 24 2024 08:15:56 for openMMC by
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