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Collaboration diagram for Device_Peripheral_peripheralAddr:
Macros | |
| #define | LPC_WDT_BASE 0x40000000UL |
| #define | LPC_TIMER0_BASE 0x40004000UL |
| #define | LPC_TIMER1_BASE 0x40008000UL |
| #define | LPC_UART0_BASE 0x4000C000UL |
| #define | LPC_UART1_BASE 0x40010000UL |
| #define | LPC_PWM1_BASE 0x40018000UL |
| #define | LPC_I2C0_BASE 0x4001C000UL |
| #define | LPC_SPI_BASE 0x40020000UL |
| #define | LPC_RTC_BASE 0x40024000UL |
| #define | LPC_GPIOINT_BASE 0x40028080UL |
| #define | LPC_PINCONNECT_BASE 0x4002C000UL |
| #define | LPC_SSP1_BASE 0x40030000UL |
| #define | LPC_ADC_BASE 0x40034000UL |
| #define | LPC_CANAFRAM_BASE 0x40038000UL |
| #define | LPC_CANAF_BASE 0x4003C000UL |
| #define | LPC_CCAN_BASE 0x40040000UL |
| #define | LPC_CAN1_BASE 0x40044000UL |
| #define | LPC_CAN2_BASE 0x40048000UL |
| #define | LPC_I2C1_BASE 0x4005C000UL |
| #define | LPC_SSP0_BASE 0x40088000UL |
| #define | LPC_DAC_BASE 0x4008C000UL |
| #define | LPC_TIMER2_BASE 0x40090000UL |
| #define | LPC_TIMER3_BASE 0x40094000UL |
| #define | LPC_UART2_BASE 0x40098000UL |
| #define | LPC_UART3_BASE 0x4009C000UL |
| #define | LPC_I2C2_BASE 0x400A0000UL |
| #define | LPC_I2S_BASE 0x400A8000UL |
| #define | LPC_RITIMER_BASE 0x400B0000UL |
| #define | LPC_MCPWM_BASE 0x400B8000UL |
| #define | LPC_QEI_BASE 0x400BC000UL |
| #define | LPC_SYSCON_BASE 0x400FC000UL |
| #define | LPC_EMAC_BASE 0x50000000UL |
| #define | LPC_GPDMA_BASE 0x50004000UL |
| #define | LPC_USB_BASE 0x50008000UL |
| #define | LPC_GPIO_BASE 0x2009C000UL |
Detailed Description
Macro Definition Documentation
◆ LPC_ADC_BASE
| #define LPC_ADC_BASE 0x40034000UL |
◆ LPC_CAN1_BASE
| #define LPC_CAN1_BASE 0x40044000UL |
◆ LPC_CAN2_BASE
| #define LPC_CAN2_BASE 0x40048000UL |
◆ LPC_CANAF_BASE
| #define LPC_CANAF_BASE 0x4003C000UL |
◆ LPC_CANAFRAM_BASE
| #define LPC_CANAFRAM_BASE 0x40038000UL |
◆ LPC_CCAN_BASE
| #define LPC_CCAN_BASE 0x40040000UL |
◆ LPC_DAC_BASE
| #define LPC_DAC_BASE 0x4008C000UL |
◆ LPC_EMAC_BASE
| #define LPC_EMAC_BASE 0x50000000UL |
◆ LPC_GPDMA_BASE
| #define LPC_GPDMA_BASE 0x50004000UL |
◆ LPC_GPIO_BASE
| #define LPC_GPIO_BASE 0x2009C000UL |
◆ LPC_GPIOINT_BASE
| #define LPC_GPIOINT_BASE 0x40028080UL |
◆ LPC_I2C0_BASE
| #define LPC_I2C0_BASE 0x4001C000UL |
◆ LPC_I2C1_BASE
| #define LPC_I2C1_BASE 0x4005C000UL |
◆ LPC_I2C2_BASE
| #define LPC_I2C2_BASE 0x400A0000UL |
◆ LPC_I2S_BASE
| #define LPC_I2S_BASE 0x400A8000UL |
◆ LPC_MCPWM_BASE
| #define LPC_MCPWM_BASE 0x400B8000UL |
◆ LPC_PINCONNECT_BASE
| #define LPC_PINCONNECT_BASE 0x4002C000UL |
◆ LPC_PWM1_BASE
| #define LPC_PWM1_BASE 0x40018000UL |
◆ LPC_QEI_BASE
| #define LPC_QEI_BASE 0x400BC000UL |
◆ LPC_RITIMER_BASE
| #define LPC_RITIMER_BASE 0x400B0000UL |
◆ LPC_RTC_BASE
| #define LPC_RTC_BASE 0x40024000UL |
◆ LPC_SPI_BASE
| #define LPC_SPI_BASE 0x40020000UL |
◆ LPC_SSP0_BASE
| #define LPC_SSP0_BASE 0x40088000UL |
◆ LPC_SSP1_BASE
| #define LPC_SSP1_BASE 0x40030000UL |
◆ LPC_SYSCON_BASE
| #define LPC_SYSCON_BASE 0x400FC000UL |
◆ LPC_TIMER0_BASE
| #define LPC_TIMER0_BASE 0x40004000UL |
◆ LPC_TIMER1_BASE
| #define LPC_TIMER1_BASE 0x40008000UL |
◆ LPC_TIMER2_BASE
| #define LPC_TIMER2_BASE 0x40090000UL |
◆ LPC_TIMER3_BASE
| #define LPC_TIMER3_BASE 0x40094000UL |
◆ LPC_UART0_BASE
| #define LPC_UART0_BASE 0x4000C000UL |
◆ LPC_UART1_BASE
| #define LPC_UART1_BASE 0x40010000UL |
◆ LPC_UART2_BASE
| #define LPC_UART2_BASE 0x40098000UL |
◆ LPC_UART3_BASE
| #define LPC_UART3_BASE 0x4009C000UL |
◆ LPC_USB_BASE
| #define LPC_USB_BASE 0x50008000UL |
◆ LPC_WDT_BASE
| #define LPC_WDT_BASE 0x40000000UL |
