Collaboration diagram for PosMask_peripherals:

Macros
#define	WDT_MOD_WDEN_Pos (0UL)

#define	WDT_MOD_WDEN_Msk (0x1UL)

#define	WDT_MOD_WDRESET_Pos (1UL)

#define	WDT_MOD_WDRESET_Msk (0x2UL)

#define	WDT_MOD_WDTOF_Pos (2UL)

#define	WDT_MOD_WDTOF_Msk (0x4UL)

#define	WDT_MOD_WDINT_Pos (3UL)

#define	WDT_MOD_WDINT_Msk (0x8UL)

#define	WDT_TC_Count_Pos (0UL)

#define	WDT_TC_Count_Msk (0xffffffffUL)

#define	WDT_FEED_Feed_Pos (0UL)

#define	WDT_FEED_Feed_Msk (0xffUL)

#define	WDT_TV_Count_Pos (0UL)

#define	WDT_TV_Count_Msk (0xffffffffUL)

#define	WDT_CLKSEL_CLKSEL_Pos (0UL)

#define	WDT_CLKSEL_CLKSEL_Msk (0x3UL)

#define	WDT_CLKSEL_LOCK_Pos (31UL)

#define	WDT_CLKSEL_LOCK_Msk (0x80000000UL)

#define	TIMER0_IR_MR0INT_Pos (0UL)

#define	TIMER0_IR_MR0INT_Msk (0x1UL)

#define	TIMER0_IR_MR1INT_Pos (1UL)

#define	TIMER0_IR_MR1INT_Msk (0x2UL)

#define	TIMER0_IR_MR2INT_Pos (2UL)

#define	TIMER0_IR_MR2INT_Msk (0x4UL)

#define	TIMER0_IR_MR3INT_Pos (3UL)

#define	TIMER0_IR_MR3INT_Msk (0x8UL)

#define	TIMER0_IR_CR0INT_Pos (4UL)

#define	TIMER0_IR_CR0INT_Msk (0x10UL)

#define	TIMER0_IR_CR1INT_Pos (5UL)

#define	TIMER0_IR_CR1INT_Msk (0x20UL)

#define	TIMER0_TCR_CEN_Pos (0UL)

#define	TIMER0_TCR_CEN_Msk (0x1UL)

#define	TIMER0_TCR_CRST_Pos (1UL)

#define	TIMER0_TCR_CRST_Msk (0x2UL)

#define	TIMER0_TC_TC_Pos (0UL)

#define	TIMER0_TC_TC_Msk (0xffffffffUL)

#define	TIMER0_PR_PM_Pos (0UL)

#define	TIMER0_PR_PM_Msk (0xffffffffUL)

#define	TIMER0_PC_PC_Pos (0UL)

#define	TIMER0_PC_PC_Msk (0xffffffffUL)

#define	TIMER0_MCR_MR0I_Pos (0UL)

#define	TIMER0_MCR_MR0I_Msk (0x1UL)

#define	TIMER0_MCR_MR0R_Pos (1UL)

#define	TIMER0_MCR_MR0R_Msk (0x2UL)

#define	TIMER0_MCR_MR0S_Pos (2UL)

#define	TIMER0_MCR_MR0S_Msk (0x4UL)

#define	TIMER0_MCR_MR1I_Pos (3UL)

#define	TIMER0_MCR_MR1I_Msk (0x8UL)

#define	TIMER0_MCR_MR1R_Pos (4UL)

#define	TIMER0_MCR_MR1R_Msk (0x10UL)

#define	TIMER0_MCR_MR1S_Pos (5UL)

#define	TIMER0_MCR_MR1S_Msk (0x20UL)

#define	TIMER0_MCR_MR2I_Pos (6UL)

#define	TIMER0_MCR_MR2I_Msk (0x40UL)

#define	TIMER0_MCR_MR2R_Pos (7UL)

#define	TIMER0_MCR_MR2R_Msk (0x80UL)

#define	TIMER0_MCR_MR2S_Pos (8UL)

#define	TIMER0_MCR_MR2S_Msk (0x100UL)

#define	TIMER0_MCR_MR3I_Pos (9UL)

#define	TIMER0_MCR_MR3I_Msk (0x200UL)

#define	TIMER0_MCR_MR3R_Pos (10UL)

#define	TIMER0_MCR_MR3R_Msk (0x400UL)

#define	TIMER0_MCR_MR3S_Pos (11UL)

#define	TIMER0_MCR_MR3S_Msk (0x800UL)

#define	TIMER0_CCR_CAP0RE_Pos (0UL)

#define	TIMER0_CCR_CAP0RE_Msk (0x1UL)

#define	TIMER0_CCR_CAP0FE_Pos (1UL)

#define	TIMER0_CCR_CAP0FE_Msk (0x2UL)

#define	TIMER0_CCR_CAP0I_Pos (2UL)

#define	TIMER0_CCR_CAP0I_Msk (0x4UL)

#define	TIMER0_CCR_CAP1RE_Pos (3UL)

#define	TIMER0_CCR_CAP1RE_Msk (0x8UL)

#define	TIMER0_CCR_CAP1FE_Pos (4UL)

#define	TIMER0_CCR_CAP1FE_Msk (0x10UL)

#define	TIMER0_CCR_CAP1I_Pos (5UL)

#define	TIMER0_CCR_CAP1I_Msk (0x20UL)

#define	TIMER0_EMR_EM0_Pos (0UL)

#define	TIMER0_EMR_EM0_Msk (0x1UL)

#define	TIMER0_EMR_EM1_Pos (1UL)

#define	TIMER0_EMR_EM1_Msk (0x2UL)

#define	TIMER0_EMR_EM2_Pos (2UL)

#define	TIMER0_EMR_EM2_Msk (0x4UL)

#define	TIMER0_EMR_EM3_Pos (3UL)

#define	TIMER0_EMR_EM3_Msk (0x8UL)

#define	TIMER0_EMR_EMC0_Pos (4UL)

#define	TIMER0_EMR_EMC0_Msk (0x30UL)

#define	TIMER0_EMR_EMC1_Pos (6UL)

#define	TIMER0_EMR_EMC1_Msk (0xc0UL)

#define	TIMER0_EMR_EMC2_Pos (8UL)

#define	TIMER0_EMR_EMC2_Msk (0x300UL)

#define	TIMER0_EMR_EMC3_Pos (10UL)

#define	TIMER0_EMR_EMC3_Msk (0xc00UL)

#define	TIMER0_CTCR_CTMODE_Pos (0UL)

#define	TIMER0_CTCR_CTMODE_Msk (0x3UL)

#define	TIMER0_CTCR_CINSEL_Pos (2UL)

#define	TIMER0_CTCR_CINSEL_Msk (0xcUL)

#define	TIMER1_IR_MR0INT_Pos (0UL)

#define	TIMER1_IR_MR0INT_Msk (0x1UL)

#define	TIMER1_IR_MR1INT_Pos (1UL)

#define	TIMER1_IR_MR1INT_Msk (0x2UL)

#define	TIMER1_IR_MR2INT_Pos (2UL)

#define	TIMER1_IR_MR2INT_Msk (0x4UL)

#define	TIMER1_IR_MR3INT_Pos (3UL)

#define	TIMER1_IR_MR3INT_Msk (0x8UL)

#define	TIMER1_IR_CR0INT_Pos (4UL)

#define	TIMER1_IR_CR0INT_Msk (0x10UL)

#define	TIMER1_IR_CR1INT_Pos (5UL)

#define	TIMER1_IR_CR1INT_Msk (0x20UL)

#define	TIMER1_TCR_CEN_Pos (0UL)

#define	TIMER1_TCR_CEN_Msk (0x1UL)

#define	TIMER1_TCR_CRST_Pos (1UL)

#define	TIMER1_TCR_CRST_Msk (0x2UL)

#define	TIMER1_TC_TC_Pos (0UL)

#define	TIMER1_TC_TC_Msk (0xffffffffUL)

#define	TIMER1_PR_PM_Pos (0UL)

#define	TIMER1_PR_PM_Msk (0xffffffffUL)

#define	TIMER1_PC_PC_Pos (0UL)

#define	TIMER1_PC_PC_Msk (0xffffffffUL)

#define	TIMER1_MCR_MR0I_Pos (0UL)

#define	TIMER1_MCR_MR0I_Msk (0x1UL)

#define	TIMER1_MCR_MR0R_Pos (1UL)

#define	TIMER1_MCR_MR0R_Msk (0x2UL)

#define	TIMER1_MCR_MR0S_Pos (2UL)

#define	TIMER1_MCR_MR0S_Msk (0x4UL)

#define	TIMER1_MCR_MR1I_Pos (3UL)

#define	TIMER1_MCR_MR1I_Msk (0x8UL)

#define	TIMER1_MCR_MR1R_Pos (4UL)

#define	TIMER1_MCR_MR1R_Msk (0x10UL)

#define	TIMER1_MCR_MR1S_Pos (5UL)

#define	TIMER1_MCR_MR1S_Msk (0x20UL)

#define	TIMER1_MCR_MR2I_Pos (6UL)

#define	TIMER1_MCR_MR2I_Msk (0x40UL)

#define	TIMER1_MCR_MR2R_Pos (7UL)

#define	TIMER1_MCR_MR2R_Msk (0x80UL)

#define	TIMER1_MCR_MR2S_Pos (8UL)

#define	TIMER1_MCR_MR2S_Msk (0x100UL)

#define	TIMER1_MCR_MR3I_Pos (9UL)

#define	TIMER1_MCR_MR3I_Msk (0x200UL)

#define	TIMER1_MCR_MR3R_Pos (10UL)

#define	TIMER1_MCR_MR3R_Msk (0x400UL)

#define	TIMER1_MCR_MR3S_Pos (11UL)

#define	TIMER1_MCR_MR3S_Msk (0x800UL)

#define	TIMER1_CCR_CAP0RE_Pos (0UL)

#define	TIMER1_CCR_CAP0RE_Msk (0x1UL)

#define	TIMER1_CCR_CAP0FE_Pos (1UL)

#define	TIMER1_CCR_CAP0FE_Msk (0x2UL)

#define	TIMER1_CCR_CAP0I_Pos (2UL)

#define	TIMER1_CCR_CAP0I_Msk (0x4UL)

#define	TIMER1_CCR_CAP1RE_Pos (3UL)

#define	TIMER1_CCR_CAP1RE_Msk (0x8UL)

#define	TIMER1_CCR_CAP1FE_Pos (4UL)

#define	TIMER1_CCR_CAP1FE_Msk (0x10UL)

#define	TIMER1_CCR_CAP1I_Pos (5UL)

#define	TIMER1_CCR_CAP1I_Msk (0x20UL)

#define	TIMER1_EMR_EM0_Pos (0UL)

#define	TIMER1_EMR_EM0_Msk (0x1UL)

#define	TIMER1_EMR_EM1_Pos (1UL)

#define	TIMER1_EMR_EM1_Msk (0x2UL)

#define	TIMER1_EMR_EM2_Pos (2UL)

#define	TIMER1_EMR_EM2_Msk (0x4UL)

#define	TIMER1_EMR_EM3_Pos (3UL)

#define	TIMER1_EMR_EM3_Msk (0x8UL)

#define	TIMER1_EMR_EMC0_Pos (4UL)

#define	TIMER1_EMR_EMC0_Msk (0x30UL)

#define	TIMER1_EMR_EMC1_Pos (6UL)

#define	TIMER1_EMR_EMC1_Msk (0xc0UL)

#define	TIMER1_EMR_EMC2_Pos (8UL)

#define	TIMER1_EMR_EMC2_Msk (0x300UL)

#define	TIMER1_EMR_EMC3_Pos (10UL)

#define	TIMER1_EMR_EMC3_Msk (0xc00UL)

#define	TIMER1_CTCR_CTMODE_Pos (0UL)

#define	TIMER1_CTCR_CTMODE_Msk (0x3UL)

#define	TIMER1_CTCR_CINSEL_Pos (2UL)

#define	TIMER1_CTCR_CINSEL_Msk (0xcUL)

#define	UART0_RBR_RBR_Pos (0UL)

#define	UART0_RBR_RBR_Msk (0xffUL)

#define	UART0_THR_THR_Pos (0UL)

#define	UART0_THR_THR_Msk (0xffUL)

#define	UART0_DLL_DLLSB_Pos (0UL)

#define	UART0_DLL_DLLSB_Msk (0xffUL)

#define	UART0_DLM_DLMSB_Pos (0UL)

#define	UART0_DLM_DLMSB_Msk (0xffUL)

#define	UART0_IER_RBRIE_Pos (0UL)

#define	UART0_IER_RBRIE_Msk (0x1UL)

#define	UART0_IER_THREIE_Pos (1UL)

#define	UART0_IER_THREIE_Msk (0x2UL)

#define	UART0_IER_RXIE_Pos (2UL)

#define	UART0_IER_RXIE_Msk (0x4UL)

#define	UART0_IER_ABEOINTEN_Pos (8UL)

#define	UART0_IER_ABEOINTEN_Msk (0x100UL)

#define	UART0_IER_ABTOINTEN_Pos (9UL)

#define	UART0_IER_ABTOINTEN_Msk (0x200UL)

#define	UART0_IIR_INTSTATUS_Pos (0UL)

#define	UART0_IIR_INTSTATUS_Msk (0x1UL)

#define	UART0_IIR_INTID_Pos (1UL)

#define	UART0_IIR_INTID_Msk (0xeUL)

#define	UART0_IIR_FIFOENABLE_Pos (6UL)

#define	UART0_IIR_FIFOENABLE_Msk (0xc0UL)

#define	UART0_IIR_ABEOINT_Pos (8UL)

#define	UART0_IIR_ABEOINT_Msk (0x100UL)

#define	UART0_IIR_ABTOINT_Pos (9UL)

#define	UART0_IIR_ABTOINT_Msk (0x200UL)

#define	UART0_FCR_FIFOEN_Pos (0UL)

#define	UART0_FCR_FIFOEN_Msk (0x1UL)

#define	UART0_FCR_RXFIFORES_Pos (1UL)

#define	UART0_FCR_RXFIFORES_Msk (0x2UL)

#define	UART0_FCR_TXFIFORES_Pos (2UL)

#define	UART0_FCR_TXFIFORES_Msk (0x4UL)

#define	UART0_FCR_DMAMODE_Pos (3UL)

#define	UART0_FCR_DMAMODE_Msk (0x8UL)

#define	UART0_FCR_RXTRIGLVL_Pos (6UL)

#define	UART0_FCR_RXTRIGLVL_Msk (0xc0UL)

#define	UART0_LCR_WLS_Pos (0UL)

#define	UART0_LCR_WLS_Msk (0x3UL)

#define	UART0_LCR_SBS_Pos (2UL)

#define	UART0_LCR_SBS_Msk (0x4UL)

#define	UART0_LCR_PE_Pos (3UL)

#define	UART0_LCR_PE_Msk (0x8UL)

#define	UART0_LCR_PS_Pos (4UL)

#define	UART0_LCR_PS_Msk (0x30UL)

#define	UART0_LCR_BC_Pos (6UL)

#define	UART0_LCR_BC_Msk (0x40UL)

#define	UART0_LCR_DLAB_Pos (7UL)

#define	UART0_LCR_DLAB_Msk (0x80UL)

#define	UART0_LSR_RDR_Pos (0UL)

#define	UART0_LSR_RDR_Msk (0x1UL)

#define	UART0_LSR_OE_Pos (1UL)

#define	UART0_LSR_OE_Msk (0x2UL)

#define	UART0_LSR_PE_Pos (2UL)

#define	UART0_LSR_PE_Msk (0x4UL)

#define	UART0_LSR_FE_Pos (3UL)

#define	UART0_LSR_FE_Msk (0x8UL)

#define	UART0_LSR_BI_Pos (4UL)

#define	UART0_LSR_BI_Msk (0x10UL)

#define	UART0_LSR_THRE_Pos (5UL)

#define	UART0_LSR_THRE_Msk (0x20UL)

#define	UART0_LSR_TEMT_Pos (6UL)

#define	UART0_LSR_TEMT_Msk (0x40UL)

#define	UART0_LSR_RXFE_Pos (7UL)

#define	UART0_LSR_RXFE_Msk (0x80UL)

#define	UART0_SCR_PAD_Pos (0UL)

#define	UART0_SCR_PAD_Msk (0xffUL)

#define	UART0_ACR_START_Pos (0UL)

#define	UART0_ACR_START_Msk (0x1UL)

#define	UART0_ACR_MODE_Pos (1UL)

#define	UART0_ACR_MODE_Msk (0x2UL)

#define	UART0_ACR_AUTORESTART_Pos (2UL)

#define	UART0_ACR_AUTORESTART_Msk (0x4UL)

#define	UART0_ACR_ABEOINTCLR_Pos (8UL)

#define	UART0_ACR_ABEOINTCLR_Msk (0x100UL)

#define	UART0_ACR_ABTOINTCLR_Pos (9UL)

#define	UART0_ACR_ABTOINTCLR_Msk (0x200UL)

#define	UART0_FDR_DIVADDVAL_Pos (0UL)

#define	UART0_FDR_DIVADDVAL_Msk (0xfUL)

#define	UART0_FDR_MULVAL_Pos (4UL)

#define	UART0_FDR_MULVAL_Msk (0xf0UL)

#define	UART0_TER_TXEN_Pos (7UL)

#define	UART0_TER_TXEN_Msk (0x80UL)

#define	UART0_RS485CTRL_NMMEN_Pos (0UL)

#define	UART0_RS485CTRL_NMMEN_Msk (0x1UL)

#define	UART0_RS485CTRL_RXDIS_Pos (1UL)

#define	UART0_RS485CTRL_RXDIS_Msk (0x2UL)

#define	UART0_RS485CTRL_AADEN_Pos (2UL)

#define	UART0_RS485CTRL_AADEN_Msk (0x4UL)

#define	UART0_RS485CTRL_DCTRL_Pos (4UL)

#define	UART0_RS485CTRL_DCTRL_Msk (0x10UL)

#define	UART0_RS485CTRL_OINV_Pos (5UL)

#define	UART0_RS485CTRL_OINV_Msk (0x20UL)

#define	UART0_RS485ADRMATCH_ADRMATCH_Pos (0UL)

#define	UART0_RS485ADRMATCH_ADRMATCH_Msk (0xffUL)

#define	UART0_RS485DLY_DLY_Pos (0UL)

#define	UART0_RS485DLY_DLY_Msk (0xffUL)

#define	UART1_RBR_RBR_Pos (0UL)

#define	UART1_RBR_RBR_Msk (0xffUL)

#define	UART1_THR_THR_Pos (0UL)

#define	UART1_THR_THR_Msk (0xffUL)

#define	UART1_DLL_DLLSB_Pos (0UL)

#define	UART1_DLL_DLLSB_Msk (0xffUL)

#define	UART1_DLM_DLMSB_Pos (0UL)

#define	UART1_DLM_DLMSB_Msk (0xffUL)

#define	UART1_IER_RBRIE_Pos (0UL)

#define	UART1_IER_RBRIE_Msk (0x1UL)

#define	UART1_IER_THREIE_Pos (1UL)

#define	UART1_IER_THREIE_Msk (0x2UL)

#define	UART1_IER_RXIE_Pos (2UL)

#define	UART1_IER_RXIE_Msk (0x4UL)

#define	UART1_IER_MSIE_Pos (3UL)

#define	UART1_IER_MSIE_Msk (0x8UL)

#define	UART1_IER_CTSIE_Pos (7UL)

#define	UART1_IER_CTSIE_Msk (0x80UL)

#define	UART1_IER_ABEOIE_Pos (8UL)

#define	UART1_IER_ABEOIE_Msk (0x100UL)

#define	UART1_IER_ABTOIE_Pos (9UL)

#define	UART1_IER_ABTOIE_Msk (0x200UL)

#define	UART1_IIR_INTSTATUS_Pos (0UL)

#define	UART1_IIR_INTSTATUS_Msk (0x1UL)

#define	UART1_IIR_INTID_Pos (1UL)

#define	UART1_IIR_INTID_Msk (0xeUL)

#define	UART1_IIR_FIFOENABLE_Pos (6UL)

#define	UART1_IIR_FIFOENABLE_Msk (0xc0UL)

#define	UART1_IIR_ABEOINT_Pos (8UL)

#define	UART1_IIR_ABEOINT_Msk (0x100UL)

#define	UART1_IIR_ABTOINT_Pos (9UL)

#define	UART1_IIR_ABTOINT_Msk (0x200UL)

#define	UART1_FCR_FIFOEN_Pos (0UL)

#define	UART1_FCR_FIFOEN_Msk (0x1UL)

#define	UART1_FCR_RXFIFORES_Pos (1UL)

#define	UART1_FCR_RXFIFORES_Msk (0x2UL)

#define	UART1_FCR_TXFIFORES_Pos (2UL)

#define	UART1_FCR_TXFIFORES_Msk (0x4UL)

#define	UART1_FCR_DMAMODE_Pos (3UL)

#define	UART1_FCR_DMAMODE_Msk (0x8UL)

#define	UART1_FCR_RXTRIGLVL_Pos (6UL)

#define	UART1_FCR_RXTRIGLVL_Msk (0xc0UL)

#define	UART1_LCR_WLS_Pos (0UL)

#define	UART1_LCR_WLS_Msk (0x3UL)

#define	UART1_LCR_SBS_Pos (2UL)

#define	UART1_LCR_SBS_Msk (0x4UL)

#define	UART1_LCR_PE_Pos (3UL)

#define	UART1_LCR_PE_Msk (0x8UL)

#define	UART1_LCR_PS_Pos (4UL)

#define	UART1_LCR_PS_Msk (0x30UL)

#define	UART1_LCR_BC_Pos (6UL)

#define	UART1_LCR_BC_Msk (0x40UL)

#define	UART1_LCR_DLAB_Pos (7UL)

#define	UART1_LCR_DLAB_Msk (0x80UL)

#define	UART1_MCR_DTRCTRL_Pos (0UL)

#define	UART1_MCR_DTRCTRL_Msk (0x1UL)

#define	UART1_MCR_RTSCTRL_Pos (1UL)

#define	UART1_MCR_RTSCTRL_Msk (0x2UL)

#define	UART1_MCR_LMS_Pos (4UL)

#define	UART1_MCR_LMS_Msk (0x10UL)

#define	UART1_MCR_RTSEN_Pos (6UL)

#define	UART1_MCR_RTSEN_Msk (0x40UL)

#define	UART1_MCR_CTSEN_Pos (7UL)

#define	UART1_MCR_CTSEN_Msk (0x80UL)

#define	UART1_LSR_RDR_Pos (0UL)

#define	UART1_LSR_RDR_Msk (0x1UL)

#define	UART1_LSR_OE_Pos (1UL)

#define	UART1_LSR_OE_Msk (0x2UL)

#define	UART1_LSR_PE_Pos (2UL)

#define	UART1_LSR_PE_Msk (0x4UL)

#define	UART1_LSR_FE_Pos (3UL)

#define	UART1_LSR_FE_Msk (0x8UL)

#define	UART1_LSR_BI_Pos (4UL)

#define	UART1_LSR_BI_Msk (0x10UL)

#define	UART1_LSR_THRE_Pos (5UL)

#define	UART1_LSR_THRE_Msk (0x20UL)

#define	UART1_LSR_TEMT_Pos (6UL)

#define	UART1_LSR_TEMT_Msk (0x40UL)

#define	UART1_LSR_RXFE_Pos (7UL)

#define	UART1_LSR_RXFE_Msk (0x80UL)

#define	UART1_MSR_DCTS_Pos (0UL)

#define	UART1_MSR_DCTS_Msk (0x1UL)

#define	UART1_MSR_DDSR_Pos (1UL)

#define	UART1_MSR_DDSR_Msk (0x2UL)

#define	UART1_MSR_TERI_Pos (2UL)

#define	UART1_MSR_TERI_Msk (0x4UL)

#define	UART1_MSR_DDCD_Pos (3UL)

#define	UART1_MSR_DDCD_Msk (0x8UL)

#define	UART1_MSR_CTS_Pos (4UL)

#define	UART1_MSR_CTS_Msk (0x10UL)

#define	UART1_MSR_DSR_Pos (5UL)

#define	UART1_MSR_DSR_Msk (0x20UL)

#define	UART1_MSR_RI_Pos (6UL)

#define	UART1_MSR_RI_Msk (0x40UL)

#define	UART1_MSR_DCD_Pos (7UL)

#define	UART1_MSR_DCD_Msk (0x80UL)

#define	UART1_SCR_Pad_Pos (0UL)

#define	UART1_SCR_Pad_Msk (0xffUL)

#define	UART1_ACR_START_Pos (0UL)

#define	UART1_ACR_START_Msk (0x1UL)

#define	UART1_ACR_MODE_Pos (1UL)

#define	UART1_ACR_MODE_Msk (0x2UL)

#define	UART1_ACR_AUTORESTART_Pos (2UL)

#define	UART1_ACR_AUTORESTART_Msk (0x4UL)

#define	UART1_ACR_ABEOINTCLR_Pos (8UL)

#define	UART1_ACR_ABEOINTCLR_Msk (0x100UL)

#define	UART1_ACR_ABTOINTCLR_Pos (9UL)

#define	UART1_ACR_ABTOINTCLR_Msk (0x200UL)

#define	UART1_FDR_DIVADDVAL_Pos (0UL)

#define	UART1_FDR_DIVADDVAL_Msk (0xfUL)

#define	UART1_FDR_MULVAL_Pos (4UL)

#define	UART1_FDR_MULVAL_Msk (0xf0UL)

#define	UART1_TER_TXEN_Pos (7UL)

#define	UART1_TER_TXEN_Msk (0x80UL)

#define	UART1_RS485CTRL_NMMEN_Pos (0UL)

#define	UART1_RS485CTRL_NMMEN_Msk (0x1UL)

#define	UART1_RS485CTRL_RXDIS_Pos (1UL)

#define	UART1_RS485CTRL_RXDIS_Msk (0x2UL)

#define	UART1_RS485CTRL_AADEN_Pos (2UL)

#define	UART1_RS485CTRL_AADEN_Msk (0x4UL)

#define	UART1_RS485CTRL_SEL_Pos (3UL)

#define	UART1_RS485CTRL_SEL_Msk (0x8UL)

#define	UART1_RS485CTRL_DCTRL_Pos (4UL)

#define	UART1_RS485CTRL_DCTRL_Msk (0x10UL)

#define	UART1_RS485CTRL_OINV_Pos (5UL)

#define	UART1_RS485CTRL_OINV_Msk (0x20UL)

#define	UART1_RS485ADRMATCH_ADRMATCH_Pos (0UL)

#define	UART1_RS485ADRMATCH_ADRMATCH_Msk (0xffUL)

#define	UART1_RS485DLY_DLY_Pos (0UL)

#define	UART1_RS485DLY_DLY_Msk (0xffUL)

#define	PWM1_IR_PWMMR0INT_Pos (0UL)

#define	PWM1_IR_PWMMR0INT_Msk (0x1UL)

#define	PWM1_IR_PWMMR1INT_Pos (1UL)

#define	PWM1_IR_PWMMR1INT_Msk (0x2UL)

#define	PWM1_IR_PWMMR2INT_Pos (2UL)

#define	PWM1_IR_PWMMR2INT_Msk (0x4UL)

#define	PWM1_IR_PWMMR3INT_Pos (3UL)

#define	PWM1_IR_PWMMR3INT_Msk (0x8UL)

#define	PWM1_IR_PWMCAP0INT_Pos (4UL)

#define	PWM1_IR_PWMCAP0INT_Msk (0x10UL)

#define	PWM1_IR_PWMCAP1INT_Pos (5UL)

#define	PWM1_IR_PWMCAP1INT_Msk (0x20UL)

#define	PWM1_IR_PWMMR4INT_Pos (8UL)

#define	PWM1_IR_PWMMR4INT_Msk (0x100UL)

#define	PWM1_IR_PWMMR5INT_Pos (9UL)

#define	PWM1_IR_PWMMR5INT_Msk (0x200UL)

#define	PWM1_IR_PWMMR6INT_Pos (10UL)

#define	PWM1_IR_PWMMR6INT_Msk (0x400UL)

#define	PWM1_TCR_CE_Pos (0UL)

#define	PWM1_TCR_CE_Msk (0x1UL)

#define	PWM1_TCR_CR_Pos (1UL)

#define	PWM1_TCR_CR_Msk (0x2UL)

#define	PWM1_TCR_PWMEN_Pos (3UL)

#define	PWM1_TCR_PWMEN_Msk (0x8UL)

#define	PWM1_TCR_MDIS_Pos (4UL)

#define	PWM1_TCR_MDIS_Msk (0x10UL)

#define	PWM1_TC_TC_Pos (0UL)

#define	PWM1_TC_TC_Msk (0xffffffffUL)

#define	PWM1_PR_PM_Pos (0UL)

#define	PWM1_PR_PM_Msk (0xffffffffUL)

#define	PWM1_PC_PC_Pos (0UL)

#define	PWM1_PC_PC_Msk (0xffffffffUL)

#define	PWM1_MCR_PWMMR0I_Pos (0UL)

#define	PWM1_MCR_PWMMR0I_Msk (0x1UL)

#define	PWM1_MCR_PWMMR0R_Pos (1UL)

#define	PWM1_MCR_PWMMR0R_Msk (0x2UL)

#define	PWM1_MCR_PWMMR0S_Pos (2UL)

#define	PWM1_MCR_PWMMR0S_Msk (0x4UL)

#define	PWM1_MCR_PWMMR1I_Pos (3UL)

#define	PWM1_MCR_PWMMR1I_Msk (0x8UL)

#define	PWM1_MCR_PWMMR1R_Pos (4UL)

#define	PWM1_MCR_PWMMR1R_Msk (0x10UL)

#define	PWM1_MCR_PWMMR1S_Pos (5UL)

#define	PWM1_MCR_PWMMR1S_Msk (0x20UL)

#define	PWM1_MCR_PWMMR2I_Pos (6UL)

#define	PWM1_MCR_PWMMR2I_Msk (0x40UL)

#define	PWM1_MCR_PWMMR2R_Pos (7UL)

#define	PWM1_MCR_PWMMR2R_Msk (0x80UL)

#define	PWM1_MCR_PWMMR2S_Pos (8UL)

#define	PWM1_MCR_PWMMR2S_Msk (0x100UL)

#define	PWM1_MCR_PWMMR3I_Pos (9UL)

#define	PWM1_MCR_PWMMR3I_Msk (0x200UL)

#define	PWM1_MCR_PWMMR3R_Pos (10UL)

#define	PWM1_MCR_PWMMR3R_Msk (0x400UL)

#define	PWM1_MCR_PWMMR3S_Pos (11UL)

#define	PWM1_MCR_PWMMR3S_Msk (0x800UL)

#define	PWM1_MCR_PWMMR4I_Pos (12UL)

#define	PWM1_MCR_PWMMR4I_Msk (0x1000UL)

#define	PWM1_MCR_PWMMR4R_Pos (13UL)

#define	PWM1_MCR_PWMMR4R_Msk (0x2000UL)

#define	PWM1_MCR_PWMMR4S_Pos (14UL)

#define	PWM1_MCR_PWMMR4S_Msk (0x4000UL)

#define	PWM1_MCR_PWMMR5I_Pos (15UL)

#define	PWM1_MCR_PWMMR5I_Msk (0x8000UL)

#define	PWM1_MCR_PWMMR5R_Pos (16UL)

#define	PWM1_MCR_PWMMR5R_Msk (0x10000UL)

#define	PWM1_MCR_PWMMR5S_Pos (17UL)

#define	PWM1_MCR_PWMMR5S_Msk (0x20000UL)

#define	PWM1_MCR_PWMMR6I_Pos (18UL)

#define	PWM1_MCR_PWMMR6I_Msk (0x40000UL)

#define	PWM1_MCR_PWMMR6R_Pos (19UL)

#define	PWM1_MCR_PWMMR6R_Msk (0x80000UL)

#define	PWM1_MCR_PWMMR6S_Pos (20UL)

#define	PWM1_MCR_PWMMR6S_Msk (0x100000UL)

#define	PWM1_MR0_MATCH_Pos (0UL)

#define	PWM1_MR0_MATCH_Msk (0xffffffffUL)

#define	PWM1_MR1_MATCH_Pos (0UL)

#define	PWM1_MR1_MATCH_Msk (0xffffffffUL)

#define	PWM1_MR2_MATCH_Pos (0UL)

#define	PWM1_MR2_MATCH_Msk (0xffffffffUL)

#define	PWM1_MR3_MATCH_Pos (0UL)

#define	PWM1_MR3_MATCH_Msk (0xffffffffUL)

#define	PWM1_CCR_CAP0_R_Pos (0UL)

#define	PWM1_CCR_CAP0_R_Msk (0x1UL)

#define	PWM1_CCR_CAP0_F_Pos (1UL)

#define	PWM1_CCR_CAP0_F_Msk (0x2UL)

#define	PWM1_CCR_CAP0_I_Pos (2UL)

#define	PWM1_CCR_CAP0_I_Msk (0x4UL)

#define	PWM1_CCR_CAP1_R_Pos (3UL)

#define	PWM1_CCR_CAP1_R_Msk (0x8UL)

#define	PWM1_CCR_CAP1_F_Pos (4UL)

#define	PWM1_CCR_CAP1_F_Msk (0x10UL)

#define	PWM1_CCR_CAP1_I_Pos (5UL)

#define	PWM1_CCR_CAP1_I_Msk (0x20UL)

#define	PWM1_MR4_MATCH_Pos (0UL)

#define	PWM1_MR4_MATCH_Msk (0xffffffffUL)

#define	PWM1_MR5_MATCH_Pos (0UL)

#define	PWM1_MR5_MATCH_Msk (0xffffffffUL)

#define	PWM1_MR6_MATCH_Pos (0UL)

#define	PWM1_MR6_MATCH_Msk (0xffffffffUL)

#define	PWM1_PCR_PWMSEL2_Pos (2UL)

#define	PWM1_PCR_PWMSEL2_Msk (0x4UL)

#define	PWM1_PCR_PWMSEL3_Pos (3UL)

#define	PWM1_PCR_PWMSEL3_Msk (0x8UL)

#define	PWM1_PCR_PWMSEL4_Pos (4UL)

#define	PWM1_PCR_PWMSEL4_Msk (0x10UL)

#define	PWM1_PCR_PWMSEL5_Pos (5UL)

#define	PWM1_PCR_PWMSEL5_Msk (0x20UL)

#define	PWM1_PCR_PWMSEL6_Pos (6UL)

#define	PWM1_PCR_PWMSEL6_Msk (0x40UL)

#define	PWM1_PCR_PWMENA1_Pos (9UL)

#define	PWM1_PCR_PWMENA1_Msk (0x200UL)

#define	PWM1_PCR_PWMENA2_Pos (10UL)

#define	PWM1_PCR_PWMENA2_Msk (0x400UL)

#define	PWM1_PCR_PWMENA3_Pos (11UL)

#define	PWM1_PCR_PWMENA3_Msk (0x800UL)

#define	PWM1_PCR_PWMENA4_Pos (12UL)

#define	PWM1_PCR_PWMENA4_Msk (0x1000UL)

#define	PWM1_PCR_PWMENA5_Pos (13UL)

#define	PWM1_PCR_PWMENA5_Msk (0x2000UL)

#define	PWM1_PCR_PWMENA6_Pos (14UL)

#define	PWM1_PCR_PWMENA6_Msk (0x4000UL)

#define	PWM1_LER_MAT0LATCHEN_Pos (0UL)

#define	PWM1_LER_MAT0LATCHEN_Msk (0x1UL)

#define	PWM1_LER_MAT1LATCHEN_Pos (1UL)

#define	PWM1_LER_MAT1LATCHEN_Msk (0x2UL)

#define	PWM1_LER_MAT2LATCHEN_Pos (2UL)

#define	PWM1_LER_MAT2LATCHEN_Msk (0x4UL)

#define	PWM1_LER_MAT3LATCHEN_Pos (3UL)

#define	PWM1_LER_MAT3LATCHEN_Msk (0x8UL)

#define	PWM1_LER_MAT4LATCHEN_Pos (4UL)

#define	PWM1_LER_MAT4LATCHEN_Msk (0x10UL)

#define	PWM1_LER_MAT5LATCHEN_Pos (5UL)

#define	PWM1_LER_MAT5LATCHEN_Msk (0x20UL)

#define	PWM1_LER_MAT6LATCHEN_Pos (6UL)

#define	PWM1_LER_MAT6LATCHEN_Msk (0x40UL)

#define	PWM1_CTCR_MOD_Pos (0UL)

#define	PWM1_CTCR_MOD_Msk (0x3UL)

#define	PWM1_CTCR_CIS_Pos (2UL)

#define	PWM1_CTCR_CIS_Msk (0xcUL)

#define	I2C0_CONSET_AA_Pos (2UL)

#define	I2C0_CONSET_AA_Msk (0x4UL)

#define	I2C0_CONSET_SI_Pos (3UL)

#define	I2C0_CONSET_SI_Msk (0x8UL)

#define	I2C0_CONSET_STO_Pos (4UL)

#define	I2C0_CONSET_STO_Msk (0x10UL)

#define	I2C0_CONSET_STA_Pos (5UL)

#define	I2C0_CONSET_STA_Msk (0x20UL)

#define	I2C0_CONSET_I2EN_Pos (6UL)

#define	I2C0_CONSET_I2EN_Msk (0x40UL)

#define	I2C0_STAT_Status_Pos (3UL)

#define	I2C0_STAT_Status_Msk (0xf8UL)

#define	I2C0_DAT_Data_Pos (0UL)

#define	I2C0_DAT_Data_Msk (0xffUL)

#define	I2C0_ADR0_GC_Pos (0UL)

#define	I2C0_ADR0_GC_Msk (0x1UL)

#define	I2C0_ADR0_Address_Pos (1UL)

#define	I2C0_ADR0_Address_Msk (0xfeUL)

#define	I2C0_SCLH_SCLH_Pos (0UL)

#define	I2C0_SCLH_SCLH_Msk (0xffffUL)

#define	I2C0_SCLL_SCLL_Pos (0UL)

#define	I2C0_SCLL_SCLL_Msk (0xffffUL)

#define	I2C0_CONCLR_AAC_Pos (2UL)

#define	I2C0_CONCLR_AAC_Msk (0x4UL)

#define	I2C0_CONCLR_SIC_Pos (3UL)

#define	I2C0_CONCLR_SIC_Msk (0x8UL)

#define	I2C0_CONCLR_STAC_Pos (5UL)

#define	I2C0_CONCLR_STAC_Msk (0x20UL)

#define	I2C0_CONCLR_I2ENC_Pos (6UL)

#define	I2C0_CONCLR_I2ENC_Msk (0x40UL)

#define	I2C0_MMCTRL_MM_ENA_Pos (0UL)

#define	I2C0_MMCTRL_MM_ENA_Msk (0x1UL)

#define	I2C0_MMCTRL_ENA_SCL_Pos (1UL)

#define	I2C0_MMCTRL_ENA_SCL_Msk (0x2UL)

#define	I2C0_MMCTRL_MATCH_ALL_Pos (2UL)

#define	I2C0_MMCTRL_MATCH_ALL_Msk (0x4UL)

#define	I2C0_ADR1_GC_Pos (0UL)

#define	I2C0_ADR1_GC_Msk (0x1UL)

#define	I2C0_ADR1_Address_Pos (1UL)

#define	I2C0_ADR1_Address_Msk (0xfeUL)

#define	I2C0_ADR2_GC_Pos (0UL)

#define	I2C0_ADR2_GC_Msk (0x1UL)

#define	I2C0_ADR2_Address_Pos (1UL)

#define	I2C0_ADR2_Address_Msk (0xfeUL)

#define	I2C0_ADR3_GC_Pos (0UL)

#define	I2C0_ADR3_GC_Msk (0x1UL)

#define	I2C0_ADR3_Address_Pos (1UL)

#define	I2C0_ADR3_Address_Msk (0xfeUL)

#define	I2C0_DATA_BUFFER_Data_Pos (0UL)

#define	I2C0_DATA_BUFFER_Data_Msk (0xffUL)

#define	SPI_CR_BITENABLE_Pos (2UL)

#define	SPI_CR_BITENABLE_Msk (0x4UL)

#define	SPI_CR_CPHA_Pos (3UL)

#define	SPI_CR_CPHA_Msk (0x8UL)

#define	SPI_CR_CPOL_Pos (4UL)

#define	SPI_CR_CPOL_Msk (0x10UL)

#define	SPI_CR_MSTR_Pos (5UL)

#define	SPI_CR_MSTR_Msk (0x20UL)

#define	SPI_CR_LSBF_Pos (6UL)

#define	SPI_CR_LSBF_Msk (0x40UL)

#define	SPI_CR_SPIE_Pos (7UL)

#define	SPI_CR_SPIE_Msk (0x80UL)

#define	SPI_CR_BITS_Pos (8UL)

#define	SPI_CR_BITS_Msk (0xf00UL)

#define	SPI_SR_ABRT_Pos (3UL)

#define	SPI_SR_ABRT_Msk (0x8UL)

#define	SPI_SR_MODF_Pos (4UL)

#define	SPI_SR_MODF_Msk (0x10UL)

#define	SPI_SR_ROVR_Pos (5UL)

#define	SPI_SR_ROVR_Msk (0x20UL)

#define	SPI_SR_WCOL_Pos (6UL)

#define	SPI_SR_WCOL_Msk (0x40UL)

#define	SPI_SR_SPIF_Pos (7UL)

#define	SPI_SR_SPIF_Msk (0x80UL)

#define	SPI_DR_DATALOW_Pos (0UL)

#define	SPI_DR_DATALOW_Msk (0xffUL)

#define	SPI_DR_DATAHIGH_Pos (8UL)

#define	SPI_DR_DATAHIGH_Msk (0xff00UL)

#define	SPI_CCR_COUNTER_Pos (0UL)

#define	SPI_CCR_COUNTER_Msk (0xffUL)

#define	SPI_INT_SPIF_Pos (0UL)

#define	SPI_INT_SPIF_Msk (0x1UL)

#define	RTC_ILR_RTCCIF_Pos (0UL)

#define	RTC_ILR_RTCCIF_Msk (0x1UL)

#define	RTC_ILR_RTCALF_Pos (1UL)

#define	RTC_ILR_RTCALF_Msk (0x2UL)

#define	RTC_CCR_CLKEN_Pos (0UL)

#define	RTC_CCR_CLKEN_Msk (0x1UL)

#define	RTC_CCR_CTCRST_Pos (1UL)

#define	RTC_CCR_CTCRST_Msk (0x2UL)

#define	RTC_CCR_CCALEN_Pos (4UL)

#define	RTC_CCR_CCALEN_Msk (0x10UL)

#define	RTC_CIIR_IMSEC_Pos (0UL)

#define	RTC_CIIR_IMSEC_Msk (0x1UL)

#define	RTC_CIIR_IMMIN_Pos (1UL)

#define	RTC_CIIR_IMMIN_Msk (0x2UL)

#define	RTC_CIIR_IMHOUR_Pos (2UL)

#define	RTC_CIIR_IMHOUR_Msk (0x4UL)

#define	RTC_CIIR_IMDOM_Pos (3UL)

#define	RTC_CIIR_IMDOM_Msk (0x8UL)

#define	RTC_CIIR_IMDOW_Pos (4UL)

#define	RTC_CIIR_IMDOW_Msk (0x10UL)

#define	RTC_CIIR_IMDOY_Pos (5UL)

#define	RTC_CIIR_IMDOY_Msk (0x20UL)

#define	RTC_CIIR_IMMON_Pos (6UL)

#define	RTC_CIIR_IMMON_Msk (0x40UL)

#define	RTC_CIIR_IMYEAR_Pos (7UL)

#define	RTC_CIIR_IMYEAR_Msk (0x80UL)

#define	RTC_AMR_AMRSEC_Pos (0UL)

#define	RTC_AMR_AMRSEC_Msk (0x1UL)

#define	RTC_AMR_AMRMIN_Pos (1UL)

#define	RTC_AMR_AMRMIN_Msk (0x2UL)

#define	RTC_AMR_AMRHOUR_Pos (2UL)

#define	RTC_AMR_AMRHOUR_Msk (0x4UL)

#define	RTC_AMR_AMRDOM_Pos (3UL)

#define	RTC_AMR_AMRDOM_Msk (0x8UL)

#define	RTC_AMR_AMRDOW_Pos (4UL)

#define	RTC_AMR_AMRDOW_Msk (0x10UL)

#define	RTC_AMR_AMRDOY_Pos (5UL)

#define	RTC_AMR_AMRDOY_Msk (0x20UL)

#define	RTC_AMR_AMRMON_Pos (6UL)

#define	RTC_AMR_AMRMON_Msk (0x40UL)

#define	RTC_AMR_AMRYEAR_Pos (7UL)

#define	RTC_AMR_AMRYEAR_Msk (0x80UL)

#define	RTC_CTIME0_SECONDS_Pos (0UL)

#define	RTC_CTIME0_SECONDS_Msk (0x3fUL)

#define	RTC_CTIME0_MINUTES_Pos (8UL)

#define	RTC_CTIME0_MINUTES_Msk (0x3f00UL)

#define	RTC_CTIME0_HOURS_Pos (16UL)

#define	RTC_CTIME0_HOURS_Msk (0x1f0000UL)

#define	RTC_CTIME0_DOW_Pos (24UL)

#define	RTC_CTIME0_DOW_Msk (0x7000000UL)

#define	RTC_CTIME1_DOM_Pos (0UL)

#define	RTC_CTIME1_DOM_Msk (0x1fUL)

#define	RTC_CTIME1_MONTH_Pos (8UL)

#define	RTC_CTIME1_MONTH_Msk (0xf00UL)

#define	RTC_CTIME1_YEAR_Pos (16UL)

#define	RTC_CTIME1_YEAR_Msk (0xfff0000UL)

#define	RTC_CTIME2_DOY_Pos (0UL)

#define	RTC_CTIME2_DOY_Msk (0xfffUL)

#define	RTC_SEC_SECONDS_Pos (0UL)

#define	RTC_SEC_SECONDS_Msk (0x3fUL)

#define	RTC_MIN_MINUTES_Pos (0UL)

#define	RTC_MIN_MINUTES_Msk (0x3fUL)

#define	RTC_HRS_HOURS_Pos (0UL)

#define	RTC_HRS_HOURS_Msk (0x1fUL)

#define	RTC_DOM_DOM_Pos (0UL)

#define	RTC_DOM_DOM_Msk (0x1fUL)

#define	RTC_DOW_DOW_Pos (0UL)

#define	RTC_DOW_DOW_Msk (0x7UL)

#define	RTC_DOY_DOY_Pos (0UL)

#define	RTC_DOY_DOY_Msk (0x1ffUL)

#define	RTC_MONTH_MONTH_Pos (0UL)

#define	RTC_MONTH_MONTH_Msk (0xfUL)

#define	RTC_YEAR_YEAR_Pos (0UL)

#define	RTC_YEAR_YEAR_Msk (0xfffUL)

#define	RTC_CALIBRATION_CALVAL_Pos (0UL)

#define	RTC_CALIBRATION_CALVAL_Msk (0x1ffffUL)

#define	RTC_CALIBRATION_CALDIR_Pos (17UL)

#define	RTC_CALIBRATION_CALDIR_Msk (0x20000UL)

#define	RTC_GPREG0_GP_Pos (0UL)

#define	RTC_GPREG0_GP_Msk (0xffffffffUL)

#define	RTC_GPREG1_GP_Pos (0UL)

#define	RTC_GPREG1_GP_Msk (0xffffffffUL)

#define	RTC_GPREG2_GP_Pos (0UL)

#define	RTC_GPREG2_GP_Msk (0xffffffffUL)

#define	RTC_GPREG3_GP_Pos (0UL)

#define	RTC_GPREG3_GP_Msk (0xffffffffUL)

#define	RTC_GPREG4_GP_Pos (0UL)

#define	RTC_GPREG4_GP_Msk (0xffffffffUL)

#define	RTC_RTC_AUX_RTC_OSCF_Pos (4UL)

#define	RTC_RTC_AUX_RTC_OSCF_Msk (0x10UL)

#define	RTC_RTC_AUX_RTC_PDOUT_Pos (6UL)

#define	RTC_RTC_AUX_RTC_PDOUT_Msk (0x40UL)

#define	RTC_RTC_AUXEN_RTC_OSCFEN_Pos (4UL)

#define	RTC_RTC_AUXEN_RTC_OSCFEN_Msk (0x10UL)

#define	RTC_ASEC_SECONDS_Pos (0UL)

#define	RTC_ASEC_SECONDS_Msk (0x3fUL)

#define	RTC_AMIN_MINUTES_Pos (0UL)

#define	RTC_AMIN_MINUTES_Msk (0x3fUL)

#define	RTC_AHRS_HOURS_Pos (0UL)

#define	RTC_AHRS_HOURS_Msk (0x1fUL)

#define	RTC_ADOM_DOM_Pos (0UL)

#define	RTC_ADOM_DOM_Msk (0x1fUL)

#define	RTC_ADOW_DOW_Pos (0UL)

#define	RTC_ADOW_DOW_Msk (0x7UL)

#define	RTC_ADOY_DOY_Pos (0UL)

#define	RTC_ADOY_DOY_Msk (0x1ffUL)

#define	RTC_AMON_MONTH_Pos (0UL)

#define	RTC_AMON_MONTH_Msk (0xfUL)

#define	RTC_AYRS_YEAR_Pos (0UL)

#define	RTC_AYRS_YEAR_Msk (0xfffUL)

#define	GPIOINT_STATUS_P0INT_Pos (0UL)

#define	GPIOINT_STATUS_P0INT_Msk (0x1UL)

#define	GPIOINT_STATUS_P2INT_Pos (2UL)

#define	GPIOINT_STATUS_P2INT_Msk (0x4UL)

#define	GPIOINT_STATR0_P0_0REI_Pos (0UL)

#define	GPIOINT_STATR0_P0_0REI_Msk (0x1UL)

#define	GPIOINT_STATR0_P0_1REI_Pos (1UL)

#define	GPIOINT_STATR0_P0_1REI_Msk (0x2UL)

#define	GPIOINT_STATR0_P0_2REI_Pos (2UL)

#define	GPIOINT_STATR0_P0_2REI_Msk (0x4UL)

#define	GPIOINT_STATR0_P0_3REI_Pos (3UL)

#define	GPIOINT_STATR0_P0_3REI_Msk (0x8UL)

#define	GPIOINT_STATR0_P0_4REI_Pos (4UL)

#define	GPIOINT_STATR0_P0_4REI_Msk (0x10UL)

#define	GPIOINT_STATR0_P0_5REI_Pos (5UL)

#define	GPIOINT_STATR0_P0_5REI_Msk (0x20UL)

#define	GPIOINT_STATR0_P0_6REI_Pos (6UL)

#define	GPIOINT_STATR0_P0_6REI_Msk (0x40UL)

#define	GPIOINT_STATR0_P0_7REI_Pos (7UL)

#define	GPIOINT_STATR0_P0_7REI_Msk (0x80UL)

#define	GPIOINT_STATR0_P0_8REI_Pos (8UL)

#define	GPIOINT_STATR0_P0_8REI_Msk (0x100UL)

#define	GPIOINT_STATR0_P0_9REI_Pos (9UL)

#define	GPIOINT_STATR0_P0_9REI_Msk (0x200UL)

#define	GPIOINT_STATR0_P0_10REI_Pos (10UL)

#define	GPIOINT_STATR0_P0_10REI_Msk (0x400UL)

#define	GPIOINT_STATR0_P0_11REI_Pos (11UL)

#define	GPIOINT_STATR0_P0_11REI_Msk (0x800UL)

#define	GPIOINT_STATR0_P0_12REI_Pos (12UL)

#define	GPIOINT_STATR0_P0_12REI_Msk (0x1000UL)

#define	GPIOINT_STATR0_P0_13REI_Pos (13UL)

#define	GPIOINT_STATR0_P0_13REI_Msk (0x2000UL)

#define	GPIOINT_STATR0_P0_14REI_Pos (14UL)

#define	GPIOINT_STATR0_P0_14REI_Msk (0x4000UL)

#define	GPIOINT_STATR0_P0_15REI_Pos (15UL)

#define	GPIOINT_STATR0_P0_15REI_Msk (0x8000UL)

#define	GPIOINT_STATR0_P0_16REI_Pos (16UL)

#define	GPIOINT_STATR0_P0_16REI_Msk (0x10000UL)

#define	GPIOINT_STATR0_P0_17REI_Pos (17UL)

#define	GPIOINT_STATR0_P0_17REI_Msk (0x20000UL)

#define	GPIOINT_STATR0_P0_18REI_Pos (18UL)

#define	GPIOINT_STATR0_P0_18REI_Msk (0x40000UL)

#define	GPIOINT_STATR0_P0_19REI_Pos (19UL)

#define	GPIOINT_STATR0_P0_19REI_Msk (0x80000UL)

#define	GPIOINT_STATR0_P0_20REI_Pos (20UL)

#define	GPIOINT_STATR0_P0_20REI_Msk (0x100000UL)

#define	GPIOINT_STATR0_P0_21REI_Pos (21UL)

#define	GPIOINT_STATR0_P0_21REI_Msk (0x200000UL)

#define	GPIOINT_STATR0_P0_22REI_Pos (22UL)

#define	GPIOINT_STATR0_P0_22REI_Msk (0x400000UL)

#define	GPIOINT_STATR0_P0_23REI_Pos (23UL)

#define	GPIOINT_STATR0_P0_23REI_Msk (0x800000UL)

#define	GPIOINT_STATR0_P0_24REI_Pos (24UL)

#define	GPIOINT_STATR0_P0_24REI_Msk (0x1000000UL)

#define	GPIOINT_STATR0_P0_25REI_Pos (25UL)

#define	GPIOINT_STATR0_P0_25REI_Msk (0x2000000UL)

#define	GPIOINT_STATR0_P0_26REI_Pos (26UL)

#define	GPIOINT_STATR0_P0_26REI_Msk (0x4000000UL)

#define	GPIOINT_STATR0_P0_27REI_Pos (27UL)

#define	GPIOINT_STATR0_P0_27REI_Msk (0x8000000UL)

#define	GPIOINT_STATR0_P0_28REI_Pos (28UL)

#define	GPIOINT_STATR0_P0_28REI_Msk (0x10000000UL)

#define	GPIOINT_STATR0_P0_29REI_Pos (29UL)

#define	GPIOINT_STATR0_P0_29REI_Msk (0x20000000UL)

#define	GPIOINT_STATR0_P0_30REI_Pos (30UL)

#define	GPIOINT_STATR0_P0_30REI_Msk (0x40000000UL)

#define	GPIOINT_STATF0_P0_0FEI_Pos (0UL)

#define	GPIOINT_STATF0_P0_0FEI_Msk (0x1UL)

#define	GPIOINT_STATF0_P0_1FEI_Pos (1UL)

#define	GPIOINT_STATF0_P0_1FEI_Msk (0x2UL)

#define	GPIOINT_STATF0_P0_2FEI_Pos (2UL)

#define	GPIOINT_STATF0_P0_2FEI_Msk (0x4UL)

#define	GPIOINT_STATF0_P0_3FEI_Pos (3UL)

#define	GPIOINT_STATF0_P0_3FEI_Msk (0x8UL)

#define	GPIOINT_STATF0_P0_4FEI_Pos (4UL)

#define	GPIOINT_STATF0_P0_4FEI_Msk (0x10UL)

#define	GPIOINT_STATF0_P0_5FEI_Pos (5UL)

#define	GPIOINT_STATF0_P0_5FEI_Msk (0x20UL)

#define	GPIOINT_STATF0_P0_6FEI_Pos (6UL)

#define	GPIOINT_STATF0_P0_6FEI_Msk (0x40UL)

#define	GPIOINT_STATF0_P0_7FEI_Pos (7UL)

#define	GPIOINT_STATF0_P0_7FEI_Msk (0x80UL)

#define	GPIOINT_STATF0_P0_8FEI_Pos (8UL)

#define	GPIOINT_STATF0_P0_8FEI_Msk (0x100UL)

#define	GPIOINT_STATF0_P0_9FEI_Pos (9UL)

#define	GPIOINT_STATF0_P0_9FEI_Msk (0x200UL)

#define	GPIOINT_STATF0_P0_10FEI_Pos (10UL)

#define	GPIOINT_STATF0_P0_10FEI_Msk (0x400UL)

#define	GPIOINT_STATF0_P0_11FEI_Pos (11UL)

#define	GPIOINT_STATF0_P0_11FEI_Msk (0x800UL)

#define	GPIOINT_STATF0_P0_12FEI_Pos (12UL)

#define	GPIOINT_STATF0_P0_12FEI_Msk (0x1000UL)

#define	GPIOINT_STATF0_P0_13FEI_Pos (13UL)

#define	GPIOINT_STATF0_P0_13FEI_Msk (0x2000UL)

#define	GPIOINT_STATF0_P0_14FEI_Pos (14UL)

#define	GPIOINT_STATF0_P0_14FEI_Msk (0x4000UL)

#define	GPIOINT_STATF0_P0_15FEI_Pos (15UL)

#define	GPIOINT_STATF0_P0_15FEI_Msk (0x8000UL)

#define	GPIOINT_STATF0_P0_16FEI_Pos (16UL)

#define	GPIOINT_STATF0_P0_16FEI_Msk (0x10000UL)

#define	GPIOINT_STATF0_P0_17FEI_Pos (17UL)

#define	GPIOINT_STATF0_P0_17FEI_Msk (0x20000UL)

#define	GPIOINT_STATF0_P0_18FEI_Pos (18UL)

#define	GPIOINT_STATF0_P0_18FEI_Msk (0x40000UL)

#define	GPIOINT_STATF0_P0_19FEI_Pos (19UL)

#define	GPIOINT_STATF0_P0_19FEI_Msk (0x80000UL)

#define	GPIOINT_STATF0_P0_20FEI_Pos (20UL)

#define	GPIOINT_STATF0_P0_20FEI_Msk (0x100000UL)

#define	GPIOINT_STATF0_P0_21FEI_Pos (21UL)

#define	GPIOINT_STATF0_P0_21FEI_Msk (0x200000UL)

#define	GPIOINT_STATF0_P0_22FEI_Pos (22UL)

#define	GPIOINT_STATF0_P0_22FEI_Msk (0x400000UL)

#define	GPIOINT_STATF0_P0_23FEI_Pos (23UL)

#define	GPIOINT_STATF0_P0_23FEI_Msk (0x800000UL)

#define	GPIOINT_STATF0_P0_24FEI_Pos (24UL)

#define	GPIOINT_STATF0_P0_24FEI_Msk (0x1000000UL)

#define	GPIOINT_STATF0_P0_25FEI_Pos (25UL)

#define	GPIOINT_STATF0_P0_25FEI_Msk (0x2000000UL)

#define	GPIOINT_STATF0_P0_26FEI_Pos (26UL)

#define	GPIOINT_STATF0_P0_26FEI_Msk (0x4000000UL)

#define	GPIOINT_STATF0_P0_27FEI_Pos (27UL)

#define	GPIOINT_STATF0_P0_27FEI_Msk (0x8000000UL)

#define	GPIOINT_STATF0_P0_28FEI_Pos (28UL)

#define	GPIOINT_STATF0_P0_28FEI_Msk (0x10000000UL)

#define	GPIOINT_STATF0_P0_29FEI_Pos (29UL)

#define	GPIOINT_STATF0_P0_29FEI_Msk (0x20000000UL)

#define	GPIOINT_STATF0_P0_30FEI_Pos (30UL)

#define	GPIOINT_STATF0_P0_30FEI_Msk (0x40000000UL)

#define	GPIOINT_CLR0_P0_0CI_Pos (0UL)

#define	GPIOINT_CLR0_P0_0CI_Msk (0x1UL)

#define	GPIOINT_CLR0_P0_1CI_Pos (1UL)

#define	GPIOINT_CLR0_P0_1CI_Msk (0x2UL)

#define	GPIOINT_CLR0_P0_2CI_Pos (2UL)

#define	GPIOINT_CLR0_P0_2CI_Msk (0x4UL)

#define	GPIOINT_CLR0_P0_3CI_Pos (3UL)

#define	GPIOINT_CLR0_P0_3CI_Msk (0x8UL)

#define	GPIOINT_CLR0_P0_4CI_Pos (4UL)

#define	GPIOINT_CLR0_P0_4CI_Msk (0x10UL)

#define	GPIOINT_CLR0_P0_5CI_Pos (5UL)

#define	GPIOINT_CLR0_P0_5CI_Msk (0x20UL)

#define	GPIOINT_CLR0_P0_6CI_Pos (6UL)

#define	GPIOINT_CLR0_P0_6CI_Msk (0x40UL)

#define	GPIOINT_CLR0_P0_7CI_Pos (7UL)

#define	GPIOINT_CLR0_P0_7CI_Msk (0x80UL)

#define	GPIOINT_CLR0_P0_8CI_Pos (8UL)

#define	GPIOINT_CLR0_P0_8CI_Msk (0x100UL)

#define	GPIOINT_CLR0_P0_9CI_Pos (9UL)

#define	GPIOINT_CLR0_P0_9CI_Msk (0x200UL)

#define	GPIOINT_CLR0_P0_10CI_Pos (10UL)

#define	GPIOINT_CLR0_P0_10CI_Msk (0x400UL)

#define	GPIOINT_CLR0_P0_11CI_Pos (11UL)

#define	GPIOINT_CLR0_P0_11CI_Msk (0x800UL)

#define	GPIOINT_CLR0_P0_12CI_Pos (12UL)

#define	GPIOINT_CLR0_P0_12CI_Msk (0x1000UL)

#define	GPIOINT_CLR0_P0_13CI_Pos (13UL)

#define	GPIOINT_CLR0_P0_13CI_Msk (0x2000UL)

#define	GPIOINT_CLR0_P0_14CI_Pos (14UL)

#define	GPIOINT_CLR0_P0_14CI_Msk (0x4000UL)

#define	GPIOINT_CLR0_P0_15CI_Pos (15UL)

#define	GPIOINT_CLR0_P0_15CI_Msk (0x8000UL)

#define	GPIOINT_CLR0_P0_16CI_Pos (16UL)

#define	GPIOINT_CLR0_P0_16CI_Msk (0x10000UL)

#define	GPIOINT_CLR0_P0_17CI_Pos (17UL)

#define	GPIOINT_CLR0_P0_17CI_Msk (0x20000UL)

#define	GPIOINT_CLR0_P0_18CI_Pos (18UL)

#define	GPIOINT_CLR0_P0_18CI_Msk (0x40000UL)

#define	GPIOINT_CLR0_P0_19CI_Pos (19UL)

#define	GPIOINT_CLR0_P0_19CI_Msk (0x80000UL)

#define	GPIOINT_CLR0_P0_20CI_Pos (20UL)

#define	GPIOINT_CLR0_P0_20CI_Msk (0x100000UL)

#define	GPIOINT_CLR0_P0_21CI_Pos (21UL)

#define	GPIOINT_CLR0_P0_21CI_Msk (0x200000UL)

#define	GPIOINT_CLR0_P0_22CI_Pos (22UL)

#define	GPIOINT_CLR0_P0_22CI_Msk (0x400000UL)

#define	GPIOINT_CLR0_P0_23CI_Pos (23UL)

#define	GPIOINT_CLR0_P0_23CI_Msk (0x800000UL)

#define	GPIOINT_CLR0_P0_24CI_Pos (24UL)

#define	GPIOINT_CLR0_P0_24CI_Msk (0x1000000UL)

#define	GPIOINT_CLR0_P0_25CI_Pos (25UL)

#define	GPIOINT_CLR0_P0_25CI_Msk (0x2000000UL)

#define	GPIOINT_CLR0_P0_26CI_Pos (26UL)

#define	GPIOINT_CLR0_P0_26CI_Msk (0x4000000UL)

#define	GPIOINT_CLR0_P0_27CI_Pos (27UL)

#define	GPIOINT_CLR0_P0_27CI_Msk (0x8000000UL)

#define	GPIOINT_CLR0_P0_28CI_Pos (28UL)

#define	GPIOINT_CLR0_P0_28CI_Msk (0x10000000UL)

#define	GPIOINT_CLR0_P0_29CI_Pos (29UL)

#define	GPIOINT_CLR0_P0_29CI_Msk (0x20000000UL)

#define	GPIOINT_CLR0_P0_30CI_Pos (30UL)

#define	GPIOINT_CLR0_P0_30CI_Msk (0x40000000UL)

#define	GPIOINT_ENR0_P0_0ER_Pos (0UL)

#define	GPIOINT_ENR0_P0_0ER_Msk (0x1UL)

#define	GPIOINT_ENR0_P0_1ER_Pos (1UL)

#define	GPIOINT_ENR0_P0_1ER_Msk (0x2UL)

#define	GPIOINT_ENR0_P0_2ER_Pos (2UL)

#define	GPIOINT_ENR0_P0_2ER_Msk (0x4UL)

#define	GPIOINT_ENR0_P0_3ER_Pos (3UL)

#define	GPIOINT_ENR0_P0_3ER_Msk (0x8UL)

#define	GPIOINT_ENR0_P0_4ER_Pos (4UL)

#define	GPIOINT_ENR0_P0_4ER_Msk (0x10UL)

#define	GPIOINT_ENR0_P0_5ER_Pos (5UL)

#define	GPIOINT_ENR0_P0_5ER_Msk (0x20UL)

#define	GPIOINT_ENR0_P0_6ER_Pos (6UL)

#define	GPIOINT_ENR0_P0_6ER_Msk (0x40UL)

#define	GPIOINT_ENR0_P0_7ER_Pos (7UL)

#define	GPIOINT_ENR0_P0_7ER_Msk (0x80UL)

#define	GPIOINT_ENR0_P0_8ER_Pos (8UL)

#define	GPIOINT_ENR0_P0_8ER_Msk (0x100UL)

#define	GPIOINT_ENR0_P0_9ER_Pos (9UL)

#define	GPIOINT_ENR0_P0_9ER_Msk (0x200UL)

#define	GPIOINT_ENR0_P0_10ER_Pos (10UL)

#define	GPIOINT_ENR0_P0_10ER_Msk (0x400UL)

#define	GPIOINT_ENR0_P0_11ER_Pos (11UL)

#define	GPIOINT_ENR0_P0_11ER_Msk (0x800UL)

#define	GPIOINT_ENR0_P0_12ER_Pos (12UL)

#define	GPIOINT_ENR0_P0_12ER_Msk (0x1000UL)

#define	GPIOINT_ENR0_P0_13ER_Pos (13UL)

#define	GPIOINT_ENR0_P0_13ER_Msk (0x2000UL)

#define	GPIOINT_ENR0_P0_14ER_Pos (14UL)

#define	GPIOINT_ENR0_P0_14ER_Msk (0x4000UL)

#define	GPIOINT_ENR0_P0_15ER_Pos (15UL)

#define	GPIOINT_ENR0_P0_15ER_Msk (0x8000UL)

#define	GPIOINT_ENR0_P0_16ER_Pos (16UL)

#define	GPIOINT_ENR0_P0_16ER_Msk (0x10000UL)

#define	GPIOINT_ENR0_P0_17ER_Pos (17UL)

#define	GPIOINT_ENR0_P0_17ER_Msk (0x20000UL)

#define	GPIOINT_ENR0_P0_18ER_Pos (18UL)

#define	GPIOINT_ENR0_P0_18ER_Msk (0x40000UL)

#define	GPIOINT_ENR0_P0_19ER_Pos (19UL)

#define	GPIOINT_ENR0_P0_19ER_Msk (0x80000UL)

#define	GPIOINT_ENR0_P0_20ER_Pos (20UL)

#define	GPIOINT_ENR0_P0_20ER_Msk (0x100000UL)

#define	GPIOINT_ENR0_P0_21ER_Pos (21UL)

#define	GPIOINT_ENR0_P0_21ER_Msk (0x200000UL)

#define	GPIOINT_ENR0_P0_22ER_Pos (22UL)

#define	GPIOINT_ENR0_P0_22ER_Msk (0x400000UL)

#define	GPIOINT_ENR0_P0_23ER_Pos (23UL)

#define	GPIOINT_ENR0_P0_23ER_Msk (0x800000UL)

#define	GPIOINT_ENR0_P0_24ER_Pos (24UL)

#define	GPIOINT_ENR0_P0_24ER_Msk (0x1000000UL)

#define	GPIOINT_ENR0_P0_25ER_Pos (25UL)

#define	GPIOINT_ENR0_P0_25ER_Msk (0x2000000UL)

#define	GPIOINT_ENR0_P0_26ER_Pos (26UL)

#define	GPIOINT_ENR0_P0_26ER_Msk (0x4000000UL)

#define	GPIOINT_ENR0_P0_27ER_Pos (27UL)

#define	GPIOINT_ENR0_P0_27ER_Msk (0x8000000UL)

#define	GPIOINT_ENR0_P0_28ER_Pos (28UL)

#define	GPIOINT_ENR0_P0_28ER_Msk (0x10000000UL)

#define	GPIOINT_ENR0_P0_29ER_Pos (29UL)

#define	GPIOINT_ENR0_P0_29ER_Msk (0x20000000UL)

#define	GPIOINT_ENR0_P0_30ER_Pos (30UL)

#define	GPIOINT_ENR0_P0_30ER_Msk (0x40000000UL)

#define	GPIOINT_ENF0_P0_0EF_Pos (0UL)

#define	GPIOINT_ENF0_P0_0EF_Msk (0x1UL)

#define	GPIOINT_ENF0_P0_1EF_Pos (1UL)

#define	GPIOINT_ENF0_P0_1EF_Msk (0x2UL)

#define	GPIOINT_ENF0_P0_2EF_Pos (2UL)

#define	GPIOINT_ENF0_P0_2EF_Msk (0x4UL)

#define	GPIOINT_ENF0_P0_3EF_Pos (3UL)

#define	GPIOINT_ENF0_P0_3EF_Msk (0x8UL)

#define	GPIOINT_ENF0_P0_4EF_Pos (4UL)

#define	GPIOINT_ENF0_P0_4EF_Msk (0x10UL)

#define	GPIOINT_ENF0_P0_5EF_Pos (5UL)

#define	GPIOINT_ENF0_P0_5EF_Msk (0x20UL)

#define	GPIOINT_ENF0_P0_6EF_Pos (6UL)

#define	GPIOINT_ENF0_P0_6EF_Msk (0x40UL)

#define	GPIOINT_ENF0_P0_7EF_Pos (7UL)

#define	GPIOINT_ENF0_P0_7EF_Msk (0x80UL)

#define	GPIOINT_ENF0_P0_8EF_Pos (8UL)

#define	GPIOINT_ENF0_P0_8EF_Msk (0x100UL)

#define	GPIOINT_ENF0_P0_9EF_Pos (9UL)

#define	GPIOINT_ENF0_P0_9EF_Msk (0x200UL)

#define	GPIOINT_ENF0_P0_10EF_Pos (10UL)

#define	GPIOINT_ENF0_P0_10EF_Msk (0x400UL)

#define	GPIOINT_ENF0_P0_11EF_Pos (11UL)

#define	GPIOINT_ENF0_P0_11EF_Msk (0x800UL)

#define	GPIOINT_ENF0_P0_12EF_Pos (12UL)

#define	GPIOINT_ENF0_P0_12EF_Msk (0x1000UL)

#define	GPIOINT_ENF0_P0_13EF_Pos (13UL)

#define	GPIOINT_ENF0_P0_13EF_Msk (0x2000UL)

#define	GPIOINT_ENF0_P0_14EF_Pos (14UL)

#define	GPIOINT_ENF0_P0_14EF_Msk (0x4000UL)

#define	GPIOINT_ENF0_P0_15EF_Pos (15UL)

#define	GPIOINT_ENF0_P0_15EF_Msk (0x8000UL)

#define	GPIOINT_ENF0_P0_16EF_Pos (16UL)

#define	GPIOINT_ENF0_P0_16EF_Msk (0x10000UL)

#define	GPIOINT_ENF0_P0_17EF_Pos (17UL)

#define	GPIOINT_ENF0_P0_17EF_Msk (0x20000UL)

#define	GPIOINT_ENF0_P0_18EF_Pos (18UL)

#define	GPIOINT_ENF0_P0_18EF_Msk (0x40000UL)

#define	GPIOINT_ENF0_P0_19EF_Pos (19UL)

#define	GPIOINT_ENF0_P0_19EF_Msk (0x80000UL)

#define	GPIOINT_ENF0_P0_20EF_Pos (20UL)

#define	GPIOINT_ENF0_P0_20EF_Msk (0x100000UL)

#define	GPIOINT_ENF0_P0_21EF_Pos (21UL)

#define	GPIOINT_ENF0_P0_21EF_Msk (0x200000UL)

#define	GPIOINT_ENF0_P0_22EF_Pos (22UL)

#define	GPIOINT_ENF0_P0_22EF_Msk (0x400000UL)

#define	GPIOINT_ENF0_P0_23EF_Pos (23UL)

#define	GPIOINT_ENF0_P0_23EF_Msk (0x800000UL)

#define	GPIOINT_ENF0_P0_24EF_Pos (24UL)

#define	GPIOINT_ENF0_P0_24EF_Msk (0x1000000UL)

#define	GPIOINT_ENF0_P0_25EF_Pos (25UL)

#define	GPIOINT_ENF0_P0_25EF_Msk (0x2000000UL)

#define	GPIOINT_ENF0_P0_26EF_Pos (26UL)

#define	GPIOINT_ENF0_P0_26EF_Msk (0x4000000UL)

#define	GPIOINT_ENF0_P0_27EF_Pos (27UL)

#define	GPIOINT_ENF0_P0_27EF_Msk (0x8000000UL)

#define	GPIOINT_ENF0_P0_28EF_Pos (28UL)

#define	GPIOINT_ENF0_P0_28EF_Msk (0x10000000UL)

#define	GPIOINT_ENF0_P0_29EF_Pos (29UL)

#define	GPIOINT_ENF0_P0_29EF_Msk (0x20000000UL)

#define	GPIOINT_ENF0_P0_30EF_Pos (30UL)

#define	GPIOINT_ENF0_P0_30EF_Msk (0x40000000UL)

#define	GPIOINT_STATR2_P2_0REI_Pos (0UL)

#define	GPIOINT_STATR2_P2_0REI_Msk (0x1UL)

#define	GPIOINT_STATR2_P2_1REI_Pos (1UL)

#define	GPIOINT_STATR2_P2_1REI_Msk (0x2UL)

#define	GPIOINT_STATR2_P2_2REI_Pos (2UL)

#define	GPIOINT_STATR2_P2_2REI_Msk (0x4UL)

#define	GPIOINT_STATR2_P2_3REI_Pos (3UL)

#define	GPIOINT_STATR2_P2_3REI_Msk (0x8UL)

#define	GPIOINT_STATR2_P2_4REI_Pos (4UL)

#define	GPIOINT_STATR2_P2_4REI_Msk (0x10UL)

#define	GPIOINT_STATR2_P2_5REI_Pos (5UL)

#define	GPIOINT_STATR2_P2_5REI_Msk (0x20UL)

#define	GPIOINT_STATR2_P2_6REI_Pos (6UL)

#define	GPIOINT_STATR2_P2_6REI_Msk (0x40UL)

#define	GPIOINT_STATR2_P2_7REI_Pos (7UL)

#define	GPIOINT_STATR2_P2_7REI_Msk (0x80UL)

#define	GPIOINT_STATR2_P2_8REI_Pos (8UL)

#define	GPIOINT_STATR2_P2_8REI_Msk (0x100UL)

#define	GPIOINT_STATR2_P2_9REI_Pos (9UL)

#define	GPIOINT_STATR2_P2_9REI_Msk (0x200UL)

#define	GPIOINT_STATR2_P2_10REI_Pos (10UL)

#define	GPIOINT_STATR2_P2_10REI_Msk (0x400UL)

#define	GPIOINT_STATR2_P2_11REI_Pos (11UL)

#define	GPIOINT_STATR2_P2_11REI_Msk (0x800UL)

#define	GPIOINT_STATR2_P2_12REI_Pos (12UL)

#define	GPIOINT_STATR2_P2_12REI_Msk (0x1000UL)

#define	GPIOINT_STATR2_P2_13REI_Pos (13UL)

#define	GPIOINT_STATR2_P2_13REI_Msk (0x2000UL)

#define	GPIOINT_STATF2_P2_0FEI_Pos (0UL)

#define	GPIOINT_STATF2_P2_0FEI_Msk (0x1UL)

#define	GPIOINT_STATF2_P2_1FEI_Pos (1UL)

#define	GPIOINT_STATF2_P2_1FEI_Msk (0x2UL)

#define	GPIOINT_STATF2_P2_2FEI_Pos (2UL)

#define	GPIOINT_STATF2_P2_2FEI_Msk (0x4UL)

#define	GPIOINT_STATF2_P2_3FEI_Pos (3UL)

#define	GPIOINT_STATF2_P2_3FEI_Msk (0x8UL)

#define	GPIOINT_STATF2_P2_4FEI_Pos (4UL)

#define	GPIOINT_STATF2_P2_4FEI_Msk (0x10UL)

#define	GPIOINT_STATF2_P2_5FEI_Pos (5UL)

#define	GPIOINT_STATF2_P2_5FEI_Msk (0x20UL)

#define	GPIOINT_STATF2_P2_6FEI_Pos (6UL)

#define	GPIOINT_STATF2_P2_6FEI_Msk (0x40UL)

#define	GPIOINT_STATF2_P2_7FEI_Pos (7UL)

#define	GPIOINT_STATF2_P2_7FEI_Msk (0x80UL)

#define	GPIOINT_STATF2_P2_8FEI_Pos (8UL)

#define	GPIOINT_STATF2_P2_8FEI_Msk (0x100UL)

#define	GPIOINT_STATF2_P2_9FEI_Pos (9UL)

#define	GPIOINT_STATF2_P2_9FEI_Msk (0x200UL)

#define	GPIOINT_STATF2_P2_10FEI_Pos (10UL)

#define	GPIOINT_STATF2_P2_10FEI_Msk (0x400UL)

#define	GPIOINT_STATF2_P2_11FEI_Pos (11UL)

#define	GPIOINT_STATF2_P2_11FEI_Msk (0x800UL)

#define	GPIOINT_STATF2_P2_12FEI_Pos (12UL)

#define	GPIOINT_STATF2_P2_12FEI_Msk (0x1000UL)

#define	GPIOINT_STATF2_P2_13FEI_Pos (13UL)

#define	GPIOINT_STATF2_P2_13FEI_Msk (0x2000UL)

#define	GPIOINT_CLR2_P2_0CI_Pos (0UL)

#define	GPIOINT_CLR2_P2_0CI_Msk (0x1UL)

#define	GPIOINT_CLR2_P2_1CI_Pos (1UL)

#define	GPIOINT_CLR2_P2_1CI_Msk (0x2UL)

#define	GPIOINT_CLR2_P2_2CI_Pos (2UL)

#define	GPIOINT_CLR2_P2_2CI_Msk (0x4UL)

#define	GPIOINT_CLR2_P2_3CI_Pos (3UL)

#define	GPIOINT_CLR2_P2_3CI_Msk (0x8UL)

#define	GPIOINT_CLR2_P2_4CI_Pos (4UL)

#define	GPIOINT_CLR2_P2_4CI_Msk (0x10UL)

#define	GPIOINT_CLR2_P2_5CI_Pos (5UL)

#define	GPIOINT_CLR2_P2_5CI_Msk (0x20UL)

#define	GPIOINT_CLR2_P2_6CI_Pos (6UL)

#define	GPIOINT_CLR2_P2_6CI_Msk (0x40UL)

#define	GPIOINT_CLR2_P2_7CI_Pos (7UL)

#define	GPIOINT_CLR2_P2_7CI_Msk (0x80UL)

#define	GPIOINT_CLR2_P2_8CI_Pos (8UL)

#define	GPIOINT_CLR2_P2_8CI_Msk (0x100UL)

#define	GPIOINT_CLR2_P2_9CI_Pos (9UL)

#define	GPIOINT_CLR2_P2_9CI_Msk (0x200UL)

#define	GPIOINT_CLR2_P2_10CI_Pos (10UL)

#define	GPIOINT_CLR2_P2_10CI_Msk (0x400UL)

#define	GPIOINT_CLR2_P2_11CI_Pos (11UL)

#define	GPIOINT_CLR2_P2_11CI_Msk (0x800UL)

#define	GPIOINT_CLR2_P2_12CI_Pos (12UL)

#define	GPIOINT_CLR2_P2_12CI_Msk (0x1000UL)

#define	GPIOINT_CLR2_P2_13CI_Pos (13UL)

#define	GPIOINT_CLR2_P2_13CI_Msk (0x2000UL)

#define	GPIOINT_ENR2_P2_0ER_Pos (0UL)

#define	GPIOINT_ENR2_P2_0ER_Msk (0x1UL)

#define	GPIOINT_ENR2_P2_1ER_Pos (1UL)

#define	GPIOINT_ENR2_P2_1ER_Msk (0x2UL)

#define	GPIOINT_ENR2_P2_2ER_Pos (2UL)

#define	GPIOINT_ENR2_P2_2ER_Msk (0x4UL)

#define	GPIOINT_ENR2_P2_3ER_Pos (3UL)

#define	GPIOINT_ENR2_P2_3ER_Msk (0x8UL)

#define	GPIOINT_ENR2_P2_4ER_Pos (4UL)

#define	GPIOINT_ENR2_P2_4ER_Msk (0x10UL)

#define	GPIOINT_ENR2_P2_5ER_Pos (5UL)

#define	GPIOINT_ENR2_P2_5ER_Msk (0x20UL)

#define	GPIOINT_ENR2_P2_6ER_Pos (6UL)

#define	GPIOINT_ENR2_P2_6ER_Msk (0x40UL)

#define	GPIOINT_ENR2_P2_7ER_Pos (7UL)

#define	GPIOINT_ENR2_P2_7ER_Msk (0x80UL)

#define	GPIOINT_ENR2_P2_8ER_Pos (8UL)

#define	GPIOINT_ENR2_P2_8ER_Msk (0x100UL)

#define	GPIOINT_ENR2_P2_9ER_Pos (9UL)

#define	GPIOINT_ENR2_P2_9ER_Msk (0x200UL)

#define	GPIOINT_ENR2_P2_10ER_Pos (10UL)

#define	GPIOINT_ENR2_P2_10ER_Msk (0x400UL)

#define	GPIOINT_ENR2_P2_11ER_Pos (11UL)

#define	GPIOINT_ENR2_P2_11ER_Msk (0x800UL)

#define	GPIOINT_ENR2_P2_12ER_Pos (12UL)

#define	GPIOINT_ENR2_P2_12ER_Msk (0x1000UL)

#define	GPIOINT_ENR2_P2_13ER_Pos (13UL)

#define	GPIOINT_ENR2_P2_13ER_Msk (0x2000UL)

#define	GPIOINT_ENF2_P2_0EF_Pos (0UL)

#define	GPIOINT_ENF2_P2_0EF_Msk (0x1UL)

#define	GPIOINT_ENF2_P2_1EF_Pos (1UL)

#define	GPIOINT_ENF2_P2_1EF_Msk (0x2UL)

#define	GPIOINT_ENF2_P2_2EF_Pos (2UL)

#define	GPIOINT_ENF2_P2_2EF_Msk (0x4UL)

#define	GPIOINT_ENF2_P2_3EF_Pos (3UL)

#define	GPIOINT_ENF2_P2_3EF_Msk (0x8UL)

#define	GPIOINT_ENF2_P2_4EF_Pos (4UL)

#define	GPIOINT_ENF2_P2_4EF_Msk (0x10UL)

#define	GPIOINT_ENF2_P2_5EF_Pos (5UL)

#define	GPIOINT_ENF2_P2_5EF_Msk (0x20UL)

#define	GPIOINT_ENF2_P2_6EF_Pos (6UL)

#define	GPIOINT_ENF2_P2_6EF_Msk (0x40UL)

#define	GPIOINT_ENF2_P2_7EF_Pos (7UL)

#define	GPIOINT_ENF2_P2_7EF_Msk (0x80UL)

#define	GPIOINT_ENF2_P2_8EF_Pos (8UL)

#define	GPIOINT_ENF2_P2_8EF_Msk (0x100UL)

#define	GPIOINT_ENF2_P2_9EF_Pos (9UL)

#define	GPIOINT_ENF2_P2_9EF_Msk (0x200UL)

#define	GPIOINT_ENF2_P2_10EF_Pos (10UL)

#define	GPIOINT_ENF2_P2_10EF_Msk (0x400UL)

#define	GPIOINT_ENF2_P2_11EF_Pos (11UL)

#define	GPIOINT_ENF2_P2_11EF_Msk (0x800UL)

#define	GPIOINT_ENF2_P2_12EF_Pos (12UL)

#define	GPIOINT_ENF2_P2_12EF_Msk (0x1000UL)

#define	GPIOINT_ENF2_P2_13EF_Pos (13UL)

#define	GPIOINT_ENF2_P2_13EF_Msk (0x2000UL)

#define	PINCONNECT_PINSEL0_P0_0_Pos (0UL)

#define	PINCONNECT_PINSEL0_P0_0_Msk (0x3UL)

#define	PINCONNECT_PINSEL0_P0_1_Pos (2UL)

#define	PINCONNECT_PINSEL0_P0_1_Msk (0xcUL)

#define	PINCONNECT_PINSEL0_P0_2_Pos (4UL)

#define	PINCONNECT_PINSEL0_P0_2_Msk (0x30UL)

#define	PINCONNECT_PINSEL0_P0_3_Pos (6UL)

#define	PINCONNECT_PINSEL0_P0_3_Msk (0xc0UL)

#define	PINCONNECT_PINSEL0_P0_4_Pos (8UL)

#define	PINCONNECT_PINSEL0_P0_4_Msk (0x300UL)

#define	PINCONNECT_PINSEL0_P0_5_Pos (10UL)

#define	PINCONNECT_PINSEL0_P0_5_Msk (0xc00UL)

#define	PINCONNECT_PINSEL0_P0_6_Pos (12UL)

#define	PINCONNECT_PINSEL0_P0_6_Msk (0x3000UL)

#define	PINCONNECT_PINSEL0_P0_7_Pos (14UL)

#define	PINCONNECT_PINSEL0_P0_7_Msk (0xc000UL)

#define	PINCONNECT_PINSEL0_P0_8_Pos (16UL)

#define	PINCONNECT_PINSEL0_P0_8_Msk (0x30000UL)

#define	PINCONNECT_PINSEL0_P0_9_Pos (18UL)

#define	PINCONNECT_PINSEL0_P0_9_Msk (0xc0000UL)

#define	PINCONNECT_PINSEL0_P0_10_Pos (20UL)

#define	PINCONNECT_PINSEL0_P0_10_Msk (0x300000UL)

#define	PINCONNECT_PINSEL0_P0_11_Pos (22UL)

#define	PINCONNECT_PINSEL0_P0_11_Msk (0xc00000UL)

#define	PINCONNECT_PINSEL0_P0_15_Pos (30UL)

#define	PINCONNECT_PINSEL0_P0_15_Msk (0xc0000000UL)

#define	PINCONNECT_PINSEL1_P0_16_Pos (0UL)

#define	PINCONNECT_PINSEL1_P0_16_Msk (0x3UL)

#define	PINCONNECT_PINSEL1_P0_17_Pos (2UL)

#define	PINCONNECT_PINSEL1_P0_17_Msk (0xcUL)

#define	PINCONNECT_PINSEL1_P0_18_Pos (4UL)

#define	PINCONNECT_PINSEL1_P0_18_Msk (0x30UL)

#define	PINCONNECT_PINSEL1_P0_19_Pos (6UL)

#define	PINCONNECT_PINSEL1_P0_19_Msk (0xc0UL)

#define	PINCONNECT_PINSEL1_P0_20_Pos (8UL)

#define	PINCONNECT_PINSEL1_P0_20_Msk (0x300UL)

#define	PINCONNECT_PINSEL1_P0_21_Pos (10UL)

#define	PINCONNECT_PINSEL1_P0_21_Msk (0xc00UL)

#define	PINCONNECT_PINSEL1_P0_22_Pos (12UL)

#define	PINCONNECT_PINSEL1_P0_22_Msk (0x3000UL)

#define	PINCONNECT_PINSEL1_P0_23_Pos (14UL)

#define	PINCONNECT_PINSEL1_P0_23_Msk (0xc000UL)

#define	PINCONNECT_PINSEL1_P0_24_Pos (16UL)

#define	PINCONNECT_PINSEL1_P0_24_Msk (0x30000UL)

#define	PINCONNECT_PINSEL1_P0_25_Pos (18UL)

#define	PINCONNECT_PINSEL1_P0_25_Msk (0xc0000UL)

#define	PINCONNECT_PINSEL1_P0_26_Pos (20UL)

#define	PINCONNECT_PINSEL1_P0_26_Msk (0x300000UL)

#define	PINCONNECT_PINSEL1_P0_27_Pos (22UL)

#define	PINCONNECT_PINSEL1_P0_27_Msk (0xc00000UL)

#define	PINCONNECT_PINSEL1_P0_28_Pos (24UL)

#define	PINCONNECT_PINSEL1_P0_28_Msk (0x3000000UL)

#define	PINCONNECT_PINSEL1_P0_29_Pos (26UL)

#define	PINCONNECT_PINSEL1_P0_29_Msk (0xc000000UL)

#define	PINCONNECT_PINSEL1_P0_30_Pos (28UL)

#define	PINCONNECT_PINSEL1_P0_30_Msk (0x30000000UL)

#define	PINCONNECT_PINSEL2_P1_0_Pos (0UL)

#define	PINCONNECT_PINSEL2_P1_0_Msk (0x3UL)

#define	PINCONNECT_PINSEL2_P1_1_Pos (2UL)

#define	PINCONNECT_PINSEL2_P1_1_Msk (0xcUL)

#define	PINCONNECT_PINSEL2_P1_4_Pos (8UL)

#define	PINCONNECT_PINSEL2_P1_4_Msk (0x300UL)

#define	PINCONNECT_PINSEL2_P1_8_Pos (16UL)

#define	PINCONNECT_PINSEL2_P1_8_Msk (0x30000UL)

#define	PINCONNECT_PINSEL2_P1_9_Pos (18UL)

#define	PINCONNECT_PINSEL2_P1_9_Msk (0xc0000UL)

#define	PINCONNECT_PINSEL2_P1_10_Pos (20UL)

#define	PINCONNECT_PINSEL2_P1_10_Msk (0x300000UL)

#define	PINCONNECT_PINSEL2_P1_14_Pos (22UL)

#define	PINCONNECT_PINSEL2_P1_14_Msk (0xc00000UL)

#define	PINCONNECT_PINSEL2_P1_15_Pos (30UL)

#define	PINCONNECT_PINSEL2_P1_15_Msk (0xc0000000UL)

#define	PINCONNECT_PINSEL3_P1_16_Pos (0UL)

#define	PINCONNECT_PINSEL3_P1_16_Msk (0x3UL)

#define	PINCONNECT_PINSEL3_P1_17_Pos (2UL)

#define	PINCONNECT_PINSEL3_P1_17_Msk (0xcUL)

#define	PINCONNECT_PINSEL3_P1_18_Pos (4UL)

#define	PINCONNECT_PINSEL3_P1_18_Msk (0x30UL)

#define	PINCONNECT_PINSEL3_P1_19_Pos (6UL)

#define	PINCONNECT_PINSEL3_P1_19_Msk (0xc0UL)

#define	PINCONNECT_PINSEL3_P1_20_Pos (8UL)

#define	PINCONNECT_PINSEL3_P1_20_Msk (0x300UL)

#define	PINCONNECT_PINSEL3_P1_21_Pos (10UL)

#define	PINCONNECT_PINSEL3_P1_21_Msk (0xc00UL)

#define	PINCONNECT_PINSEL3_P1_22_Pos (12UL)

#define	PINCONNECT_PINSEL3_P1_22_Msk (0x3000UL)

#define	PINCONNECT_PINSEL3_P1_23_Pos (14UL)

#define	PINCONNECT_PINSEL3_P1_23_Msk (0xc000UL)

#define	PINCONNECT_PINSEL3_P1_24_Pos (16UL)

#define	PINCONNECT_PINSEL3_P1_24_Msk (0x30000UL)

#define	PINCONNECT_PINSEL3_P1_25_Pos (18UL)

#define	PINCONNECT_PINSEL3_P1_25_Msk (0xc0000UL)

#define	PINCONNECT_PINSEL3_P1_26_Pos (20UL)

#define	PINCONNECT_PINSEL3_P1_26_Msk (0x300000UL)

#define	PINCONNECT_PINSEL3_P1_27_Pos (22UL)

#define	PINCONNECT_PINSEL3_P1_27_Msk (0xc00000UL)

#define	PINCONNECT_PINSEL3_P1_28_Pos (24UL)

#define	PINCONNECT_PINSEL3_P1_28_Msk (0x3000000UL)

#define	PINCONNECT_PINSEL3_P1_29_Pos (26UL)

#define	PINCONNECT_PINSEL3_P1_29_Msk (0xc000000UL)

#define	PINCONNECT_PINSEL3_P1_30_Pos (28UL)

#define	PINCONNECT_PINSEL3_P1_30_Msk (0x30000000UL)

#define	PINCONNECT_PINSEL3_P1_31_Pos (30UL)

#define	PINCONNECT_PINSEL3_P1_31_Msk (0xc0000000UL)

#define	PINCONNECT_PINSEL4_P2_0_Pos (0UL)

#define	PINCONNECT_PINSEL4_P2_0_Msk (0x3UL)

#define	PINCONNECT_PINSEL4_P2_1_Pos (2UL)

#define	PINCONNECT_PINSEL4_P2_1_Msk (0xcUL)

#define	PINCONNECT_PINSEL4_P2_2_Pos (4UL)

#define	PINCONNECT_PINSEL4_P2_2_Msk (0x30UL)

#define	PINCONNECT_PINSEL4_P2_3_Pos (6UL)

#define	PINCONNECT_PINSEL4_P2_3_Msk (0xc0UL)

#define	PINCONNECT_PINSEL4_P2_4_Pos (8UL)

#define	PINCONNECT_PINSEL4_P2_4_Msk (0x300UL)

#define	PINCONNECT_PINSEL4_P2_5_Pos (10UL)

#define	PINCONNECT_PINSEL4_P2_5_Msk (0xc00UL)

#define	PINCONNECT_PINSEL4_P2_6_Pos (12UL)

#define	PINCONNECT_PINSEL4_P2_6_Msk (0x3000UL)

#define	PINCONNECT_PINSEL4_P2_7_Pos (14UL)

#define	PINCONNECT_PINSEL4_P2_7_Msk (0xc000UL)

#define	PINCONNECT_PINSEL4_P2_8_Pos (16UL)

#define	PINCONNECT_PINSEL4_P2_8_Msk (0x30000UL)

#define	PINCONNECT_PINSEL4_P2_9_Pos (18UL)

#define	PINCONNECT_PINSEL4_P2_9_Msk (0xc0000UL)

#define	PINCONNECT_PINSEL4_P2_10_Pos (20UL)

#define	PINCONNECT_PINSEL4_P2_10_Msk (0x300000UL)

#define	PINCONNECT_PINSEL4_P2_11_Pos (22UL)

#define	PINCONNECT_PINSEL4_P2_11_Msk (0xc00000UL)

#define	PINCONNECT_PINSEL4_P2_12_Pos (24UL)

#define	PINCONNECT_PINSEL4_P2_12_Msk (0x3000000UL)

#define	PINCONNECT_PINSEL4_P2_13_Pos (26UL)

#define	PINCONNECT_PINSEL4_P2_13_Msk (0xc000000UL)

#define	PINCONNECT_PINSEL7_P3_25_Pos (18UL)

#define	PINCONNECT_PINSEL7_P3_25_Msk (0xc0000UL)

#define	PINCONNECT_PINSEL7_P3_26_Pos (20UL)

#define	PINCONNECT_PINSEL7_P3_26_Msk (0x300000UL)

#define	PINCONNECT_PINSEL9_P4_28_Pos (24UL)

#define	PINCONNECT_PINSEL9_P4_28_Msk (0x3000000UL)

#define	PINCONNECT_PINSEL9_P4_29_Pos (26UL)

#define	PINCONNECT_PINSEL9_P4_29_Msk (0xc000000UL)

#define	PINCONNECT_PINSEL10_TPIUCTRL_Pos (3UL)

#define	PINCONNECT_PINSEL10_TPIUCTRL_Msk (0x8UL)

#define	PINCONNECT_PINMODE0_P0_00MODE_Pos (0UL)

#define	PINCONNECT_PINMODE0_P0_00MODE_Msk (0x3UL)

#define	PINCONNECT_PINMODE0_P0_01MODE_Pos (2UL)

#define	PINCONNECT_PINMODE0_P0_01MODE_Msk (0xcUL)

#define	PINCONNECT_PINMODE0_P0_02MODE_Pos (4UL)

#define	PINCONNECT_PINMODE0_P0_02MODE_Msk (0x30UL)

#define	PINCONNECT_PINMODE0_P0_03MODE_Pos (6UL)

#define	PINCONNECT_PINMODE0_P0_03MODE_Msk (0xc0UL)

#define	PINCONNECT_PINMODE0_P0_04MODE_Pos (8UL)

#define	PINCONNECT_PINMODE0_P0_04MODE_Msk (0x300UL)

#define	PINCONNECT_PINMODE0_P0_05MODE_Pos (10UL)

#define	PINCONNECT_PINMODE0_P0_05MODE_Msk (0xc00UL)

#define	PINCONNECT_PINMODE0_P0_06MODE_Pos (12UL)

#define	PINCONNECT_PINMODE0_P0_06MODE_Msk (0x3000UL)

#define	PINCONNECT_PINMODE0_P0_07MODE_Pos (14UL)

#define	PINCONNECT_PINMODE0_P0_07MODE_Msk (0xc000UL)

#define	PINCONNECT_PINMODE0_P0_08MODE_Pos (16UL)

#define	PINCONNECT_PINMODE0_P0_08MODE_Msk (0x30000UL)

#define	PINCONNECT_PINMODE0_P0_09MODE_Pos (18UL)

#define	PINCONNECT_PINMODE0_P0_09MODE_Msk (0xc0000UL)

#define	PINCONNECT_PINMODE0_P0_10MODE_Pos (20UL)

#define	PINCONNECT_PINMODE0_P0_10MODE_Msk (0x300000UL)

#define	PINCONNECT_PINMODE0_P0_11MODE_Pos (22UL)

#define	PINCONNECT_PINMODE0_P0_11MODE_Msk (0xc00000UL)

#define	PINCONNECT_PINMODE0_P0_15MODE_Pos (30UL)

#define	PINCONNECT_PINMODE0_P0_15MODE_Msk (0xc0000000UL)

#define	PINCONNECT_PINMODE1_P0_16MODE_Pos (0UL)

#define	PINCONNECT_PINMODE1_P0_16MODE_Msk (0x3UL)

#define	PINCONNECT_PINMODE1_P0_17MODE_Pos (2UL)

#define	PINCONNECT_PINMODE1_P0_17MODE_Msk (0xcUL)

#define	PINCONNECT_PINMODE1_P0_18MODE_Pos (4UL)

#define	PINCONNECT_PINMODE1_P0_18MODE_Msk (0x30UL)

#define	PINCONNECT_PINMODE1_P0_19MODE_Pos (6UL)

#define	PINCONNECT_PINMODE1_P0_19MODE_Msk (0xc0UL)

#define	PINCONNECT_PINMODE1_P0_20MODE_Pos (8UL)

#define	PINCONNECT_PINMODE1_P0_20MODE_Msk (0x300UL)

#define	PINCONNECT_PINMODE1_P0_21MODE_Pos (10UL)

#define	PINCONNECT_PINMODE1_P0_21MODE_Msk (0xc00UL)

#define	PINCONNECT_PINMODE1_P0_22MODE_Pos (12UL)

#define	PINCONNECT_PINMODE1_P0_22MODE_Msk (0x3000UL)

#define	PINCONNECT_PINMODE1_P0_23MODE_Pos (14UL)

#define	PINCONNECT_PINMODE1_P0_23MODE_Msk (0xc000UL)

#define	PINCONNECT_PINMODE1_P0_24MODE_Pos (16UL)

#define	PINCONNECT_PINMODE1_P0_24MODE_Msk (0x30000UL)

#define	PINCONNECT_PINMODE1_P0_25MODE_Pos (18UL)

#define	PINCONNECT_PINMODE1_P0_25MODE_Msk (0xc0000UL)

#define	PINCONNECT_PINMODE1_P0_26MODE_Pos (20UL)

#define	PINCONNECT_PINMODE1_P0_26MODE_Msk (0x300000UL)

#define	PINCONNECT_PINMODE2_P1_00MODE_Pos (0UL)

#define	PINCONNECT_PINMODE2_P1_00MODE_Msk (0x3UL)

#define	PINCONNECT_PINMODE2_P1_01MODE_Pos (2UL)

#define	PINCONNECT_PINMODE2_P1_01MODE_Msk (0xcUL)

#define	PINCONNECT_PINMODE2_P1_04MODE_Pos (8UL)

#define	PINCONNECT_PINMODE2_P1_04MODE_Msk (0x300UL)

#define	PINCONNECT_PINMODE2_P1_08MODE_Pos (16UL)

#define	PINCONNECT_PINMODE2_P1_08MODE_Msk (0x30000UL)

#define	PINCONNECT_PINMODE2_P1_09MODE_Pos (18UL)

#define	PINCONNECT_PINMODE2_P1_09MODE_Msk (0xc0000UL)

#define	PINCONNECT_PINMODE2_P1_10MODE_Pos (20UL)

#define	PINCONNECT_PINMODE2_P1_10MODE_Msk (0x300000UL)

#define	PINCONNECT_PINMODE2_P1_14MODE_Pos (28UL)

#define	PINCONNECT_PINMODE2_P1_14MODE_Msk (0x30000000UL)

#define	PINCONNECT_PINMODE2_P1_15MODE_Pos (30UL)

#define	PINCONNECT_PINMODE2_P1_15MODE_Msk (0xc0000000UL)

#define	PINCONNECT_PINMODE3_P1_16MODE_Pos (0UL)

#define	PINCONNECT_PINMODE3_P1_16MODE_Msk (0x3UL)

#define	PINCONNECT_PINMODE3_P1_17MODE_Pos (2UL)

#define	PINCONNECT_PINMODE3_P1_17MODE_Msk (0xcUL)

#define	PINCONNECT_PINMODE3_P1_18MODE_Pos (4UL)

#define	PINCONNECT_PINMODE3_P1_18MODE_Msk (0x30UL)

#define	PINCONNECT_PINMODE3_P1_19MODE_Pos (6UL)

#define	PINCONNECT_PINMODE3_P1_19MODE_Msk (0xc0UL)

#define	PINCONNECT_PINMODE3_P1_20MODE_Pos (8UL)

#define	PINCONNECT_PINMODE3_P1_20MODE_Msk (0x300UL)

#define	PINCONNECT_PINMODE3_P1_21MODE_Pos (10UL)

#define	PINCONNECT_PINMODE3_P1_21MODE_Msk (0xc00UL)

#define	PINCONNECT_PINMODE3_P1_22MODE_Pos (12UL)

#define	PINCONNECT_PINMODE3_P1_22MODE_Msk (0x3000UL)

#define	PINCONNECT_PINMODE3_P1_23MODE_Pos (14UL)

#define	PINCONNECT_PINMODE3_P1_23MODE_Msk (0xc000UL)

#define	PINCONNECT_PINMODE3_P1_24MODE_Pos (16UL)

#define	PINCONNECT_PINMODE3_P1_24MODE_Msk (0x30000UL)

#define	PINCONNECT_PINMODE3_P1_25MODE_Pos (18UL)

#define	PINCONNECT_PINMODE3_P1_25MODE_Msk (0xc0000UL)

#define	PINCONNECT_PINMODE3_P1_26MODE_Pos (20UL)

#define	PINCONNECT_PINMODE3_P1_26MODE_Msk (0x300000UL)

#define	PINCONNECT_PINMODE3_P1_27MODE_Pos (22UL)

#define	PINCONNECT_PINMODE3_P1_27MODE_Msk (0xc00000UL)

#define	PINCONNECT_PINMODE3_P1_28MODE_Pos (24UL)

#define	PINCONNECT_PINMODE3_P1_28MODE_Msk (0x3000000UL)

#define	PINCONNECT_PINMODE3_P1_29MODE_Pos (26UL)

#define	PINCONNECT_PINMODE3_P1_29MODE_Msk (0xc000000UL)

#define	PINCONNECT_PINMODE3_P1_30MODE_Pos (28UL)

#define	PINCONNECT_PINMODE3_P1_30MODE_Msk (0x30000000UL)

#define	PINCONNECT_PINMODE3_P1_31MODE_Pos (30UL)

#define	PINCONNECT_PINMODE3_P1_31MODE_Msk (0xc0000000UL)

#define	PINCONNECT_PINMODE4_P2_00MODE_Pos (0UL)

#define	PINCONNECT_PINMODE4_P2_00MODE_Msk (0x3UL)

#define	PINCONNECT_PINMODE4_P2_01MODE_Pos (2UL)

#define	PINCONNECT_PINMODE4_P2_01MODE_Msk (0xcUL)

#define	PINCONNECT_PINMODE4_P2_02MODE_Pos (4UL)

#define	PINCONNECT_PINMODE4_P2_02MODE_Msk (0x30UL)

#define	PINCONNECT_PINMODE4_P2_03MODE_Pos (6UL)

#define	PINCONNECT_PINMODE4_P2_03MODE_Msk (0xc0UL)

#define	PINCONNECT_PINMODE4_P2_04MODE_Pos (8UL)

#define	PINCONNECT_PINMODE4_P2_04MODE_Msk (0x300UL)

#define	PINCONNECT_PINMODE4_P2_05MODE_Pos (10UL)

#define	PINCONNECT_PINMODE4_P2_05MODE_Msk (0xc00UL)

#define	PINCONNECT_PINMODE4_P2_06MODE_Pos (12UL)

#define	PINCONNECT_PINMODE4_P2_06MODE_Msk (0x3000UL)

#define	PINCONNECT_PINMODE4_P2_07MODE_Pos (14UL)

#define	PINCONNECT_PINMODE4_P2_07MODE_Msk (0xc000UL)

#define	PINCONNECT_PINMODE4_P2_08MODE_Pos (16UL)

#define	PINCONNECT_PINMODE4_P2_08MODE_Msk (0x30000UL)

#define	PINCONNECT_PINMODE4_P2_09MODE_Pos (18UL)

#define	PINCONNECT_PINMODE4_P2_09MODE_Msk (0xc0000UL)

#define	PINCONNECT_PINMODE4_P2_10MODE_Pos (20UL)

#define	PINCONNECT_PINMODE4_P2_10MODE_Msk (0x300000UL)

#define	PINCONNECT_PINMODE4_P2_11MODE_Pos (22UL)

#define	PINCONNECT_PINMODE4_P2_11MODE_Msk (0xc00000UL)

#define	PINCONNECT_PINMODE4_P2_12MODE_Pos (24UL)

#define	PINCONNECT_PINMODE4_P2_12MODE_Msk (0x3000000UL)

#define	PINCONNECT_PINMODE4_P2_13MODE_Pos (26UL)

#define	PINCONNECT_PINMODE4_P2_13MODE_Msk (0xc000000UL)

#define	PINCONNECT_PINMODE7_P3_25MODE_Pos (18UL)

#define	PINCONNECT_PINMODE7_P3_25MODE_Msk (0xc0000UL)

#define	PINCONNECT_PINMODE7_P3_26MODE_Pos (20UL)

#define	PINCONNECT_PINMODE7_P3_26MODE_Msk (0x300000UL)

#define	PINCONNECT_PINMODE9_P4_28MODE_Pos (24UL)

#define	PINCONNECT_PINMODE9_P4_28MODE_Msk (0x3000000UL)

#define	PINCONNECT_PINMODE9_P4_29MODE_Pos (26UL)

#define	PINCONNECT_PINMODE9_P4_29MODE_Msk (0xc000000UL)

#define	PINCONNECT_PINMODE_OD0_P0_00OD_Pos (0UL)

#define	PINCONNECT_PINMODE_OD0_P0_00OD_Msk (0x1UL)

#define	PINCONNECT_PINMODE_OD0_P0_01OD_Pos (1UL)

#define	PINCONNECT_PINMODE_OD0_P0_01OD_Msk (0x2UL)

#define	PINCONNECT_PINMODE_OD0_P0_02OD_Pos (2UL)

#define	PINCONNECT_PINMODE_OD0_P0_02OD_Msk (0x4UL)

#define	PINCONNECT_PINMODE_OD0_P0_03OD_Pos (3UL)

#define	PINCONNECT_PINMODE_OD0_P0_03OD_Msk (0x8UL)

#define	PINCONNECT_PINMODE_OD0_P0_04OD_Pos (4UL)

#define	PINCONNECT_PINMODE_OD0_P0_04OD_Msk (0x10UL)

#define	PINCONNECT_PINMODE_OD0_P0_05OD_Pos (5UL)

#define	PINCONNECT_PINMODE_OD0_P0_05OD_Msk (0x20UL)

#define	PINCONNECT_PINMODE_OD0_P0_06OD_Pos (6UL)

#define	PINCONNECT_PINMODE_OD0_P0_06OD_Msk (0x40UL)

#define	PINCONNECT_PINMODE_OD0_P0_07OD_Pos (7UL)

#define	PINCONNECT_PINMODE_OD0_P0_07OD_Msk (0x80UL)

#define	PINCONNECT_PINMODE_OD0_P0_08OD_Pos (8UL)

#define	PINCONNECT_PINMODE_OD0_P0_08OD_Msk (0x100UL)

#define	PINCONNECT_PINMODE_OD0_P0_09OD_Pos (9UL)

#define	PINCONNECT_PINMODE_OD0_P0_09OD_Msk (0x200UL)

#define	PINCONNECT_PINMODE_OD0_P0_10OD_Pos (10UL)

#define	PINCONNECT_PINMODE_OD0_P0_10OD_Msk (0x400UL)

#define	PINCONNECT_PINMODE_OD0_P0_11OD_Pos (11UL)

#define	PINCONNECT_PINMODE_OD0_P0_11OD_Msk (0x800UL)

#define	PINCONNECT_PINMODE_OD0_P0_15OD_Pos (15UL)

#define	PINCONNECT_PINMODE_OD0_P0_15OD_Msk (0x8000UL)

#define	PINCONNECT_PINMODE_OD0_P0_16OD_Pos (16UL)

#define	PINCONNECT_PINMODE_OD0_P0_16OD_Msk (0x10000UL)

#define	PINCONNECT_PINMODE_OD0_P0_17OD_Pos (17UL)

#define	PINCONNECT_PINMODE_OD0_P0_17OD_Msk (0x20000UL)

#define	PINCONNECT_PINMODE_OD0_P0_18OD_Pos (18UL)

#define	PINCONNECT_PINMODE_OD0_P0_18OD_Msk (0x40000UL)

#define	PINCONNECT_PINMODE_OD0_P0_19OD_Pos (19UL)

#define	PINCONNECT_PINMODE_OD0_P0_19OD_Msk (0x80000UL)

#define	PINCONNECT_PINMODE_OD0_P0_20OD_Pos (20UL)

#define	PINCONNECT_PINMODE_OD0_P0_20OD_Msk (0x100000UL)

#define	PINCONNECT_PINMODE_OD0_P0_21OD_Pos (21UL)

#define	PINCONNECT_PINMODE_OD0_P0_21OD_Msk (0x200000UL)

#define	PINCONNECT_PINMODE_OD0_P0_22OD_Pos (22UL)

#define	PINCONNECT_PINMODE_OD0_P0_22OD_Msk (0x400000UL)

#define	PINCONNECT_PINMODE_OD0_P0_23OD_Pos (23UL)

#define	PINCONNECT_PINMODE_OD0_P0_23OD_Msk (0x800000UL)

#define	PINCONNECT_PINMODE_OD0_P0_24OD_Pos (24UL)

#define	PINCONNECT_PINMODE_OD0_P0_24OD_Msk (0x1000000UL)

#define	PINCONNECT_PINMODE_OD0_P0_25OD_Pos (25UL)

#define	PINCONNECT_PINMODE_OD0_P0_25OD_Msk (0x2000000UL)

#define	PINCONNECT_PINMODE_OD0_P0_26OD_Pos (26UL)

#define	PINCONNECT_PINMODE_OD0_P0_26OD_Msk (0x4000000UL)

#define	PINCONNECT_PINMODE_OD0_P0_29OD_Pos (29UL)

#define	PINCONNECT_PINMODE_OD0_P0_29OD_Msk (0x20000000UL)

#define	PINCONNECT_PINMODE_OD0_P0_30OD_Pos (30UL)

#define	PINCONNECT_PINMODE_OD0_P0_30OD_Msk (0x40000000UL)

#define	PINCONNECT_PINMODE_OD1_P1_00OD_Pos (0UL)

#define	PINCONNECT_PINMODE_OD1_P1_00OD_Msk (0x1UL)

#define	PINCONNECT_PINMODE_OD1_P1_01OD_Pos (1UL)

#define	PINCONNECT_PINMODE_OD1_P1_01OD_Msk (0x2UL)

#define	PINCONNECT_PINMODE_OD1_P1_04OD_Pos (4UL)

#define	PINCONNECT_PINMODE_OD1_P1_04OD_Msk (0x10UL)

#define	PINCONNECT_PINMODE_OD1_P1_08OD_Pos (8UL)

#define	PINCONNECT_PINMODE_OD1_P1_08OD_Msk (0x100UL)

#define	PINCONNECT_PINMODE_OD1_P1_09OD_Pos (9UL)

#define	PINCONNECT_PINMODE_OD1_P1_09OD_Msk (0x200UL)

#define	PINCONNECT_PINMODE_OD1_P1_10OD_Pos (10UL)

#define	PINCONNECT_PINMODE_OD1_P1_10OD_Msk (0x400UL)

#define	PINCONNECT_PINMODE_OD1_P1_14OD_Pos (14UL)

#define	PINCONNECT_PINMODE_OD1_P1_14OD_Msk (0x4000UL)

#define	PINCONNECT_PINMODE_OD1_P1_15OD_Pos (15UL)

#define	PINCONNECT_PINMODE_OD1_P1_15OD_Msk (0x8000UL)

#define	PINCONNECT_PINMODE_OD1_P1_16OD_Pos (16UL)

#define	PINCONNECT_PINMODE_OD1_P1_16OD_Msk (0x10000UL)

#define	PINCONNECT_PINMODE_OD1_P1_17OD_Pos (17UL)

#define	PINCONNECT_PINMODE_OD1_P1_17OD_Msk (0x20000UL)

#define	PINCONNECT_PINMODE_OD1_P1_18OD_Pos (18UL)

#define	PINCONNECT_PINMODE_OD1_P1_18OD_Msk (0x40000UL)

#define	PINCONNECT_PINMODE_OD1_P1_19OD_Pos (19UL)

#define	PINCONNECT_PINMODE_OD1_P1_19OD_Msk (0x80000UL)

#define	PINCONNECT_PINMODE_OD1_P1_20OD_Pos (20UL)

#define	PINCONNECT_PINMODE_OD1_P1_20OD_Msk (0x100000UL)

#define	PINCONNECT_PINMODE_OD1_P1_21OD_Pos (21UL)

#define	PINCONNECT_PINMODE_OD1_P1_21OD_Msk (0x200000UL)

#define	PINCONNECT_PINMODE_OD1_P1_22OD_Pos (22UL)

#define	PINCONNECT_PINMODE_OD1_P1_22OD_Msk (0x400000UL)

#define	PINCONNECT_PINMODE_OD1_P1_23OD_Pos (23UL)

#define	PINCONNECT_PINMODE_OD1_P1_23OD_Msk (0x800000UL)

#define	PINCONNECT_PINMODE_OD1_P1_24OD_Pos (24UL)

#define	PINCONNECT_PINMODE_OD1_P1_24OD_Msk (0x1000000UL)

#define	PINCONNECT_PINMODE_OD1_P1_25OD_Pos (25UL)

#define	PINCONNECT_PINMODE_OD1_P1_25OD_Msk (0x2000000UL)

#define	PINCONNECT_PINMODE_OD1_P1_26OD_Pos (26UL)

#define	PINCONNECT_PINMODE_OD1_P1_26OD_Msk (0x4000000UL)

#define	PINCONNECT_PINMODE_OD1_P1_27OD_Pos (27UL)

#define	PINCONNECT_PINMODE_OD1_P1_27OD_Msk (0x8000000UL)

#define	PINCONNECT_PINMODE_OD1_P1_28OD_Pos (28UL)

#define	PINCONNECT_PINMODE_OD1_P1_28OD_Msk (0x10000000UL)

#define	PINCONNECT_PINMODE_OD1_P1_29OD_Pos (29UL)

#define	PINCONNECT_PINMODE_OD1_P1_29OD_Msk (0x20000000UL)

#define	PINCONNECT_PINMODE_OD1_P1_30OD_Pos (30UL)

#define	PINCONNECT_PINMODE_OD1_P1_30OD_Msk (0x40000000UL)

#define	PINCONNECT_PINMODE_OD1_P1_31OD_Pos (31UL)

#define	PINCONNECT_PINMODE_OD1_P1_31OD_Msk (0x80000000UL)

#define	PINCONNECT_PINMODE_OD2_P2_00OD_Pos (0UL)

#define	PINCONNECT_PINMODE_OD2_P2_00OD_Msk (0x1UL)

#define	PINCONNECT_PINMODE_OD2_P2_01OD_Pos (1UL)

#define	PINCONNECT_PINMODE_OD2_P2_01OD_Msk (0x2UL)

#define	PINCONNECT_PINMODE_OD2_P2_02OD_Pos (2UL)

#define	PINCONNECT_PINMODE_OD2_P2_02OD_Msk (0x4UL)

#define	PINCONNECT_PINMODE_OD2_P2_03OD_Pos (3UL)

#define	PINCONNECT_PINMODE_OD2_P2_03OD_Msk (0x8UL)

#define	PINCONNECT_PINMODE_OD2_P2_04OD_Pos (4UL)

#define	PINCONNECT_PINMODE_OD2_P2_04OD_Msk (0x10UL)

#define	PINCONNECT_PINMODE_OD2_P2_05OD_Pos (5UL)

#define	PINCONNECT_PINMODE_OD2_P2_05OD_Msk (0x20UL)

#define	PINCONNECT_PINMODE_OD2_P2_06OD_Pos (6UL)

#define	PINCONNECT_PINMODE_OD2_P2_06OD_Msk (0x40UL)

#define	PINCONNECT_PINMODE_OD2_P2_07OD_Pos (7UL)

#define	PINCONNECT_PINMODE_OD2_P2_07OD_Msk (0x80UL)

#define	PINCONNECT_PINMODE_OD2_P2_08OD_Pos (8UL)

#define	PINCONNECT_PINMODE_OD2_P2_08OD_Msk (0x100UL)

#define	PINCONNECT_PINMODE_OD2_P2_09OD_Pos (9UL)

#define	PINCONNECT_PINMODE_OD2_P2_09OD_Msk (0x200UL)

#define	PINCONNECT_PINMODE_OD2_P2_10OD_Pos (10UL)

#define	PINCONNECT_PINMODE_OD2_P2_10OD_Msk (0x400UL)

#define	PINCONNECT_PINMODE_OD2_P2_11OD_Pos (11UL)

#define	PINCONNECT_PINMODE_OD2_P2_11OD_Msk (0x800UL)

#define	PINCONNECT_PINMODE_OD2_P2_12OD_Pos (12UL)

#define	PINCONNECT_PINMODE_OD2_P2_12OD_Msk (0x1000UL)

#define	PINCONNECT_PINMODE_OD2_P2_13OD_Pos (13UL)

#define	PINCONNECT_PINMODE_OD2_P2_13OD_Msk (0x2000UL)

#define	PINCONNECT_PINMODE_OD3_P3_25OD_Pos (25UL)

#define	PINCONNECT_PINMODE_OD3_P3_25OD_Msk (0x2000000UL)

#define	PINCONNECT_PINMODE_OD3_P3_26OD_Pos (26UL)

#define	PINCONNECT_PINMODE_OD3_P3_26OD_Msk (0x4000000UL)

#define	PINCONNECT_PINMODE_OD4_P4_28OD_Pos (28UL)

#define	PINCONNECT_PINMODE_OD4_P4_28OD_Msk (0x10000000UL)

#define	PINCONNECT_PINMODE_OD4_P4_29OD_Pos (29UL)

#define	PINCONNECT_PINMODE_OD4_P4_29OD_Msk (0x20000000UL)

#define	PINCONNECT_I2CPADCFG_SDADRV0_Pos (0UL)

#define	PINCONNECT_I2CPADCFG_SDADRV0_Msk (0x1UL)

#define	PINCONNECT_I2CPADCFG_SDAI2C0_Pos (1UL)

#define	PINCONNECT_I2CPADCFG_SDAI2C0_Msk (0x2UL)

#define	PINCONNECT_I2CPADCFG_SCLDRV0_Pos (2UL)

#define	PINCONNECT_I2CPADCFG_SCLDRV0_Msk (0x4UL)

#define	PINCONNECT_I2CPADCFG_SCLI2C0_Pos (3UL)

#define	PINCONNECT_I2CPADCFG_SCLI2C0_Msk (0x8UL)

#define	SSP1_CR0_DSS_Pos (0UL)

#define	SSP1_CR0_DSS_Msk (0xfUL)

#define	SSP1_CR0_FRF_Pos (4UL)

#define	SSP1_CR0_FRF_Msk (0x30UL)

#define	SSP1_CR0_CPOL_Pos (6UL)

#define	SSP1_CR0_CPOL_Msk (0x40UL)

#define	SSP1_CR0_CPHA_Pos (7UL)

#define	SSP1_CR0_CPHA_Msk (0x80UL)

#define	SSP1_CR0_SCR_Pos (8UL)

#define	SSP1_CR0_SCR_Msk (0xff00UL)

#define	SSP1_CR1_LBM_Pos (0UL)

#define	SSP1_CR1_LBM_Msk (0x1UL)

#define	SSP1_CR1_SSE_Pos (1UL)

#define	SSP1_CR1_SSE_Msk (0x2UL)

#define	SSP1_CR1_MS_Pos (2UL)

#define	SSP1_CR1_MS_Msk (0x4UL)

#define	SSP1_CR1_SOD_Pos (3UL)

#define	SSP1_CR1_SOD_Msk (0x8UL)

#define	SSP1_DR_DATA_Pos (0UL)

#define	SSP1_DR_DATA_Msk (0xffffUL)

#define	SSP1_SR_TFE_Pos (0UL)

#define	SSP1_SR_TFE_Msk (0x1UL)

#define	SSP1_SR_TNF_Pos (1UL)

#define	SSP1_SR_TNF_Msk (0x2UL)

#define	SSP1_SR_RNE_Pos (2UL)

#define	SSP1_SR_RNE_Msk (0x4UL)

#define	SSP1_SR_RFF_Pos (3UL)

#define	SSP1_SR_RFF_Msk (0x8UL)

#define	SSP1_SR_BSY_Pos (4UL)

#define	SSP1_SR_BSY_Msk (0x10UL)

#define	SSP1_CPSR_CPSDVSR_Pos (0UL)

#define	SSP1_CPSR_CPSDVSR_Msk (0xffUL)

#define	SSP1_IMSC_RORIM_Pos (0UL)

#define	SSP1_IMSC_RORIM_Msk (0x1UL)

#define	SSP1_IMSC_RTIM_Pos (1UL)

#define	SSP1_IMSC_RTIM_Msk (0x2UL)

#define	SSP1_IMSC_RXIM_Pos (2UL)

#define	SSP1_IMSC_RXIM_Msk (0x4UL)

#define	SSP1_IMSC_TXIM_Pos (3UL)

#define	SSP1_IMSC_TXIM_Msk (0x8UL)

#define	SSP1_RIS_RORRIS_Pos (0UL)

#define	SSP1_RIS_RORRIS_Msk (0x1UL)

#define	SSP1_RIS_RTRIS_Pos (1UL)

#define	SSP1_RIS_RTRIS_Msk (0x2UL)

#define	SSP1_RIS_RXRIS_Pos (2UL)

#define	SSP1_RIS_RXRIS_Msk (0x4UL)

#define	SSP1_RIS_TXRIS_Pos (3UL)

#define	SSP1_RIS_TXRIS_Msk (0x8UL)

#define	SSP1_MIS_RORMIS_Pos (0UL)

#define	SSP1_MIS_RORMIS_Msk (0x1UL)

#define	SSP1_MIS_RTMIS_Pos (1UL)

#define	SSP1_MIS_RTMIS_Msk (0x2UL)

#define	SSP1_MIS_RXMIS_Pos (2UL)

#define	SSP1_MIS_RXMIS_Msk (0x4UL)

#define	SSP1_MIS_TXMIS_Pos (3UL)

#define	SSP1_MIS_TXMIS_Msk (0x8UL)

#define	SSP1_ICR_RORIC_Pos (0UL)

#define	SSP1_ICR_RORIC_Msk (0x1UL)

#define	SSP1_ICR_RTIC_Pos (1UL)

#define	SSP1_ICR_RTIC_Msk (0x2UL)

#define	SSP1_DMACR_RXDMAE_Pos (0UL)

#define	SSP1_DMACR_RXDMAE_Msk (0x1UL)

#define	SSP1_DMACR_TXDMAE_Pos (1UL)

#define	SSP1_DMACR_TXDMAE_Msk (0x2UL)

#define	ADC_CR_SEL_Pos (0UL)

#define	ADC_CR_SEL_Msk (0xffUL)

#define	ADC_CR_CLKDIV_Pos (8UL)

#define	ADC_CR_CLKDIV_Msk (0xff00UL)

#define	ADC_CR_BURST_Pos (16UL)

#define	ADC_CR_BURST_Msk (0x10000UL)

#define	ADC_CR_PDN_Pos (21UL)

#define	ADC_CR_PDN_Msk (0x200000UL)

#define	ADC_CR_START_Pos (24UL)

#define	ADC_CR_START_Msk (0x7000000UL)

#define	ADC_CR_EDGE_Pos (27UL)

#define	ADC_CR_EDGE_Msk (0x8000000UL)

#define	ADC_GDR_RESULT_Pos (4UL)

#define	ADC_GDR_RESULT_Msk (0xfff0UL)

#define	ADC_GDR_CHN_Pos (24UL)

#define	ADC_GDR_CHN_Msk (0x7000000UL)

#define	ADC_GDR_OVERRUN_Pos (30UL)

#define	ADC_GDR_OVERRUN_Msk (0x40000000UL)

#define	ADC_GDR_DONE_Pos (31UL)

#define	ADC_GDR_DONE_Msk (0x80000000UL)

#define	ADC_INTEN_ADINTEN0_Pos (0UL)

#define	ADC_INTEN_ADINTEN0_Msk (0x1UL)

#define	ADC_INTEN_ADINTEN1_Pos (1UL)

#define	ADC_INTEN_ADINTEN1_Msk (0x2UL)

#define	ADC_INTEN_ADINTEN2_Pos (2UL)

#define	ADC_INTEN_ADINTEN2_Msk (0x4UL)

#define	ADC_INTEN_ADINTEN3_Pos (3UL)

#define	ADC_INTEN_ADINTEN3_Msk (0x8UL)

#define	ADC_INTEN_ADINTEN4_Pos (4UL)

#define	ADC_INTEN_ADINTEN4_Msk (0x10UL)

#define	ADC_INTEN_ADINTEN5_Pos (5UL)

#define	ADC_INTEN_ADINTEN5_Msk (0x20UL)

#define	ADC_INTEN_ADINTEN6_Pos (6UL)

#define	ADC_INTEN_ADINTEN6_Msk (0x40UL)

#define	ADC_INTEN_ADINTEN7_Pos (7UL)

#define	ADC_INTEN_ADINTEN7_Msk (0x80UL)

#define	ADC_INTEN_ADGINTEN_Pos (8UL)

#define	ADC_INTEN_ADGINTEN_Msk (0x100UL)

#define	ADC_STAT_DONE0_Pos (0UL)

#define	ADC_STAT_DONE0_Msk (0x1UL)

#define	ADC_STAT_DONE1_Pos (1UL)

#define	ADC_STAT_DONE1_Msk (0x2UL)

#define	ADC_STAT_DONE2_Pos (2UL)

#define	ADC_STAT_DONE2_Msk (0x4UL)

#define	ADC_STAT_DONE3_Pos (3UL)

#define	ADC_STAT_DONE3_Msk (0x8UL)

#define	ADC_STAT_DONE4_Pos (4UL)

#define	ADC_STAT_DONE4_Msk (0x10UL)

#define	ADC_STAT_DONE5_Pos (5UL)

#define	ADC_STAT_DONE5_Msk (0x20UL)

#define	ADC_STAT_DONE6_Pos (6UL)

#define	ADC_STAT_DONE6_Msk (0x40UL)

#define	ADC_STAT_DONE7_Pos (7UL)

#define	ADC_STAT_DONE7_Msk (0x80UL)

#define	ADC_STAT_OVERRUN0_Pos (8UL)

#define	ADC_STAT_OVERRUN0_Msk (0x100UL)

#define	ADC_STAT_OVERRUN1_Pos (9UL)

#define	ADC_STAT_OVERRUN1_Msk (0x200UL)

#define	ADC_STAT_OVERRUN2_Pos (10UL)

#define	ADC_STAT_OVERRUN2_Msk (0x400UL)

#define	ADC_STAT_OVERRUN3_Pos (11UL)

#define	ADC_STAT_OVERRUN3_Msk (0x800UL)

#define	ADC_STAT_OVERRUN4_Pos (12UL)

#define	ADC_STAT_OVERRUN4_Msk (0x1000UL)

#define	ADC_STAT_OVERRUN5_Pos (13UL)

#define	ADC_STAT_OVERRUN5_Msk (0x2000UL)

#define	ADC_STAT_OVERRUN6_Pos (14UL)

#define	ADC_STAT_OVERRUN6_Msk (0x4000UL)

#define	ADC_STAT_OVERRUN7_Pos (15UL)

#define	ADC_STAT_OVERRUN7_Msk (0x8000UL)

#define	ADC_STAT_ADINT_Pos (16UL)

#define	ADC_STAT_ADINT_Msk (0x10000UL)

#define	ADC_TRM_ADCOFFS_Pos (4UL)

#define	ADC_TRM_ADCOFFS_Msk (0xf0UL)

#define	ADC_TRM_TRIM_Pos (8UL)

#define	ADC_TRM_TRIM_Msk (0xf00UL)

#define	CANAF_AFMR_ACCOFF_Pos (0UL)

#define	CANAF_AFMR_ACCOFF_Msk (0x1UL)

#define	CANAF_AFMR_ACCBP_Pos (1UL)

#define	CANAF_AFMR_ACCBP_Msk (0x2UL)

#define	CANAF_AFMR_EFCAN_Pos (2UL)

#define	CANAF_AFMR_EFCAN_Msk (0x4UL)

#define	CANAF_SFF_SA_SFF_SA_Pos (2UL)

#define	CANAF_SFF_SA_SFF_SA_Msk (0x7fcUL)

#define	CANAF_SFF_GRP_SA_SFF_GRP_SA_Pos (2UL)

#define	CANAF_SFF_GRP_SA_SFF_GRP_SA_Msk (0xffcUL)

#define	CANAF_EFF_SA_EFF_SA_Pos (2UL)

#define	CANAF_EFF_SA_EFF_SA_Msk (0x7fcUL)

#define	CANAF_EFF_GRP_SA_EFF_GRP_SA_Pos (2UL)

#define	CANAF_EFF_GRP_SA_EFF_GRP_SA_Msk (0xffcUL)

#define	CANAF_ENDOFTABLE_ENDOFTABLE_Pos (2UL)

#define	CANAF_ENDOFTABLE_ENDOFTABLE_Msk (0xffcUL)

#define	CANAF_LUTERRAD_LUTERRAD_Pos (2UL)

#define	CANAF_LUTERRAD_LUTERRAD_Msk (0x7fcUL)

#define	CANAF_LUTERR_LUTERR_Pos (0UL)

#define	CANAF_LUTERR_LUTERR_Msk (0x1UL)

#define	CANAF_FCANIE_FCANIE_Pos (0UL)

#define	CANAF_FCANIE_FCANIE_Msk (0x1UL)

#define	CANAF_FCANIC0_INTPND_Pos (0UL)

#define	CANAF_FCANIC0_INTPND_Msk (0xffffffffUL)

#define	CANAF_FCANIC1_IntPnd32_Pos (0UL)

#define	CANAF_FCANIC1_IntPnd32_Msk (0xffffffffUL)

#define	CCAN_TXSR_TS1_Pos (0UL)

#define	CCAN_TXSR_TS1_Msk (0x1UL)

#define	CCAN_TXSR_TS2_Pos (1UL)

#define	CCAN_TXSR_TS2_Msk (0x2UL)

#define	CCAN_TXSR_TBS1_Pos (8UL)

#define	CCAN_TXSR_TBS1_Msk (0x100UL)

#define	CCAN_TXSR_TBS2_Pos (9UL)

#define	CCAN_TXSR_TBS2_Msk (0x200UL)

#define	CCAN_TXSR_TCS1_Pos (16UL)

#define	CCAN_TXSR_TCS1_Msk (0x10000UL)

#define	CCAN_TXSR_TCS2_Pos (17UL)

#define	CCAN_TXSR_TCS2_Msk (0x20000UL)

#define	CCAN_RXSR_RS1_Pos (0UL)

#define	CCAN_RXSR_RS1_Msk (0x1UL)

#define	CCAN_RXSR_RS2_Pos (1UL)

#define	CCAN_RXSR_RS2_Msk (0x2UL)

#define	CCAN_RXSR_RB1_Pos (8UL)

#define	CCAN_RXSR_RB1_Msk (0x100UL)

#define	CCAN_RXSR_RB2_Pos (9UL)

#define	CCAN_RXSR_RB2_Msk (0x200UL)

#define	CCAN_RXSR_DOS1_Pos (16UL)

#define	CCAN_RXSR_DOS1_Msk (0x10000UL)

#define	CCAN_RXSR_DOS2_Pos (17UL)

#define	CCAN_RXSR_DOS2_Msk (0x20000UL)

#define	CCAN_MSR_E1_Pos (0UL)

#define	CCAN_MSR_E1_Msk (0x1UL)

#define	CCAN_MSR_E2_Pos (1UL)

#define	CCAN_MSR_E2_Msk (0x2UL)

#define	CCAN_MSR_BS1_Pos (8UL)

#define	CCAN_MSR_BS1_Msk (0x100UL)

#define	CCAN_MSR_BS2_Pos (9UL)

#define	CCAN_MSR_BS2_Msk (0x200UL)

#define	CAN1_MOD_RM_Pos (0UL)

#define	CAN1_MOD_RM_Msk (0x1UL)

#define	CAN1_MOD_LOM_Pos (1UL)

#define	CAN1_MOD_LOM_Msk (0x2UL)

#define	CAN1_MOD_STM_Pos (2UL)

#define	CAN1_MOD_STM_Msk (0x4UL)

#define	CAN1_MOD_TPM_Pos (3UL)

#define	CAN1_MOD_TPM_Msk (0x8UL)

#define	CAN1_MOD_SM_Pos (4UL)

#define	CAN1_MOD_SM_Msk (0x10UL)

#define	CAN1_MOD_RPM_Pos (5UL)

#define	CAN1_MOD_RPM_Msk (0x20UL)

#define	CAN1_MOD_TM_Pos (7UL)

#define	CAN1_MOD_TM_Msk (0x80UL)

#define	CAN1_CMR_TR_Pos (0UL)

#define	CAN1_CMR_TR_Msk (0x1UL)

#define	CAN1_CMR_AT_Pos (1UL)

#define	CAN1_CMR_AT_Msk (0x2UL)

#define	CAN1_CMR_RRB_Pos (2UL)

#define	CAN1_CMR_RRB_Msk (0x4UL)

#define	CAN1_CMR_CDO_Pos (3UL)

#define	CAN1_CMR_CDO_Msk (0x8UL)

#define	CAN1_CMR_SRR_Pos (4UL)

#define	CAN1_CMR_SRR_Msk (0x10UL)

#define	CAN1_CMR_STB1_Pos (5UL)

#define	CAN1_CMR_STB1_Msk (0x20UL)

#define	CAN1_CMR_STB2_Pos (6UL)

#define	CAN1_CMR_STB2_Msk (0x40UL)

#define	CAN1_CMR_STB3_Pos (7UL)

#define	CAN1_CMR_STB3_Msk (0x80UL)

#define	CAN1_GSR_RBS_Pos (0UL)

#define	CAN1_GSR_RBS_Msk (0x1UL)

#define	CAN1_GSR_DOS_Pos (1UL)

#define	CAN1_GSR_DOS_Msk (0x2UL)

#define	CAN1_GSR_TBS_Pos (2UL)

#define	CAN1_GSR_TBS_Msk (0x4UL)

#define	CAN1_GSR_TCS_Pos (3UL)

#define	CAN1_GSR_TCS_Msk (0x8UL)

#define	CAN1_GSR_RS_Pos (4UL)

#define	CAN1_GSR_RS_Msk (0x10UL)

#define	CAN1_GSR_TS_Pos (5UL)

#define	CAN1_GSR_TS_Msk (0x20UL)

#define	CAN1_GSR_ES_Pos (6UL)

#define	CAN1_GSR_ES_Msk (0x40UL)

#define	CAN1_GSR_BS_Pos (7UL)

#define	CAN1_GSR_BS_Msk (0x80UL)

#define	CAN1_GSR_RXERR_Pos (16UL)

#define	CAN1_GSR_RXERR_Msk (0xff0000UL)

#define	CAN1_GSR_TXERR_Pos (24UL)

#define	CAN1_GSR_TXERR_Msk (0xff000000UL)

#define	CAN1_ICR_RI_Pos (0UL)

#define	CAN1_ICR_RI_Msk (0x1UL)

#define	CAN1_ICR_TI1_Pos (1UL)

#define	CAN1_ICR_TI1_Msk (0x2UL)

#define	CAN1_ICR_EI_Pos (2UL)

#define	CAN1_ICR_EI_Msk (0x4UL)

#define	CAN1_ICR_DOI_Pos (3UL)

#define	CAN1_ICR_DOI_Msk (0x8UL)

#define	CAN1_ICR_WUI_Pos (4UL)

#define	CAN1_ICR_WUI_Msk (0x10UL)

#define	CAN1_ICR_EPI_Pos (5UL)

#define	CAN1_ICR_EPI_Msk (0x20UL)

#define	CAN1_ICR_ALI_Pos (6UL)

#define	CAN1_ICR_ALI_Msk (0x40UL)

#define	CAN1_ICR_BEI_Pos (7UL)

#define	CAN1_ICR_BEI_Msk (0x80UL)

#define	CAN1_ICR_IDI_Pos (8UL)

#define	CAN1_ICR_IDI_Msk (0x100UL)

#define	CAN1_ICR_TI2_Pos (9UL)

#define	CAN1_ICR_TI2_Msk (0x200UL)

#define	CAN1_ICR_TI3_Pos (10UL)

#define	CAN1_ICR_TI3_Msk (0x400UL)

#define	CAN1_ICR_ERRBIT4_0_Pos (16UL)

#define	CAN1_ICR_ERRBIT4_0_Msk (0x1f0000UL)

#define	CAN1_ICR_ERRDIR_Pos (21UL)

#define	CAN1_ICR_ERRDIR_Msk (0x200000UL)

#define	CAN1_ICR_ERRC1_0_Pos (22UL)

#define	CAN1_ICR_ERRC1_0_Msk (0xc00000UL)

#define	CAN1_ICR_ALCBIT_Pos (24UL)

#define	CAN1_ICR_ALCBIT_Msk (0xff000000UL)

#define	CAN1_IER_RIE_Pos (0UL)

#define	CAN1_IER_RIE_Msk (0x1UL)

#define	CAN1_IER_TIE1_Pos (1UL)

#define	CAN1_IER_TIE1_Msk (0x2UL)

#define	CAN1_IER_EIE_Pos (2UL)

#define	CAN1_IER_EIE_Msk (0x4UL)

#define	CAN1_IER_DOIE_Pos (3UL)

#define	CAN1_IER_DOIE_Msk (0x8UL)

#define	CAN1_IER_WUIE_Pos (4UL)

#define	CAN1_IER_WUIE_Msk (0x10UL)

#define	CAN1_IER_EPIE_Pos (5UL)

#define	CAN1_IER_EPIE_Msk (0x20UL)

#define	CAN1_IER_ALIE_Pos (6UL)

#define	CAN1_IER_ALIE_Msk (0x40UL)

#define	CAN1_IER_BEIE_Pos (7UL)

#define	CAN1_IER_BEIE_Msk (0x80UL)

#define	CAN1_IER_IDIE_Pos (8UL)

#define	CAN1_IER_IDIE_Msk (0x100UL)

#define	CAN1_IER_TIE2_Pos (9UL)

#define	CAN1_IER_TIE2_Msk (0x200UL)

#define	CAN1_IER_TIE3_Pos (10UL)

#define	CAN1_IER_TIE3_Msk (0x400UL)

#define	CAN1_BTR_BRP_Pos (0UL)

#define	CAN1_BTR_BRP_Msk (0x3ffUL)

#define	CAN1_BTR_SJW_Pos (14UL)

#define	CAN1_BTR_SJW_Msk (0xc000UL)

#define	CAN1_BTR_TESG1_Pos (16UL)

#define	CAN1_BTR_TESG1_Msk (0xf0000UL)

#define	CAN1_BTR_TESG2_Pos (20UL)

#define	CAN1_BTR_TESG2_Msk (0x700000UL)

#define	CAN1_BTR_SAM_Pos (23UL)

#define	CAN1_BTR_SAM_Msk (0x800000UL)

#define	CAN1_EWL_EWL_Pos (0UL)

#define	CAN1_EWL_EWL_Msk (0xffUL)

#define	CAN1_SR_RBS_1_Pos (0UL)

#define	CAN1_SR_RBS_1_Msk (0x1UL)

#define	CAN1_SR_DOS_1_Pos (1UL)

#define	CAN1_SR_DOS_1_Msk (0x2UL)

#define	CAN1_SR_TBS1_1_Pos (2UL)

#define	CAN1_SR_TBS1_1_Msk (0x4UL)

#define	CAN1_SR_TCS1_1_Pos (3UL)

#define	CAN1_SR_TCS1_1_Msk (0x8UL)

#define	CAN1_SR_RS_1_Pos (4UL)

#define	CAN1_SR_RS_1_Msk (0x10UL)

#define	CAN1_SR_TS1_1_Pos (5UL)

#define	CAN1_SR_TS1_1_Msk (0x20UL)

#define	CAN1_SR_ES_1_Pos (6UL)

#define	CAN1_SR_ES_1_Msk (0x40UL)

#define	CAN1_SR_BS_1_Pos (7UL)

#define	CAN1_SR_BS_1_Msk (0x80UL)

#define	CAN1_SR_RBS_2_Pos (8UL)

#define	CAN1_SR_RBS_2_Msk (0x100UL)

#define	CAN1_SR_DOS_2_Pos (9UL)

#define	CAN1_SR_DOS_2_Msk (0x200UL)

#define	CAN1_SR_TBS2_2_Pos (10UL)

#define	CAN1_SR_TBS2_2_Msk (0x400UL)

#define	CAN1_SR_TCS2_2_Pos (11UL)

#define	CAN1_SR_TCS2_2_Msk (0x800UL)

#define	CAN1_SR_RS_2_Pos (12UL)

#define	CAN1_SR_RS_2_Msk (0x1000UL)

#define	CAN1_SR_TS2_2_Pos (13UL)

#define	CAN1_SR_TS2_2_Msk (0x2000UL)

#define	CAN1_SR_ES_2_Pos (14UL)

#define	CAN1_SR_ES_2_Msk (0x4000UL)

#define	CAN1_SR_BS_2_Pos (15UL)

#define	CAN1_SR_BS_2_Msk (0x8000UL)

#define	CAN1_SR_RBS_3_Pos (16UL)

#define	CAN1_SR_RBS_3_Msk (0x10000UL)

#define	CAN1_SR_DOS_3_Pos (17UL)

#define	CAN1_SR_DOS_3_Msk (0x20000UL)

#define	CAN1_SR_TBS3_3_Pos (18UL)

#define	CAN1_SR_TBS3_3_Msk (0x40000UL)

#define	CAN1_SR_TCS3_3_Pos (19UL)

#define	CAN1_SR_TCS3_3_Msk (0x80000UL)

#define	CAN1_SR_RS_3_Pos (20UL)

#define	CAN1_SR_RS_3_Msk (0x100000UL)

#define	CAN1_SR_TS3_3_Pos (21UL)

#define	CAN1_SR_TS3_3_Msk (0x200000UL)

#define	CAN1_SR_ES_3_Pos (22UL)

#define	CAN1_SR_ES_3_Msk (0x400000UL)

#define	CAN1_SR_BS_3_Pos (23UL)

#define	CAN1_SR_BS_3_Msk (0x800000UL)

#define	CAN1_RFS_IDINDEX_Pos (0UL)

#define	CAN1_RFS_IDINDEX_Msk (0x3ffUL)

#define	CAN1_RFS_BP_Pos (10UL)

#define	CAN1_RFS_BP_Msk (0x400UL)

#define	CAN1_RFS_DLC_Pos (16UL)

#define	CAN1_RFS_DLC_Msk (0xf0000UL)

#define	CAN1_RFS_RTR_Pos (30UL)

#define	CAN1_RFS_RTR_Msk (0x40000000UL)

#define	CAN1_RFS_FF_Pos (31UL)

#define	CAN1_RFS_FF_Msk (0x80000000UL)

#define	CAN1_RID_ID_Pos (0UL)

#define	CAN1_RID_ID_Msk (0x7ffUL)

#define	CAN1_RDA_DATA1_Pos (0UL)

#define	CAN1_RDA_DATA1_Msk (0xffUL)

#define	CAN1_RDA_DATA2_Pos (8UL)

#define	CAN1_RDA_DATA2_Msk (0xff00UL)

#define	CAN1_RDA_DATA3_Pos (16UL)

#define	CAN1_RDA_DATA3_Msk (0xff0000UL)

#define	CAN1_RDA_DATA4_Pos (24UL)

#define	CAN1_RDA_DATA4_Msk (0xff000000UL)

#define	CAN1_RDB_DATA5_Pos (0UL)

#define	CAN1_RDB_DATA5_Msk (0xffUL)

#define	CAN1_RDB_DATA6_Pos (8UL)

#define	CAN1_RDB_DATA6_Msk (0xff00UL)

#define	CAN1_RDB_DATA7_Pos (16UL)

#define	CAN1_RDB_DATA7_Msk (0xff0000UL)

#define	CAN1_RDB_DATA8_Pos (24UL)

#define	CAN1_RDB_DATA8_Msk (0xff000000UL)

#define	CAN1_TFI1_PRIO_Pos (0UL)

#define	CAN1_TFI1_PRIO_Msk (0xffUL)

#define	CAN1_TFI1_DLC_Pos (16UL)

#define	CAN1_TFI1_DLC_Msk (0xf0000UL)

#define	CAN1_TFI1_RTR_Pos (30UL)

#define	CAN1_TFI1_RTR_Msk (0x40000000UL)

#define	CAN1_TFI1_FF_Pos (31UL)

#define	CAN1_TFI1_FF_Msk (0x80000000UL)

#define	CAN1_TFI2_PRIO_Pos (0UL)

#define	CAN1_TFI2_PRIO_Msk (0xffUL)

#define	CAN1_TFI2_DLC_Pos (16UL)

#define	CAN1_TFI2_DLC_Msk (0xf0000UL)

#define	CAN1_TFI2_RTR_Pos (30UL)

#define	CAN1_TFI2_RTR_Msk (0x40000000UL)

#define	CAN1_TFI2_FF_Pos (31UL)

#define	CAN1_TFI2_FF_Msk (0x80000000UL)

#define	CAN1_TFI3_PRIO_Pos (0UL)

#define	CAN1_TFI3_PRIO_Msk (0xffUL)

#define	CAN1_TFI3_DLC_Pos (16UL)

#define	CAN1_TFI3_DLC_Msk (0xf0000UL)

#define	CAN1_TFI3_RTR_Pos (30UL)

#define	CAN1_TFI3_RTR_Msk (0x40000000UL)

#define	CAN1_TFI3_FF_Pos (31UL)

#define	CAN1_TFI3_FF_Msk (0x80000000UL)

#define	CAN1_TID1_ID_Pos (0UL)

#define	CAN1_TID1_ID_Msk (0x7ffUL)

#define	CAN1_TID2_ID_Pos (0UL)

#define	CAN1_TID2_ID_Msk (0x7ffUL)

#define	CAN1_TID3_ID_Pos (0UL)

#define	CAN1_TID3_ID_Msk (0x7ffUL)

#define	CAN1_TDA1_DATA1_Pos (0UL)

#define	CAN1_TDA1_DATA1_Msk (0xffUL)

#define	CAN1_TDA1_DATA2_Pos (8UL)

#define	CAN1_TDA1_DATA2_Msk (0xff00UL)

#define	CAN1_TDA1_DATA3_Pos (16UL)

#define	CAN1_TDA1_DATA3_Msk (0xff0000UL)

#define	CAN1_TDA1_DATA4_Pos (24UL)

#define	CAN1_TDA1_DATA4_Msk (0xff000000UL)

#define	CAN1_TDA2_DATA1_Pos (0UL)

#define	CAN1_TDA2_DATA1_Msk (0xffUL)

#define	CAN1_TDA2_DATA2_Pos (8UL)

#define	CAN1_TDA2_DATA2_Msk (0xff00UL)

#define	CAN1_TDA2_DATA3_Pos (16UL)

#define	CAN1_TDA2_DATA3_Msk (0xff0000UL)

#define	CAN1_TDA2_DATA4_Pos (24UL)

#define	CAN1_TDA2_DATA4_Msk (0xff000000UL)

#define	CAN1_TDA3_DATA1_Pos (0UL)

#define	CAN1_TDA3_DATA1_Msk (0xffUL)

#define	CAN1_TDA3_DATA2_Pos (8UL)

#define	CAN1_TDA3_DATA2_Msk (0xff00UL)

#define	CAN1_TDA3_DATA3_Pos (16UL)

#define	CAN1_TDA3_DATA3_Msk (0xff0000UL)

#define	CAN1_TDA3_DATA4_Pos (24UL)

#define	CAN1_TDA3_DATA4_Msk (0xff000000UL)

#define	CAN1_TDB1_DATA5_Pos (0UL)

#define	CAN1_TDB1_DATA5_Msk (0xffUL)

#define	CAN1_TDB1_DATA6_Pos (8UL)

#define	CAN1_TDB1_DATA6_Msk (0xff00UL)

#define	CAN1_TDB1_DATA7_Pos (16UL)

#define	CAN1_TDB1_DATA7_Msk (0xff0000UL)

#define	CAN1_TDB1_DATA8_Pos (24UL)

#define	CAN1_TDB1_DATA8_Msk (0xff000000UL)

#define	CAN1_TDB2_DATA5_Pos (0UL)

#define	CAN1_TDB2_DATA5_Msk (0xffUL)

#define	CAN1_TDB2_DATA6_Pos (8UL)

#define	CAN1_TDB2_DATA6_Msk (0xff00UL)

#define	CAN1_TDB2_DATA7_Pos (16UL)

#define	CAN1_TDB2_DATA7_Msk (0xff0000UL)

#define	CAN1_TDB2_DATA8_Pos (24UL)

#define	CAN1_TDB2_DATA8_Msk (0xff000000UL)

#define	CAN1_TDB3_DATA5_Pos (0UL)

#define	CAN1_TDB3_DATA5_Msk (0xffUL)

#define	CAN1_TDB3_DATA6_Pos (8UL)

#define	CAN1_TDB3_DATA6_Msk (0xff00UL)

#define	CAN1_TDB3_DATA7_Pos (16UL)

#define	CAN1_TDB3_DATA7_Msk (0xff0000UL)

#define	CAN1_TDB3_DATA8_Pos (24UL)

#define	CAN1_TDB3_DATA8_Msk (0xff000000UL)

#define	CAN2_MOD_RM_Pos (0UL)

#define	CAN2_MOD_RM_Msk (0x1UL)

#define	CAN2_MOD_LOM_Pos (1UL)

#define	CAN2_MOD_LOM_Msk (0x2UL)

#define	CAN2_MOD_STM_Pos (2UL)

#define	CAN2_MOD_STM_Msk (0x4UL)

#define	CAN2_MOD_TPM_Pos (3UL)

#define	CAN2_MOD_TPM_Msk (0x8UL)

#define	CAN2_MOD_SM_Pos (4UL)

#define	CAN2_MOD_SM_Msk (0x10UL)

#define	CAN2_MOD_RPM_Pos (5UL)

#define	CAN2_MOD_RPM_Msk (0x20UL)

#define	CAN2_MOD_TM_Pos (7UL)

#define	CAN2_MOD_TM_Msk (0x80UL)

#define	CAN2_CMR_TR_Pos (0UL)

#define	CAN2_CMR_TR_Msk (0x1UL)

#define	CAN2_CMR_AT_Pos (1UL)

#define	CAN2_CMR_AT_Msk (0x2UL)

#define	CAN2_CMR_RRB_Pos (2UL)

#define	CAN2_CMR_RRB_Msk (0x4UL)

#define	CAN2_CMR_CDO_Pos (3UL)

#define	CAN2_CMR_CDO_Msk (0x8UL)

#define	CAN2_CMR_SRR_Pos (4UL)

#define	CAN2_CMR_SRR_Msk (0x10UL)

#define	CAN2_CMR_STB1_Pos (5UL)

#define	CAN2_CMR_STB1_Msk (0x20UL)

#define	CAN2_CMR_STB2_Pos (6UL)

#define	CAN2_CMR_STB2_Msk (0x40UL)

#define	CAN2_CMR_STB3_Pos (7UL)

#define	CAN2_CMR_STB3_Msk (0x80UL)

#define	CAN2_GSR_RBS_Pos (0UL)

#define	CAN2_GSR_RBS_Msk (0x1UL)

#define	CAN2_GSR_DOS_Pos (1UL)

#define	CAN2_GSR_DOS_Msk (0x2UL)

#define	CAN2_GSR_TBS_Pos (2UL)

#define	CAN2_GSR_TBS_Msk (0x4UL)

#define	CAN2_GSR_TCS_Pos (3UL)

#define	CAN2_GSR_TCS_Msk (0x8UL)

#define	CAN2_GSR_RS_Pos (4UL)

#define	CAN2_GSR_RS_Msk (0x10UL)

#define	CAN2_GSR_TS_Pos (5UL)

#define	CAN2_GSR_TS_Msk (0x20UL)

#define	CAN2_GSR_ES_Pos (6UL)

#define	CAN2_GSR_ES_Msk (0x40UL)

#define	CAN2_GSR_BS_Pos (7UL)

#define	CAN2_GSR_BS_Msk (0x80UL)

#define	CAN2_GSR_RXERR_Pos (16UL)

#define	CAN2_GSR_RXERR_Msk (0xff0000UL)

#define	CAN2_GSR_TXERR_Pos (24UL)

#define	CAN2_GSR_TXERR_Msk (0xff000000UL)

#define	CAN2_ICR_RI_Pos (0UL)

#define	CAN2_ICR_RI_Msk (0x1UL)

#define	CAN2_ICR_TI1_Pos (1UL)

#define	CAN2_ICR_TI1_Msk (0x2UL)

#define	CAN2_ICR_EI_Pos (2UL)

#define	CAN2_ICR_EI_Msk (0x4UL)

#define	CAN2_ICR_DOI_Pos (3UL)

#define	CAN2_ICR_DOI_Msk (0x8UL)

#define	CAN2_ICR_WUI_Pos (4UL)

#define	CAN2_ICR_WUI_Msk (0x10UL)

#define	CAN2_ICR_EPI_Pos (5UL)

#define	CAN2_ICR_EPI_Msk (0x20UL)

#define	CAN2_ICR_ALI_Pos (6UL)

#define	CAN2_ICR_ALI_Msk (0x40UL)

#define	CAN2_ICR_BEI_Pos (7UL)

#define	CAN2_ICR_BEI_Msk (0x80UL)

#define	CAN2_ICR_IDI_Pos (8UL)

#define	CAN2_ICR_IDI_Msk (0x100UL)

#define	CAN2_ICR_TI2_Pos (9UL)

#define	CAN2_ICR_TI2_Msk (0x200UL)

#define	CAN2_ICR_TI3_Pos (10UL)

#define	CAN2_ICR_TI3_Msk (0x400UL)

#define	CAN2_ICR_ERRBIT4_0_Pos (16UL)

#define	CAN2_ICR_ERRBIT4_0_Msk (0x1f0000UL)

#define	CAN2_ICR_ERRDIR_Pos (21UL)

#define	CAN2_ICR_ERRDIR_Msk (0x200000UL)

#define	CAN2_ICR_ERRC1_0_Pos (22UL)

#define	CAN2_ICR_ERRC1_0_Msk (0xc00000UL)

#define	CAN2_ICR_ALCBIT_Pos (24UL)

#define	CAN2_ICR_ALCBIT_Msk (0xff000000UL)

#define	CAN2_IER_RIE_Pos (0UL)

#define	CAN2_IER_RIE_Msk (0x1UL)

#define	CAN2_IER_TIE1_Pos (1UL)

#define	CAN2_IER_TIE1_Msk (0x2UL)

#define	CAN2_IER_EIE_Pos (2UL)

#define	CAN2_IER_EIE_Msk (0x4UL)

#define	CAN2_IER_DOIE_Pos (3UL)

#define	CAN2_IER_DOIE_Msk (0x8UL)

#define	CAN2_IER_WUIE_Pos (4UL)

#define	CAN2_IER_WUIE_Msk (0x10UL)

#define	CAN2_IER_EPIE_Pos (5UL)

#define	CAN2_IER_EPIE_Msk (0x20UL)

#define	CAN2_IER_ALIE_Pos (6UL)

#define	CAN2_IER_ALIE_Msk (0x40UL)

#define	CAN2_IER_BEIE_Pos (7UL)

#define	CAN2_IER_BEIE_Msk (0x80UL)

#define	CAN2_IER_IDIE_Pos (8UL)

#define	CAN2_IER_IDIE_Msk (0x100UL)

#define	CAN2_IER_TIE2_Pos (9UL)

#define	CAN2_IER_TIE2_Msk (0x200UL)

#define	CAN2_IER_TIE3_Pos (10UL)

#define	CAN2_IER_TIE3_Msk (0x400UL)

#define	CAN2_BTR_BRP_Pos (0UL)

#define	CAN2_BTR_BRP_Msk (0x3ffUL)

#define	CAN2_BTR_SJW_Pos (14UL)

#define	CAN2_BTR_SJW_Msk (0xc000UL)

#define	CAN2_BTR_TESG1_Pos (16UL)

#define	CAN2_BTR_TESG1_Msk (0xf0000UL)

#define	CAN2_BTR_TESG2_Pos (20UL)

#define	CAN2_BTR_TESG2_Msk (0x700000UL)

#define	CAN2_BTR_SAM_Pos (23UL)

#define	CAN2_BTR_SAM_Msk (0x800000UL)

#define	CAN2_EWL_EWL_Pos (0UL)

#define	CAN2_EWL_EWL_Msk (0xffUL)

#define	CAN2_SR_RBS_1_Pos (0UL)

#define	CAN2_SR_RBS_1_Msk (0x1UL)

#define	CAN2_SR_DOS_1_Pos (1UL)

#define	CAN2_SR_DOS_1_Msk (0x2UL)

#define	CAN2_SR_TBS1_1_Pos (2UL)

#define	CAN2_SR_TBS1_1_Msk (0x4UL)

#define	CAN2_SR_TCS1_1_Pos (3UL)

#define	CAN2_SR_TCS1_1_Msk (0x8UL)

#define	CAN2_SR_RS_1_Pos (4UL)

#define	CAN2_SR_RS_1_Msk (0x10UL)

#define	CAN2_SR_TS1_1_Pos (5UL)

#define	CAN2_SR_TS1_1_Msk (0x20UL)

#define	CAN2_SR_ES_1_Pos (6UL)

#define	CAN2_SR_ES_1_Msk (0x40UL)

#define	CAN2_SR_BS_1_Pos (7UL)

#define	CAN2_SR_BS_1_Msk (0x80UL)

#define	CAN2_SR_RBS_2_Pos (8UL)

#define	CAN2_SR_RBS_2_Msk (0x100UL)

#define	CAN2_SR_DOS_2_Pos (9UL)

#define	CAN2_SR_DOS_2_Msk (0x200UL)

#define	CAN2_SR_TBS2_2_Pos (10UL)

#define	CAN2_SR_TBS2_2_Msk (0x400UL)

#define	CAN2_SR_TCS2_2_Pos (11UL)

#define	CAN2_SR_TCS2_2_Msk (0x800UL)

#define	CAN2_SR_RS_2_Pos (12UL)

#define	CAN2_SR_RS_2_Msk (0x1000UL)

#define	CAN2_SR_TS2_2_Pos (13UL)

#define	CAN2_SR_TS2_2_Msk (0x2000UL)

#define	CAN2_SR_ES_2_Pos (14UL)

#define	CAN2_SR_ES_2_Msk (0x4000UL)

#define	CAN2_SR_BS_2_Pos (15UL)

#define	CAN2_SR_BS_2_Msk (0x8000UL)

#define	CAN2_SR_RBS_3_Pos (16UL)

#define	CAN2_SR_RBS_3_Msk (0x10000UL)

#define	CAN2_SR_DOS_3_Pos (17UL)

#define	CAN2_SR_DOS_3_Msk (0x20000UL)

#define	CAN2_SR_TBS3_3_Pos (18UL)

#define	CAN2_SR_TBS3_3_Msk (0x40000UL)

#define	CAN2_SR_TCS3_3_Pos (19UL)

#define	CAN2_SR_TCS3_3_Msk (0x80000UL)

#define	CAN2_SR_RS_3_Pos (20UL)

#define	CAN2_SR_RS_3_Msk (0x100000UL)

#define	CAN2_SR_TS3_3_Pos (21UL)

#define	CAN2_SR_TS3_3_Msk (0x200000UL)

#define	CAN2_SR_ES_3_Pos (22UL)

#define	CAN2_SR_ES_3_Msk (0x400000UL)

#define	CAN2_SR_BS_3_Pos (23UL)

#define	CAN2_SR_BS_3_Msk (0x800000UL)

#define	CAN2_RFS_IDINDEX_Pos (0UL)

#define	CAN2_RFS_IDINDEX_Msk (0x3ffUL)

#define	CAN2_RFS_BP_Pos (10UL)

#define	CAN2_RFS_BP_Msk (0x400UL)

#define	CAN2_RFS_DLC_Pos (16UL)

#define	CAN2_RFS_DLC_Msk (0xf0000UL)

#define	CAN2_RFS_RTR_Pos (30UL)

#define	CAN2_RFS_RTR_Msk (0x40000000UL)

#define	CAN2_RFS_FF_Pos (31UL)

#define	CAN2_RFS_FF_Msk (0x80000000UL)

#define	CAN2_RID_ID_Pos (0UL)

#define	CAN2_RID_ID_Msk (0x7ffUL)

#define	CAN2_RDA_DATA1_Pos (0UL)

#define	CAN2_RDA_DATA1_Msk (0xffUL)

#define	CAN2_RDA_DATA2_Pos (8UL)

#define	CAN2_RDA_DATA2_Msk (0xff00UL)

#define	CAN2_RDA_DATA3_Pos (16UL)

#define	CAN2_RDA_DATA3_Msk (0xff0000UL)

#define	CAN2_RDA_DATA4_Pos (24UL)

#define	CAN2_RDA_DATA4_Msk (0xff000000UL)

#define	CAN2_RDB_DATA5_Pos (0UL)

#define	CAN2_RDB_DATA5_Msk (0xffUL)

#define	CAN2_RDB_DATA6_Pos (8UL)

#define	CAN2_RDB_DATA6_Msk (0xff00UL)

#define	CAN2_RDB_DATA7_Pos (16UL)

#define	CAN2_RDB_DATA7_Msk (0xff0000UL)

#define	CAN2_RDB_DATA8_Pos (24UL)

#define	CAN2_RDB_DATA8_Msk (0xff000000UL)

#define	CAN2_TFI1_PRIO_Pos (0UL)

#define	CAN2_TFI1_PRIO_Msk (0xffUL)

#define	CAN2_TFI1_DLC_Pos (16UL)

#define	CAN2_TFI1_DLC_Msk (0xf0000UL)

#define	CAN2_TFI1_RTR_Pos (30UL)

#define	CAN2_TFI1_RTR_Msk (0x40000000UL)

#define	CAN2_TFI1_FF_Pos (31UL)

#define	CAN2_TFI1_FF_Msk (0x80000000UL)

#define	CAN2_TFI2_PRIO_Pos (0UL)

#define	CAN2_TFI2_PRIO_Msk (0xffUL)

#define	CAN2_TFI2_DLC_Pos (16UL)

#define	CAN2_TFI2_DLC_Msk (0xf0000UL)

#define	CAN2_TFI2_RTR_Pos (30UL)

#define	CAN2_TFI2_RTR_Msk (0x40000000UL)

#define	CAN2_TFI2_FF_Pos (31UL)

#define	CAN2_TFI2_FF_Msk (0x80000000UL)

#define	CAN2_TFI3_PRIO_Pos (0UL)

#define	CAN2_TFI3_PRIO_Msk (0xffUL)

#define	CAN2_TFI3_DLC_Pos (16UL)

#define	CAN2_TFI3_DLC_Msk (0xf0000UL)

#define	CAN2_TFI3_RTR_Pos (30UL)

#define	CAN2_TFI3_RTR_Msk (0x40000000UL)

#define	CAN2_TFI3_FF_Pos (31UL)

#define	CAN2_TFI3_FF_Msk (0x80000000UL)

#define	CAN2_TID1_ID_Pos (0UL)

#define	CAN2_TID1_ID_Msk (0x7ffUL)

#define	CAN2_TID2_ID_Pos (0UL)

#define	CAN2_TID2_ID_Msk (0x7ffUL)

#define	CAN2_TID3_ID_Pos (0UL)

#define	CAN2_TID3_ID_Msk (0x7ffUL)

#define	CAN2_TDA1_DATA1_Pos (0UL)

#define	CAN2_TDA1_DATA1_Msk (0xffUL)

#define	CAN2_TDA1_DATA2_Pos (8UL)

#define	CAN2_TDA1_DATA2_Msk (0xff00UL)

#define	CAN2_TDA1_DATA3_Pos (16UL)

#define	CAN2_TDA1_DATA3_Msk (0xff0000UL)

#define	CAN2_TDA1_DATA4_Pos (24UL)

#define	CAN2_TDA1_DATA4_Msk (0xff000000UL)

#define	CAN2_TDA2_DATA1_Pos (0UL)

#define	CAN2_TDA2_DATA1_Msk (0xffUL)

#define	CAN2_TDA2_DATA2_Pos (8UL)

#define	CAN2_TDA2_DATA2_Msk (0xff00UL)

#define	CAN2_TDA2_DATA3_Pos (16UL)

#define	CAN2_TDA2_DATA3_Msk (0xff0000UL)

#define	CAN2_TDA2_DATA4_Pos (24UL)

#define	CAN2_TDA2_DATA4_Msk (0xff000000UL)

#define	CAN2_TDA3_DATA1_Pos (0UL)

#define	CAN2_TDA3_DATA1_Msk (0xffUL)

#define	CAN2_TDA3_DATA2_Pos (8UL)

#define	CAN2_TDA3_DATA2_Msk (0xff00UL)

#define	CAN2_TDA3_DATA3_Pos (16UL)

#define	CAN2_TDA3_DATA3_Msk (0xff0000UL)

#define	CAN2_TDA3_DATA4_Pos (24UL)

#define	CAN2_TDA3_DATA4_Msk (0xff000000UL)

#define	CAN2_TDB1_DATA5_Pos (0UL)

#define	CAN2_TDB1_DATA5_Msk (0xffUL)

#define	CAN2_TDB1_DATA6_Pos (8UL)

#define	CAN2_TDB1_DATA6_Msk (0xff00UL)

#define	CAN2_TDB1_DATA7_Pos (16UL)

#define	CAN2_TDB1_DATA7_Msk (0xff0000UL)

#define	CAN2_TDB1_DATA8_Pos (24UL)

#define	CAN2_TDB1_DATA8_Msk (0xff000000UL)

#define	CAN2_TDB2_DATA5_Pos (0UL)

#define	CAN2_TDB2_DATA5_Msk (0xffUL)

#define	CAN2_TDB2_DATA6_Pos (8UL)

#define	CAN2_TDB2_DATA6_Msk (0xff00UL)

#define	CAN2_TDB2_DATA7_Pos (16UL)

#define	CAN2_TDB2_DATA7_Msk (0xff0000UL)

#define	CAN2_TDB2_DATA8_Pos (24UL)

#define	CAN2_TDB2_DATA8_Msk (0xff000000UL)

#define	CAN2_TDB3_DATA5_Pos (0UL)

#define	CAN2_TDB3_DATA5_Msk (0xffUL)

#define	CAN2_TDB3_DATA6_Pos (8UL)

#define	CAN2_TDB3_DATA6_Msk (0xff00UL)

#define	CAN2_TDB3_DATA7_Pos (16UL)

#define	CAN2_TDB3_DATA7_Msk (0xff0000UL)

#define	CAN2_TDB3_DATA8_Pos (24UL)

#define	CAN2_TDB3_DATA8_Msk (0xff000000UL)

#define	SSP0_CR0_DSS_Pos (0UL)

#define	SSP0_CR0_DSS_Msk (0xfUL)

#define	SSP0_CR0_FRF_Pos (4UL)

#define	SSP0_CR0_FRF_Msk (0x30UL)

#define	SSP0_CR0_CPOL_Pos (6UL)

#define	SSP0_CR0_CPOL_Msk (0x40UL)

#define	SSP0_CR0_CPHA_Pos (7UL)

#define	SSP0_CR0_CPHA_Msk (0x80UL)

#define	SSP0_CR0_SCR_Pos (8UL)

#define	SSP0_CR0_SCR_Msk (0xff00UL)

#define	SSP0_CR1_LBM_Pos (0UL)

#define	SSP0_CR1_LBM_Msk (0x1UL)

#define	SSP0_CR1_SSE_Pos (1UL)

#define	SSP0_CR1_SSE_Msk (0x2UL)

#define	SSP0_CR1_MS_Pos (2UL)

#define	SSP0_CR1_MS_Msk (0x4UL)

#define	SSP0_CR1_SOD_Pos (3UL)

#define	SSP0_CR1_SOD_Msk (0x8UL)

#define	SSP0_DR_DATA_Pos (0UL)

#define	SSP0_DR_DATA_Msk (0xffffUL)

#define	SSP0_SR_TFE_Pos (0UL)

#define	SSP0_SR_TFE_Msk (0x1UL)

#define	SSP0_SR_TNF_Pos (1UL)

#define	SSP0_SR_TNF_Msk (0x2UL)

#define	SSP0_SR_RNE_Pos (2UL)

#define	SSP0_SR_RNE_Msk (0x4UL)

#define	SSP0_SR_RFF_Pos (3UL)

#define	SSP0_SR_RFF_Msk (0x8UL)

#define	SSP0_SR_BSY_Pos (4UL)

#define	SSP0_SR_BSY_Msk (0x10UL)

#define	SSP0_CPSR_CPSDVSR_Pos (0UL)

#define	SSP0_CPSR_CPSDVSR_Msk (0xffUL)

#define	SSP0_IMSC_RORIM_Pos (0UL)

#define	SSP0_IMSC_RORIM_Msk (0x1UL)

#define	SSP0_IMSC_RTIM_Pos (1UL)

#define	SSP0_IMSC_RTIM_Msk (0x2UL)

#define	SSP0_IMSC_RXIM_Pos (2UL)

#define	SSP0_IMSC_RXIM_Msk (0x4UL)

#define	SSP0_IMSC_TXIM_Pos (3UL)

#define	SSP0_IMSC_TXIM_Msk (0x8UL)

#define	SSP0_RIS_RORRIS_Pos (0UL)

#define	SSP0_RIS_RORRIS_Msk (0x1UL)

#define	SSP0_RIS_RTRIS_Pos (1UL)

#define	SSP0_RIS_RTRIS_Msk (0x2UL)

#define	SSP0_RIS_RXRIS_Pos (2UL)

#define	SSP0_RIS_RXRIS_Msk (0x4UL)

#define	SSP0_RIS_TXRIS_Pos (3UL)

#define	SSP0_RIS_TXRIS_Msk (0x8UL)

#define	SSP0_MIS_RORMIS_Pos (0UL)

#define	SSP0_MIS_RORMIS_Msk (0x1UL)

#define	SSP0_MIS_RTMIS_Pos (1UL)

#define	SSP0_MIS_RTMIS_Msk (0x2UL)

#define	SSP0_MIS_RXMIS_Pos (2UL)

#define	SSP0_MIS_RXMIS_Msk (0x4UL)

#define	SSP0_MIS_TXMIS_Pos (3UL)

#define	SSP0_MIS_TXMIS_Msk (0x8UL)

#define	SSP0_ICR_RORIC_Pos (0UL)

#define	SSP0_ICR_RORIC_Msk (0x1UL)

#define	SSP0_ICR_RTIC_Pos (1UL)

#define	SSP0_ICR_RTIC_Msk (0x2UL)

#define	SSP0_DMACR_RXDMAE_Pos (0UL)

#define	SSP0_DMACR_RXDMAE_Msk (0x1UL)

#define	SSP0_DMACR_TXDMAE_Pos (1UL)

#define	SSP0_DMACR_TXDMAE_Msk (0x2UL)

#define	DAC_CR_VALUE_Pos (6UL)

#define	DAC_CR_VALUE_Msk (0xffc0UL)

#define	DAC_CR_BIAS_Pos (16UL)

#define	DAC_CR_BIAS_Msk (0x10000UL)

#define	DAC_CTRL_INT_DMA_REQ_Pos (0UL)

#define	DAC_CTRL_INT_DMA_REQ_Msk (0x1UL)

#define	DAC_CTRL_DBLBUF_ENA_Pos (1UL)

#define	DAC_CTRL_DBLBUF_ENA_Msk (0x2UL)

#define	DAC_CTRL_CNT_ENA_Pos (2UL)

#define	DAC_CTRL_CNT_ENA_Msk (0x4UL)

#define	DAC_CTRL_DMA_ENA_Pos (3UL)

#define	DAC_CTRL_DMA_ENA_Msk (0x8UL)

#define	DAC_CNTVAL_VALUE_Pos (0UL)

#define	DAC_CNTVAL_VALUE_Msk (0xffffUL)

#define	TIMER2_IR_MR0INT_Pos (0UL)

#define	TIMER2_IR_MR0INT_Msk (0x1UL)

#define	TIMER2_IR_MR1INT_Pos (1UL)

#define	TIMER2_IR_MR1INT_Msk (0x2UL)

#define	TIMER2_IR_MR2INT_Pos (2UL)

#define	TIMER2_IR_MR2INT_Msk (0x4UL)

#define	TIMER2_IR_MR3INT_Pos (3UL)

#define	TIMER2_IR_MR3INT_Msk (0x8UL)

#define	TIMER2_IR_CR0INT_Pos (4UL)

#define	TIMER2_IR_CR0INT_Msk (0x10UL)

#define	TIMER2_IR_CR1INT_Pos (5UL)

#define	TIMER2_IR_CR1INT_Msk (0x20UL)

#define	TIMER2_TCR_CEN_Pos (0UL)

#define	TIMER2_TCR_CEN_Msk (0x1UL)

#define	TIMER2_TCR_CRST_Pos (1UL)

#define	TIMER2_TCR_CRST_Msk (0x2UL)

#define	TIMER2_TC_TC_Pos (0UL)

#define	TIMER2_TC_TC_Msk (0xffffffffUL)

#define	TIMER2_PR_PM_Pos (0UL)

#define	TIMER2_PR_PM_Msk (0xffffffffUL)

#define	TIMER2_PC_PC_Pos (0UL)

#define	TIMER2_PC_PC_Msk (0xffffffffUL)

#define	TIMER2_MCR_MR0I_Pos (0UL)

#define	TIMER2_MCR_MR0I_Msk (0x1UL)

#define	TIMER2_MCR_MR0R_Pos (1UL)

#define	TIMER2_MCR_MR0R_Msk (0x2UL)

#define	TIMER2_MCR_MR0S_Pos (2UL)

#define	TIMER2_MCR_MR0S_Msk (0x4UL)

#define	TIMER2_MCR_MR1I_Pos (3UL)

#define	TIMER2_MCR_MR1I_Msk (0x8UL)

#define	TIMER2_MCR_MR1R_Pos (4UL)

#define	TIMER2_MCR_MR1R_Msk (0x10UL)

#define	TIMER2_MCR_MR1S_Pos (5UL)

#define	TIMER2_MCR_MR1S_Msk (0x20UL)

#define	TIMER2_MCR_MR2I_Pos (6UL)

#define	TIMER2_MCR_MR2I_Msk (0x40UL)

#define	TIMER2_MCR_MR2R_Pos (7UL)

#define	TIMER2_MCR_MR2R_Msk (0x80UL)

#define	TIMER2_MCR_MR2S_Pos (8UL)

#define	TIMER2_MCR_MR2S_Msk (0x100UL)

#define	TIMER2_MCR_MR3I_Pos (9UL)

#define	TIMER2_MCR_MR3I_Msk (0x200UL)

#define	TIMER2_MCR_MR3R_Pos (10UL)

#define	TIMER2_MCR_MR3R_Msk (0x400UL)

#define	TIMER2_MCR_MR3S_Pos (11UL)

#define	TIMER2_MCR_MR3S_Msk (0x800UL)

#define	TIMER2_CCR_CAP0RE_Pos (0UL)

#define	TIMER2_CCR_CAP0RE_Msk (0x1UL)

#define	TIMER2_CCR_CAP0FE_Pos (1UL)

#define	TIMER2_CCR_CAP0FE_Msk (0x2UL)

#define	TIMER2_CCR_CAP0I_Pos (2UL)

#define	TIMER2_CCR_CAP0I_Msk (0x4UL)

#define	TIMER2_CCR_CAP1RE_Pos (3UL)

#define	TIMER2_CCR_CAP1RE_Msk (0x8UL)

#define	TIMER2_CCR_CAP1FE_Pos (4UL)

#define	TIMER2_CCR_CAP1FE_Msk (0x10UL)

#define	TIMER2_CCR_CAP1I_Pos (5UL)

#define	TIMER2_CCR_CAP1I_Msk (0x20UL)

#define	TIMER2_EMR_EM0_Pos (0UL)

#define	TIMER2_EMR_EM0_Msk (0x1UL)

#define	TIMER2_EMR_EM1_Pos (1UL)

#define	TIMER2_EMR_EM1_Msk (0x2UL)

#define	TIMER2_EMR_EM2_Pos (2UL)

#define	TIMER2_EMR_EM2_Msk (0x4UL)

#define	TIMER2_EMR_EM3_Pos (3UL)

#define	TIMER2_EMR_EM3_Msk (0x8UL)

#define	TIMER2_EMR_EMC0_Pos (4UL)

#define	TIMER2_EMR_EMC0_Msk (0x30UL)

#define	TIMER2_EMR_EMC1_Pos (6UL)

#define	TIMER2_EMR_EMC1_Msk (0xc0UL)

#define	TIMER2_EMR_EMC2_Pos (8UL)

#define	TIMER2_EMR_EMC2_Msk (0x300UL)

#define	TIMER2_EMR_EMC3_Pos (10UL)

#define	TIMER2_EMR_EMC3_Msk (0xc00UL)

#define	TIMER2_CTCR_CTMODE_Pos (0UL)

#define	TIMER2_CTCR_CTMODE_Msk (0x3UL)

#define	TIMER2_CTCR_CINSEL_Pos (2UL)

#define	TIMER2_CTCR_CINSEL_Msk (0xcUL)

#define	TIMER3_IR_MR0INT_Pos (0UL)

#define	TIMER3_IR_MR0INT_Msk (0x1UL)

#define	TIMER3_IR_MR1INT_Pos (1UL)

#define	TIMER3_IR_MR1INT_Msk (0x2UL)

#define	TIMER3_IR_MR2INT_Pos (2UL)

#define	TIMER3_IR_MR2INT_Msk (0x4UL)

#define	TIMER3_IR_MR3INT_Pos (3UL)

#define	TIMER3_IR_MR3INT_Msk (0x8UL)

#define	TIMER3_IR_CR0INT_Pos (4UL)

#define	TIMER3_IR_CR0INT_Msk (0x10UL)

#define	TIMER3_IR_CR1INT_Pos (5UL)

#define	TIMER3_IR_CR1INT_Msk (0x20UL)

#define	TIMER3_TCR_CEN_Pos (0UL)

#define	TIMER3_TCR_CEN_Msk (0x1UL)

#define	TIMER3_TCR_CRST_Pos (1UL)

#define	TIMER3_TCR_CRST_Msk (0x2UL)

#define	TIMER3_TC_TC_Pos (0UL)

#define	TIMER3_TC_TC_Msk (0xffffffffUL)

#define	TIMER3_PR_PM_Pos (0UL)

#define	TIMER3_PR_PM_Msk (0xffffffffUL)

#define	TIMER3_PC_PC_Pos (0UL)

#define	TIMER3_PC_PC_Msk (0xffffffffUL)

#define	TIMER3_MCR_MR0I_Pos (0UL)

#define	TIMER3_MCR_MR0I_Msk (0x1UL)

#define	TIMER3_MCR_MR0R_Pos (1UL)

#define	TIMER3_MCR_MR0R_Msk (0x2UL)

#define	TIMER3_MCR_MR0S_Pos (2UL)

#define	TIMER3_MCR_MR0S_Msk (0x4UL)

#define	TIMER3_MCR_MR1I_Pos (3UL)

#define	TIMER3_MCR_MR1I_Msk (0x8UL)

#define	TIMER3_MCR_MR1R_Pos (4UL)

#define	TIMER3_MCR_MR1R_Msk (0x10UL)

#define	TIMER3_MCR_MR1S_Pos (5UL)

#define	TIMER3_MCR_MR1S_Msk (0x20UL)

#define	TIMER3_MCR_MR2I_Pos (6UL)

#define	TIMER3_MCR_MR2I_Msk (0x40UL)

#define	TIMER3_MCR_MR2R_Pos (7UL)

#define	TIMER3_MCR_MR2R_Msk (0x80UL)

#define	TIMER3_MCR_MR2S_Pos (8UL)

#define	TIMER3_MCR_MR2S_Msk (0x100UL)

#define	TIMER3_MCR_MR3I_Pos (9UL)

#define	TIMER3_MCR_MR3I_Msk (0x200UL)

#define	TIMER3_MCR_MR3R_Pos (10UL)

#define	TIMER3_MCR_MR3R_Msk (0x400UL)

#define	TIMER3_MCR_MR3S_Pos (11UL)

#define	TIMER3_MCR_MR3S_Msk (0x800UL)

#define	TIMER3_CCR_CAP0RE_Pos (0UL)

#define	TIMER3_CCR_CAP0RE_Msk (0x1UL)

#define	TIMER3_CCR_CAP0FE_Pos (1UL)

#define	TIMER3_CCR_CAP0FE_Msk (0x2UL)

#define	TIMER3_CCR_CAP0I_Pos (2UL)

#define	TIMER3_CCR_CAP0I_Msk (0x4UL)

#define	TIMER3_CCR_CAP1RE_Pos (3UL)

#define	TIMER3_CCR_CAP1RE_Msk (0x8UL)

#define	TIMER3_CCR_CAP1FE_Pos (4UL)

#define	TIMER3_CCR_CAP1FE_Msk (0x10UL)

#define	TIMER3_CCR_CAP1I_Pos (5UL)

#define	TIMER3_CCR_CAP1I_Msk (0x20UL)

#define	TIMER3_EMR_EM0_Pos (0UL)

#define	TIMER3_EMR_EM0_Msk (0x1UL)

#define	TIMER3_EMR_EM1_Pos (1UL)

#define	TIMER3_EMR_EM1_Msk (0x2UL)

#define	TIMER3_EMR_EM2_Pos (2UL)

#define	TIMER3_EMR_EM2_Msk (0x4UL)

#define	TIMER3_EMR_EM3_Pos (3UL)

#define	TIMER3_EMR_EM3_Msk (0x8UL)

#define	TIMER3_EMR_EMC0_Pos (4UL)

#define	TIMER3_EMR_EMC0_Msk (0x30UL)

#define	TIMER3_EMR_EMC1_Pos (6UL)

#define	TIMER3_EMR_EMC1_Msk (0xc0UL)

#define	TIMER3_EMR_EMC2_Pos (8UL)

#define	TIMER3_EMR_EMC2_Msk (0x300UL)

#define	TIMER3_EMR_EMC3_Pos (10UL)

#define	TIMER3_EMR_EMC3_Msk (0xc00UL)

#define	TIMER3_CTCR_CTMODE_Pos (0UL)

#define	TIMER3_CTCR_CTMODE_Msk (0x3UL)

#define	TIMER3_CTCR_CINSEL_Pos (2UL)

#define	TIMER3_CTCR_CINSEL_Msk (0xcUL)

#define	UART2_RBR_RBR_Pos (0UL)

#define	UART2_RBR_RBR_Msk (0xffUL)

#define	UART2_THR_THR_Pos (0UL)

#define	UART2_THR_THR_Msk (0xffUL)

#define	UART2_DLL_DLLSB_Pos (0UL)

#define	UART2_DLL_DLLSB_Msk (0xffUL)

#define	UART2_DLM_DLMSB_Pos (0UL)

#define	UART2_DLM_DLMSB_Msk (0xffUL)

#define	UART2_IER_RBRIE_Pos (0UL)

#define	UART2_IER_RBRIE_Msk (0x1UL)

#define	UART2_IER_THREIE_Pos (1UL)

#define	UART2_IER_THREIE_Msk (0x2UL)

#define	UART2_IER_RXIE_Pos (2UL)

#define	UART2_IER_RXIE_Msk (0x4UL)

#define	UART2_IER_ABEOINTEN_Pos (8UL)

#define	UART2_IER_ABEOINTEN_Msk (0x100UL)

#define	UART2_IER_ABTOINTEN_Pos (9UL)

#define	UART2_IER_ABTOINTEN_Msk (0x200UL)

#define	UART2_IIR_INTSTATUS_Pos (0UL)

#define	UART2_IIR_INTSTATUS_Msk (0x1UL)

#define	UART2_IIR_INTID_Pos (1UL)

#define	UART2_IIR_INTID_Msk (0xeUL)

#define	UART2_IIR_FIFOENABLE_Pos (6UL)

#define	UART2_IIR_FIFOENABLE_Msk (0xc0UL)

#define	UART2_IIR_ABEOINT_Pos (8UL)

#define	UART2_IIR_ABEOINT_Msk (0x100UL)

#define	UART2_IIR_ABTOINT_Pos (9UL)

#define	UART2_IIR_ABTOINT_Msk (0x200UL)

#define	UART2_FCR_FIFOEN_Pos (0UL)

#define	UART2_FCR_FIFOEN_Msk (0x1UL)

#define	UART2_FCR_RXFIFORES_Pos (1UL)

#define	UART2_FCR_RXFIFORES_Msk (0x2UL)

#define	UART2_FCR_TXFIFORES_Pos (2UL)

#define	UART2_FCR_TXFIFORES_Msk (0x4UL)

#define	UART2_FCR_DMAMODE_Pos (3UL)

#define	UART2_FCR_DMAMODE_Msk (0x8UL)

#define	UART2_FCR_RXTRIGLVL_Pos (6UL)

#define	UART2_FCR_RXTRIGLVL_Msk (0xc0UL)

#define	UART2_LCR_WLS_Pos (0UL)

#define	UART2_LCR_WLS_Msk (0x3UL)

#define	UART2_LCR_SBS_Pos (2UL)

#define	UART2_LCR_SBS_Msk (0x4UL)

#define	UART2_LCR_PE_Pos (3UL)

#define	UART2_LCR_PE_Msk (0x8UL)

#define	UART2_LCR_PS_Pos (4UL)

#define	UART2_LCR_PS_Msk (0x30UL)

#define	UART2_LCR_BC_Pos (6UL)

#define	UART2_LCR_BC_Msk (0x40UL)

#define	UART2_LCR_DLAB_Pos (7UL)

#define	UART2_LCR_DLAB_Msk (0x80UL)

#define	UART2_LSR_RDR_Pos (0UL)

#define	UART2_LSR_RDR_Msk (0x1UL)

#define	UART2_LSR_OE_Pos (1UL)

#define	UART2_LSR_OE_Msk (0x2UL)

#define	UART2_LSR_PE_Pos (2UL)

#define	UART2_LSR_PE_Msk (0x4UL)

#define	UART2_LSR_FE_Pos (3UL)

#define	UART2_LSR_FE_Msk (0x8UL)

#define	UART2_LSR_BI_Pos (4UL)

#define	UART2_LSR_BI_Msk (0x10UL)

#define	UART2_LSR_THRE_Pos (5UL)

#define	UART2_LSR_THRE_Msk (0x20UL)

#define	UART2_LSR_TEMT_Pos (6UL)

#define	UART2_LSR_TEMT_Msk (0x40UL)

#define	UART2_LSR_RXFE_Pos (7UL)

#define	UART2_LSR_RXFE_Msk (0x80UL)

#define	UART2_SCR_PAD_Pos (0UL)

#define	UART2_SCR_PAD_Msk (0xffUL)

#define	UART2_ACR_START_Pos (0UL)

#define	UART2_ACR_START_Msk (0x1UL)

#define	UART2_ACR_MODE_Pos (1UL)

#define	UART2_ACR_MODE_Msk (0x2UL)

#define	UART2_ACR_AUTORESTART_Pos (2UL)

#define	UART2_ACR_AUTORESTART_Msk (0x4UL)

#define	UART2_ACR_ABEOINTCLR_Pos (8UL)

#define	UART2_ACR_ABEOINTCLR_Msk (0x100UL)

#define	UART2_ACR_ABTOINTCLR_Pos (9UL)

#define	UART2_ACR_ABTOINTCLR_Msk (0x200UL)

#define	UART2_FDR_DIVADDVAL_Pos (0UL)

#define	UART2_FDR_DIVADDVAL_Msk (0xfUL)

#define	UART2_FDR_MULVAL_Pos (4UL)

#define	UART2_FDR_MULVAL_Msk (0xf0UL)

#define	UART2_TER_TXEN_Pos (7UL)

#define	UART2_TER_TXEN_Msk (0x80UL)

#define	UART2_RS485CTRL_NMMEN_Pos (0UL)

#define	UART2_RS485CTRL_NMMEN_Msk (0x1UL)

#define	UART2_RS485CTRL_RXDIS_Pos (1UL)

#define	UART2_RS485CTRL_RXDIS_Msk (0x2UL)

#define	UART2_RS485CTRL_AADEN_Pos (2UL)

#define	UART2_RS485CTRL_AADEN_Msk (0x4UL)

#define	UART2_RS485CTRL_DCTRL_Pos (4UL)

#define	UART2_RS485CTRL_DCTRL_Msk (0x10UL)

#define	UART2_RS485CTRL_OINV_Pos (5UL)

#define	UART2_RS485CTRL_OINV_Msk (0x20UL)

#define	UART2_RS485ADRMATCH_ADRMATCH_Pos (0UL)

#define	UART2_RS485ADRMATCH_ADRMATCH_Msk (0xffUL)

#define	UART2_RS485DLY_DLY_Pos (0UL)

#define	UART2_RS485DLY_DLY_Msk (0xffUL)

#define	UART3_RBR_RBR_Pos (0UL)

#define	UART3_RBR_RBR_Msk (0xffUL)

#define	UART3_THR_THR_Pos (0UL)

#define	UART3_THR_THR_Msk (0xffUL)

#define	UART3_DLL_DLLSB_Pos (0UL)

#define	UART3_DLL_DLLSB_Msk (0xffUL)

#define	UART3_DLM_DLMSB_Pos (0UL)

#define	UART3_DLM_DLMSB_Msk (0xffUL)

#define	UART3_IER_RBRIE_Pos (0UL)

#define	UART3_IER_RBRIE_Msk (0x1UL)

#define	UART3_IER_THREIE_Pos (1UL)

#define	UART3_IER_THREIE_Msk (0x2UL)

#define	UART3_IER_RXIE_Pos (2UL)

#define	UART3_IER_RXIE_Msk (0x4UL)

#define	UART3_IER_ABEOINTEN_Pos (8UL)

#define	UART3_IER_ABEOINTEN_Msk (0x100UL)

#define	UART3_IER_ABTOINTEN_Pos (9UL)

#define	UART3_IER_ABTOINTEN_Msk (0x200UL)

#define	UART3_IIR_INTSTATUS_Pos (0UL)

#define	UART3_IIR_INTSTATUS_Msk (0x1UL)

#define	UART3_IIR_INTID_Pos (1UL)

#define	UART3_IIR_INTID_Msk (0xeUL)

#define	UART3_IIR_FIFOENABLE_Pos (6UL)

#define	UART3_IIR_FIFOENABLE_Msk (0xc0UL)

#define	UART3_IIR_ABEOINT_Pos (8UL)

#define	UART3_IIR_ABEOINT_Msk (0x100UL)

#define	UART3_IIR_ABTOINT_Pos (9UL)

#define	UART3_IIR_ABTOINT_Msk (0x200UL)

#define	UART3_FCR_FIFOEN_Pos (0UL)

#define	UART3_FCR_FIFOEN_Msk (0x1UL)

#define	UART3_FCR_RXFIFORES_Pos (1UL)

#define	UART3_FCR_RXFIFORES_Msk (0x2UL)

#define	UART3_FCR_TXFIFORES_Pos (2UL)

#define	UART3_FCR_TXFIFORES_Msk (0x4UL)

#define	UART3_FCR_DMAMODE_Pos (3UL)

#define	UART3_FCR_DMAMODE_Msk (0x8UL)

#define	UART3_FCR_RXTRIGLVL_Pos (6UL)

#define	UART3_FCR_RXTRIGLVL_Msk (0xc0UL)

#define	UART3_LCR_WLS_Pos (0UL)

#define	UART3_LCR_WLS_Msk (0x3UL)

#define	UART3_LCR_SBS_Pos (2UL)

#define	UART3_LCR_SBS_Msk (0x4UL)

#define	UART3_LCR_PE_Pos (3UL)

#define	UART3_LCR_PE_Msk (0x8UL)

#define	UART3_LCR_PS_Pos (4UL)

#define	UART3_LCR_PS_Msk (0x30UL)

#define	UART3_LCR_BC_Pos (6UL)

#define	UART3_LCR_BC_Msk (0x40UL)

#define	UART3_LCR_DLAB_Pos (7UL)

#define	UART3_LCR_DLAB_Msk (0x80UL)

#define	UART3_LSR_RDR_Pos (0UL)

#define	UART3_LSR_RDR_Msk (0x1UL)

#define	UART3_LSR_OE_Pos (1UL)

#define	UART3_LSR_OE_Msk (0x2UL)

#define	UART3_LSR_PE_Pos (2UL)

#define	UART3_LSR_PE_Msk (0x4UL)

#define	UART3_LSR_FE_Pos (3UL)

#define	UART3_LSR_FE_Msk (0x8UL)

#define	UART3_LSR_BI_Pos (4UL)

#define	UART3_LSR_BI_Msk (0x10UL)

#define	UART3_LSR_THRE_Pos (5UL)

#define	UART3_LSR_THRE_Msk (0x20UL)

#define	UART3_LSR_TEMT_Pos (6UL)

#define	UART3_LSR_TEMT_Msk (0x40UL)

#define	UART3_LSR_RXFE_Pos (7UL)

#define	UART3_LSR_RXFE_Msk (0x80UL)

#define	UART3_SCR_PAD_Pos (0UL)

#define	UART3_SCR_PAD_Msk (0xffUL)

#define	UART3_ACR_START_Pos (0UL)

#define	UART3_ACR_START_Msk (0x1UL)

#define	UART3_ACR_MODE_Pos (1UL)

#define	UART3_ACR_MODE_Msk (0x2UL)

#define	UART3_ACR_AUTORESTART_Pos (2UL)

#define	UART3_ACR_AUTORESTART_Msk (0x4UL)

#define	UART3_ACR_ABEOINTCLR_Pos (8UL)

#define	UART3_ACR_ABEOINTCLR_Msk (0x100UL)

#define	UART3_ACR_ABTOINTCLR_Pos (9UL)

#define	UART3_ACR_ABTOINTCLR_Msk (0x200UL)

#define	UART3_FDR_DIVADDVAL_Pos (0UL)

#define	UART3_FDR_DIVADDVAL_Msk (0xfUL)

#define	UART3_FDR_MULVAL_Pos (4UL)

#define	UART3_FDR_MULVAL_Msk (0xf0UL)

#define	UART3_TER_TXEN_Pos (7UL)

#define	UART3_TER_TXEN_Msk (0x80UL)

#define	UART3_RS485CTRL_NMMEN_Pos (0UL)

#define	UART3_RS485CTRL_NMMEN_Msk (0x1UL)

#define	UART3_RS485CTRL_RXDIS_Pos (1UL)

#define	UART3_RS485CTRL_RXDIS_Msk (0x2UL)

#define	UART3_RS485CTRL_AADEN_Pos (2UL)

#define	UART3_RS485CTRL_AADEN_Msk (0x4UL)

#define	UART3_RS485CTRL_DCTRL_Pos (4UL)

#define	UART3_RS485CTRL_DCTRL_Msk (0x10UL)

#define	UART3_RS485CTRL_OINV_Pos (5UL)

#define	UART3_RS485CTRL_OINV_Msk (0x20UL)

#define	UART3_RS485ADRMATCH_ADRMATCH_Pos (0UL)

#define	UART3_RS485ADRMATCH_ADRMATCH_Msk (0xffUL)

#define	UART3_RS485DLY_DLY_Pos (0UL)

#define	UART3_RS485DLY_DLY_Msk (0xffUL)

#define	I2S_DAO_WORDWIDTH_Pos (0UL)

#define	I2S_DAO_WORDWIDTH_Msk (0x3UL)

#define	I2S_DAO_MONO_Pos (2UL)

#define	I2S_DAO_MONO_Msk (0x4UL)

#define	I2S_DAO_STOP_Pos (3UL)

#define	I2S_DAO_STOP_Msk (0x8UL)

#define	I2S_DAO_RESET_Pos (4UL)

#define	I2S_DAO_RESET_Msk (0x10UL)

#define	I2S_DAO_WS_SEL_Pos (5UL)

#define	I2S_DAO_WS_SEL_Msk (0x20UL)

#define	I2S_DAO_WS_HALFPERIOD_Pos (6UL)

#define	I2S_DAO_WS_HALFPERIOD_Msk (0x7fc0UL)

#define	I2S_DAO_MUTE_Pos (15UL)

#define	I2S_DAO_MUTE_Msk (0x8000UL)

#define	I2S_DAI_WORDWIDTH_Pos (0UL)

#define	I2S_DAI_WORDWIDTH_Msk (0x3UL)

#define	I2S_DAI_MONO_Pos (2UL)

#define	I2S_DAI_MONO_Msk (0x4UL)

#define	I2S_DAI_STOP_Pos (3UL)

#define	I2S_DAI_STOP_Msk (0x8UL)

#define	I2S_DAI_RESET_Pos (4UL)

#define	I2S_DAI_RESET_Msk (0x10UL)

#define	I2S_DAI_WS_SEL_Pos (5UL)

#define	I2S_DAI_WS_SEL_Msk (0x20UL)

#define	I2S_DAI_WS_HALFPERIOD_Pos (6UL)

#define	I2S_DAI_WS_HALFPERIOD_Msk (0x7fc0UL)

#define	I2S_TXFIFO_I2STXFIFO_Pos (0UL)

#define	I2S_TXFIFO_I2STXFIFO_Msk (0xffffffffUL)

#define	I2S_RXFIFO_I2SRXFIFO_Pos (0UL)

#define	I2S_RXFIFO_I2SRXFIFO_Msk (0xffffffffUL)

#define	I2S_STATE_IRQ_Pos (0UL)

#define	I2S_STATE_IRQ_Msk (0x1UL)

#define	I2S_STATE_DMAREQ1_Pos (1UL)

#define	I2S_STATE_DMAREQ1_Msk (0x2UL)

#define	I2S_STATE_DMAREQ2_Pos (2UL)

#define	I2S_STATE_DMAREQ2_Msk (0x4UL)

#define	I2S_STATE_RX_LEVEL_Pos (8UL)

#define	I2S_STATE_RX_LEVEL_Msk (0xf00UL)

#define	I2S_STATE_TX_LEVEL_Pos (16UL)

#define	I2S_STATE_TX_LEVEL_Msk (0xf0000UL)

#define	I2S_DMA1_RX_DMA1_ENABLE_Pos (0UL)

#define	I2S_DMA1_RX_DMA1_ENABLE_Msk (0x1UL)

#define	I2S_DMA1_TX_DMA1_ENABLE_Pos (1UL)

#define	I2S_DMA1_TX_DMA1_ENABLE_Msk (0x2UL)

#define	I2S_DMA1_RX_DEPTH_DMA1_Pos (8UL)

#define	I2S_DMA1_RX_DEPTH_DMA1_Msk (0xf00UL)

#define	I2S_DMA1_TX_DEPTH_DMA1_Pos (16UL)

#define	I2S_DMA1_TX_DEPTH_DMA1_Msk (0xf0000UL)

#define	I2S_DMA2_RX_DMA2_ENABLE_Pos (0UL)

#define	I2S_DMA2_RX_DMA2_ENABLE_Msk (0x1UL)

#define	I2S_DMA2_TX_DMA2_ENABLE_Pos (1UL)

#define	I2S_DMA2_TX_DMA2_ENABLE_Msk (0x2UL)

#define	I2S_DMA2_RX_DEPTH_DMA2_Pos (8UL)

#define	I2S_DMA2_RX_DEPTH_DMA2_Msk (0xf00UL)

#define	I2S_DMA2_TX_DEPTH_DMA2_Pos (16UL)

#define	I2S_DMA2_TX_DEPTH_DMA2_Msk (0xf0000UL)

#define	I2S_IRQ_RX_IRQ_ENABLE_Pos (0UL)

#define	I2S_IRQ_RX_IRQ_ENABLE_Msk (0x1UL)

#define	I2S_IRQ_TX_IRQ_ENABLE_Pos (1UL)

#define	I2S_IRQ_TX_IRQ_ENABLE_Msk (0x2UL)

#define	I2S_IRQ_RX_DEPTH_IRQ_Pos (8UL)

#define	I2S_IRQ_RX_DEPTH_IRQ_Msk (0xf00UL)

#define	I2S_IRQ_TX_DEPTH_IRQ_Pos (16UL)

#define	I2S_IRQ_TX_DEPTH_IRQ_Msk (0xf0000UL)

#define	I2S_TXRATE_Y_DIVIDER_Pos (0UL)

#define	I2S_TXRATE_Y_DIVIDER_Msk (0xffUL)

#define	I2S_TXRATE_X_DIVIDER_Pos (8UL)

#define	I2S_TXRATE_X_DIVIDER_Msk (0xff00UL)

#define	I2S_RXRATE_Y_DIVIDER_Pos (0UL)

#define	I2S_RXRATE_Y_DIVIDER_Msk (0xffUL)

#define	I2S_RXRATE_X_DIVIDER_Pos (8UL)

#define	I2S_RXRATE_X_DIVIDER_Msk (0xff00UL)

#define	I2S_TXBITRATE_TX_BITRATE_Pos (0UL)

#define	I2S_TXBITRATE_TX_BITRATE_Msk (0x3fUL)

#define	I2S_RXBITRATE_RX_BITRATE_Pos (0UL)

#define	I2S_RXBITRATE_RX_BITRATE_Msk (0x3fUL)

#define	I2S_TXMODE_TXCLKSEL_Pos (0UL)

#define	I2S_TXMODE_TXCLKSEL_Msk (0x3UL)

#define	I2S_TXMODE_TX4PIN_Pos (2UL)

#define	I2S_TXMODE_TX4PIN_Msk (0x4UL)

#define	I2S_TXMODE_TXMCENA_Pos (3UL)

#define	I2S_TXMODE_TXMCENA_Msk (0x8UL)

#define	I2S_RXMODE_RXCLKSEL_Pos (0UL)

#define	I2S_RXMODE_RXCLKSEL_Msk (0x3UL)

#define	I2S_RXMODE_RX4PIN_Pos (2UL)

#define	I2S_RXMODE_RX4PIN_Msk (0x4UL)

#define	I2S_RXMODE_RXMCENA_Pos (3UL)

#define	I2S_RXMODE_RXMCENA_Msk (0x8UL)

#define	RITIMER_COMPVAL_RICOMP_Pos (0UL)

#define	RITIMER_COMPVAL_RICOMP_Msk (0xffffffffUL)

#define	RITIMER_MASK_RIMASK_Pos (0UL)

#define	RITIMER_MASK_RIMASK_Msk (0xffffffffUL)

#define	RITIMER_CTRL_RITINT_Pos (0UL)

#define	RITIMER_CTRL_RITINT_Msk (0x1UL)

#define	RITIMER_CTRL_RITENCLR_Pos (1UL)

#define	RITIMER_CTRL_RITENCLR_Msk (0x2UL)

#define	RITIMER_CTRL_RITENBR_Pos (2UL)

#define	RITIMER_CTRL_RITENBR_Msk (0x4UL)

#define	RITIMER_CTRL_RITEN_Pos (3UL)

#define	RITIMER_CTRL_RITEN_Msk (0x8UL)

#define	RITIMER_COUNTER_RICOUNTER_Pos (0UL)

#define	RITIMER_COUNTER_RICOUNTER_Msk (0xffffffffUL)

#define	MCPWM_CON_RUN0_Pos (0UL)

#define	MCPWM_CON_RUN0_Msk (0x1UL)

#define	MCPWM_CON_CENTER0_Pos (1UL)

#define	MCPWM_CON_CENTER0_Msk (0x2UL)

#define	MCPWM_CON_POLA0_Pos (2UL)

#define	MCPWM_CON_POLA0_Msk (0x4UL)

#define	MCPWM_CON_DTE0_Pos (3UL)

#define	MCPWM_CON_DTE0_Msk (0x8UL)

#define	MCPWM_CON_DISUP0_Pos (4UL)

#define	MCPWM_CON_DISUP0_Msk (0x10UL)

#define	MCPWM_CON_RUN1_Pos (8UL)

#define	MCPWM_CON_RUN1_Msk (0x100UL)

#define	MCPWM_CON_CENTER1_Pos (9UL)

#define	MCPWM_CON_CENTER1_Msk (0x200UL)

#define	MCPWM_CON_POLA1_Pos (10UL)

#define	MCPWM_CON_POLA1_Msk (0x400UL)

#define	MCPWM_CON_DTE1_Pos (11UL)

#define	MCPWM_CON_DTE1_Msk (0x800UL)

#define	MCPWM_CON_DISUP1_Pos (12UL)

#define	MCPWM_CON_DISUP1_Msk (0x1000UL)

#define	MCPWM_CON_RUN2_Pos (16UL)

#define	MCPWM_CON_RUN2_Msk (0x10000UL)

#define	MCPWM_CON_CENTER2_Pos (17UL)

#define	MCPWM_CON_CENTER2_Msk (0x20000UL)

#define	MCPWM_CON_POLA2_Pos (18UL)

#define	MCPWM_CON_POLA2_Msk (0x40000UL)

#define	MCPWM_CON_DTE2_Pos (19UL)

#define	MCPWM_CON_DTE2_Msk (0x80000UL)

#define	MCPWM_CON_DISUP2_Pos (20UL)

#define	MCPWM_CON_DISUP2_Msk (0x100000UL)

#define	MCPWM_CON_INVBDC_Pos (29UL)

#define	MCPWM_CON_INVBDC_Msk (0x20000000UL)

#define	MCPWM_CON_ACMODE_Pos (30UL)

#define	MCPWM_CON_ACMODE_Msk (0x40000000UL)

#define	MCPWM_CON_DCMODE_Pos (31UL)

#define	MCPWM_CON_DCMODE_Msk (0x80000000UL)

#define	MCPWM_CON_SET_RUN0_SET_Pos (0UL)

#define	MCPWM_CON_SET_RUN0_SET_Msk (0x1UL)

#define	MCPWM_CON_SET_CENTER0_SET_Pos (1UL)

#define	MCPWM_CON_SET_CENTER0_SET_Msk (0x2UL)

#define	MCPWM_CON_SET_POLA0_SET_Pos (2UL)

#define	MCPWM_CON_SET_POLA0_SET_Msk (0x4UL)

#define	MCPWM_CON_SET_DTE0_SET_Pos (3UL)

#define	MCPWM_CON_SET_DTE0_SET_Msk (0x8UL)

#define	MCPWM_CON_SET_DISUP0_SET_Pos (4UL)

#define	MCPWM_CON_SET_DISUP0_SET_Msk (0x10UL)

#define	MCPWM_CON_SET_RUN1_SET_Pos (8UL)

#define	MCPWM_CON_SET_RUN1_SET_Msk (0x100UL)

#define	MCPWM_CON_SET_CENTER1_SET_Pos (9UL)

#define	MCPWM_CON_SET_CENTER1_SET_Msk (0x200UL)

#define	MCPWM_CON_SET_POLA1_SET_Pos (10UL)

#define	MCPWM_CON_SET_POLA1_SET_Msk (0x400UL)

#define	MCPWM_CON_SET_DTE1_SET_Pos (11UL)

#define	MCPWM_CON_SET_DTE1_SET_Msk (0x800UL)

#define	MCPWM_CON_SET_DISUP1_SET_Pos (12UL)

#define	MCPWM_CON_SET_DISUP1_SET_Msk (0x1000UL)

#define	MCPWM_CON_SET_RUN2_SET_Pos (16UL)

#define	MCPWM_CON_SET_RUN2_SET_Msk (0x10000UL)

#define	MCPWM_CON_SET_CENTER2_SET_Pos (17UL)

#define	MCPWM_CON_SET_CENTER2_SET_Msk (0x20000UL)

#define	MCPWM_CON_SET_POLA2_SET_Pos (18UL)

#define	MCPWM_CON_SET_POLA2_SET_Msk (0x40000UL)

#define	MCPWM_CON_SET_DTE2_SET_Pos (19UL)

#define	MCPWM_CON_SET_DTE2_SET_Msk (0x80000UL)

#define	MCPWM_CON_SET_DISUP2_SET_Pos (20UL)

#define	MCPWM_CON_SET_DISUP2_SET_Msk (0x100000UL)

#define	MCPWM_CON_SET_INVBDC_SET_Pos (29UL)

#define	MCPWM_CON_SET_INVBDC_SET_Msk (0x20000000UL)

#define	MCPWM_CON_SET_ACMODE_SET_Pos (30UL)

#define	MCPWM_CON_SET_ACMODE_SET_Msk (0x40000000UL)

#define	MCPWM_CON_SET_DCMODE_SET_Pos (31UL)

#define	MCPWM_CON_SET_DCMODE_SET_Msk (0x80000000UL)

#define	MCPWM_CON_CLR_RUN0_CLR_Pos (0UL)

#define	MCPWM_CON_CLR_RUN0_CLR_Msk (0x1UL)

#define	MCPWM_CON_CLR_CENTER0_CLR_Pos (1UL)

#define	MCPWM_CON_CLR_CENTER0_CLR_Msk (0x2UL)

#define	MCPWM_CON_CLR_POLA0_CLR_Pos (2UL)

#define	MCPWM_CON_CLR_POLA0_CLR_Msk (0x4UL)

#define	MCPWM_CON_CLR_DTE0_CLR_Pos (3UL)

#define	MCPWM_CON_CLR_DTE0_CLR_Msk (0x8UL)

#define	MCPWM_CON_CLR_DISUP0_CLR_Pos (4UL)

#define	MCPWM_CON_CLR_DISUP0_CLR_Msk (0x10UL)

#define	MCPWM_CON_CLR_RUN1_CLR_Pos (8UL)

#define	MCPWM_CON_CLR_RUN1_CLR_Msk (0x100UL)

#define	MCPWM_CON_CLR_CENTER1_CLR_Pos (9UL)

#define	MCPWM_CON_CLR_CENTER1_CLR_Msk (0x200UL)

#define	MCPWM_CON_CLR_POLA1_CLR_Pos (10UL)

#define	MCPWM_CON_CLR_POLA1_CLR_Msk (0x400UL)

#define	MCPWM_CON_CLR_DTE1_CLR_Pos (11UL)

#define	MCPWM_CON_CLR_DTE1_CLR_Msk (0x800UL)

#define	MCPWM_CON_CLR_DISUP1_CLR_Pos (12UL)

#define	MCPWM_CON_CLR_DISUP1_CLR_Msk (0x1000UL)

#define	MCPWM_CON_CLR_RUN2_CLR_Pos (16UL)

#define	MCPWM_CON_CLR_RUN2_CLR_Msk (0x10000UL)

#define	MCPWM_CON_CLR_CENTER2_CLR_Pos (17UL)

#define	MCPWM_CON_CLR_CENTER2_CLR_Msk (0x20000UL)

#define	MCPWM_CON_CLR_POLA2_CLR_Pos (18UL)

#define	MCPWM_CON_CLR_POLA2_CLR_Msk (0x40000UL)

#define	MCPWM_CON_CLR_DTE2_CLR_Pos (19UL)

#define	MCPWM_CON_CLR_DTE2_CLR_Msk (0x80000UL)

#define	MCPWM_CON_CLR_DISUP2_CLR_Pos (20UL)

#define	MCPWM_CON_CLR_DISUP2_CLR_Msk (0x100000UL)

#define	MCPWM_CON_CLR_INVBDC_CLR_Pos (29UL)

#define	MCPWM_CON_CLR_INVBDC_CLR_Msk (0x20000000UL)

#define	MCPWM_CON_CLR_ACMOD_CLR_Pos (30UL)

#define	MCPWM_CON_CLR_ACMOD_CLR_Msk (0x40000000UL)

#define	MCPWM_CON_CLR_DCMODE_CLR_Pos (31UL)

#define	MCPWM_CON_CLR_DCMODE_CLR_Msk (0x80000000UL)

#define	MCPWM_CAPCON_CAP0MCI0_RE_Pos (0UL)

#define	MCPWM_CAPCON_CAP0MCI0_RE_Msk (0x1UL)

#define	MCPWM_CAPCON_CAP0MCI0_FE_Pos (1UL)

#define	MCPWM_CAPCON_CAP0MCI0_FE_Msk (0x2UL)

#define	MCPWM_CAPCON_CAP0MCI1_RE_Pos (2UL)

#define	MCPWM_CAPCON_CAP0MCI1_RE_Msk (0x4UL)

#define	MCPWM_CAPCON_CAP0MCI1_FE_Pos (3UL)

#define	MCPWM_CAPCON_CAP0MCI1_FE_Msk (0x8UL)

#define	MCPWM_CAPCON_CAP0MCI2_RE_Pos (4UL)

#define	MCPWM_CAPCON_CAP0MCI2_RE_Msk (0x10UL)

#define	MCPWM_CAPCON_CAP0MCI2_FE_Pos (5UL)

#define	MCPWM_CAPCON_CAP0MCI2_FE_Msk (0x20UL)

#define	MCPWM_CAPCON_CAP1MCI0_RE_Pos (6UL)

#define	MCPWM_CAPCON_CAP1MCI0_RE_Msk (0x40UL)

#define	MCPWM_CAPCON_CAP1MCI0_FE_Pos (7UL)

#define	MCPWM_CAPCON_CAP1MCI0_FE_Msk (0x80UL)

#define	MCPWM_CAPCON_CAP1MCI1_RE_Pos (8UL)

#define	MCPWM_CAPCON_CAP1MCI1_RE_Msk (0x100UL)

#define	MCPWM_CAPCON_CAP1MCI1_FE_Pos (9UL)

#define	MCPWM_CAPCON_CAP1MCI1_FE_Msk (0x200UL)

#define	MCPWM_CAPCON_CAP1MCI2_RE_Pos (10UL)

#define	MCPWM_CAPCON_CAP1MCI2_RE_Msk (0x400UL)

#define	MCPWM_CAPCON_CAP1MCI2_FE_Pos (11UL)

#define	MCPWM_CAPCON_CAP1MCI2_FE_Msk (0x800UL)

#define	MCPWM_CAPCON_CAP2MCI0_RE_Pos (12UL)

#define	MCPWM_CAPCON_CAP2MCI0_RE_Msk (0x1000UL)

#define	MCPWM_CAPCON_CAP2MCI0_FE_Pos (13UL)

#define	MCPWM_CAPCON_CAP2MCI0_FE_Msk (0x2000UL)

#define	MCPWM_CAPCON_CAP2MCI1_RE_Pos (14UL)

#define	MCPWM_CAPCON_CAP2MCI1_RE_Msk (0x4000UL)

#define	MCPWM_CAPCON_CAP2MCI1_FE_Pos (15UL)

#define	MCPWM_CAPCON_CAP2MCI1_FE_Msk (0x8000UL)

#define	MCPWM_CAPCON_CAP2MCI2_RE_Pos (16UL)

#define	MCPWM_CAPCON_CAP2MCI2_RE_Msk (0x10000UL)

#define	MCPWM_CAPCON_CAP2MCI2_FE_Pos (17UL)

#define	MCPWM_CAPCON_CAP2MCI2_FE_Msk (0x20000UL)

#define	MCPWM_CAPCON_RT0_Pos (18UL)

#define	MCPWM_CAPCON_RT0_Msk (0x40000UL)

#define	MCPWM_CAPCON_RT1_Pos (19UL)

#define	MCPWM_CAPCON_RT1_Msk (0x80000UL)

#define	MCPWM_CAPCON_RT2_Pos (20UL)

#define	MCPWM_CAPCON_RT2_Msk (0x100000UL)

#define	MCPWM_CAPCON_SET_CAP0MCI0_RE_SET_Pos (0UL)

#define	MCPWM_CAPCON_SET_CAP0MCI0_RE_SET_Msk (0x1UL)

#define	MCPWM_CAPCON_SET_CAP0MCI0_FE_SET_Pos (1UL)

#define	MCPWM_CAPCON_SET_CAP0MCI0_FE_SET_Msk (0x2UL)

#define	MCPWM_CAPCON_SET_CAP0MCI1_RE_SET_Pos (2UL)

#define	MCPWM_CAPCON_SET_CAP0MCI1_RE_SET_Msk (0x4UL)

#define	MCPWM_CAPCON_SET_CAP0MCI1_FE_SET_Pos (3UL)

#define	MCPWM_CAPCON_SET_CAP0MCI1_FE_SET_Msk (0x8UL)

#define	MCPWM_CAPCON_SET_CAP0MCI2_RE_SET_Pos (4UL)

#define	MCPWM_CAPCON_SET_CAP0MCI2_RE_SET_Msk (0x10UL)

#define	MCPWM_CAPCON_SET_CAP0MCI2_FE_SET_Pos (5UL)

#define	MCPWM_CAPCON_SET_CAP0MCI2_FE_SET_Msk (0x20UL)

#define	MCPWM_CAPCON_SET_CAP1MCI0_RE_SET_Pos (6UL)

#define	MCPWM_CAPCON_SET_CAP1MCI0_RE_SET_Msk (0x40UL)

#define	MCPWM_CAPCON_SET_CAP1MCI0_FE_SET_Pos (7UL)

#define	MCPWM_CAPCON_SET_CAP1MCI0_FE_SET_Msk (0x80UL)

#define	MCPWM_CAPCON_SET_CAP1MCI1_RE_SET_Pos (8UL)

#define	MCPWM_CAPCON_SET_CAP1MCI1_RE_SET_Msk (0x100UL)

#define	MCPWM_CAPCON_SET_CAP1MCI1_FE_SET_Pos (9UL)

#define	MCPWM_CAPCON_SET_CAP1MCI1_FE_SET_Msk (0x200UL)

#define	MCPWM_CAPCON_SET_CAP1MCI2_RE_SET_Pos (10UL)

#define	MCPWM_CAPCON_SET_CAP1MCI2_RE_SET_Msk (0x400UL)

#define	MCPWM_CAPCON_SET_CAP1MCI2_FE_SET_Pos (11UL)

#define	MCPWM_CAPCON_SET_CAP1MCI2_FE_SET_Msk (0x800UL)

#define	MCPWM_CAPCON_SET_CAP2MCI0_RE_SET_Pos (12UL)

#define	MCPWM_CAPCON_SET_CAP2MCI0_RE_SET_Msk (0x1000UL)

#define	MCPWM_CAPCON_SET_CAP2MCI0_FE_SET_Pos (13UL)

#define	MCPWM_CAPCON_SET_CAP2MCI0_FE_SET_Msk (0x2000UL)

#define	MCPWM_CAPCON_SET_CAP2MCI1_RE_SET_Pos (14UL)

#define	MCPWM_CAPCON_SET_CAP2MCI1_RE_SET_Msk (0x4000UL)

#define	MCPWM_CAPCON_SET_CAP2MCI1_FE_SET_Pos (15UL)

#define	MCPWM_CAPCON_SET_CAP2MCI1_FE_SET_Msk (0x8000UL)

#define	MCPWM_CAPCON_SET_CAP2MCI2_RE_SET_Pos (16UL)

#define	MCPWM_CAPCON_SET_CAP2MCI2_RE_SET_Msk (0x10000UL)

#define	MCPWM_CAPCON_SET_CAP2MCI2_FE_SET_Pos (17UL)

#define	MCPWM_CAPCON_SET_CAP2MCI2_FE_SET_Msk (0x20000UL)

#define	MCPWM_CAPCON_SET_RT0_SET_Pos (18UL)

#define	MCPWM_CAPCON_SET_RT0_SET_Msk (0x40000UL)

#define	MCPWM_CAPCON_SET_RT1_SET_Pos (19UL)

#define	MCPWM_CAPCON_SET_RT1_SET_Msk (0x80000UL)

#define	MCPWM_CAPCON_SET_RT2_SET_Pos (20UL)

#define	MCPWM_CAPCON_SET_RT2_SET_Msk (0x100000UL)

#define	MCPWM_CAPCON_CLR_CAP0MCI0_RE_CLR_Pos (0UL)

#define	MCPWM_CAPCON_CLR_CAP0MCI0_RE_CLR_Msk (0x1UL)

#define	MCPWM_CAPCON_CLR_CAP0MCI0_FE_CLR_Pos (1UL)

#define	MCPWM_CAPCON_CLR_CAP0MCI0_FE_CLR_Msk (0x2UL)

#define	MCPWM_CAPCON_CLR_CAP0MCI1_RE_CLR_Pos (2UL)

#define	MCPWM_CAPCON_CLR_CAP0MCI1_RE_CLR_Msk (0x4UL)

#define	MCPWM_CAPCON_CLR_CAP0MCI1_FE_CLR_Pos (3UL)

#define	MCPWM_CAPCON_CLR_CAP0MCI1_FE_CLR_Msk (0x8UL)

#define	MCPWM_CAPCON_CLR_CAP0MCI2_RE_CLR_Pos (4UL)

#define	MCPWM_CAPCON_CLR_CAP0MCI2_RE_CLR_Msk (0x10UL)

#define	MCPWM_CAPCON_CLR_CAP0MCI2_FE_CLR_Pos (5UL)

#define	MCPWM_CAPCON_CLR_CAP0MCI2_FE_CLR_Msk (0x20UL)

#define	MCPWM_CAPCON_CLR_CAP1MCI0_RE_CLR_Pos (6UL)

#define	MCPWM_CAPCON_CLR_CAP1MCI0_RE_CLR_Msk (0x40UL)

#define	MCPWM_CAPCON_CLR_CAP1MCI0_FE_CLR_Pos (7UL)

#define	MCPWM_CAPCON_CLR_CAP1MCI0_FE_CLR_Msk (0x80UL)

#define	MCPWM_CAPCON_CLR_CAP1MCI1_RE_CLR_Pos (8UL)

#define	MCPWM_CAPCON_CLR_CAP1MCI1_RE_CLR_Msk (0x100UL)

#define	MCPWM_CAPCON_CLR_CAP1MCI1_FE_CLR_Pos (9UL)

#define	MCPWM_CAPCON_CLR_CAP1MCI1_FE_CLR_Msk (0x200UL)

#define	MCPWM_CAPCON_CLR_CAP1MCI2_RE_CLR_Pos (10UL)

#define	MCPWM_CAPCON_CLR_CAP1MCI2_RE_CLR_Msk (0x400UL)

#define	MCPWM_CAPCON_CLR_CAP1MCI2_FE_CLR_Pos (11UL)

#define	MCPWM_CAPCON_CLR_CAP1MCI2_FE_CLR_Msk (0x800UL)

#define	MCPWM_CAPCON_CLR_CAP2MCI0_RE_CLR_Pos (12UL)

#define	MCPWM_CAPCON_CLR_CAP2MCI0_RE_CLR_Msk (0x1000UL)

#define	MCPWM_CAPCON_CLR_CAP2MCI0_FE_CLR_Pos (13UL)

#define	MCPWM_CAPCON_CLR_CAP2MCI0_FE_CLR_Msk (0x2000UL)

#define	MCPWM_CAPCON_CLR_CAP2MCI1_RE_CLR_Pos (14UL)

#define	MCPWM_CAPCON_CLR_CAP2MCI1_RE_CLR_Msk (0x4000UL)

#define	MCPWM_CAPCON_CLR_CAP2MCI1_FE_CLR_Pos (15UL)

#define	MCPWM_CAPCON_CLR_CAP2MCI1_FE_CLR_Msk (0x8000UL)

#define	MCPWM_CAPCON_CLR_CAP2MCI2_RE_CLR_Pos (16UL)

#define	MCPWM_CAPCON_CLR_CAP2MCI2_RE_CLR_Msk (0x10000UL)

#define	MCPWM_CAPCON_CLR_CAP2MCI2_FE_CLR_Pos (17UL)

#define	MCPWM_CAPCON_CLR_CAP2MCI2_FE_CLR_Msk (0x20000UL)

#define	MCPWM_CAPCON_CLR_RT0_CLR_Pos (18UL)

#define	MCPWM_CAPCON_CLR_RT0_CLR_Msk (0x40000UL)

#define	MCPWM_CAPCON_CLR_RT1_CLR_Pos (19UL)

#define	MCPWM_CAPCON_CLR_RT1_CLR_Msk (0x80000UL)

#define	MCPWM_CAPCON_CLR_RT2_CLR_Pos (20UL)

#define	MCPWM_CAPCON_CLR_RT2_CLR_Msk (0x100000UL)

#define	MCPWM_DT_DT0_Pos (0UL)

#define	MCPWM_DT_DT0_Msk (0x3ffUL)

#define	MCPWM_DT_DT1_Pos (10UL)

#define	MCPWM_DT_DT1_Msk (0xffc00UL)

#define	MCPWM_DT_DT2_Pos (20UL)

#define	MCPWM_DT_DT2_Msk (0x3ff00000UL)

#define	MCPWM_CP_CCPA0_Pos (0UL)

#define	MCPWM_CP_CCPA0_Msk (0x1UL)

#define	MCPWM_CP_CCPB0_Pos (1UL)

#define	MCPWM_CP_CCPB0_Msk (0x2UL)

#define	MCPWM_CP_CCPA1_Pos (2UL)

#define	MCPWM_CP_CCPA1_Msk (0x4UL)

#define	MCPWM_CP_CCPB1_Pos (3UL)

#define	MCPWM_CP_CCPB1_Msk (0x8UL)

#define	MCPWM_CP_CCPA2_Pos (4UL)

#define	MCPWM_CP_CCPA2_Msk (0x10UL)

#define	MCPWM_CP_CCPB2_Pos (5UL)

#define	MCPWM_CP_CCPB2_Msk (0x20UL)

#define	MCPWM_INTEN_ILIM0_Pos (0UL)

#define	MCPWM_INTEN_ILIM0_Msk (0x1UL)

#define	MCPWM_INTEN_IMAT0_Pos (1UL)

#define	MCPWM_INTEN_IMAT0_Msk (0x2UL)

#define	MCPWM_INTEN_ICAP0_Pos (2UL)

#define	MCPWM_INTEN_ICAP0_Msk (0x4UL)

#define	MCPWM_INTEN_ILIM1_Pos (4UL)

#define	MCPWM_INTEN_ILIM1_Msk (0x10UL)

#define	MCPWM_INTEN_IMAT1_Pos (5UL)

#define	MCPWM_INTEN_IMAT1_Msk (0x20UL)

#define	MCPWM_INTEN_ICAP1_Pos (6UL)

#define	MCPWM_INTEN_ICAP1_Msk (0x40UL)

#define	MCPWM_INTEN_ILIM2_Pos (8UL)

#define	MCPWM_INTEN_ILIM2_Msk (0x100UL)

#define	MCPWM_INTEN_IMAT2_Pos (9UL)

#define	MCPWM_INTEN_IMAT2_Msk (0x200UL)

#define	MCPWM_INTEN_ICAP2_Pos (10UL)

#define	MCPWM_INTEN_ICAP2_Msk (0x400UL)

#define	MCPWM_INTEN_ABORT_Pos (15UL)

#define	MCPWM_INTEN_ABORT_Msk (0x8000UL)

#define	MCPWM_INTEN_SET_ILIM0_SET_Pos (0UL)

#define	MCPWM_INTEN_SET_ILIM0_SET_Msk (0x1UL)

#define	MCPWM_INTEN_SET_IMAT0_SET_Pos (1UL)

#define	MCPWM_INTEN_SET_IMAT0_SET_Msk (0x2UL)

#define	MCPWM_INTEN_SET_ICAP0_SET_Pos (2UL)

#define	MCPWM_INTEN_SET_ICAP0_SET_Msk (0x4UL)

#define	MCPWM_INTEN_SET_ILIM1_SET_Pos (4UL)

#define	MCPWM_INTEN_SET_ILIM1_SET_Msk (0x10UL)

#define	MCPWM_INTEN_SET_IMAT1_SET_Pos (5UL)

#define	MCPWM_INTEN_SET_IMAT1_SET_Msk (0x20UL)

#define	MCPWM_INTEN_SET_ICAP1_SET_Pos (6UL)

#define	MCPWM_INTEN_SET_ICAP1_SET_Msk (0x40UL)

#define	MCPWM_INTEN_SET_ILIM2_SET_Pos (9UL)

#define	MCPWM_INTEN_SET_ILIM2_SET_Msk (0x200UL)

#define	MCPWM_INTEN_SET_IMAT2_SET_Pos (10UL)

#define	MCPWM_INTEN_SET_IMAT2_SET_Msk (0x400UL)

#define	MCPWM_INTEN_SET_ICAP2_SET_Pos (11UL)

#define	MCPWM_INTEN_SET_ICAP2_SET_Msk (0x800UL)

#define	MCPWM_INTEN_SET_ABORT_SET_Pos (15UL)

#define	MCPWM_INTEN_SET_ABORT_SET_Msk (0x8000UL)

#define	MCPWM_INTEN_CLR_ILIM0_CLR_Pos (0UL)

#define	MCPWM_INTEN_CLR_ILIM0_CLR_Msk (0x1UL)

#define	MCPWM_INTEN_CLR_IMAT0_CLR_Pos (1UL)

#define	MCPWM_INTEN_CLR_IMAT0_CLR_Msk (0x2UL)

#define	MCPWM_INTEN_CLR_ICAP0_CLR_Pos (2UL)

#define	MCPWM_INTEN_CLR_ICAP0_CLR_Msk (0x4UL)

#define	MCPWM_INTEN_CLR_ILIM1_CLR_Pos (4UL)

#define	MCPWM_INTEN_CLR_ILIM1_CLR_Msk (0x10UL)

#define	MCPWM_INTEN_CLR_IMAT1_CLR_Pos (5UL)

#define	MCPWM_INTEN_CLR_IMAT1_CLR_Msk (0x20UL)

#define	MCPWM_INTEN_CLR_ICAP1_CLR_Pos (6UL)

#define	MCPWM_INTEN_CLR_ICAP1_CLR_Msk (0x40UL)

#define	MCPWM_INTEN_CLR_ILIM2_CLR_Pos (8UL)

#define	MCPWM_INTEN_CLR_ILIM2_CLR_Msk (0x100UL)

#define	MCPWM_INTEN_CLR_IMAT2_CLR_Pos (9UL)

#define	MCPWM_INTEN_CLR_IMAT2_CLR_Msk (0x200UL)

#define	MCPWM_INTEN_CLR_ICAP2_CLR_Pos (10UL)

#define	MCPWM_INTEN_CLR_ICAP2_CLR_Msk (0x400UL)

#define	MCPWM_INTEN_CLR_ABORT_CLR_Pos (15UL)

#define	MCPWM_INTEN_CLR_ABORT_CLR_Msk (0x8000UL)

#define	MCPWM_INTF_ILIM0_F_Pos (0UL)

#define	MCPWM_INTF_ILIM0_F_Msk (0x1UL)

#define	MCPWM_INTF_IMAT0_F_Pos (1UL)

#define	MCPWM_INTF_IMAT0_F_Msk (0x2UL)

#define	MCPWM_INTF_ICAP0_F_Pos (2UL)

#define	MCPWM_INTF_ICAP0_F_Msk (0x4UL)

#define	MCPWM_INTF_ILIM1_F_Pos (4UL)

#define	MCPWM_INTF_ILIM1_F_Msk (0x10UL)

#define	MCPWM_INTF_IMAT1_F_Pos (5UL)

#define	MCPWM_INTF_IMAT1_F_Msk (0x20UL)

#define	MCPWM_INTF_ICAP1_F_Pos (6UL)

#define	MCPWM_INTF_ICAP1_F_Msk (0x40UL)

#define	MCPWM_INTF_ILIM2_F_Pos (8UL)

#define	MCPWM_INTF_ILIM2_F_Msk (0x100UL)

#define	MCPWM_INTF_IMAT2_F_Pos (9UL)

#define	MCPWM_INTF_IMAT2_F_Msk (0x200UL)

#define	MCPWM_INTF_ICAP2_F_Pos (10UL)

#define	MCPWM_INTF_ICAP2_F_Msk (0x400UL)

#define	MCPWM_INTF_ABORT_F_Pos (15UL)

#define	MCPWM_INTF_ABORT_F_Msk (0x8000UL)

#define	MCPWM_INTF_SET_ILIM0_F_SET_Pos (0UL)

#define	MCPWM_INTF_SET_ILIM0_F_SET_Msk (0x1UL)

#define	MCPWM_INTF_SET_IMAT0_F_SET_Pos (1UL)

#define	MCPWM_INTF_SET_IMAT0_F_SET_Msk (0x2UL)

#define	MCPWM_INTF_SET_ICAP0_F_SET_Pos (2UL)

#define	MCPWM_INTF_SET_ICAP0_F_SET_Msk (0x4UL)

#define	MCPWM_INTF_SET_ILIM1_F_SET_Pos (4UL)

#define	MCPWM_INTF_SET_ILIM1_F_SET_Msk (0x10UL)

#define	MCPWM_INTF_SET_IMAT1_F_SET_Pos (5UL)

#define	MCPWM_INTF_SET_IMAT1_F_SET_Msk (0x20UL)

#define	MCPWM_INTF_SET_ICAP1_F_SET_Pos (6UL)

#define	MCPWM_INTF_SET_ICAP1_F_SET_Msk (0x40UL)

#define	MCPWM_INTF_SET_ILIM2_F_SET_Pos (8UL)

#define	MCPWM_INTF_SET_ILIM2_F_SET_Msk (0x100UL)

#define	MCPWM_INTF_SET_IMAT2_F_SET_Pos (9UL)

#define	MCPWM_INTF_SET_IMAT2_F_SET_Msk (0x200UL)

#define	MCPWM_INTF_SET_ICAP2_F_SET_Pos (10UL)

#define	MCPWM_INTF_SET_ICAP2_F_SET_Msk (0x400UL)

#define	MCPWM_INTF_SET_ABORT_F_SET_Pos (15UL)

#define	MCPWM_INTF_SET_ABORT_F_SET_Msk (0x8000UL)

#define	MCPWM_INTF_CLR_ILIM0_F_CLR_Pos (0UL)

#define	MCPWM_INTF_CLR_ILIM0_F_CLR_Msk (0x1UL)

#define	MCPWM_INTF_CLR_IMAT0_F_CLR_Pos (1UL)

#define	MCPWM_INTF_CLR_IMAT0_F_CLR_Msk (0x2UL)

#define	MCPWM_INTF_CLR_ICAP0_F_CLR_Pos (2UL)

#define	MCPWM_INTF_CLR_ICAP0_F_CLR_Msk (0x4UL)

#define	MCPWM_INTF_CLR_ILIM1_F_CLR_Pos (4UL)

#define	MCPWM_INTF_CLR_ILIM1_F_CLR_Msk (0x10UL)

#define	MCPWM_INTF_CLR_IMAT1_F_CLR_Pos (5UL)

#define	MCPWM_INTF_CLR_IMAT1_F_CLR_Msk (0x20UL)

#define	MCPWM_INTF_CLR_ICAP1_F_CLR_Pos (6UL)

#define	MCPWM_INTF_CLR_ICAP1_F_CLR_Msk (0x40UL)

#define	MCPWM_INTF_CLR_ILIM2_F_CLR_Pos (8UL)

#define	MCPWM_INTF_CLR_ILIM2_F_CLR_Msk (0x100UL)

#define	MCPWM_INTF_CLR_IMAT2_F_CLR_Pos (9UL)

#define	MCPWM_INTF_CLR_IMAT2_F_CLR_Msk (0x200UL)

#define	MCPWM_INTF_CLR_ICAP2_F_CLR_Pos (10UL)

#define	MCPWM_INTF_CLR_ICAP2_F_CLR_Msk (0x400UL)

#define	MCPWM_INTF_CLR_ABORT_F_CLR_Pos (15UL)

#define	MCPWM_INTF_CLR_ABORT_F_CLR_Msk (0x8000UL)

#define	MCPWM_CNTCON_TC0MCI0_RE_Pos (0UL)

#define	MCPWM_CNTCON_TC0MCI0_RE_Msk (0x1UL)

#define	MCPWM_CNTCON_TC0MCI0_FE_Pos (1UL)

#define	MCPWM_CNTCON_TC0MCI0_FE_Msk (0x2UL)

#define	MCPWM_CNTCON_TC0MCI1_RE_Pos (2UL)

#define	MCPWM_CNTCON_TC0MCI1_RE_Msk (0x4UL)

#define	MCPWM_CNTCON_TC0MCI1_FE_Pos (3UL)

#define	MCPWM_CNTCON_TC0MCI1_FE_Msk (0x8UL)

#define	MCPWM_CNTCON_TC0MCI2_RE_Pos (4UL)

#define	MCPWM_CNTCON_TC0MCI2_RE_Msk (0x10UL)

#define	MCPWM_CNTCON_TC0MCI2_FE_Pos (5UL)

#define	MCPWM_CNTCON_TC0MCI2_FE_Msk (0x20UL)

#define	MCPWM_CNTCON_TC1MCI0_RE_Pos (6UL)

#define	MCPWM_CNTCON_TC1MCI0_RE_Msk (0x40UL)

#define	MCPWM_CNTCON_TC1MCI0_FE_Pos (7UL)

#define	MCPWM_CNTCON_TC1MCI0_FE_Msk (0x80UL)

#define	MCPWM_CNTCON_TC1MCI1_RE_Pos (8UL)

#define	MCPWM_CNTCON_TC1MCI1_RE_Msk (0x100UL)

#define	MCPWM_CNTCON_TC1MCI1_FE_Pos (9UL)

#define	MCPWM_CNTCON_TC1MCI1_FE_Msk (0x200UL)

#define	MCPWM_CNTCON_TC1MCI2_RE_Pos (10UL)

#define	MCPWM_CNTCON_TC1MCI2_RE_Msk (0x400UL)

#define	MCPWM_CNTCON_TC1MCI2_FE_Pos (11UL)

#define	MCPWM_CNTCON_TC1MCI2_FE_Msk (0x800UL)

#define	MCPWM_CNTCON_TC2MCI0_RE_Pos (12UL)

#define	MCPWM_CNTCON_TC2MCI0_RE_Msk (0x1000UL)

#define	MCPWM_CNTCON_TC2MCI0_FE_Pos (13UL)

#define	MCPWM_CNTCON_TC2MCI0_FE_Msk (0x2000UL)

#define	MCPWM_CNTCON_TC2MCI1_RE_Pos (14UL)

#define	MCPWM_CNTCON_TC2MCI1_RE_Msk (0x4000UL)

#define	MCPWM_CNTCON_TC2MCI1_FE_Pos (15UL)

#define	MCPWM_CNTCON_TC2MCI1_FE_Msk (0x8000UL)

#define	MCPWM_CNTCON_TC2MCI2_RE_Pos (16UL)

#define	MCPWM_CNTCON_TC2MCI2_RE_Msk (0x10000UL)

#define	MCPWM_CNTCON_TC2MCI2_FE_Pos (17UL)

#define	MCPWM_CNTCON_TC2MCI2_FE_Msk (0x20000UL)

#define	MCPWM_CNTCON_CNTR0_Pos (29UL)

#define	MCPWM_CNTCON_CNTR0_Msk (0x20000000UL)

#define	MCPWM_CNTCON_CNTR1_Pos (30UL)

#define	MCPWM_CNTCON_CNTR1_Msk (0x40000000UL)

#define	MCPWM_CNTCON_CNTR2_Pos (31UL)

#define	MCPWM_CNTCON_CNTR2_Msk (0x80000000UL)

#define	MCPWM_CNTCON_SET_TC0MCI0_RE_SET_Pos (0UL)

#define	MCPWM_CNTCON_SET_TC0MCI0_RE_SET_Msk (0x1UL)

#define	MCPWM_CNTCON_SET_TC0MCI0_FE_SET_Pos (1UL)

#define	MCPWM_CNTCON_SET_TC0MCI0_FE_SET_Msk (0x2UL)

#define	MCPWM_CNTCON_SET_TC0MCI1_RE_SET_Pos (2UL)

#define	MCPWM_CNTCON_SET_TC0MCI1_RE_SET_Msk (0x4UL)

#define	MCPWM_CNTCON_SET_TC0MCI1_FE_SET_Pos (3UL)

#define	MCPWM_CNTCON_SET_TC0MCI1_FE_SET_Msk (0x8UL)

#define	MCPWM_CNTCON_SET_TC0MCI2_RE_SET_Pos (4UL)

#define	MCPWM_CNTCON_SET_TC0MCI2_RE_SET_Msk (0x10UL)

#define	MCPWM_CNTCON_SET_TC0MCI2_FE_SET_Pos (5UL)

#define	MCPWM_CNTCON_SET_TC0MCI2_FE_SET_Msk (0x20UL)

#define	MCPWM_CNTCON_SET_TC1MCI0_RE_SET_Pos (6UL)

#define	MCPWM_CNTCON_SET_TC1MCI0_RE_SET_Msk (0x40UL)

#define	MCPWM_CNTCON_SET_TC1MCI0_FE_SET_Pos (7UL)

#define	MCPWM_CNTCON_SET_TC1MCI0_FE_SET_Msk (0x80UL)

#define	MCPWM_CNTCON_SET_TC1MCI1_RE_SET_Pos (8UL)

#define	MCPWM_CNTCON_SET_TC1MCI1_RE_SET_Msk (0x100UL)

#define	MCPWM_CNTCON_SET_TC1MCI1_FE_SET_Pos (9UL)

#define	MCPWM_CNTCON_SET_TC1MCI1_FE_SET_Msk (0x200UL)

#define	MCPWM_CNTCON_SET_TC1MCI2_RE_SET_Pos (10UL)

#define	MCPWM_CNTCON_SET_TC1MCI2_RE_SET_Msk (0x400UL)

#define	MCPWM_CNTCON_SET_TC1MCI2_FE_SET_Pos (11UL)

#define	MCPWM_CNTCON_SET_TC1MCI2_FE_SET_Msk (0x800UL)

#define	MCPWM_CNTCON_SET_TC2MCI0_RE_SET_Pos (12UL)

#define	MCPWM_CNTCON_SET_TC2MCI0_RE_SET_Msk (0x1000UL)

#define	MCPWM_CNTCON_SET_TC2MCI0_FE_SET_Pos (13UL)

#define	MCPWM_CNTCON_SET_TC2MCI0_FE_SET_Msk (0x2000UL)

#define	MCPWM_CNTCON_SET_TC2MCI1_RE_SET_Pos (14UL)

#define	MCPWM_CNTCON_SET_TC2MCI1_RE_SET_Msk (0x4000UL)

#define	MCPWM_CNTCON_SET_TC2MCI1_FE_SET_Pos (15UL)

#define	MCPWM_CNTCON_SET_TC2MCI1_FE_SET_Msk (0x8000UL)

#define	MCPWM_CNTCON_SET_TC2MCI2_RE_SET_Pos (16UL)

#define	MCPWM_CNTCON_SET_TC2MCI2_RE_SET_Msk (0x10000UL)

#define	MCPWM_CNTCON_SET_TC2MCI2_FE_SET_Pos (17UL)

#define	MCPWM_CNTCON_SET_TC2MCI2_FE_SET_Msk (0x20000UL)

#define	MCPWM_CNTCON_SET_CNTR0_SET_Pos (29UL)

#define	MCPWM_CNTCON_SET_CNTR0_SET_Msk (0x20000000UL)

#define	MCPWM_CNTCON_SET_CNTR1_SET_Pos (30UL)

#define	MCPWM_CNTCON_SET_CNTR1_SET_Msk (0x40000000UL)

#define	MCPWM_CNTCON_SET_CNTR2_SET_Pos (31UL)

#define	MCPWM_CNTCON_SET_CNTR2_SET_Msk (0x80000000UL)

#define	MCPWM_CNTCON_CLR_TC0MCI0_RE_CLR_Pos (0UL)

#define	MCPWM_CNTCON_CLR_TC0MCI0_RE_CLR_Msk (0x1UL)

#define	MCPWM_CNTCON_CLR_TC0MCI0_FE_CLR_Pos (1UL)

#define	MCPWM_CNTCON_CLR_TC0MCI0_FE_CLR_Msk (0x2UL)

#define	MCPWM_CNTCON_CLR_TC0MCI1_RE_CLR_Pos (2UL)

#define	MCPWM_CNTCON_CLR_TC0MCI1_RE_CLR_Msk (0x4UL)

#define	MCPWM_CNTCON_CLR_TC0MCI1_FE_CLR_Pos (3UL)

#define	MCPWM_CNTCON_CLR_TC0MCI1_FE_CLR_Msk (0x8UL)

#define	MCPWM_CNTCON_CLR_TC0MCI2_RE_Pos (4UL)

#define	MCPWM_CNTCON_CLR_TC0MCI2_RE_Msk (0x10UL)

#define	MCPWM_CNTCON_CLR_TC0MCI2_FE_CLR_Pos (5UL)

#define	MCPWM_CNTCON_CLR_TC0MCI2_FE_CLR_Msk (0x20UL)

#define	MCPWM_CNTCON_CLR_TC1MCI0_RE_CLR_Pos (6UL)

#define	MCPWM_CNTCON_CLR_TC1MCI0_RE_CLR_Msk (0x40UL)

#define	MCPWM_CNTCON_CLR_TC1MCI0_FE_CLR_Pos (7UL)

#define	MCPWM_CNTCON_CLR_TC1MCI0_FE_CLR_Msk (0x80UL)

#define	MCPWM_CNTCON_CLR_TC1MCI1_RE_CLR_Pos (8UL)

#define	MCPWM_CNTCON_CLR_TC1MCI1_RE_CLR_Msk (0x100UL)

#define	MCPWM_CNTCON_CLR_TC1MCI1_FE_CLR_Pos (9UL)

#define	MCPWM_CNTCON_CLR_TC1MCI1_FE_CLR_Msk (0x200UL)

#define	MCPWM_CNTCON_CLR_TC1MCI2_RE_CLR_Pos (10UL)

#define	MCPWM_CNTCON_CLR_TC1MCI2_RE_CLR_Msk (0x400UL)

#define	MCPWM_CNTCON_CLR_TC1MCI2_FE_CLR_Pos (11UL)

#define	MCPWM_CNTCON_CLR_TC1MCI2_FE_CLR_Msk (0x800UL)

#define	MCPWM_CNTCON_CLR_TC2MCI0_RE_CLR_Pos (12UL)

#define	MCPWM_CNTCON_CLR_TC2MCI0_RE_CLR_Msk (0x1000UL)

#define	MCPWM_CNTCON_CLR_TC2MCI0_FE_CLR_Pos (13UL)

#define	MCPWM_CNTCON_CLR_TC2MCI0_FE_CLR_Msk (0x2000UL)

#define	MCPWM_CNTCON_CLR_TC2MCI1_RE_CLR_Pos (14UL)

#define	MCPWM_CNTCON_CLR_TC2MCI1_RE_CLR_Msk (0x4000UL)

#define	MCPWM_CNTCON_CLR_TC2MCI1_FE_CLR_Pos (15UL)

#define	MCPWM_CNTCON_CLR_TC2MCI1_FE_CLR_Msk (0x8000UL)

#define	MCPWM_CNTCON_CLR_TC2MCI2_RE_CLR_Pos (16UL)

#define	MCPWM_CNTCON_CLR_TC2MCI2_RE_CLR_Msk (0x10000UL)

#define	MCPWM_CNTCON_CLR_TC2MCI2_FE_CLR_Pos (17UL)

#define	MCPWM_CNTCON_CLR_TC2MCI2_FE_CLR_Msk (0x20000UL)

#define	MCPWM_CNTCON_CLR_CNTR0_CLR_Pos (29UL)

#define	MCPWM_CNTCON_CLR_CNTR0_CLR_Msk (0x20000000UL)

#define	MCPWM_CNTCON_CLR_CNTR1_CLR_Pos (30UL)

#define	MCPWM_CNTCON_CLR_CNTR1_CLR_Msk (0x40000000UL)

#define	MCPWM_CNTCON_CLR_CNTR2_CLR_Pos (31UL)

#define	MCPWM_CNTCON_CLR_CNTR2_CLR_Msk (0x80000000UL)

#define	MCPWM_CAP_CLR_CAP_CLR0_Pos (0UL)

#define	MCPWM_CAP_CLR_CAP_CLR0_Msk (0x1UL)

#define	MCPWM_CAP_CLR_CAP_CLR1_Pos (1UL)

#define	MCPWM_CAP_CLR_CAP_CLR1_Msk (0x2UL)

#define	MCPWM_CAP_CLR_CAP_CLR2_Pos (2UL)

#define	MCPWM_CAP_CLR_CAP_CLR2_Msk (0x4UL)

#define	QEI_CON_RESP_Pos (0UL)

#define	QEI_CON_RESP_Msk (0x1UL)

#define	QEI_CON_RESPI_Pos (1UL)

#define	QEI_CON_RESPI_Msk (0x2UL)

#define	QEI_CON_RESV_Pos (2UL)

#define	QEI_CON_RESV_Msk (0x4UL)

#define	QEI_CON_RESI_Pos (3UL)

#define	QEI_CON_RESI_Msk (0x8UL)

#define	QEI_CONF_DIRINV_Pos (0UL)

#define	QEI_CONF_DIRINV_Msk (0x1UL)

#define	QEI_CONF_SIGMODE_Pos (1UL)

#define	QEI_CONF_SIGMODE_Msk (0x2UL)

#define	QEI_CONF_CAPMODE_Pos (2UL)

#define	QEI_CONF_CAPMODE_Msk (0x4UL)

#define	QEI_CONF_INVINX_Pos (3UL)

#define	QEI_CONF_INVINX_Msk (0x8UL)

#define	QEI_CONF_CRESPI_Pos (4UL)

#define	QEI_CONF_CRESPI_Msk (0x10UL)

#define	QEI_CONF_INXGATE_Pos (16UL)

#define	QEI_CONF_INXGATE_Msk (0xf0000UL)

#define	QEI_STAT_DIR_Pos (0UL)

#define	QEI_STAT_DIR_Msk (0x1UL)

#define	QEI_POS_POS_Pos (0UL)

#define	QEI_POS_POS_Msk (0xffffffffUL)

#define	QEI_MAXPOS_MAXPOS_Pos (0UL)

#define	QEI_MAXPOS_MAXPOS_Msk (0xffffffffUL)

#define	QEI_CMPOS0_PCMP0_Pos (0UL)

#define	QEI_CMPOS0_PCMP0_Msk (0xffffffffUL)

#define	QEI_CMPOS1_PCMP1_Pos (0UL)

#define	QEI_CMPOS1_PCMP1_Msk (0xffffffffUL)

#define	QEI_CMPOS2_PCMP2_Pos (0UL)

#define	QEI_CMPOS2_PCMP2_Msk (0xffffffffUL)

#define	QEI_INXCNT_ENCPOS_Pos (0UL)

#define	QEI_INXCNT_ENCPOS_Msk (0xffffffffUL)

#define	QEI_INXCMP0_ICMP0_Pos (0UL)

#define	QEI_INXCMP0_ICMP0_Msk (0xffffffffUL)

#define	QEI_LOAD_VELLOAD_Pos (0UL)

#define	QEI_LOAD_VELLOAD_Msk (0xffffffffUL)

#define	QEI_TIME_VELVAL_Pos (0UL)

#define	QEI_TIME_VELVAL_Msk (0xffffffffUL)

#define	QEI_VEL_VELPC_Pos (0UL)

#define	QEI_VEL_VELPC_Msk (0xffffffffUL)

#define	QEI_CAP_VELCAP_Pos (0UL)

#define	QEI_CAP_VELCAP_Msk (0xffffffffUL)

#define	QEI_VELCOMP_VELPC_Pos (0UL)

#define	QEI_VELCOMP_VELPC_Msk (0xffffffffUL)

#define	QEI_FILTER_FILTA_Pos (0UL)

#define	QEI_FILTER_FILTA_Msk (0xffffffffUL)

#define	QEI_INTSTAT_INX_INT_Pos (0UL)

#define	QEI_INTSTAT_INX_INT_Msk (0x1UL)

#define	QEI_INTSTAT_TIM_INT_Pos (1UL)

#define	QEI_INTSTAT_TIM_INT_Msk (0x2UL)

#define	QEI_INTSTAT_VELC_INT_Pos (2UL)

#define	QEI_INTSTAT_VELC_INT_Msk (0x4UL)

#define	QEI_INTSTAT_DIR_INT_Pos (3UL)

#define	QEI_INTSTAT_DIR_INT_Msk (0x8UL)

#define	QEI_INTSTAT_ERR_INT_Pos (4UL)

#define	QEI_INTSTAT_ERR_INT_Msk (0x10UL)

#define	QEI_INTSTAT_ENCLK_INT_Pos (5UL)

#define	QEI_INTSTAT_ENCLK_INT_Msk (0x20UL)

#define	QEI_INTSTAT_POS0_INT_Pos (6UL)

#define	QEI_INTSTAT_POS0_INT_Msk (0x40UL)

#define	QEI_INTSTAT_POS1_INT_Pos (7UL)

#define	QEI_INTSTAT_POS1_INT_Msk (0x80UL)

#define	QEI_INTSTAT_POS2_INT_Pos (8UL)

#define	QEI_INTSTAT_POS2_INT_Msk (0x100UL)

#define	QEI_INTSTAT_REV0_INT_Pos (9UL)

#define	QEI_INTSTAT_REV0_INT_Msk (0x200UL)

#define	QEI_INTSTAT_POS0REV_INT_Pos (10UL)

#define	QEI_INTSTAT_POS0REV_INT_Msk (0x400UL)

#define	QEI_INTSTAT_POS1REV_INT_Pos (11UL)

#define	QEI_INTSTAT_POS1REV_INT_Msk (0x800UL)

#define	QEI_INTSTAT_POS2REV_INT_Pos (12UL)

#define	QEI_INTSTAT_POS2REV_INT_Msk (0x1000UL)

#define	QEI_INTSTAT_REV1_INT_Pos (13UL)

#define	QEI_INTSTAT_REV1_INT_Msk (0x2000UL)

#define	QEI_INTSTAT_REV2_INT_Pos (14UL)

#define	QEI_INTSTAT_REV2_INT_Msk (0x4000UL)

#define	QEI_INTSTAT_MAXPOS_INT_Pos (15UL)

#define	QEI_INTSTAT_MAXPOS_INT_Msk (0x8000UL)

#define	QEI_SET_INX_INT_Pos (0UL)

#define	QEI_SET_INX_INT_Msk (0x1UL)

#define	QEI_SET_TIM_INT_Pos (1UL)

#define	QEI_SET_TIM_INT_Msk (0x2UL)

#define	QEI_SET_VELC_INT_Pos (2UL)

#define	QEI_SET_VELC_INT_Msk (0x4UL)

#define	QEI_SET_DIR_INT_Pos (3UL)

#define	QEI_SET_DIR_INT_Msk (0x8UL)

#define	QEI_SET_ERR_INT_Pos (4UL)

#define	QEI_SET_ERR_INT_Msk (0x10UL)

#define	QEI_SET_ENCLK_INT_Pos (5UL)

#define	QEI_SET_ENCLK_INT_Msk (0x20UL)

#define	QEI_SET_POS0_INT_Pos (6UL)

#define	QEI_SET_POS0_INT_Msk (0x40UL)

#define	QEI_SET_POS1_INT_Pos (7UL)

#define	QEI_SET_POS1_INT_Msk (0x80UL)

#define	QEI_SET_POS2_INT_Pos (8UL)

#define	QEI_SET_POS2_INT_Msk (0x100UL)

#define	QEI_SET_REV0_INT_Pos (9UL)

#define	QEI_SET_REV0_INT_Msk (0x200UL)

#define	QEI_SET_POS0REV_INT_Pos (10UL)

#define	QEI_SET_POS0REV_INT_Msk (0x400UL)

#define	QEI_SET_POS1REV_INT_Pos (11UL)

#define	QEI_SET_POS1REV_INT_Msk (0x800UL)

#define	QEI_SET_POS2REV_INT_Pos (12UL)

#define	QEI_SET_POS2REV_INT_Msk (0x1000UL)

#define	QEI_SET_REV1_INT_Pos (13UL)

#define	QEI_SET_REV1_INT_Msk (0x2000UL)

#define	QEI_SET_REV2_INT_Pos (14UL)

#define	QEI_SET_REV2_INT_Msk (0x4000UL)

#define	QEI_SET_MAXPOS_INT_Pos (15UL)

#define	QEI_SET_MAXPOS_INT_Msk (0x8000UL)

#define	QEI_CLR_INX_INT_Pos (0UL)

#define	QEI_CLR_INX_INT_Msk (0x1UL)

#define	QEI_CLR_TIM_INT_Pos (1UL)

#define	QEI_CLR_TIM_INT_Msk (0x2UL)

#define	QEI_CLR_VELC_INT_Pos (2UL)

#define	QEI_CLR_VELC_INT_Msk (0x4UL)

#define	QEI_CLR_DIR_INT_Pos (3UL)

#define	QEI_CLR_DIR_INT_Msk (0x8UL)

#define	QEI_CLR_ERR_INT_Pos (4UL)

#define	QEI_CLR_ERR_INT_Msk (0x10UL)

#define	QEI_CLR_ENCLK_INT_Pos (5UL)

#define	QEI_CLR_ENCLK_INT_Msk (0x20UL)

#define	QEI_CLR_POS0_INT_Pos (6UL)

#define	QEI_CLR_POS0_INT_Msk (0x40UL)

#define	QEI_CLR_POS1_INT_Pos (7UL)

#define	QEI_CLR_POS1_INT_Msk (0x80UL)

#define	QEI_CLR_POS2_INT_Pos (8UL)

#define	QEI_CLR_POS2_INT_Msk (0x100UL)

#define	QEI_CLR_REV0_INT_Pos (9UL)

#define	QEI_CLR_REV0_INT_Msk (0x200UL)

#define	QEI_CLR_POS0REV_INT_Pos (10UL)

#define	QEI_CLR_POS0REV_INT_Msk (0x400UL)

#define	QEI_CLR_POS1REV_INT_Pos (11UL)

#define	QEI_CLR_POS1REV_INT_Msk (0x800UL)

#define	QEI_CLR_POS2REV_INT_Pos (12UL)

#define	QEI_CLR_POS2REV_INT_Msk (0x1000UL)

#define	QEI_CLR_REV1_INT_Pos (13UL)

#define	QEI_CLR_REV1_INT_Msk (0x2000UL)

#define	QEI_CLR_REV2_INT_Pos (14UL)

#define	QEI_CLR_REV2_INT_Msk (0x4000UL)

#define	QEI_CLR_MAXPOS_INT_Pos (15UL)

#define	QEI_CLR_MAXPOS_INT_Msk (0x8000UL)

#define	QEI_IE_INX_INT_Pos (0UL)

#define	QEI_IE_INX_INT_Msk (0x1UL)

#define	QEI_IE_TIM_INT_Pos (1UL)

#define	QEI_IE_TIM_INT_Msk (0x2UL)

#define	QEI_IE_VELC_INT_Pos (2UL)

#define	QEI_IE_VELC_INT_Msk (0x4UL)

#define	QEI_IE_DIR_INT_Pos (3UL)

#define	QEI_IE_DIR_INT_Msk (0x8UL)

#define	QEI_IE_ERR_INT_Pos (4UL)

#define	QEI_IE_ERR_INT_Msk (0x10UL)

#define	QEI_IE_ENCLK_INT_Pos (5UL)

#define	QEI_IE_ENCLK_INT_Msk (0x20UL)

#define	QEI_IE_POS0_INT_Pos (6UL)

#define	QEI_IE_POS0_INT_Msk (0x40UL)

#define	QEI_IE_POS1_INT_Pos (7UL)

#define	QEI_IE_POS1_INT_Msk (0x80UL)

#define	QEI_IE_POS2_INT_Pos (8UL)

#define	QEI_IE_POS2_INT_Msk (0x100UL)

#define	QEI_IE_REV0_INT_Pos (9UL)

#define	QEI_IE_REV0_INT_Msk (0x200UL)

#define	QEI_IE_POS0REV_INT_Pos (10UL)

#define	QEI_IE_POS0REV_INT_Msk (0x400UL)

#define	QEI_IE_POS1REV_INT_Pos (11UL)

#define	QEI_IE_POS1REV_INT_Msk (0x800UL)

#define	QEI_IE_POS2REV_INT_Pos (12UL)

#define	QEI_IE_POS2REV_INT_Msk (0x1000UL)

#define	QEI_IE_REV1_INT_Pos (13UL)

#define	QEI_IE_REV1_INT_Msk (0x2000UL)

#define	QEI_IE_REV2_INT_Pos (14UL)

#define	QEI_IE_REV2_INT_Msk (0x4000UL)

#define	QEI_IE_MAXPOS_INT_Pos (15UL)

#define	QEI_IE_MAXPOS_INT_Msk (0x8000UL)

#define	QEI_IES_INX_INT_Pos (0UL)

#define	QEI_IES_INX_INT_Msk (0x1UL)

#define	QEI_IES_TIM_INT_Pos (1UL)

#define	QEI_IES_TIM_INT_Msk (0x2UL)

#define	QEI_IES_VELC_INT_Pos (2UL)

#define	QEI_IES_VELC_INT_Msk (0x4UL)

#define	QEI_IES_DIR_INT_Pos (3UL)

#define	QEI_IES_DIR_INT_Msk (0x8UL)

#define	QEI_IES_ERR_INT_Pos (4UL)

#define	QEI_IES_ERR_INT_Msk (0x10UL)

#define	QEI_IES_ENCLK_INT_Pos (5UL)

#define	QEI_IES_ENCLK_INT_Msk (0x20UL)

#define	QEI_IES_POS0_INT_Pos (6UL)

#define	QEI_IES_POS0_INT_Msk (0x40UL)

#define	QEI_IES_POS1_INT_Pos (7UL)

#define	QEI_IES_POS1_INT_Msk (0x80UL)

#define	QEI_IES_POS2_INT_Pos (8UL)

#define	QEI_IES_POS2_INT_Msk (0x100UL)

#define	QEI_IES_REV0_INT_Pos (9UL)

#define	QEI_IES_REV0_INT_Msk (0x200UL)

#define	QEI_IES_POS0REV_INT_Pos (10UL)

#define	QEI_IES_POS0REV_INT_Msk (0x400UL)

#define	QEI_IES_POS1REV_INT_Pos (11UL)

#define	QEI_IES_POS1REV_INT_Msk (0x800UL)

#define	QEI_IES_POS2REV_INT_Pos (12UL)

#define	QEI_IES_POS2REV_INT_Msk (0x1000UL)

#define	QEI_IES_REV1_INT_Pos (13UL)

#define	QEI_IES_REV1_INT_Msk (0x2000UL)

#define	QEI_IES_REV2_INT_Pos (14UL)

#define	QEI_IES_REV2_INT_Msk (0x4000UL)

#define	QEI_IES_MAXPOS_INT_Pos (15UL)

#define	QEI_IES_MAXPOS_INT_Msk (0x8000UL)

#define	QEI_IEC_INX_INT_Pos (0UL)

#define	QEI_IEC_INX_INT_Msk (0x1UL)

#define	QEI_IEC_TIM_INT_Pos (1UL)

#define	QEI_IEC_TIM_INT_Msk (0x2UL)

#define	QEI_IEC_VELC_INT_Pos (2UL)

#define	QEI_IEC_VELC_INT_Msk (0x4UL)

#define	QEI_IEC_DIR_INT_Pos (3UL)

#define	QEI_IEC_DIR_INT_Msk (0x8UL)

#define	QEI_IEC_ERR_INT_Pos (4UL)

#define	QEI_IEC_ERR_INT_Msk (0x10UL)

#define	QEI_IEC_ENCLK_INT_Pos (5UL)

#define	QEI_IEC_ENCLK_INT_Msk (0x20UL)

#define	QEI_IEC_POS0_INT_Pos (6UL)

#define	QEI_IEC_POS0_INT_Msk (0x40UL)

#define	QEI_IEC_POS1_INT_Pos (7UL)

#define	QEI_IEC_POS1_INT_Msk (0x80UL)

#define	QEI_IEC_POS2_INT_Pos (8UL)

#define	QEI_IEC_POS2_INT_Msk (0x100UL)

#define	QEI_IEC_REV0_INT_Pos (9UL)

#define	QEI_IEC_REV0_INT_Msk (0x200UL)

#define	QEI_IEC_POS0REV_INT_Pos (10UL)

#define	QEI_IEC_POS0REV_INT_Msk (0x400UL)

#define	QEI_IEC_POS1REV_INT_Pos (11UL)

#define	QEI_IEC_POS1REV_INT_Msk (0x800UL)

#define	QEI_IEC_POS2REV_INT_Pos (12UL)

#define	QEI_IEC_POS2REV_INT_Msk (0x1000UL)

#define	QEI_IEC_REV1_INT_Pos (13UL)

#define	QEI_IEC_REV1_INT_Msk (0x2000UL)

#define	QEI_IEC_REV2_INT_Pos (14UL)

#define	QEI_IEC_REV2_INT_Msk (0x4000UL)

#define	QEI_IEC_MAXPOS_INT_Pos (15UL)

#define	QEI_IEC_MAXPOS_INT_Msk (0x8000UL)

#define	SYSCON_FLASHCFG_FLASHTIM_Pos (12UL)

#define	SYSCON_FLASHCFG_FLASHTIM_Msk (0xf000UL)

#define	SYSCON_PLL0CON_PLLE0_Pos (0UL)

#define	SYSCON_PLL0CON_PLLE0_Msk (0x1UL)

#define	SYSCON_PLL0CON_PLLC0_Pos (1UL)

#define	SYSCON_PLL0CON_PLLC0_Msk (0x2UL)

#define	SYSCON_PLL0CFG_MSEL0_Pos (0UL)

#define	SYSCON_PLL0CFG_MSEL0_Msk (0x7fffUL)

#define	SYSCON_PLL0CFG_NSEL0_Pos (16UL)

#define	SYSCON_PLL0CFG_NSEL0_Msk (0xff0000UL)

#define	SYSCON_PLL0STAT_MSEL0_Pos (0UL)

#define	SYSCON_PLL0STAT_MSEL0_Msk (0x7fffUL)

#define	SYSCON_PLL0STAT_NSEL0_Pos (16UL)

#define	SYSCON_PLL0STAT_NSEL0_Msk (0xff0000UL)

#define	SYSCON_PLL0STAT_PLLE0_STAT_Pos (24UL)

#define	SYSCON_PLL0STAT_PLLE0_STAT_Msk (0x1000000UL)

#define	SYSCON_PLL0STAT_PLLC0_STAT_Pos (25UL)

#define	SYSCON_PLL0STAT_PLLC0_STAT_Msk (0x2000000UL)

#define	SYSCON_PLL0STAT_PLOCK0_Pos (26UL)

#define	SYSCON_PLL0STAT_PLOCK0_Msk (0x4000000UL)

#define	SYSCON_PLL0FEED_PLL0FEED_Pos (0UL)

#define	SYSCON_PLL0FEED_PLL0FEED_Msk (0xffUL)

#define	SYSCON_PLL1CON_PLLE1_Pos (0UL)

#define	SYSCON_PLL1CON_PLLE1_Msk (0x1UL)

#define	SYSCON_PLL1CON_PLLC1_Pos (1UL)

#define	SYSCON_PLL1CON_PLLC1_Msk (0x2UL)

#define	SYSCON_PLL1CFG_MSEL1_Pos (0UL)

#define	SYSCON_PLL1CFG_MSEL1_Msk (0x1fUL)

#define	SYSCON_PLL1CFG_PSEL1_Pos (5UL)

#define	SYSCON_PLL1CFG_PSEL1_Msk (0x60UL)

#define	SYSCON_PLL1STAT_MSEL1_Pos (0UL)

#define	SYSCON_PLL1STAT_MSEL1_Msk (0x1fUL)

#define	SYSCON_PLL1STAT_PSEL1_Pos (5UL)

#define	SYSCON_PLL1STAT_PSEL1_Msk (0x60UL)

#define	SYSCON_PLL1STAT_PLLE1_STAT_Pos (8UL)

#define	SYSCON_PLL1STAT_PLLE1_STAT_Msk (0x100UL)

#define	SYSCON_PLL1STAT_PLLC1_STAT_Pos (9UL)

#define	SYSCON_PLL1STAT_PLLC1_STAT_Msk (0x200UL)

#define	SYSCON_PLL1STAT_PLOCK1_Pos (10UL)

#define	SYSCON_PLL1STAT_PLOCK1_Msk (0x400UL)

#define	SYSCON_PLL1FEED_PLL1FEED_Pos (0UL)

#define	SYSCON_PLL1FEED_PLL1FEED_Msk (0xffUL)

#define	SYSCON_PCON_PM0_Pos (0UL)

#define	SYSCON_PCON_PM0_Msk (0x1UL)

#define	SYSCON_PCON_PM1_Pos (1UL)

#define	SYSCON_PCON_PM1_Msk (0x2UL)

#define	SYSCON_PCON_BODRPM_Pos (2UL)

#define	SYSCON_PCON_BODRPM_Msk (0x4UL)

#define	SYSCON_PCON_BOGD_Pos (3UL)

#define	SYSCON_PCON_BOGD_Msk (0x8UL)

#define	SYSCON_PCON_BORD_Pos (4UL)

#define	SYSCON_PCON_BORD_Msk (0x10UL)

#define	SYSCON_PCON_SMFLAG_Pos (8UL)

#define	SYSCON_PCON_SMFLAG_Msk (0x100UL)

#define	SYSCON_PCON_DSFLAG_Pos (9UL)

#define	SYSCON_PCON_DSFLAG_Msk (0x200UL)

#define	SYSCON_PCON_PDFLAG_Pos (10UL)

#define	SYSCON_PCON_PDFLAG_Msk (0x400UL)

#define	SYSCON_PCON_DPDFLAG_Pos (11UL)

#define	SYSCON_PCON_DPDFLAG_Msk (0x800UL)

#define	SYSCON_PCONP_PCTIM0_Pos (1UL)

#define	SYSCON_PCONP_PCTIM0_Msk (0x2UL)

#define	SYSCON_PCONP_PCTIM1_Pos (2UL)

#define	SYSCON_PCONP_PCTIM1_Msk (0x4UL)

#define	SYSCON_PCONP_PCUART0_Pos (3UL)

#define	SYSCON_PCONP_PCUART0_Msk (0x8UL)

#define	SYSCON_PCONP_PCUART1_Pos (4UL)

#define	SYSCON_PCONP_PCUART1_Msk (0x10UL)

#define	SYSCON_PCONP_PCPWM1_Pos (6UL)

#define	SYSCON_PCONP_PCPWM1_Msk (0x40UL)

#define	SYSCON_PCONP_PCI2C0_Pos (7UL)

#define	SYSCON_PCONP_PCI2C0_Msk (0x80UL)

#define	SYSCON_PCONP_PCSPI_Pos (8UL)

#define	SYSCON_PCONP_PCSPI_Msk (0x100UL)

#define	SYSCON_PCONP_PCRTC_Pos (9UL)

#define	SYSCON_PCONP_PCRTC_Msk (0x200UL)

#define	SYSCON_PCONP_PCSSP1_Pos (10UL)

#define	SYSCON_PCONP_PCSSP1_Msk (0x400UL)

#define	SYSCON_PCONP_PCADC_Pos (12UL)

#define	SYSCON_PCONP_PCADC_Msk (0x1000UL)

#define	SYSCON_PCONP_PCCAN1_Pos (13UL)

#define	SYSCON_PCONP_PCCAN1_Msk (0x2000UL)

#define	SYSCON_PCONP_PCCAN2_Pos (14UL)

#define	SYSCON_PCONP_PCCAN2_Msk (0x4000UL)

#define	SYSCON_PCONP_PCGPIO_Pos (15UL)

#define	SYSCON_PCONP_PCGPIO_Msk (0x8000UL)

#define	SYSCON_PCONP_PCRIT_Pos (16UL)

#define	SYSCON_PCONP_PCRIT_Msk (0x10000UL)

#define	SYSCON_PCONP_PCMCPWM_Pos (17UL)

#define	SYSCON_PCONP_PCMCPWM_Msk (0x20000UL)

#define	SYSCON_PCONP_PCQEI_Pos (18UL)

#define	SYSCON_PCONP_PCQEI_Msk (0x40000UL)

#define	SYSCON_PCONP_PCI2C1_Pos (19UL)

#define	SYSCON_PCONP_PCI2C1_Msk (0x80000UL)

#define	SYSCON_PCONP_PCSSP0_Pos (21UL)

#define	SYSCON_PCONP_PCSSP0_Msk (0x200000UL)

#define	SYSCON_PCONP_PCTIM2_Pos (22UL)

#define	SYSCON_PCONP_PCTIM2_Msk (0x400000UL)

#define	SYSCON_PCONP_PCTIM3_Pos (23UL)

#define	SYSCON_PCONP_PCTIM3_Msk (0x800000UL)

#define	SYSCON_PCONP_PCUART2_Pos (24UL)

#define	SYSCON_PCONP_PCUART2_Msk (0x1000000UL)

#define	SYSCON_PCONP_PCUART3_Pos (25UL)

#define	SYSCON_PCONP_PCUART3_Msk (0x2000000UL)

#define	SYSCON_PCONP_PCI2C2_Pos (26UL)

#define	SYSCON_PCONP_PCI2C2_Msk (0x4000000UL)

#define	SYSCON_PCONP_PCI2S_Pos (27UL)

#define	SYSCON_PCONP_PCI2S_Msk (0x8000000UL)

#define	SYSCON_PCONP_PCGPDMA_Pos (29UL)

#define	SYSCON_PCONP_PCGPDMA_Msk (0x20000000UL)

#define	SYSCON_PCONP_PCENET_Pos (30UL)

#define	SYSCON_PCONP_PCENET_Msk (0x40000000UL)

#define	SYSCON_PCONP_PCUSB_Pos (31UL)

#define	SYSCON_PCONP_PCUSB_Msk (0x80000000UL)

#define	SYSCON_CCLKCFG_CCLKSEL_Pos (0UL)

#define	SYSCON_CCLKCFG_CCLKSEL_Msk (0xffUL)

#define	SYSCON_USBCLKCFG_USBSEL_Pos (0UL)

#define	SYSCON_USBCLKCFG_USBSEL_Msk (0xfUL)

#define	SYSCON_CLKSRCSEL_CLKSRC_Pos (0UL)

#define	SYSCON_CLKSRCSEL_CLKSRC_Msk (0x3UL)

#define	SYSCON_CANSLEEPCLR_CAN1SLEEP_Pos (1UL)

#define	SYSCON_CANSLEEPCLR_CAN1SLEEP_Msk (0x2UL)

#define	SYSCON_CANSLEEPCLR_CAN2SLEEP_Pos (2UL)

#define	SYSCON_CANSLEEPCLR_CAN2SLEEP_Msk (0x4UL)

#define	SYSCON_CANWAKEFLAGS_CAN1WAKE_Pos (1UL)

#define	SYSCON_CANWAKEFLAGS_CAN1WAKE_Msk (0x2UL)

#define	SYSCON_CANWAKEFLAGS_CAN2WAKE_Pos (2UL)

#define	SYSCON_CANWAKEFLAGS_CAN2WAKE_Msk (0x4UL)

#define	SYSCON_EXTINT_EINT0_Pos (0UL)

#define	SYSCON_EXTINT_EINT0_Msk (0x1UL)

#define	SYSCON_EXTINT_EINT1_Pos (1UL)

#define	SYSCON_EXTINT_EINT1_Msk (0x2UL)

#define	SYSCON_EXTINT_EINT2_Pos (2UL)

#define	SYSCON_EXTINT_EINT2_Msk (0x4UL)

#define	SYSCON_EXTINT_EINT3_Pos (3UL)

#define	SYSCON_EXTINT_EINT3_Msk (0x8UL)

#define	SYSCON_EXTMODE_EXTMODE0_Pos (0UL)

#define	SYSCON_EXTMODE_EXTMODE0_Msk (0x1UL)

#define	SYSCON_EXTMODE_EXTMODE1_Pos (1UL)

#define	SYSCON_EXTMODE_EXTMODE1_Msk (0x2UL)

#define	SYSCON_EXTMODE_EXTMODE2_Pos (2UL)

#define	SYSCON_EXTMODE_EXTMODE2_Msk (0x4UL)

#define	SYSCON_EXTMODE_EXTMODE3_Pos (3UL)

#define	SYSCON_EXTMODE_EXTMODE3_Msk (0x8UL)

#define	SYSCON_EXTPOLAR_EXTPOLAR0_Pos (0UL)

#define	SYSCON_EXTPOLAR_EXTPOLAR0_Msk (0x1UL)

#define	SYSCON_EXTPOLAR_EXTPOLAR1_Pos (1UL)

#define	SYSCON_EXTPOLAR_EXTPOLAR1_Msk (0x2UL)

#define	SYSCON_EXTPOLAR_EXTPOLAR2_Pos (2UL)

#define	SYSCON_EXTPOLAR_EXTPOLAR2_Msk (0x4UL)

#define	SYSCON_EXTPOLAR_EXTPOLAR3_Pos (3UL)

#define	SYSCON_EXTPOLAR_EXTPOLAR3_Msk (0x8UL)

#define	SYSCON_RSID_POR_Pos (0UL)

#define	SYSCON_RSID_POR_Msk (0x1UL)

#define	SYSCON_RSID_EXTR_Pos (1UL)

#define	SYSCON_RSID_EXTR_Msk (0x2UL)

#define	SYSCON_RSID_WDTR_Pos (2UL)

#define	SYSCON_RSID_WDTR_Msk (0x4UL)

#define	SYSCON_RSID_BODR_Pos (3UL)

#define	SYSCON_RSID_BODR_Msk (0x8UL)

#define	SYSCON_SCS_OSCRANGE_Pos (4UL)

#define	SYSCON_SCS_OSCRANGE_Msk (0x10UL)

#define	SYSCON_SCS_OSCEN_Pos (5UL)

#define	SYSCON_SCS_OSCEN_Msk (0x20UL)

#define	SYSCON_SCS_OSCSTAT_Pos (6UL)

#define	SYSCON_SCS_OSCSTAT_Msk (0x40UL)

#define	SYSCON_PCLKSEL0_PCLK_WDT_Pos (0UL)

#define	SYSCON_PCLKSEL0_PCLK_WDT_Msk (0x3UL)

#define	SYSCON_PCLKSEL0_PCLK_TIMER0_Pos (2UL)

#define	SYSCON_PCLKSEL0_PCLK_TIMER0_Msk (0xcUL)

#define	SYSCON_PCLKSEL0_PCLK_TIMER1_Pos (4UL)

#define	SYSCON_PCLKSEL0_PCLK_TIMER1_Msk (0x30UL)

#define	SYSCON_PCLKSEL0_PCLK_UART0_Pos (6UL)

#define	SYSCON_PCLKSEL0_PCLK_UART0_Msk (0xc0UL)

#define	SYSCON_PCLKSEL0_PCLK_UART1_Pos (8UL)

#define	SYSCON_PCLKSEL0_PCLK_UART1_Msk (0x300UL)

#define	SYSCON_PCLKSEL0_PCLK_PWM1_Pos (12UL)

#define	SYSCON_PCLKSEL0_PCLK_PWM1_Msk (0x3000UL)

#define	SYSCON_PCLKSEL0_PCLK_I2C0_Pos (14UL)

#define	SYSCON_PCLKSEL0_PCLK_I2C0_Msk (0xc000UL)

#define	SYSCON_PCLKSEL0_PCLK_SPI_Pos (16UL)

#define	SYSCON_PCLKSEL0_PCLK_SPI_Msk (0x30000UL)

#define	SYSCON_PCLKSEL0_PCLK_SSP1_Pos (20UL)

#define	SYSCON_PCLKSEL0_PCLK_SSP1_Msk (0x300000UL)

#define	SYSCON_PCLKSEL0_PCLK_DAC_Pos (22UL)

#define	SYSCON_PCLKSEL0_PCLK_DAC_Msk (0xc00000UL)

#define	SYSCON_PCLKSEL0_PCLK_ADC_Pos (24UL)

#define	SYSCON_PCLKSEL0_PCLK_ADC_Msk (0x3000000UL)

#define	SYSCON_PCLKSEL0_PCLK_CAN1_Pos (26UL)

#define	SYSCON_PCLKSEL0_PCLK_CAN1_Msk (0xc000000UL)

#define	SYSCON_PCLKSEL0_PCLK_CAN2_Pos (28UL)

#define	SYSCON_PCLKSEL0_PCLK_CAN2_Msk (0x30000000UL)

#define	SYSCON_PCLKSEL0_PCLK_ACF_Pos (30UL)

#define	SYSCON_PCLKSEL0_PCLK_ACF_Msk (0xc0000000UL)

#define	SYSCON_PCLKSEL1_PCLK_QEI_Pos (0UL)

#define	SYSCON_PCLKSEL1_PCLK_QEI_Msk (0x3UL)

#define	SYSCON_PCLKSEL1_PCLK_GPIOINT_Pos (2UL)

#define	SYSCON_PCLKSEL1_PCLK_GPIOINT_Msk (0xcUL)

#define	SYSCON_PCLKSEL1_PCLK_PCB_Pos (4UL)

#define	SYSCON_PCLKSEL1_PCLK_PCB_Msk (0x30UL)

#define	SYSCON_PCLKSEL1_PCLK_I2C1_Pos (6UL)

#define	SYSCON_PCLKSEL1_PCLK_I2C1_Msk (0xc0UL)

#define	SYSCON_PCLKSEL1_PCLK_SSP0_Pos (10UL)

#define	SYSCON_PCLKSEL1_PCLK_SSP0_Msk (0xc00UL)

#define	SYSCON_PCLKSEL1_PCLK_TIMER2_Pos (12UL)

#define	SYSCON_PCLKSEL1_PCLK_TIMER2_Msk (0x3000UL)

#define	SYSCON_PCLKSEL1_PCLK_TIMER3_Pos (14UL)

#define	SYSCON_PCLKSEL1_PCLK_TIMER3_Msk (0xc000UL)

#define	SYSCON_PCLKSEL1_PCLK_UART2_Pos (16UL)

#define	SYSCON_PCLKSEL1_PCLK_UART2_Msk (0x30000UL)

#define	SYSCON_PCLKSEL1_PCLK_UART3_Pos (18UL)

#define	SYSCON_PCLKSEL1_PCLK_UART3_Msk (0xc0000UL)

#define	SYSCON_PCLKSEL1_PCLK_I2C2_Pos (20UL)

#define	SYSCON_PCLKSEL1_PCLK_I2C2_Msk (0x300000UL)

#define	SYSCON_PCLKSEL1_PCLK_I2S_Pos (22UL)

#define	SYSCON_PCLKSEL1_PCLK_I2S_Msk (0xc00000UL)

#define	SYSCON_PCLKSEL1_PCLK_RIT_Pos (26UL)

#define	SYSCON_PCLKSEL1_PCLK_RIT_Msk (0xc000000UL)

#define	SYSCON_PCLKSEL1_PCLK_SYSCON_Pos (28UL)

#define	SYSCON_PCLKSEL1_PCLK_SYSCON_Msk (0x30000000UL)

#define	SYSCON_PCLKSEL1_PCLK_MC_Pos (30UL)

#define	SYSCON_PCLKSEL1_PCLK_MC_Msk (0xc0000000UL)

#define	SYSCON_USBINTST_USB_INT_REQ_LP_Pos (0UL)

#define	SYSCON_USBINTST_USB_INT_REQ_LP_Msk (0x1UL)

#define	SYSCON_USBINTST_USB_INT_REQ_HP_Pos (1UL)

#define	SYSCON_USBINTST_USB_INT_REQ_HP_Msk (0x2UL)

#define	SYSCON_USBINTST_USB_INT_REQ_DMA_Pos (2UL)

#define	SYSCON_USBINTST_USB_INT_REQ_DMA_Msk (0x4UL)

#define	SYSCON_USBINTST_USB_HOST_INT_Pos (3UL)

#define	SYSCON_USBINTST_USB_HOST_INT_Msk (0x8UL)

#define	SYSCON_USBINTST_USB_ATX_INT_Pos (4UL)

#define	SYSCON_USBINTST_USB_ATX_INT_Msk (0x10UL)

#define	SYSCON_USBINTST_USB_OTG_INT_Pos (5UL)

#define	SYSCON_USBINTST_USB_OTG_INT_Msk (0x20UL)

#define	SYSCON_USBINTST_USB_I2C_INT_Pos (6UL)

#define	SYSCON_USBINTST_USB_I2C_INT_Msk (0x40UL)

#define	SYSCON_USBINTST_USB_NEED_CLK_Pos (8UL)

#define	SYSCON_USBINTST_USB_NEED_CLK_Msk (0x100UL)

#define	SYSCON_USBINTST_EN_USB_INTS_Pos (31UL)

#define	SYSCON_USBINTST_EN_USB_INTS_Msk (0x80000000UL)

#define	SYSCON_DMACREQSEL_DMASEL08_Pos (0UL)

#define	SYSCON_DMACREQSEL_DMASEL08_Msk (0x1UL)

#define	SYSCON_DMACREQSEL_DMASEL09_Pos (1UL)

#define	SYSCON_DMACREQSEL_DMASEL09_Msk (0x2UL)

#define	SYSCON_DMACREQSEL_DMASEL10_Pos (2UL)

#define	SYSCON_DMACREQSEL_DMASEL10_Msk (0x4UL)

#define	SYSCON_DMACREQSEL_DMASEL11_Pos (3UL)

#define	SYSCON_DMACREQSEL_DMASEL11_Msk (0x8UL)

#define	SYSCON_DMACREQSEL_DMASEL12_Pos (4UL)

#define	SYSCON_DMACREQSEL_DMASEL12_Msk (0x10UL)

#define	SYSCON_DMACREQSEL_DMASEL13_Pos (5UL)

#define	SYSCON_DMACREQSEL_DMASEL13_Msk (0x20UL)

#define	SYSCON_DMACREQSEL_DMASEL14_Pos (6UL)

#define	SYSCON_DMACREQSEL_DMASEL14_Msk (0x40UL)

#define	SYSCON_DMACREQSEL_DMASEL15_Pos (7UL)

#define	SYSCON_DMACREQSEL_DMASEL15_Msk (0x80UL)

#define	SYSCON_CLKOUTCFG_CLKOUTSEL_Pos (0UL)

#define	SYSCON_CLKOUTCFG_CLKOUTSEL_Msk (0xfUL)

#define	SYSCON_CLKOUTCFG_CLKOUTDIV_Pos (4UL)

#define	SYSCON_CLKOUTCFG_CLKOUTDIV_Msk (0xf0UL)

#define	SYSCON_CLKOUTCFG_CLKOUT_EN_Pos (8UL)

#define	SYSCON_CLKOUTCFG_CLKOUT_EN_Msk (0x100UL)

#define	SYSCON_CLKOUTCFG_CLKOUT_ACT_Pos (9UL)

#define	SYSCON_CLKOUTCFG_CLKOUT_ACT_Msk (0x200UL)

#define	EMAC_MAC1_RXENABLE_Pos (0UL)

#define	EMAC_MAC1_RXENABLE_Msk (0x1UL)

#define	EMAC_MAC1_PARF_Pos (1UL)

#define	EMAC_MAC1_PARF_Msk (0x2UL)

#define	EMAC_MAC1_RXFLOWCTRL_Pos (2UL)

#define	EMAC_MAC1_RXFLOWCTRL_Msk (0x4UL)

#define	EMAC_MAC1_TXFLOWCTRL_Pos (3UL)

#define	EMAC_MAC1_TXFLOWCTRL_Msk (0x8UL)

#define	EMAC_MAC1_LOOPBACK_Pos (4UL)

#define	EMAC_MAC1_LOOPBACK_Msk (0x10UL)

#define	EMAC_MAC1_RESETTX_Pos (8UL)

#define	EMAC_MAC1_RESETTX_Msk (0x100UL)

#define	EMAC_MAC1_RESETMCSTX_Pos (9UL)

#define	EMAC_MAC1_RESETMCSTX_Msk (0x200UL)

#define	EMAC_MAC1_RESETRX_Pos (10UL)

#define	EMAC_MAC1_RESETRX_Msk (0x400UL)

#define	EMAC_MAC1_RESETMCSRX_Pos (11UL)

#define	EMAC_MAC1_RESETMCSRX_Msk (0x800UL)

#define	EMAC_MAC1_SIMRESET_Pos (14UL)

#define	EMAC_MAC1_SIMRESET_Msk (0x4000UL)

#define	EMAC_MAC1_SOFTRESET_Pos (15UL)

#define	EMAC_MAC1_SOFTRESET_Msk (0x8000UL)

#define	EMAC_MAC2_FULLDUPLEX_Pos (0UL)

#define	EMAC_MAC2_FULLDUPLEX_Msk (0x1UL)

#define	EMAC_MAC2_FLC_Pos (1UL)

#define	EMAC_MAC2_FLC_Msk (0x2UL)

#define	EMAC_MAC2_HFEN_Pos (2UL)

#define	EMAC_MAC2_HFEN_Msk (0x4UL)

#define	EMAC_MAC2_DELAYEDCRC_Pos (3UL)

#define	EMAC_MAC2_DELAYEDCRC_Msk (0x8UL)

#define	EMAC_MAC2_CRCEN_Pos (4UL)

#define	EMAC_MAC2_CRCEN_Msk (0x10UL)

#define	EMAC_MAC2_PADCRCEN_Pos (5UL)

#define	EMAC_MAC2_PADCRCEN_Msk (0x20UL)

#define	EMAC_MAC2_VLANPADEN_Pos (6UL)

#define	EMAC_MAC2_VLANPADEN_Msk (0x40UL)

#define	EMAC_MAC2_AUTODETPADEN_Pos (7UL)

#define	EMAC_MAC2_AUTODETPADEN_Msk (0x80UL)

#define	EMAC_MAC2_PPENF_Pos (8UL)

#define	EMAC_MAC2_PPENF_Msk (0x100UL)

#define	EMAC_MAC2_LPENF_Pos (9UL)

#define	EMAC_MAC2_LPENF_Msk (0x200UL)

#define	EMAC_MAC2_NOBACKOFF_Pos (12UL)

#define	EMAC_MAC2_NOBACKOFF_Msk (0x1000UL)

#define	EMAC_MAC2_BP_NOBACKOFF_Pos (13UL)

#define	EMAC_MAC2_BP_NOBACKOFF_Msk (0x2000UL)

#define	EMAC_MAC2_EXCESSDEFER_Pos (14UL)

#define	EMAC_MAC2_EXCESSDEFER_Msk (0x4000UL)

#define	EMAC_IPGT_BTOBINTEGAP_Pos (0UL)

#define	EMAC_IPGT_BTOBINTEGAP_Msk (0x7fUL)

#define	EMAC_IPGR_NBTOBINTEGAP2_Pos (0UL)

#define	EMAC_IPGR_NBTOBINTEGAP2_Msk (0x7fUL)

#define	EMAC_IPGR_NBTOBINTEGAP1_Pos (8UL)

#define	EMAC_IPGR_NBTOBINTEGAP1_Msk (0x7f00UL)

#define	EMAC_CLRT_RETRANSMAX_Pos (0UL)

#define	EMAC_CLRT_RETRANSMAX_Msk (0xfUL)

#define	EMAC_CLRT_COLLWIN_Pos (8UL)

#define	EMAC_CLRT_COLLWIN_Msk (0x3f00UL)

#define	EMAC_MAXF_MAXFLEN_Pos (0UL)

#define	EMAC_MAXF_MAXFLEN_Msk (0xffffUL)

#define	EMAC_SUPP_SPEED_Pos (8UL)

#define	EMAC_SUPP_SPEED_Msk (0x100UL)

#define	EMAC_TEST_SCPQ_Pos (0UL)

#define	EMAC_TEST_SCPQ_Msk (0x1UL)

#define	EMAC_TEST_TESTPAUSE_Pos (1UL)

#define	EMAC_TEST_TESTPAUSE_Msk (0x2UL)

#define	EMAC_TEST_TESTBP_Pos (2UL)

#define	EMAC_TEST_TESTBP_Msk (0x4UL)

#define	EMAC_MCFG_SCANINC_Pos (0UL)

#define	EMAC_MCFG_SCANINC_Msk (0x1UL)

#define	EMAC_MCFG_SUPPPREAMBLE_Pos (1UL)

#define	EMAC_MCFG_SUPPPREAMBLE_Msk (0x2UL)

#define	EMAC_MCFG_CLOCKSEL_Pos (2UL)

#define	EMAC_MCFG_CLOCKSEL_Msk (0x3cUL)

#define	EMAC_MCFG_RESETMIIMGMT_Pos (15UL)

#define	EMAC_MCFG_RESETMIIMGMT_Msk (0x8000UL)

#define	EMAC_MCMD_READ_Pos (0UL)

#define	EMAC_MCMD_READ_Msk (0x1UL)

#define	EMAC_MCMD_SCAN_Pos (1UL)

#define	EMAC_MCMD_SCAN_Msk (0x2UL)

#define	EMAC_MADR_REGADDR_Pos (0UL)

#define	EMAC_MADR_REGADDR_Msk (0x1fUL)

#define	EMAC_MADR_PHYADDR_Pos (8UL)

#define	EMAC_MADR_PHYADDR_Msk (0x1f00UL)

#define	EMAC_MWTD_WRITEDATA_Pos (0UL)

#define	EMAC_MWTD_WRITEDATA_Msk (0xffffUL)

#define	EMAC_MRDD_READDATA_Pos (0UL)

#define	EMAC_MRDD_READDATA_Msk (0xffffUL)

#define	EMAC_MIND_BUSY_Pos (0UL)

#define	EMAC_MIND_BUSY_Msk (0x1UL)

#define	EMAC_MIND_SCANNING_Pos (1UL)

#define	EMAC_MIND_SCANNING_Msk (0x2UL)

#define	EMAC_MIND_NOTVALID_Pos (2UL)

#define	EMAC_MIND_NOTVALID_Msk (0x4UL)

#define	EMAC_MIND_MIILINKFAIL_Pos (3UL)

#define	EMAC_MIND_MIILINKFAIL_Msk (0x8UL)

#define	EMAC_SA0_SADDR2_Pos (0UL)

#define	EMAC_SA0_SADDR2_Msk (0xffUL)

#define	EMAC_SA0_SADDR1_Pos (8UL)

#define	EMAC_SA0_SADDR1_Msk (0xff00UL)

#define	EMAC_SA1_SADDR4_Pos (0UL)

#define	EMAC_SA1_SADDR4_Msk (0xffUL)

#define	EMAC_SA1_SADDR3_Pos (8UL)

#define	EMAC_SA1_SADDR3_Msk (0xff00UL)

#define	EMAC_SA2_SADDR6_Pos (0UL)

#define	EMAC_SA2_SADDR6_Msk (0xffUL)

#define	EMAC_SA2_SADDR5_Pos (8UL)

#define	EMAC_SA2_SADDR5_Msk (0xff00UL)

#define	EMAC_COMMAND_RXENABLE_Pos (0UL)

#define	EMAC_COMMAND_RXENABLE_Msk (0x1UL)

#define	EMAC_COMMAND_TXENABLE_Pos (1UL)

#define	EMAC_COMMAND_TXENABLE_Msk (0x2UL)

#define	EMAC_COMMAND_REGRESET_Pos (3UL)

#define	EMAC_COMMAND_REGRESET_Msk (0x8UL)

#define	EMAC_COMMAND_TXRESET_Pos (4UL)

#define	EMAC_COMMAND_TXRESET_Msk (0x10UL)

#define	EMAC_COMMAND_RXRESET_Pos (5UL)

#define	EMAC_COMMAND_RXRESET_Msk (0x20UL)

#define	EMAC_COMMAND_PASSRUNTFRAME_Pos (6UL)

#define	EMAC_COMMAND_PASSRUNTFRAME_Msk (0x40UL)

#define	EMAC_COMMAND_PASSRXFILTER_Pos (7UL)

#define	EMAC_COMMAND_PASSRXFILTER_Msk (0x80UL)

#define	EMAC_COMMAND_TXFLOWCONTROL_Pos (8UL)

#define	EMAC_COMMAND_TXFLOWCONTROL_Msk (0x100UL)

#define	EMAC_COMMAND_RMII_Pos (9UL)

#define	EMAC_COMMAND_RMII_Msk (0x200UL)

#define	EMAC_COMMAND_FULLDUPLEX_Pos (10UL)

#define	EMAC_COMMAND_FULLDUPLEX_Msk (0x400UL)

#define	EMAC_STATUS_RXSTATUS_Pos (0UL)

#define	EMAC_STATUS_RXSTATUS_Msk (0x1UL)

#define	EMAC_STATUS_TXSTATUS_Pos (1UL)

#define	EMAC_STATUS_TXSTATUS_Msk (0x2UL)

#define	EMAC_RXDESCRIPTOR_RXDESCRIPTOR_Pos (2UL)

#define	EMAC_RXDESCRIPTOR_RXDESCRIPTOR_Msk (0xfffffffcUL)

#define	EMAC_RXSTATUS_RXSTATUS_Pos (3UL)

#define	EMAC_RXSTATUS_RXSTATUS_Msk (0xfffffff8UL)

#define	EMAC_RXDESCRIPTORNUMBER_RXDESCRIPTORN_Pos (0UL)

#define	EMAC_RXDESCRIPTORNUMBER_RXDESCRIPTORN_Msk (0xffffUL)

#define	EMAC_RXPRODUCEINDEX_RXPRODUCEIX_Pos (0UL)

#define	EMAC_RXPRODUCEINDEX_RXPRODUCEIX_Msk (0xffffUL)

#define	EMAC_RXCONSUMEINDEX_RXCONSUMEIX_Pos (0UL)

#define	EMAC_RXCONSUMEINDEX_RXCONSUMEIX_Msk (0xffffUL)

#define	EMAC_TXDESCRIPTOR_TXD_Pos (2UL)

#define	EMAC_TXDESCRIPTOR_TXD_Msk (0xfffffffcUL)

#define	EMAC_TXSTATUS_TXSTAT_Pos (2UL)

#define	EMAC_TXSTATUS_TXSTAT_Msk (0xfffffffcUL)

#define	EMAC_TXDESCRIPTORNUMBER_TXDN_Pos (0UL)

#define	EMAC_TXDESCRIPTORNUMBER_TXDN_Msk (0xffffUL)

#define	EMAC_TXPRODUCEINDEX_TXPI_Pos (0UL)

#define	EMAC_TXPRODUCEINDEX_TXPI_Msk (0xffffUL)

#define	EMAC_TXCONSUMEINDEX_TXCI_Pos (0UL)

#define	EMAC_TXCONSUMEINDEX_TXCI_Msk (0xffffUL)

#define	EMAC_TSV0_CRCERR_Pos (0UL)

#define	EMAC_TSV0_CRCERR_Msk (0x1UL)

#define	EMAC_TSV0_LCE_Pos (1UL)

#define	EMAC_TSV0_LCE_Msk (0x2UL)

#define	EMAC_TSV0_LOR_Pos (2UL)

#define	EMAC_TSV0_LOR_Msk (0x4UL)

#define	EMAC_TSV0_DONE_Pos (3UL)

#define	EMAC_TSV0_DONE_Msk (0x8UL)

#define	EMAC_TSV0_MULTICAST_Pos (4UL)

#define	EMAC_TSV0_MULTICAST_Msk (0x10UL)

#define	EMAC_TSV0_BROADCAST_Pos (5UL)

#define	EMAC_TSV0_BROADCAST_Msk (0x20UL)

#define	EMAC_TSV0_PACKETDEFER_Pos (6UL)

#define	EMAC_TSV0_PACKETDEFER_Msk (0x40UL)

#define	EMAC_TSV0_EXDF_Pos (7UL)

#define	EMAC_TSV0_EXDF_Msk (0x80UL)

#define	EMAC_TSV0_EXCOL_Pos (8UL)

#define	EMAC_TSV0_EXCOL_Msk (0x100UL)

#define	EMAC_TSV0_LCOL_Pos (9UL)

#define	EMAC_TSV0_LCOL_Msk (0x200UL)

#define	EMAC_TSV0_GIANT_Pos (10UL)

#define	EMAC_TSV0_GIANT_Msk (0x400UL)

#define	EMAC_TSV0_UNDERRUN_Pos (11UL)

#define	EMAC_TSV0_UNDERRUN_Msk (0x800UL)

#define	EMAC_TSV0_TOTALBYTES_Pos (12UL)

#define	EMAC_TSV0_TOTALBYTES_Msk (0xffff000UL)

#define	EMAC_TSV0_CONTROLFRAME_Pos (28UL)

#define	EMAC_TSV0_CONTROLFRAME_Msk (0x10000000UL)

#define	EMAC_TSV0_PAUSE_Pos (29UL)

#define	EMAC_TSV0_PAUSE_Msk (0x20000000UL)

#define	EMAC_TSV0_BACKPRESSURE_Pos (30UL)

#define	EMAC_TSV0_BACKPRESSURE_Msk (0x40000000UL)

#define	EMAC_TSV0_VLAN_Pos (31UL)

#define	EMAC_TSV0_VLAN_Msk (0x80000000UL)

#define	EMAC_TSV1_TBC_Pos (0UL)

#define	EMAC_TSV1_TBC_Msk (0xffffUL)

#define	EMAC_TSV1_TCC_Pos (16UL)

#define	EMAC_TSV1_TCC_Msk (0xf0000UL)

#define	EMAC_RSV_RBC_Pos (0UL)

#define	EMAC_RSV_RBC_Msk (0xffffUL)

#define	EMAC_RSV_PPI_Pos (16UL)

#define	EMAC_RSV_PPI_Msk (0x10000UL)

#define	EMAC_RSV_RXDVSEEN_Pos (17UL)

#define	EMAC_RSV_RXDVSEEN_Msk (0x20000UL)

#define	EMAC_RSV_CESEEN_Pos (18UL)

#define	EMAC_RSV_CESEEN_Msk (0x40000UL)

#define	EMAC_RSV_RCV_Pos (19UL)

#define	EMAC_RSV_RCV_Msk (0x80000UL)

#define	EMAC_RSV_CRCERR_Pos (20UL)

#define	EMAC_RSV_CRCERR_Msk (0x100000UL)

#define	EMAC_RSV_LCERR_Pos (21UL)

#define	EMAC_RSV_LCERR_Msk (0x200000UL)

#define	EMAC_RSV_LOR_Pos (22UL)

#define	EMAC_RSV_LOR_Msk (0x400000UL)

#define	EMAC_RSV_ROK_Pos (23UL)

#define	EMAC_RSV_ROK_Msk (0x800000UL)

#define	EMAC_RSV_MULTICAST_Pos (24UL)

#define	EMAC_RSV_MULTICAST_Msk (0x1000000UL)

#define	EMAC_RSV_BROADCAST_Pos (25UL)

#define	EMAC_RSV_BROADCAST_Msk (0x2000000UL)

#define	EMAC_RSV_DRIBBLENIBBLE_Pos (26UL)

#define	EMAC_RSV_DRIBBLENIBBLE_Msk (0x4000000UL)

#define	EMAC_RSV_CONTROLFRAME_Pos (27UL)

#define	EMAC_RSV_CONTROLFRAME_Msk (0x8000000UL)

#define	EMAC_RSV_PAUSE_Pos (28UL)

#define	EMAC_RSV_PAUSE_Msk (0x10000000UL)

#define	EMAC_RSV_UO_Pos (29UL)

#define	EMAC_RSV_UO_Msk (0x20000000UL)

#define	EMAC_RSV_VLAN_Pos (30UL)

#define	EMAC_RSV_VLAN_Msk (0x40000000UL)

#define	EMAC_FLOWCONTROLCOUNTER_MC_Pos (0UL)

#define	EMAC_FLOWCONTROLCOUNTER_MC_Msk (0xffffUL)

#define	EMAC_FLOWCONTROLCOUNTER_PT_Pos (16UL)

#define	EMAC_FLOWCONTROLCOUNTER_PT_Msk (0xffff0000UL)

#define	EMAC_FLOWCONTROLSTATUS_MCC_Pos (0UL)

#define	EMAC_FLOWCONTROLSTATUS_MCC_Msk (0xffffUL)

#define	EMAC_RXFILTERCTRL_AUE_Pos (0UL)

#define	EMAC_RXFILTERCTRL_AUE_Msk (0x1UL)

#define	EMAC_RXFILTERCTRL_ABE_Pos (1UL)

#define	EMAC_RXFILTERCTRL_ABE_Msk (0x2UL)

#define	EMAC_RXFILTERCTRL_AME_Pos (2UL)

#define	EMAC_RXFILTERCTRL_AME_Msk (0x4UL)

#define	EMAC_RXFILTERCTRL_AUHE_Pos (3UL)

#define	EMAC_RXFILTERCTRL_AUHE_Msk (0x8UL)

#define	EMAC_RXFILTERCTRL_AMHE_Pos (4UL)

#define	EMAC_RXFILTERCTRL_AMHE_Msk (0x10UL)

#define	EMAC_RXFILTERCTRL_APE_Pos (5UL)

#define	EMAC_RXFILTERCTRL_APE_Msk (0x20UL)

#define	EMAC_RXFILTERCTRL_MPEW_Pos (12UL)

#define	EMAC_RXFILTERCTRL_MPEW_Msk (0x1000UL)

#define	EMAC_RXFILTERCTRL_RFEW_Pos (13UL)

#define	EMAC_RXFILTERCTRL_RFEW_Msk (0x2000UL)

#define	EMAC_RXFILTERWOLSTATUS_AUW_Pos (0UL)

#define	EMAC_RXFILTERWOLSTATUS_AUW_Msk (0x1UL)

#define	EMAC_RXFILTERWOLSTATUS_ABW_Pos (1UL)

#define	EMAC_RXFILTERWOLSTATUS_ABW_Msk (0x2UL)

#define	EMAC_RXFILTERWOLSTATUS_AMW_Pos (2UL)

#define	EMAC_RXFILTERWOLSTATUS_AMW_Msk (0x4UL)

#define	EMAC_RXFILTERWOLSTATUS_AUHW_Pos (3UL)

#define	EMAC_RXFILTERWOLSTATUS_AUHW_Msk (0x8UL)

#define	EMAC_RXFILTERWOLSTATUS_AMHW_Pos (4UL)

#define	EMAC_RXFILTERWOLSTATUS_AMHW_Msk (0x10UL)

#define	EMAC_RXFILTERWOLSTATUS_APW_Pos (5UL)

#define	EMAC_RXFILTERWOLSTATUS_APW_Msk (0x20UL)

#define	EMAC_RXFILTERWOLSTATUS_RFW_Pos (7UL)

#define	EMAC_RXFILTERWOLSTATUS_RFW_Msk (0x80UL)

#define	EMAC_RXFILTERWOLSTATUS_MPW_Pos (8UL)

#define	EMAC_RXFILTERWOLSTATUS_MPW_Msk (0x100UL)

#define	EMAC_RXFILTERWOLCLEAR_AUWCLR_Pos (0UL)

#define	EMAC_RXFILTERWOLCLEAR_AUWCLR_Msk (0x1UL)

#define	EMAC_RXFILTERWOLCLEAR_ABWCLR_Pos (1UL)

#define	EMAC_RXFILTERWOLCLEAR_ABWCLR_Msk (0x2UL)

#define	EMAC_RXFILTERWOLCLEAR_AMWCLR_Pos (2UL)

#define	EMAC_RXFILTERWOLCLEAR_AMWCLR_Msk (0x4UL)

#define	EMAC_RXFILTERWOLCLEAR_AUHWCLR_Pos (3UL)

#define	EMAC_RXFILTERWOLCLEAR_AUHWCLR_Msk (0x8UL)

#define	EMAC_RXFILTERWOLCLEAR_AMHWCLR_Pos (4UL)

#define	EMAC_RXFILTERWOLCLEAR_AMHWCLR_Msk (0x10UL)

#define	EMAC_RXFILTERWOLCLEAR_APWCLR_Pos (5UL)

#define	EMAC_RXFILTERWOLCLEAR_APWCLR_Msk (0x20UL)

#define	EMAC_RXFILTERWOLCLEAR_RFWCLR_Pos (7UL)

#define	EMAC_RXFILTERWOLCLEAR_RFWCLR_Msk (0x80UL)

#define	EMAC_RXFILTERWOLCLEAR_MPWCLR_Pos (8UL)

#define	EMAC_RXFILTERWOLCLEAR_MPWCLR_Msk (0x100UL)

#define	EMAC_HASHFILTERL_HFL_Pos (0UL)

#define	EMAC_HASHFILTERL_HFL_Msk (0xffffffffUL)

#define	EMAC_HASHFILTERH_HFH_Pos (0UL)

#define	EMAC_HASHFILTERH_HFH_Msk (0xffffffffUL)

#define	EMAC_INTSTATUS_RXOVERRUNINT_Pos (0UL)

#define	EMAC_INTSTATUS_RXOVERRUNINT_Msk (0x1UL)

#define	EMAC_INTSTATUS_RXERRORINT_Pos (1UL)

#define	EMAC_INTSTATUS_RXERRORINT_Msk (0x2UL)

#define	EMAC_INTSTATUS_RXFINISHEDINT_Pos (2UL)

#define	EMAC_INTSTATUS_RXFINISHEDINT_Msk (0x4UL)

#define	EMAC_INTSTATUS_RXDONEINT_Pos (3UL)

#define	EMAC_INTSTATUS_RXDONEINT_Msk (0x8UL)

#define	EMAC_INTSTATUS_TXUNDERRUNINT_Pos (4UL)

#define	EMAC_INTSTATUS_TXUNDERRUNINT_Msk (0x10UL)

#define	EMAC_INTSTATUS_TXERRORINT_Pos (5UL)

#define	EMAC_INTSTATUS_TXERRORINT_Msk (0x20UL)

#define	EMAC_INTSTATUS_TXFINISHEDINT_Pos (6UL)

#define	EMAC_INTSTATUS_TXFINISHEDINT_Msk (0x40UL)

#define	EMAC_INTSTATUS_TXDONEINT_Pos (7UL)

#define	EMAC_INTSTATUS_TXDONEINT_Msk (0x80UL)

#define	EMAC_INTSTATUS_SOFTINT_Pos (12UL)

#define	EMAC_INTSTATUS_SOFTINT_Msk (0x1000UL)

#define	EMAC_INTSTATUS_WAKEUPINT_Pos (13UL)

#define	EMAC_INTSTATUS_WAKEUPINT_Msk (0x2000UL)

#define	EMAC_INTENABLE_RXOVERRUNINTEN_Pos (0UL)

#define	EMAC_INTENABLE_RXOVERRUNINTEN_Msk (0x1UL)

#define	EMAC_INTENABLE_RXERRORINTEN_Pos (1UL)

#define	EMAC_INTENABLE_RXERRORINTEN_Msk (0x2UL)

#define	EMAC_INTENABLE_RXFINISHEDINTEN_Pos (2UL)

#define	EMAC_INTENABLE_RXFINISHEDINTEN_Msk (0x4UL)

#define	EMAC_INTENABLE_RXDONEINTEN_Pos (3UL)

#define	EMAC_INTENABLE_RXDONEINTEN_Msk (0x8UL)

#define	EMAC_INTENABLE_TXUNDERRUNINTEN_Pos (4UL)

#define	EMAC_INTENABLE_TXUNDERRUNINTEN_Msk (0x10UL)

#define	EMAC_INTENABLE_TXERRORINTEN_Pos (5UL)

#define	EMAC_INTENABLE_TXERRORINTEN_Msk (0x20UL)

#define	EMAC_INTENABLE_TXFINISHEDINTEN_Pos (6UL)

#define	EMAC_INTENABLE_TXFINISHEDINTEN_Msk (0x40UL)

#define	EMAC_INTENABLE_TXDONEINTEN_Pos (7UL)

#define	EMAC_INTENABLE_TXDONEINTEN_Msk (0x80UL)

#define	EMAC_INTENABLE_SOFTINTEN_Pos (12UL)

#define	EMAC_INTENABLE_SOFTINTEN_Msk (0x1000UL)

#define	EMAC_INTENABLE_WAKEUPINTEN_Pos (13UL)

#define	EMAC_INTENABLE_WAKEUPINTEN_Msk (0x2000UL)

#define	EMAC_INTCLEAR_RXOVERRUNINTCLR_Pos (0UL)

#define	EMAC_INTCLEAR_RXOVERRUNINTCLR_Msk (0x1UL)

#define	EMAC_INTCLEAR_RXERRORINTCLR_Pos (1UL)

#define	EMAC_INTCLEAR_RXERRORINTCLR_Msk (0x2UL)

#define	EMAC_INTCLEAR_RXFINISHEDINTCLR_Pos (2UL)

#define	EMAC_INTCLEAR_RXFINISHEDINTCLR_Msk (0x4UL)

#define	EMAC_INTCLEAR_RXDONEINTCLR_Pos (3UL)

#define	EMAC_INTCLEAR_RXDONEINTCLR_Msk (0x8UL)

#define	EMAC_INTCLEAR_TXUNDERRUNINTCLR_Pos (4UL)

#define	EMAC_INTCLEAR_TXUNDERRUNINTCLR_Msk (0x10UL)

#define	EMAC_INTCLEAR_TXERRORINTCLR_Pos (5UL)

#define	EMAC_INTCLEAR_TXERRORINTCLR_Msk (0x20UL)

#define	EMAC_INTCLEAR_TXFINISHEDINTCLR_Pos (6UL)

#define	EMAC_INTCLEAR_TXFINISHEDINTCLR_Msk (0x40UL)

#define	EMAC_INTCLEAR_TXDONEINTCLR_Pos (7UL)

#define	EMAC_INTCLEAR_TXDONEINTCLR_Msk (0x80UL)

#define	EMAC_INTCLEAR_SOFTINTCLR_Pos (12UL)

#define	EMAC_INTCLEAR_SOFTINTCLR_Msk (0x1000UL)

#define	EMAC_INTCLEAR_WAKEUPINTCLR_Pos (13UL)

#define	EMAC_INTCLEAR_WAKEUPINTCLR_Msk (0x2000UL)

#define	EMAC_INTSET_RXOVERRUNINTSET_Pos (0UL)

#define	EMAC_INTSET_RXOVERRUNINTSET_Msk (0x1UL)

#define	EMAC_INTSET_RXERRORINTSET_Pos (1UL)

#define	EMAC_INTSET_RXERRORINTSET_Msk (0x2UL)

#define	EMAC_INTSET_RXFINISHEDINTSET_Pos (2UL)

#define	EMAC_INTSET_RXFINISHEDINTSET_Msk (0x4UL)

#define	EMAC_INTSET_RXDONEINTSET_Pos (3UL)

#define	EMAC_INTSET_RXDONEINTSET_Msk (0x8UL)

#define	EMAC_INTSET_TXUNDERRUNINTSET_Pos (4UL)

#define	EMAC_INTSET_TXUNDERRUNINTSET_Msk (0x10UL)

#define	EMAC_INTSET_TXERRORINTSET_Pos (5UL)

#define	EMAC_INTSET_TXERRORINTSET_Msk (0x20UL)

#define	EMAC_INTSET_TXFINISHEDINTSET_Pos (6UL)

#define	EMAC_INTSET_TXFINISHEDINTSET_Msk (0x40UL)

#define	EMAC_INTSET_TXDONEINTSET_Pos (7UL)

#define	EMAC_INTSET_TXDONEINTSET_Msk (0x80UL)

#define	EMAC_INTSET_SOFTINTSET_Pos (12UL)

#define	EMAC_INTSET_SOFTINTSET_Msk (0x1000UL)

#define	EMAC_INTSET_WAKEUPINTSET_Pos (13UL)

#define	EMAC_INTSET_WAKEUPINTSET_Msk (0x2000UL)

#define	EMAC_POWERDOWN_PD_Pos (31UL)

#define	EMAC_POWERDOWN_PD_Msk (0x80000000UL)

#define	GPDMA_INTSTAT_INTSTAT0_Pos (0UL)

#define	GPDMA_INTSTAT_INTSTAT0_Msk (0x1UL)

#define	GPDMA_INTSTAT_INTSTAT1_Pos (1UL)

#define	GPDMA_INTSTAT_INTSTAT1_Msk (0x2UL)

#define	GPDMA_INTSTAT_INTSTAT2_Pos (2UL)

#define	GPDMA_INTSTAT_INTSTAT2_Msk (0x4UL)

#define	GPDMA_INTSTAT_INTSTAT3_Pos (3UL)

#define	GPDMA_INTSTAT_INTSTAT3_Msk (0x8UL)

#define	GPDMA_INTSTAT_INTSTAT4_Pos (4UL)

#define	GPDMA_INTSTAT_INTSTAT4_Msk (0x10UL)

#define	GPDMA_INTSTAT_INTSTAT5_Pos (5UL)

#define	GPDMA_INTSTAT_INTSTAT5_Msk (0x20UL)

#define	GPDMA_INTSTAT_INTSTAT6_Pos (6UL)

#define	GPDMA_INTSTAT_INTSTAT6_Msk (0x40UL)

#define	GPDMA_INTSTAT_INTSTAT7_Pos (7UL)

#define	GPDMA_INTSTAT_INTSTAT7_Msk (0x80UL)

#define	GPDMA_INTTCSTAT_INTTCSTAT0_Pos (0UL)

#define	GPDMA_INTTCSTAT_INTTCSTAT0_Msk (0x1UL)

#define	GPDMA_INTTCSTAT_INTTCSTAT1_Pos (1UL)

#define	GPDMA_INTTCSTAT_INTTCSTAT1_Msk (0x2UL)

#define	GPDMA_INTTCSTAT_INTTCSTAT2_Pos (2UL)

#define	GPDMA_INTTCSTAT_INTTCSTAT2_Msk (0x4UL)

#define	GPDMA_INTTCSTAT_INTTCSTAT3_Pos (3UL)

#define	GPDMA_INTTCSTAT_INTTCSTAT3_Msk (0x8UL)

#define	GPDMA_INTTCSTAT_INTTCSTAT4_Pos (4UL)

#define	GPDMA_INTTCSTAT_INTTCSTAT4_Msk (0x10UL)

#define	GPDMA_INTTCSTAT_INTTCSTAT5_Pos (5UL)

#define	GPDMA_INTTCSTAT_INTTCSTAT5_Msk (0x20UL)

#define	GPDMA_INTTCSTAT_INTTCSTAT6_Pos (6UL)

#define	GPDMA_INTTCSTAT_INTTCSTAT6_Msk (0x40UL)

#define	GPDMA_INTTCSTAT_INTTCSTAT7_Pos (7UL)

#define	GPDMA_INTTCSTAT_INTTCSTAT7_Msk (0x80UL)

#define	GPDMA_INTTCCLEAR_INTTCCLEAR0_Pos (0UL)

#define	GPDMA_INTTCCLEAR_INTTCCLEAR0_Msk (0x1UL)

#define	GPDMA_INTTCCLEAR_INTTCCLEAR1_Pos (1UL)

#define	GPDMA_INTTCCLEAR_INTTCCLEAR1_Msk (0x2UL)

#define	GPDMA_INTTCCLEAR_INTTCCLEAR2_Pos (2UL)

#define	GPDMA_INTTCCLEAR_INTTCCLEAR2_Msk (0x4UL)

#define	GPDMA_INTTCCLEAR_INTTCCLEAR3_Pos (3UL)

#define	GPDMA_INTTCCLEAR_INTTCCLEAR3_Msk (0x8UL)

#define	GPDMA_INTTCCLEAR_INTTCCLEAR4_Pos (4UL)

#define	GPDMA_INTTCCLEAR_INTTCCLEAR4_Msk (0x10UL)

#define	GPDMA_INTTCCLEAR_INTTCCLEAR5_Pos (5UL)

#define	GPDMA_INTTCCLEAR_INTTCCLEAR5_Msk (0x20UL)

#define	GPDMA_INTTCCLEAR_INTTCCLEAR6_Pos (6UL)

#define	GPDMA_INTTCCLEAR_INTTCCLEAR6_Msk (0x40UL)

#define	GPDMA_INTTCCLEAR_INTTCCLEAR7_Pos (7UL)

#define	GPDMA_INTTCCLEAR_INTTCCLEAR7_Msk (0x80UL)

#define	GPDMA_INTERRSTAT_INTERRSTAT0_Pos (0UL)

#define	GPDMA_INTERRSTAT_INTERRSTAT0_Msk (0x1UL)

#define	GPDMA_INTERRSTAT_INTERRSTAT1_Pos (1UL)

#define	GPDMA_INTERRSTAT_INTERRSTAT1_Msk (0x2UL)

#define	GPDMA_INTERRSTAT_INTERRSTAT2_Pos (2UL)

#define	GPDMA_INTERRSTAT_INTERRSTAT2_Msk (0x4UL)

#define	GPDMA_INTERRSTAT_INTERRSTAT3_Pos (3UL)

#define	GPDMA_INTERRSTAT_INTERRSTAT3_Msk (0x8UL)

#define	GPDMA_INTERRSTAT_INTERRSTAT4_Pos (4UL)

#define	GPDMA_INTERRSTAT_INTERRSTAT4_Msk (0x10UL)

#define	GPDMA_INTERRSTAT_INTERRSTAT5_Pos (5UL)

#define	GPDMA_INTERRSTAT_INTERRSTAT5_Msk (0x20UL)

#define	GPDMA_INTERRSTAT_INTERRSTAT6_Pos (6UL)

#define	GPDMA_INTERRSTAT_INTERRSTAT6_Msk (0x40UL)

#define	GPDMA_INTERRSTAT_INTERRSTAT7_Pos (7UL)

#define	GPDMA_INTERRSTAT_INTERRSTAT7_Msk (0x80UL)

#define	GPDMA_INTERRCLR_INTERRCLR0_Pos (0UL)

#define	GPDMA_INTERRCLR_INTERRCLR0_Msk (0x1UL)

#define	GPDMA_INTERRCLR_INTERRCLR1_Pos (1UL)

#define	GPDMA_INTERRCLR_INTERRCLR1_Msk (0x2UL)

#define	GPDMA_INTERRCLR_INTERRCLR2_Pos (2UL)

#define	GPDMA_INTERRCLR_INTERRCLR2_Msk (0x4UL)

#define	GPDMA_INTERRCLR_INTERRCLR3_Pos (3UL)

#define	GPDMA_INTERRCLR_INTERRCLR3_Msk (0x8UL)

#define	GPDMA_INTERRCLR_INTERRCLR4_Pos (4UL)

#define	GPDMA_INTERRCLR_INTERRCLR4_Msk (0x10UL)

#define	GPDMA_INTERRCLR_INTERRCLR5_Pos (5UL)

#define	GPDMA_INTERRCLR_INTERRCLR5_Msk (0x20UL)

#define	GPDMA_INTERRCLR_INTERRCLR6_Pos (6UL)

#define	GPDMA_INTERRCLR_INTERRCLR6_Msk (0x40UL)

#define	GPDMA_INTERRCLR_INTERRCLR7_Pos (7UL)

#define	GPDMA_INTERRCLR_INTERRCLR7_Msk (0x80UL)

#define	GPDMA_RAWINTTCSTAT_RAWINTTCSTAT0_Pos (0UL)

#define	GPDMA_RAWINTTCSTAT_RAWINTTCSTAT0_Msk (0x1UL)

#define	GPDMA_RAWINTTCSTAT_RAWINTTCSTAT1_Pos (1UL)

#define	GPDMA_RAWINTTCSTAT_RAWINTTCSTAT1_Msk (0x2UL)

#define	GPDMA_RAWINTTCSTAT_RAWINTTCSTAT2_Pos (2UL)

#define	GPDMA_RAWINTTCSTAT_RAWINTTCSTAT2_Msk (0x4UL)

#define	GPDMA_RAWINTTCSTAT_RAWINTTCSTAT3_Pos (3UL)

#define	GPDMA_RAWINTTCSTAT_RAWINTTCSTAT3_Msk (0x8UL)

#define	GPDMA_RAWINTTCSTAT_RAWINTTCSTAT4_Pos (4UL)

#define	GPDMA_RAWINTTCSTAT_RAWINTTCSTAT4_Msk (0x10UL)

#define	GPDMA_RAWINTTCSTAT_RAWINTTCSTAT5_Pos (5UL)

#define	GPDMA_RAWINTTCSTAT_RAWINTTCSTAT5_Msk (0x20UL)

#define	GPDMA_RAWINTTCSTAT_RAWINTTCSTAT6_Pos (6UL)

#define	GPDMA_RAWINTTCSTAT_RAWINTTCSTAT6_Msk (0x40UL)

#define	GPDMA_RAWINTTCSTAT_RAWINTTCSTAT7_Pos (7UL)

#define	GPDMA_RAWINTTCSTAT_RAWINTTCSTAT7_Msk (0x80UL)

#define	GPDMA_RAWINTERRSTAT_RAWINTERRSTAT0_Pos (0UL)

#define	GPDMA_RAWINTERRSTAT_RAWINTERRSTAT0_Msk (0x1UL)

#define	GPDMA_RAWINTERRSTAT_RAWINTERRSTAT1_Pos (1UL)

#define	GPDMA_RAWINTERRSTAT_RAWINTERRSTAT1_Msk (0x2UL)

#define	GPDMA_RAWINTERRSTAT_RAWINTERRSTAT2_Pos (2UL)

#define	GPDMA_RAWINTERRSTAT_RAWINTERRSTAT2_Msk (0x4UL)

#define	GPDMA_RAWINTERRSTAT_RAWINTERRSTAT3_Pos (3UL)

#define	GPDMA_RAWINTERRSTAT_RAWINTERRSTAT3_Msk (0x8UL)

#define	GPDMA_RAWINTERRSTAT_RAWINTERRSTAT4_Pos (4UL)

#define	GPDMA_RAWINTERRSTAT_RAWINTERRSTAT4_Msk (0x10UL)

#define	GPDMA_RAWINTERRSTAT_RAWINTERRSTAT5_Pos (5UL)

#define	GPDMA_RAWINTERRSTAT_RAWINTERRSTAT5_Msk (0x20UL)

#define	GPDMA_RAWINTERRSTAT_RAWINTERRSTAT6_Pos (6UL)

#define	GPDMA_RAWINTERRSTAT_RAWINTERRSTAT6_Msk (0x40UL)

#define	GPDMA_RAWINTERRSTAT_RAWINTERRSTAT7_Pos (7UL)

#define	GPDMA_RAWINTERRSTAT_RAWINTERRSTAT7_Msk (0x80UL)

#define	GPDMA_ENBLDCHNS_ENABLEDCHANNELS0_Pos (0UL)

#define	GPDMA_ENBLDCHNS_ENABLEDCHANNELS0_Msk (0x1UL)

#define	GPDMA_ENBLDCHNS_ENABLEDCHANNELS1_Pos (1UL)

#define	GPDMA_ENBLDCHNS_ENABLEDCHANNELS1_Msk (0x2UL)

#define	GPDMA_ENBLDCHNS_ENABLEDCHANNELS2_Pos (2UL)

#define	GPDMA_ENBLDCHNS_ENABLEDCHANNELS2_Msk (0x4UL)

#define	GPDMA_ENBLDCHNS_ENABLEDCHANNELS3_Pos (3UL)

#define	GPDMA_ENBLDCHNS_ENABLEDCHANNELS3_Msk (0x8UL)

#define	GPDMA_ENBLDCHNS_ENABLEDCHANNELS4_Pos (4UL)

#define	GPDMA_ENBLDCHNS_ENABLEDCHANNELS4_Msk (0x10UL)

#define	GPDMA_ENBLDCHNS_ENABLEDCHANNELS5_Pos (5UL)

#define	GPDMA_ENBLDCHNS_ENABLEDCHANNELS5_Msk (0x20UL)

#define	GPDMA_ENBLDCHNS_ENABLEDCHANNELS6_Pos (6UL)

#define	GPDMA_ENBLDCHNS_ENABLEDCHANNELS6_Msk (0x40UL)

#define	GPDMA_ENBLDCHNS_ENABLEDCHANNELS7_Pos (7UL)

#define	GPDMA_ENBLDCHNS_ENABLEDCHANNELS7_Msk (0x80UL)

#define	GPDMA_SOFTBREQ_SOFTBREQ0_Pos (0UL)

#define	GPDMA_SOFTBREQ_SOFTBREQ0_Msk (0x1UL)

#define	GPDMA_SOFTBREQ_SOFTBREQ1_Pos (1UL)

#define	GPDMA_SOFTBREQ_SOFTBREQ1_Msk (0x2UL)

#define	GPDMA_SOFTBREQ_SOFTBREQ2_Pos (2UL)

#define	GPDMA_SOFTBREQ_SOFTBREQ2_Msk (0x4UL)

#define	GPDMA_SOFTBREQ_SOFTBREQ3_Pos (3UL)

#define	GPDMA_SOFTBREQ_SOFTBREQ3_Msk (0x8UL)

#define	GPDMA_SOFTBREQ_SOFTBREQ4_Pos (4UL)

#define	GPDMA_SOFTBREQ_SOFTBREQ4_Msk (0x10UL)

#define	GPDMA_SOFTBREQ_SOFTBREQ5_Pos (5UL)

#define	GPDMA_SOFTBREQ_SOFTBREQ5_Msk (0x20UL)

#define	GPDMA_SOFTBREQ_SOFTBREQ6_Pos (6UL)

#define	GPDMA_SOFTBREQ_SOFTBREQ6_Msk (0x40UL)

#define	GPDMA_SOFTBREQ_SOFTBREQ7_Pos (7UL)

#define	GPDMA_SOFTBREQ_SOFTBREQ7_Msk (0x80UL)

#define	GPDMA_SOFTBREQ_SOFTBREQ8_Pos (8UL)

#define	GPDMA_SOFTBREQ_SOFTBREQ8_Msk (0x100UL)

#define	GPDMA_SOFTBREQ_SOFTBREQ9_Pos (9UL)

#define	GPDMA_SOFTBREQ_SOFTBREQ9_Msk (0x200UL)

#define	GPDMA_SOFTBREQ_SOFTBREQ10_Pos (10UL)

#define	GPDMA_SOFTBREQ_SOFTBREQ10_Msk (0x400UL)

#define	GPDMA_SOFTBREQ_SOFTBREQ11_Pos (11UL)

#define	GPDMA_SOFTBREQ_SOFTBREQ11_Msk (0x800UL)

#define	GPDMA_SOFTBREQ_SOFTBREQ12_Pos (12UL)

#define	GPDMA_SOFTBREQ_SOFTBREQ12_Msk (0x1000UL)

#define	GPDMA_SOFTBREQ_SOFTBREQ13_Pos (13UL)

#define	GPDMA_SOFTBREQ_SOFTBREQ13_Msk (0x2000UL)

#define	GPDMA_SOFTBREQ_SOFTBREQ14_Pos (14UL)

#define	GPDMA_SOFTBREQ_SOFTBREQ14_Msk (0x4000UL)

#define	GPDMA_SOFTBREQ_SOFTBREQ15_Pos (15UL)

#define	GPDMA_SOFTBREQ_SOFTBREQ15_Msk (0x8000UL)

#define	GPDMA_SOFTSREQ_SOFTSREQ0_Pos (0UL)

#define	GPDMA_SOFTSREQ_SOFTSREQ0_Msk (0x1UL)

#define	GPDMA_SOFTSREQ_SOFTSREQ1_Pos (1UL)

#define	GPDMA_SOFTSREQ_SOFTSREQ1_Msk (0x2UL)

#define	GPDMA_SOFTSREQ_SOFTSREQ2_Pos (2UL)

#define	GPDMA_SOFTSREQ_SOFTSREQ2_Msk (0x4UL)

#define	GPDMA_SOFTSREQ_SOFTSREQ3_Pos (3UL)

#define	GPDMA_SOFTSREQ_SOFTSREQ3_Msk (0x8UL)

#define	GPDMA_SOFTSREQ_SOFTSREQ4_Pos (4UL)

#define	GPDMA_SOFTSREQ_SOFTSREQ4_Msk (0x10UL)

#define	GPDMA_SOFTSREQ_SOFTSREQ5_Pos (5UL)

#define	GPDMA_SOFTSREQ_SOFTSREQ5_Msk (0x20UL)

#define	GPDMA_SOFTSREQ_SOFTSREQ6_Pos (6UL)

#define	GPDMA_SOFTSREQ_SOFTSREQ6_Msk (0x40UL)

#define	GPDMA_SOFTSREQ_SOFTSREQ7_Pos (7UL)

#define	GPDMA_SOFTSREQ_SOFTSREQ7_Msk (0x80UL)

#define	GPDMA_SOFTSREQ_SOFTSREQ8_Pos (8UL)

#define	GPDMA_SOFTSREQ_SOFTSREQ8_Msk (0x100UL)

#define	GPDMA_SOFTSREQ_SOFTSREQ9_Pos (9UL)

#define	GPDMA_SOFTSREQ_SOFTSREQ9_Msk (0x200UL)

#define	GPDMA_SOFTSREQ_SOFTSREQ10_Pos (10UL)

#define	GPDMA_SOFTSREQ_SOFTSREQ10_Msk (0x400UL)

#define	GPDMA_SOFTSREQ_SOFTSREQ11_Pos (11UL)

#define	GPDMA_SOFTSREQ_SOFTSREQ11_Msk (0x800UL)

#define	GPDMA_SOFTSREQ_SOFTSREQ12_Pos (12UL)

#define	GPDMA_SOFTSREQ_SOFTSREQ12_Msk (0x1000UL)

#define	GPDMA_SOFTSREQ_SOFTSREQ13_Pos (13UL)

#define	GPDMA_SOFTSREQ_SOFTSREQ13_Msk (0x2000UL)

#define	GPDMA_SOFTSREQ_SOFTSREQ14_Pos (14UL)

#define	GPDMA_SOFTSREQ_SOFTSREQ14_Msk (0x4000UL)

#define	GPDMA_SOFTSREQ_SOFTSREQ15_Pos (15UL)

#define	GPDMA_SOFTSREQ_SOFTSREQ15_Msk (0x8000UL)

#define	GPDMA_SOFTLBREQ_SOFTLBREQ0_Pos (0UL)

#define	GPDMA_SOFTLBREQ_SOFTLBREQ0_Msk (0x1UL)

#define	GPDMA_SOFTLBREQ_SOFTLBREQ1_Pos (1UL)

#define	GPDMA_SOFTLBREQ_SOFTLBREQ1_Msk (0x2UL)

#define	GPDMA_SOFTLBREQ_SOFTLBREQ2_Pos (2UL)

#define	GPDMA_SOFTLBREQ_SOFTLBREQ2_Msk (0x4UL)

#define	GPDMA_SOFTLBREQ_SOFTLBREQ3_Pos (3UL)

#define	GPDMA_SOFTLBREQ_SOFTLBREQ3_Msk (0x8UL)

#define	GPDMA_SOFTLBREQ_SOFTLBREQ4_Pos (4UL)

#define	GPDMA_SOFTLBREQ_SOFTLBREQ4_Msk (0x10UL)

#define	GPDMA_SOFTLBREQ_SOFTLBREQ5_Pos (5UL)

#define	GPDMA_SOFTLBREQ_SOFTLBREQ5_Msk (0x20UL)

#define	GPDMA_SOFTLBREQ_SOFTLBREQ6_Pos (6UL)

#define	GPDMA_SOFTLBREQ_SOFTLBREQ6_Msk (0x40UL)

#define	GPDMA_SOFTLBREQ_SOFTLBREQ7_Pos (7UL)

#define	GPDMA_SOFTLBREQ_SOFTLBREQ7_Msk (0x80UL)

#define	GPDMA_SOFTLBREQ_SOFTLBREQ8_Pos (8UL)

#define	GPDMA_SOFTLBREQ_SOFTLBREQ8_Msk (0x100UL)

#define	GPDMA_SOFTLBREQ_SOFTLBREQ9_Pos (9UL)

#define	GPDMA_SOFTLBREQ_SOFTLBREQ9_Msk (0x200UL)

#define	GPDMA_SOFTLBREQ_SOFTLBREQ10_Pos (10UL)

#define	GPDMA_SOFTLBREQ_SOFTLBREQ10_Msk (0x400UL)

#define	GPDMA_SOFTLBREQ_SOFTLBREQ11_Pos (11UL)

#define	GPDMA_SOFTLBREQ_SOFTLBREQ11_Msk (0x800UL)

#define	GPDMA_SOFTLBREQ_SOFTLBREQ12_Pos (12UL)

#define	GPDMA_SOFTLBREQ_SOFTLBREQ12_Msk (0x1000UL)

#define	GPDMA_SOFTLBREQ_SOFTLBREQ13_Pos (13UL)

#define	GPDMA_SOFTLBREQ_SOFTLBREQ13_Msk (0x2000UL)

#define	GPDMA_SOFTLBREQ_SOFTLBREQ14_Pos (14UL)

#define	GPDMA_SOFTLBREQ_SOFTLBREQ14_Msk (0x4000UL)

#define	GPDMA_SOFTLBREQ_SOFTLBREQ15_Pos (15UL)

#define	GPDMA_SOFTLBREQ_SOFTLBREQ15_Msk (0x8000UL)

#define	GPDMA_SOFTLSREQ_SOFTLSREQ0_Pos (0UL)

#define	GPDMA_SOFTLSREQ_SOFTLSREQ0_Msk (0x1UL)

#define	GPDMA_SOFTLSREQ_SOFTLSREQ1_Pos (1UL)

#define	GPDMA_SOFTLSREQ_SOFTLSREQ1_Msk (0x2UL)

#define	GPDMA_SOFTLSREQ_SOFTLSREQ2_Pos (2UL)

#define	GPDMA_SOFTLSREQ_SOFTLSREQ2_Msk (0x4UL)

#define	GPDMA_SOFTLSREQ_SOFTLSREQ3_Pos (3UL)

#define	GPDMA_SOFTLSREQ_SOFTLSREQ3_Msk (0x8UL)

#define	GPDMA_SOFTLSREQ_SOFTLSREQ4_Pos (4UL)

#define	GPDMA_SOFTLSREQ_SOFTLSREQ4_Msk (0x10UL)

#define	GPDMA_SOFTLSREQ_SOFTLSREQ5_Pos (5UL)

#define	GPDMA_SOFTLSREQ_SOFTLSREQ5_Msk (0x20UL)

#define	GPDMA_SOFTLSREQ_SOFTLSREQ6_Pos (6UL)

#define	GPDMA_SOFTLSREQ_SOFTLSREQ6_Msk (0x40UL)

#define	GPDMA_SOFTLSREQ_SOFTLSREQ7_Pos (7UL)

#define	GPDMA_SOFTLSREQ_SOFTLSREQ7_Msk (0x80UL)

#define	GPDMA_SOFTLSREQ_SOFTLSREQ8_Pos (8UL)

#define	GPDMA_SOFTLSREQ_SOFTLSREQ8_Msk (0x100UL)

#define	GPDMA_SOFTLSREQ_SOFTLSREQ9_Pos (9UL)

#define	GPDMA_SOFTLSREQ_SOFTLSREQ9_Msk (0x200UL)

#define	GPDMA_SOFTLSREQ_SOFTLSREQ10_Pos (10UL)

#define	GPDMA_SOFTLSREQ_SOFTLSREQ10_Msk (0x400UL)

#define	GPDMA_SOFTLSREQ_SOFTLSREQ11_Pos (11UL)

#define	GPDMA_SOFTLSREQ_SOFTLSREQ11_Msk (0x800UL)

#define	GPDMA_SOFTLSREQ_SOFTLSREQ12_Pos (12UL)

#define	GPDMA_SOFTLSREQ_SOFTLSREQ12_Msk (0x1000UL)

#define	GPDMA_SOFTLSREQ_SOFTLSREQ13_Pos (13UL)

#define	GPDMA_SOFTLSREQ_SOFTLSREQ13_Msk (0x2000UL)

#define	GPDMA_SOFTLSREQ_SOFTLSREQ14_Pos (14UL)

#define	GPDMA_SOFTLSREQ_SOFTLSREQ14_Msk (0x4000UL)

#define	GPDMA_SOFTLSREQ_SOFTLSREQ15_Pos (15UL)

#define	GPDMA_SOFTLSREQ_SOFTLSREQ15_Msk (0x8000UL)

#define	GPDMA_CONFIG_E_Pos (0UL)

#define	GPDMA_CONFIG_E_Msk (0x1UL)

#define	GPDMA_CONFIG_M_Pos (1UL)

#define	GPDMA_CONFIG_M_Msk (0x2UL)

#define	GPDMA_SYNC_DMACSYNC0_Pos (0UL)

#define	GPDMA_SYNC_DMACSYNC0_Msk (0x1UL)

#define	GPDMA_SYNC_DMACSYNC1_Pos (1UL)

#define	GPDMA_SYNC_DMACSYNC1_Msk (0x2UL)

#define	GPDMA_SYNC_DMACSYNC2_Pos (2UL)

#define	GPDMA_SYNC_DMACSYNC2_Msk (0x4UL)

#define	GPDMA_SYNC_DMACSYNC3_Pos (3UL)

#define	GPDMA_SYNC_DMACSYNC3_Msk (0x8UL)

#define	GPDMA_SYNC_DMACSYNC4_Pos (4UL)

#define	GPDMA_SYNC_DMACSYNC4_Msk (0x10UL)

#define	GPDMA_SYNC_DMACSYNC5_Pos (5UL)

#define	GPDMA_SYNC_DMACSYNC5_Msk (0x20UL)

#define	GPDMA_SYNC_DMACSYNC6_Pos (6UL)

#define	GPDMA_SYNC_DMACSYNC6_Msk (0x40UL)

#define	GPDMA_SYNC_DMACSYNC7_Pos (7UL)

#define	GPDMA_SYNC_DMACSYNC7_Msk (0x80UL)

#define	GPDMA_SYNC_DMACSYNC8_Pos (8UL)

#define	GPDMA_SYNC_DMACSYNC8_Msk (0x100UL)

#define	GPDMA_SYNC_DMACSYNC9_Pos (9UL)

#define	GPDMA_SYNC_DMACSYNC9_Msk (0x200UL)

#define	GPDMA_SYNC_DMACSYNC10_Pos (10UL)

#define	GPDMA_SYNC_DMACSYNC10_Msk (0x400UL)

#define	GPDMA_SYNC_DMACSYNC11_Pos (11UL)

#define	GPDMA_SYNC_DMACSYNC11_Msk (0x800UL)

#define	GPDMA_SYNC_DMACSYNC12_Pos (12UL)

#define	GPDMA_SYNC_DMACSYNC12_Msk (0x1000UL)

#define	GPDMA_SYNC_DMACSYNC13_Pos (13UL)

#define	GPDMA_SYNC_DMACSYNC13_Msk (0x2000UL)

#define	GPDMA_SYNC_DMACSYNC14_Pos (14UL)

#define	GPDMA_SYNC_DMACSYNC14_Msk (0x4000UL)

#define	GPDMA_SYNC_DMACSYNC15_Pos (15UL)

#define	GPDMA_SYNC_DMACSYNC15_Msk (0x8000UL)

#define	GPDMA_SRCADDR0_SRCADDR_Pos (0UL)

#define	GPDMA_SRCADDR0_SRCADDR_Msk (0xffffffffUL)

#define	GPDMA_SRCADDR1_SRCADDR_Pos (0UL)

#define	GPDMA_SRCADDR1_SRCADDR_Msk (0xffffffffUL)

#define	GPDMA_SRCADDR2_SRCADDR_Pos (0UL)

#define	GPDMA_SRCADDR2_SRCADDR_Msk (0xffffffffUL)

#define	GPDMA_SRCADDR3_SRCADDR_Pos (0UL)

#define	GPDMA_SRCADDR3_SRCADDR_Msk (0xffffffffUL)

#define	GPDMA_SRCADDR4_SRCADDR_Pos (0UL)

#define	GPDMA_SRCADDR4_SRCADDR_Msk (0xffffffffUL)

#define	GPDMA_SRCADDR5_SRCADDR_Pos (0UL)

#define	GPDMA_SRCADDR5_SRCADDR_Msk (0xffffffffUL)

#define	GPDMA_SRCADDR6_SRCADDR_Pos (0UL)

#define	GPDMA_SRCADDR6_SRCADDR_Msk (0xffffffffUL)

#define	GPDMA_SRCADDR7_SRCADDR_Pos (0UL)

#define	GPDMA_SRCADDR7_SRCADDR_Msk (0xffffffffUL)

#define	GPDMA_DESTADDR0_DESTADDR_Pos (0UL)

#define	GPDMA_DESTADDR0_DESTADDR_Msk (0xffffffffUL)

#define	GPDMA_DESTADDR1_DESTADDR_Pos (0UL)

#define	GPDMA_DESTADDR1_DESTADDR_Msk (0xffffffffUL)

#define	GPDMA_DESTADDR2_DESTADDR_Pos (0UL)

#define	GPDMA_DESTADDR2_DESTADDR_Msk (0xffffffffUL)

#define	GPDMA_DESTADDR3_DESTADDR_Pos (0UL)

#define	GPDMA_DESTADDR3_DESTADDR_Msk (0xffffffffUL)

#define	GPDMA_DESTADDR4_DESTADDR_Pos (0UL)

#define	GPDMA_DESTADDR4_DESTADDR_Msk (0xffffffffUL)

#define	GPDMA_DESTADDR5_DESTADDR_Pos (0UL)

#define	GPDMA_DESTADDR5_DESTADDR_Msk (0xffffffffUL)

#define	GPDMA_DESTADDR6_DESTADDR_Pos (0UL)

#define	GPDMA_DESTADDR6_DESTADDR_Msk (0xffffffffUL)

#define	GPDMA_DESTADDR7_DESTADDR_Pos (0UL)

#define	GPDMA_DESTADDR7_DESTADDR_Msk (0xffffffffUL)

#define	GPDMA_LLI0_LLI_Pos (2UL)

#define	GPDMA_LLI0_LLI_Msk (0xfffffffcUL)

#define	GPDMA_LLI1_LLI_Pos (2UL)

#define	GPDMA_LLI1_LLI_Msk (0xfffffffcUL)

#define	GPDMA_LLI2_LLI_Pos (2UL)

#define	GPDMA_LLI2_LLI_Msk (0xfffffffcUL)

#define	GPDMA_LLI3_LLI_Pos (2UL)

#define	GPDMA_LLI3_LLI_Msk (0xfffffffcUL)

#define	GPDMA_LLI4_LLI_Pos (2UL)

#define	GPDMA_LLI4_LLI_Msk (0xfffffffcUL)

#define	GPDMA_LLI5_LLI_Pos (2UL)

#define	GPDMA_LLI5_LLI_Msk (0xfffffffcUL)

#define	GPDMA_LLI6_LLI_Pos (2UL)

#define	GPDMA_LLI6_LLI_Msk (0xfffffffcUL)

#define	GPDMA_LLI7_LLI_Pos (2UL)

#define	GPDMA_LLI7_LLI_Msk (0xfffffffcUL)

#define	GPDMA_CONTROL0_TRANSFERSIZE_Pos (0UL)

#define	GPDMA_CONTROL0_TRANSFERSIZE_Msk (0xfffUL)

#define	GPDMA_CONTROL0_SBSIZE_Pos (12UL)

#define	GPDMA_CONTROL0_SBSIZE_Msk (0x7000UL)

#define	GPDMA_CONTROL0_DBSIZE_Pos (15UL)

#define	GPDMA_CONTROL0_DBSIZE_Msk (0x38000UL)

#define	GPDMA_CONTROL0_SWIDTH_Pos (18UL)

#define	GPDMA_CONTROL0_SWIDTH_Msk (0x1c0000UL)

#define	GPDMA_CONTROL0_DWIDTH_Pos (21UL)

#define	GPDMA_CONTROL0_DWIDTH_Msk (0xe00000UL)

#define	GPDMA_CONTROL0_SI_Pos (26UL)

#define	GPDMA_CONTROL0_SI_Msk (0x4000000UL)

#define	GPDMA_CONTROL0_DI_Pos (27UL)

#define	GPDMA_CONTROL0_DI_Msk (0x8000000UL)

#define	GPDMA_CONTROL0_PROT1_Pos (28UL)

#define	GPDMA_CONTROL0_PROT1_Msk (0x10000000UL)

#define	GPDMA_CONTROL0_PROT2_Pos (29UL)

#define	GPDMA_CONTROL0_PROT2_Msk (0x20000000UL)

#define	GPDMA_CONTROL0_PROT3_Pos (30UL)

#define	GPDMA_CONTROL0_PROT3_Msk (0x40000000UL)

#define	GPDMA_CONTROL0_I_Pos (31UL)

#define	GPDMA_CONTROL0_I_Msk (0x80000000UL)

#define	GPDMA_CONTROL1_TRANSFERSIZE_Pos (0UL)

#define	GPDMA_CONTROL1_TRANSFERSIZE_Msk (0xfffUL)

#define	GPDMA_CONTROL1_SBSIZE_Pos (12UL)

#define	GPDMA_CONTROL1_SBSIZE_Msk (0x7000UL)

#define	GPDMA_CONTROL1_DBSIZE_Pos (15UL)

#define	GPDMA_CONTROL1_DBSIZE_Msk (0x38000UL)

#define	GPDMA_CONTROL1_SWIDTH_Pos (18UL)

#define	GPDMA_CONTROL1_SWIDTH_Msk (0x1c0000UL)

#define	GPDMA_CONTROL1_DWIDTH_Pos (21UL)

#define	GPDMA_CONTROL1_DWIDTH_Msk (0xe00000UL)

#define	GPDMA_CONTROL1_SI_Pos (26UL)

#define	GPDMA_CONTROL1_SI_Msk (0x4000000UL)

#define	GPDMA_CONTROL1_DI_Pos (27UL)

#define	GPDMA_CONTROL1_DI_Msk (0x8000000UL)

#define	GPDMA_CONTROL1_PROT1_Pos (28UL)

#define	GPDMA_CONTROL1_PROT1_Msk (0x10000000UL)

#define	GPDMA_CONTROL1_PROT2_Pos (29UL)

#define	GPDMA_CONTROL1_PROT2_Msk (0x20000000UL)

#define	GPDMA_CONTROL1_PROT3_Pos (30UL)

#define	GPDMA_CONTROL1_PROT3_Msk (0x40000000UL)

#define	GPDMA_CONTROL1_I_Pos (31UL)

#define	GPDMA_CONTROL1_I_Msk (0x80000000UL)

#define	GPDMA_CONTROL2_TRANSFERSIZE_Pos (0UL)

#define	GPDMA_CONTROL2_TRANSFERSIZE_Msk (0xfffUL)

#define	GPDMA_CONTROL2_SBSIZE_Pos (12UL)

#define	GPDMA_CONTROL2_SBSIZE_Msk (0x7000UL)

#define	GPDMA_CONTROL2_DBSIZE_Pos (15UL)

#define	GPDMA_CONTROL2_DBSIZE_Msk (0x38000UL)

#define	GPDMA_CONTROL2_SWIDTH_Pos (18UL)

#define	GPDMA_CONTROL2_SWIDTH_Msk (0x1c0000UL)

#define	GPDMA_CONTROL2_DWIDTH_Pos (21UL)

#define	GPDMA_CONTROL2_DWIDTH_Msk (0xe00000UL)

#define	GPDMA_CONTROL2_SI_Pos (26UL)

#define	GPDMA_CONTROL2_SI_Msk (0x4000000UL)

#define	GPDMA_CONTROL2_DI_Pos (27UL)

#define	GPDMA_CONTROL2_DI_Msk (0x8000000UL)

#define	GPDMA_CONTROL2_PROT1_Pos (28UL)

#define	GPDMA_CONTROL2_PROT1_Msk (0x10000000UL)

#define	GPDMA_CONTROL2_PROT2_Pos (29UL)

#define	GPDMA_CONTROL2_PROT2_Msk (0x20000000UL)

#define	GPDMA_CONTROL2_PROT3_Pos (30UL)

#define	GPDMA_CONTROL2_PROT3_Msk (0x40000000UL)

#define	GPDMA_CONTROL2_I_Pos (31UL)

#define	GPDMA_CONTROL2_I_Msk (0x80000000UL)

#define	GPDMA_CONTROL3_TRANSFERSIZE_Pos (0UL)

#define	GPDMA_CONTROL3_TRANSFERSIZE_Msk (0xfffUL)

#define	GPDMA_CONTROL3_SBSIZE_Pos (12UL)

#define	GPDMA_CONTROL3_SBSIZE_Msk (0x7000UL)

#define	GPDMA_CONTROL3_DBSIZE_Pos (15UL)

#define	GPDMA_CONTROL3_DBSIZE_Msk (0x38000UL)

#define	GPDMA_CONTROL3_SWIDTH_Pos (18UL)

#define	GPDMA_CONTROL3_SWIDTH_Msk (0x1c0000UL)

#define	GPDMA_CONTROL3_DWIDTH_Pos (21UL)

#define	GPDMA_CONTROL3_DWIDTH_Msk (0xe00000UL)

#define	GPDMA_CONTROL3_SI_Pos (26UL)

#define	GPDMA_CONTROL3_SI_Msk (0x4000000UL)

#define	GPDMA_CONTROL3_DI_Pos (27UL)

#define	GPDMA_CONTROL3_DI_Msk (0x8000000UL)

#define	GPDMA_CONTROL3_PROT1_Pos (28UL)

#define	GPDMA_CONTROL3_PROT1_Msk (0x10000000UL)

#define	GPDMA_CONTROL3_PROT2_Pos (29UL)

#define	GPDMA_CONTROL3_PROT2_Msk (0x20000000UL)

#define	GPDMA_CONTROL3_PROT3_Pos (30UL)

#define	GPDMA_CONTROL3_PROT3_Msk (0x40000000UL)

#define	GPDMA_CONTROL3_I_Pos (31UL)

#define	GPDMA_CONTROL3_I_Msk (0x80000000UL)

#define	GPDMA_CONTROL4_TRANSFERSIZE_Pos (0UL)

#define	GPDMA_CONTROL4_TRANSFERSIZE_Msk (0xfffUL)

#define	GPDMA_CONTROL4_SBSIZE_Pos (12UL)

#define	GPDMA_CONTROL4_SBSIZE_Msk (0x7000UL)

#define	GPDMA_CONTROL4_DBSIZE_Pos (15UL)

#define	GPDMA_CONTROL4_DBSIZE_Msk (0x38000UL)

#define	GPDMA_CONTROL4_SWIDTH_Pos (18UL)

#define	GPDMA_CONTROL4_SWIDTH_Msk (0x1c0000UL)

#define	GPDMA_CONTROL4_DWIDTH_Pos (21UL)

#define	GPDMA_CONTROL4_DWIDTH_Msk (0xe00000UL)

#define	GPDMA_CONTROL4_SI_Pos (26UL)

#define	GPDMA_CONTROL4_SI_Msk (0x4000000UL)

#define	GPDMA_CONTROL4_DI_Pos (27UL)

#define	GPDMA_CONTROL4_DI_Msk (0x8000000UL)

#define	GPDMA_CONTROL4_PROT1_Pos (28UL)

#define	GPDMA_CONTROL4_PROT1_Msk (0x10000000UL)

#define	GPDMA_CONTROL4_PROT2_Pos (29UL)

#define	GPDMA_CONTROL4_PROT2_Msk (0x20000000UL)

#define	GPDMA_CONTROL4_PROT3_Pos (30UL)

#define	GPDMA_CONTROL4_PROT3_Msk (0x40000000UL)

#define	GPDMA_CONTROL4_I_Pos (31UL)

#define	GPDMA_CONTROL4_I_Msk (0x80000000UL)

#define	GPDMA_CONTROL5_TRANSFERSIZE_Pos (0UL)

#define	GPDMA_CONTROL5_TRANSFERSIZE_Msk (0xfffUL)

#define	GPDMA_CONTROL5_SBSIZE_Pos (12UL)

#define	GPDMA_CONTROL5_SBSIZE_Msk (0x7000UL)

#define	GPDMA_CONTROL5_DBSIZE_Pos (15UL)

#define	GPDMA_CONTROL5_DBSIZE_Msk (0x38000UL)

#define	GPDMA_CONTROL5_SWIDTH_Pos (18UL)

#define	GPDMA_CONTROL5_SWIDTH_Msk (0x1c0000UL)

#define	GPDMA_CONTROL5_DWIDTH_Pos (21UL)

#define	GPDMA_CONTROL5_DWIDTH_Msk (0xe00000UL)

#define	GPDMA_CONTROL5_SI_Pos (26UL)

#define	GPDMA_CONTROL5_SI_Msk (0x4000000UL)

#define	GPDMA_CONTROL5_DI_Pos (27UL)

#define	GPDMA_CONTROL5_DI_Msk (0x8000000UL)

#define	GPDMA_CONTROL5_PROT1_Pos (28UL)

#define	GPDMA_CONTROL5_PROT1_Msk (0x10000000UL)

#define	GPDMA_CONTROL5_PROT2_Pos (29UL)

#define	GPDMA_CONTROL5_PROT2_Msk (0x20000000UL)

#define	GPDMA_CONTROL5_PROT3_Pos (30UL)

#define	GPDMA_CONTROL5_PROT3_Msk (0x40000000UL)

#define	GPDMA_CONTROL5_I_Pos (31UL)

#define	GPDMA_CONTROL5_I_Msk (0x80000000UL)

#define	GPDMA_CONTROL6_TRANSFERSIZE_Pos (0UL)

#define	GPDMA_CONTROL6_TRANSFERSIZE_Msk (0xfffUL)

#define	GPDMA_CONTROL6_SBSIZE_Pos (12UL)

#define	GPDMA_CONTROL6_SBSIZE_Msk (0x7000UL)

#define	GPDMA_CONTROL6_DBSIZE_Pos (15UL)

#define	GPDMA_CONTROL6_DBSIZE_Msk (0x38000UL)

#define	GPDMA_CONTROL6_SWIDTH_Pos (18UL)

#define	GPDMA_CONTROL6_SWIDTH_Msk (0x1c0000UL)

#define	GPDMA_CONTROL6_DWIDTH_Pos (21UL)

#define	GPDMA_CONTROL6_DWIDTH_Msk (0xe00000UL)

#define	GPDMA_CONTROL6_SI_Pos (26UL)

#define	GPDMA_CONTROL6_SI_Msk (0x4000000UL)

#define	GPDMA_CONTROL6_DI_Pos (27UL)

#define	GPDMA_CONTROL6_DI_Msk (0x8000000UL)

#define	GPDMA_CONTROL6_PROT1_Pos (28UL)

#define	GPDMA_CONTROL6_PROT1_Msk (0x10000000UL)

#define	GPDMA_CONTROL6_PROT2_Pos (29UL)

#define	GPDMA_CONTROL6_PROT2_Msk (0x20000000UL)

#define	GPDMA_CONTROL6_PROT3_Pos (30UL)

#define	GPDMA_CONTROL6_PROT3_Msk (0x40000000UL)

#define	GPDMA_CONTROL6_I_Pos (31UL)

#define	GPDMA_CONTROL6_I_Msk (0x80000000UL)

#define	GPDMA_CONTROL7_TRANSFERSIZE_Pos (0UL)

#define	GPDMA_CONTROL7_TRANSFERSIZE_Msk (0xfffUL)

#define	GPDMA_CONTROL7_SBSIZE_Pos (12UL)

#define	GPDMA_CONTROL7_SBSIZE_Msk (0x7000UL)

#define	GPDMA_CONTROL7_DBSIZE_Pos (15UL)

#define	GPDMA_CONTROL7_DBSIZE_Msk (0x38000UL)

#define	GPDMA_CONTROL7_SWIDTH_Pos (18UL)

#define	GPDMA_CONTROL7_SWIDTH_Msk (0x1c0000UL)

#define	GPDMA_CONTROL7_DWIDTH_Pos (21UL)

#define	GPDMA_CONTROL7_DWIDTH_Msk (0xe00000UL)

#define	GPDMA_CONTROL7_SI_Pos (26UL)

#define	GPDMA_CONTROL7_SI_Msk (0x4000000UL)

#define	GPDMA_CONTROL7_DI_Pos (27UL)

#define	GPDMA_CONTROL7_DI_Msk (0x8000000UL)

#define	GPDMA_CONTROL7_PROT1_Pos (28UL)

#define	GPDMA_CONTROL7_PROT1_Msk (0x10000000UL)

#define	GPDMA_CONTROL7_PROT2_Pos (29UL)

#define	GPDMA_CONTROL7_PROT2_Msk (0x20000000UL)

#define	GPDMA_CONTROL7_PROT3_Pos (30UL)

#define	GPDMA_CONTROL7_PROT3_Msk (0x40000000UL)

#define	GPDMA_CONTROL7_I_Pos (31UL)

#define	GPDMA_CONTROL7_I_Msk (0x80000000UL)

#define	GPDMA_CONFIG0_E_Pos (0UL)

#define	GPDMA_CONFIG0_E_Msk (0x1UL)

#define	GPDMA_CONFIG0_SRCPERIPHERAL_Pos (1UL)

#define	GPDMA_CONFIG0_SRCPERIPHERAL_Msk (0x3eUL)

#define	GPDMA_CONFIG0_DESTPERIPHERAL_Pos (6UL)

#define	GPDMA_CONFIG0_DESTPERIPHERAL_Msk (0x7c0UL)

#define	GPDMA_CONFIG0_TRANSFERTYPE_Pos (11UL)

#define	GPDMA_CONFIG0_TRANSFERTYPE_Msk (0x3800UL)

#define	GPDMA_CONFIG0_IE_Pos (14UL)

#define	GPDMA_CONFIG0_IE_Msk (0x4000UL)

#define	GPDMA_CONFIG0_ITC_Pos (15UL)

#define	GPDMA_CONFIG0_ITC_Msk (0x8000UL)

#define	GPDMA_CONFIG0_L_Pos (16UL)

#define	GPDMA_CONFIG0_L_Msk (0x10000UL)

#define	GPDMA_CONFIG0_A_Pos (17UL)

#define	GPDMA_CONFIG0_A_Msk (0x20000UL)

#define	GPDMA_CONFIG0_H_Pos (18UL)

#define	GPDMA_CONFIG0_H_Msk (0x40000UL)

#define	GPDMA_CONFIG1_E_Pos (0UL)

#define	GPDMA_CONFIG1_E_Msk (0x1UL)

#define	GPDMA_CONFIG1_SRCPERIPHERAL_Pos (1UL)

#define	GPDMA_CONFIG1_SRCPERIPHERAL_Msk (0x3eUL)

#define	GPDMA_CONFIG1_DESTPERIPHERAL_Pos (6UL)

#define	GPDMA_CONFIG1_DESTPERIPHERAL_Msk (0x7c0UL)

#define	GPDMA_CONFIG1_TRANSFERTYPE_Pos (11UL)

#define	GPDMA_CONFIG1_TRANSFERTYPE_Msk (0x3800UL)

#define	GPDMA_CONFIG1_IE_Pos (14UL)

#define	GPDMA_CONFIG1_IE_Msk (0x4000UL)

#define	GPDMA_CONFIG1_ITC_Pos (15UL)

#define	GPDMA_CONFIG1_ITC_Msk (0x8000UL)

#define	GPDMA_CONFIG1_L_Pos (16UL)

#define	GPDMA_CONFIG1_L_Msk (0x10000UL)

#define	GPDMA_CONFIG1_A_Pos (17UL)

#define	GPDMA_CONFIG1_A_Msk (0x20000UL)

#define	GPDMA_CONFIG1_H_Pos (18UL)

#define	GPDMA_CONFIG1_H_Msk (0x40000UL)

#define	GPDMA_CONFIG2_E_Pos (0UL)

#define	GPDMA_CONFIG2_E_Msk (0x1UL)

#define	GPDMA_CONFIG2_SRCPERIPHERAL_Pos (1UL)

#define	GPDMA_CONFIG2_SRCPERIPHERAL_Msk (0x3eUL)

#define	GPDMA_CONFIG2_DESTPERIPHERAL_Pos (6UL)

#define	GPDMA_CONFIG2_DESTPERIPHERAL_Msk (0x7c0UL)

#define	GPDMA_CONFIG2_TRANSFERTYPE_Pos (11UL)

#define	GPDMA_CONFIG2_TRANSFERTYPE_Msk (0x3800UL)

#define	GPDMA_CONFIG2_IE_Pos (14UL)

#define	GPDMA_CONFIG2_IE_Msk (0x4000UL)

#define	GPDMA_CONFIG2_ITC_Pos (15UL)

#define	GPDMA_CONFIG2_ITC_Msk (0x8000UL)

#define	GPDMA_CONFIG2_L_Pos (16UL)

#define	GPDMA_CONFIG2_L_Msk (0x10000UL)

#define	GPDMA_CONFIG2_A_Pos (17UL)

#define	GPDMA_CONFIG2_A_Msk (0x20000UL)

#define	GPDMA_CONFIG2_H_Pos (18UL)

#define	GPDMA_CONFIG2_H_Msk (0x40000UL)

#define	GPDMA_CONFIG3_E_Pos (0UL)

#define	GPDMA_CONFIG3_E_Msk (0x1UL)

#define	GPDMA_CONFIG3_SRCPERIPHERAL_Pos (1UL)

#define	GPDMA_CONFIG3_SRCPERIPHERAL_Msk (0x3eUL)

#define	GPDMA_CONFIG3_DESTPERIPHERAL_Pos (6UL)

#define	GPDMA_CONFIG3_DESTPERIPHERAL_Msk (0x7c0UL)

#define	GPDMA_CONFIG3_TRANSFERTYPE_Pos (11UL)

#define	GPDMA_CONFIG3_TRANSFERTYPE_Msk (0x3800UL)

#define	GPDMA_CONFIG3_IE_Pos (14UL)

#define	GPDMA_CONFIG3_IE_Msk (0x4000UL)

#define	GPDMA_CONFIG3_ITC_Pos (15UL)

#define	GPDMA_CONFIG3_ITC_Msk (0x8000UL)

#define	GPDMA_CONFIG3_L_Pos (16UL)

#define	GPDMA_CONFIG3_L_Msk (0x10000UL)

#define	GPDMA_CONFIG3_A_Pos (17UL)

#define	GPDMA_CONFIG3_A_Msk (0x20000UL)

#define	GPDMA_CONFIG3_H_Pos (18UL)

#define	GPDMA_CONFIG3_H_Msk (0x40000UL)

#define	GPDMA_CONFIG4_E_Pos (0UL)

#define	GPDMA_CONFIG4_E_Msk (0x1UL)

#define	GPDMA_CONFIG4_SRCPERIPHERAL_Pos (1UL)

#define	GPDMA_CONFIG4_SRCPERIPHERAL_Msk (0x3eUL)

#define	GPDMA_CONFIG4_DESTPERIPHERAL_Pos (6UL)

#define	GPDMA_CONFIG4_DESTPERIPHERAL_Msk (0x7c0UL)

#define	GPDMA_CONFIG4_TRANSFERTYPE_Pos (11UL)

#define	GPDMA_CONFIG4_TRANSFERTYPE_Msk (0x3800UL)

#define	GPDMA_CONFIG4_IE_Pos (14UL)

#define	GPDMA_CONFIG4_IE_Msk (0x4000UL)

#define	GPDMA_CONFIG4_ITC_Pos (15UL)

#define	GPDMA_CONFIG4_ITC_Msk (0x8000UL)

#define	GPDMA_CONFIG4_L_Pos (16UL)

#define	GPDMA_CONFIG4_L_Msk (0x10000UL)

#define	GPDMA_CONFIG4_A_Pos (17UL)

#define	GPDMA_CONFIG4_A_Msk (0x20000UL)

#define	GPDMA_CONFIG4_H_Pos (18UL)

#define	GPDMA_CONFIG4_H_Msk (0x40000UL)

#define	GPDMA_CONFIG5_E_Pos (0UL)

#define	GPDMA_CONFIG5_E_Msk (0x1UL)

#define	GPDMA_CONFIG5_SRCPERIPHERAL_Pos (1UL)

#define	GPDMA_CONFIG5_SRCPERIPHERAL_Msk (0x3eUL)

#define	GPDMA_CONFIG5_DESTPERIPHERAL_Pos (6UL)

#define	GPDMA_CONFIG5_DESTPERIPHERAL_Msk (0x7c0UL)

#define	GPDMA_CONFIG5_TRANSFERTYPE_Pos (11UL)

#define	GPDMA_CONFIG5_TRANSFERTYPE_Msk (0x3800UL)

#define	GPDMA_CONFIG5_IE_Pos (14UL)

#define	GPDMA_CONFIG5_IE_Msk (0x4000UL)

#define	GPDMA_CONFIG5_ITC_Pos (15UL)

#define	GPDMA_CONFIG5_ITC_Msk (0x8000UL)

#define	GPDMA_CONFIG5_L_Pos (16UL)

#define	GPDMA_CONFIG5_L_Msk (0x10000UL)

#define	GPDMA_CONFIG5_A_Pos (17UL)

#define	GPDMA_CONFIG5_A_Msk (0x20000UL)

#define	GPDMA_CONFIG5_H_Pos (18UL)

#define	GPDMA_CONFIG5_H_Msk (0x40000UL)

#define	GPDMA_CONFIG6_E_Pos (0UL)

#define	GPDMA_CONFIG6_E_Msk (0x1UL)

#define	GPDMA_CONFIG6_SRCPERIPHERAL_Pos (1UL)

#define	GPDMA_CONFIG6_SRCPERIPHERAL_Msk (0x3eUL)

#define	GPDMA_CONFIG6_DESTPERIPHERAL_Pos (6UL)

#define	GPDMA_CONFIG6_DESTPERIPHERAL_Msk (0x7c0UL)

#define	GPDMA_CONFIG6_TRANSFERTYPE_Pos (11UL)

#define	GPDMA_CONFIG6_TRANSFERTYPE_Msk (0x3800UL)

#define	GPDMA_CONFIG6_IE_Pos (14UL)

#define	GPDMA_CONFIG6_IE_Msk (0x4000UL)

#define	GPDMA_CONFIG6_ITC_Pos (15UL)

#define	GPDMA_CONFIG6_ITC_Msk (0x8000UL)

#define	GPDMA_CONFIG6_L_Pos (16UL)

#define	GPDMA_CONFIG6_L_Msk (0x10000UL)

#define	GPDMA_CONFIG6_A_Pos (17UL)

#define	GPDMA_CONFIG6_A_Msk (0x20000UL)

#define	GPDMA_CONFIG6_H_Pos (18UL)

#define	GPDMA_CONFIG6_H_Msk (0x40000UL)

#define	GPDMA_CONFIG7_E_Pos (0UL)

#define	GPDMA_CONFIG7_E_Msk (0x1UL)

#define	GPDMA_CONFIG7_SRCPERIPHERAL_Pos (1UL)

#define	GPDMA_CONFIG7_SRCPERIPHERAL_Msk (0x3eUL)

#define	GPDMA_CONFIG7_DESTPERIPHERAL_Pos (6UL)

#define	GPDMA_CONFIG7_DESTPERIPHERAL_Msk (0x7c0UL)

#define	GPDMA_CONFIG7_TRANSFERTYPE_Pos (11UL)

#define	GPDMA_CONFIG7_TRANSFERTYPE_Msk (0x3800UL)

#define	GPDMA_CONFIG7_IE_Pos (14UL)

#define	GPDMA_CONFIG7_IE_Msk (0x4000UL)

#define	GPDMA_CONFIG7_ITC_Pos (15UL)

#define	GPDMA_CONFIG7_ITC_Msk (0x8000UL)

#define	GPDMA_CONFIG7_L_Pos (16UL)

#define	GPDMA_CONFIG7_L_Msk (0x10000UL)

#define	GPDMA_CONFIG7_A_Pos (17UL)

#define	GPDMA_CONFIG7_A_Msk (0x20000UL)

#define	GPDMA_CONFIG7_H_Pos (18UL)

#define	GPDMA_CONFIG7_H_Msk (0x40000UL)

#define	USB_INTST_TMR_Pos (0UL)

#define	USB_INTST_TMR_Msk (0x1UL)

#define	USB_INTST_REMOVE_PU_Pos (1UL)

#define	USB_INTST_REMOVE_PU_Msk (0x2UL)

#define	USB_INTST_HNP_FAILURE_Pos (2UL)

#define	USB_INTST_HNP_FAILURE_Msk (0x4UL)

#define	USB_INTST_HNP_SUCCESS_Pos (3UL)

#define	USB_INTST_HNP_SUCCESS_Msk (0x8UL)

#define	USB_INTEN_TMR_EN_Pos (0UL)

#define	USB_INTEN_TMR_EN_Msk (0x1UL)

#define	USB_INTEN_REMOVE_PU_EN_Pos (1UL)

#define	USB_INTEN_REMOVE_PU_EN_Msk (0x2UL)

#define	USB_INTEN_HNP_FAILURE_EN_Pos (2UL)

#define	USB_INTEN_HNP_FAILURE_EN_Msk (0x4UL)

#define	USB_INTEN_HNP_SUCCES_EN_Pos (3UL)

#define	USB_INTEN_HNP_SUCCES_EN_Msk (0x8UL)

#define	USB_INTSET_TMR_SET_Pos (0UL)

#define	USB_INTSET_TMR_SET_Msk (0x1UL)

#define	USB_INTSET_REMOVE_PU_SET_Pos (1UL)

#define	USB_INTSET_REMOVE_PU_SET_Msk (0x2UL)

#define	USB_INTSET_HNP_FAILURE_SET_Pos (2UL)

#define	USB_INTSET_HNP_FAILURE_SET_Msk (0x4UL)

#define	USB_INTSET_HNP_SUCCES_SET_Pos (3UL)

#define	USB_INTSET_HNP_SUCCES_SET_Msk (0x8UL)

#define	USB_INTCLR_TMR_CLR_Pos (0UL)

#define	USB_INTCLR_TMR_CLR_Msk (0x1UL)

#define	USB_INTCLR_REMOVE_PU_CLR_Pos (1UL)

#define	USB_INTCLR_REMOVE_PU_CLR_Msk (0x2UL)

#define	USB_INTCLR_HNP_FAILURE_CLR_Pos (2UL)

#define	USB_INTCLR_HNP_FAILURE_CLR_Msk (0x4UL)

#define	USB_INTCLR_HNP_SUCCES_CLR_Pos (3UL)

#define	USB_INTCLR_HNP_SUCCES_CLR_Msk (0x8UL)

#define	USB_STCTRL_PORT_FUNC_Pos (0UL)

#define	USB_STCTRL_PORT_FUNC_Msk (0x3UL)

#define	USB_STCTRL_TMR_SCALE_Pos (2UL)

#define	USB_STCTRL_TMR_SCALE_Msk (0xcUL)

#define	USB_STCTRL_TMR_MODE_Pos (4UL)

#define	USB_STCTRL_TMR_MODE_Msk (0x10UL)

#define	USB_STCTRL_TMR_EN_Pos (5UL)

#define	USB_STCTRL_TMR_EN_Msk (0x20UL)

#define	USB_STCTRL_TMR_RST_Pos (6UL)

#define	USB_STCTRL_TMR_RST_Msk (0x40UL)

#define	USB_STCTRL_B_HNP_TRACK_Pos (8UL)

#define	USB_STCTRL_B_HNP_TRACK_Msk (0x100UL)

#define	USB_STCTRL_A_HNP_TRACK_Pos (9UL)

#define	USB_STCTRL_A_HNP_TRACK_Msk (0x200UL)

#define	USB_STCTRL_PU_REMOVED_Pos (10UL)

#define	USB_STCTRL_PU_REMOVED_Msk (0x400UL)

#define	USB_STCTRL_TMR_CNT_Pos (16UL)

#define	USB_STCTRL_TMR_CNT_Msk (0xffff0000UL)

#define	USB_TMR_TIMEOUT_CNT_Pos (0UL)

#define	USB_TMR_TIMEOUT_CNT_Msk (0xffffUL)

#define	USB_DEVINTST_FRAME_Pos (0UL)

#define	USB_DEVINTST_FRAME_Msk (0x1UL)

#define	USB_DEVINTST_EP_FAST_Pos (1UL)

#define	USB_DEVINTST_EP_FAST_Msk (0x2UL)

#define	USB_DEVINTST_EP_SLOW_Pos (2UL)

#define	USB_DEVINTST_EP_SLOW_Msk (0x4UL)

#define	USB_DEVINTST_DEV_STAT_Pos (3UL)

#define	USB_DEVINTST_DEV_STAT_Msk (0x8UL)

#define	USB_DEVINTST_CCEMPTY_Pos (4UL)

#define	USB_DEVINTST_CCEMPTY_Msk (0x10UL)

#define	USB_DEVINTST_CDFULL_Pos (5UL)

#define	USB_DEVINTST_CDFULL_Msk (0x20UL)

#define	USB_DEVINTST_RxENDPKT_Pos (6UL)

#define	USB_DEVINTST_RxENDPKT_Msk (0x40UL)

#define	USB_DEVINTST_TxENDPKT_Pos (7UL)

#define	USB_DEVINTST_TxENDPKT_Msk (0x80UL)

#define	USB_DEVINTST_EP_RLZED_Pos (8UL)

#define	USB_DEVINTST_EP_RLZED_Msk (0x100UL)

#define	USB_DEVINTST_ERR_INT_Pos (9UL)

#define	USB_DEVINTST_ERR_INT_Msk (0x200UL)

#define	USB_DEVINTEN_FRAMEEN_Pos (0UL)

#define	USB_DEVINTEN_FRAMEEN_Msk (0x1UL)

#define	USB_DEVINTEN_EP_FASTEN_Pos (1UL)

#define	USB_DEVINTEN_EP_FASTEN_Msk (0x2UL)

#define	USB_DEVINTEN_EP_SLOWEN_Pos (2UL)

#define	USB_DEVINTEN_EP_SLOWEN_Msk (0x4UL)

#define	USB_DEVINTEN_DEV_STATEN_Pos (3UL)

#define	USB_DEVINTEN_DEV_STATEN_Msk (0x8UL)

#define	USB_DEVINTEN_CCEMPTYEN_Pos (4UL)

#define	USB_DEVINTEN_CCEMPTYEN_Msk (0x10UL)

#define	USB_DEVINTEN_CDFULLEN_Pos (5UL)

#define	USB_DEVINTEN_CDFULLEN_Msk (0x20UL)

#define	USB_DEVINTEN_RxENDPKTEN_Pos (6UL)

#define	USB_DEVINTEN_RxENDPKTEN_Msk (0x40UL)

#define	USB_DEVINTEN_TxENDPKTEN_Pos (7UL)

#define	USB_DEVINTEN_TxENDPKTEN_Msk (0x80UL)

#define	USB_DEVINTEN_EP_RLZEDEN_Pos (8UL)

#define	USB_DEVINTEN_EP_RLZEDEN_Msk (0x100UL)

#define	USB_DEVINTEN_ERR_INTEN_Pos (9UL)

#define	USB_DEVINTEN_ERR_INTEN_Msk (0x200UL)

#define	USB_DEVINTCLR_FRAMECLR_Pos (0UL)

#define	USB_DEVINTCLR_FRAMECLR_Msk (0x1UL)

#define	USB_DEVINTCLR_EP_FASTCLR_Pos (1UL)

#define	USB_DEVINTCLR_EP_FASTCLR_Msk (0x2UL)

#define	USB_DEVINTCLR_EP_SLOWCLR_Pos (2UL)

#define	USB_DEVINTCLR_EP_SLOWCLR_Msk (0x4UL)

#define	USB_DEVINTCLR_DEV_STATCLR_Pos (3UL)

#define	USB_DEVINTCLR_DEV_STATCLR_Msk (0x8UL)

#define	USB_DEVINTCLR_CCEMPTYCLR_Pos (4UL)

#define	USB_DEVINTCLR_CCEMPTYCLR_Msk (0x10UL)

#define	USB_DEVINTCLR_CDFULLCLR_Pos (5UL)

#define	USB_DEVINTCLR_CDFULLCLR_Msk (0x20UL)

#define	USB_DEVINTCLR_RxENDPKTCLR_Pos (6UL)

#define	USB_DEVINTCLR_RxENDPKTCLR_Msk (0x40UL)

#define	USB_DEVINTCLR_TxENDPKTCLR_Pos (7UL)

#define	USB_DEVINTCLR_TxENDPKTCLR_Msk (0x80UL)

#define	USB_DEVINTCLR_EP_RLZEDCLR_Pos (8UL)

#define	USB_DEVINTCLR_EP_RLZEDCLR_Msk (0x100UL)

#define	USB_DEVINTCLR_ERR_INTCLR_Pos (9UL)

#define	USB_DEVINTCLR_ERR_INTCLR_Msk (0x200UL)

#define	USB_DEVINTSET_FRAMESET_Pos (0UL)

#define	USB_DEVINTSET_FRAMESET_Msk (0x1UL)

#define	USB_DEVINTSET_EP_FASTSET_Pos (1UL)

#define	USB_DEVINTSET_EP_FASTSET_Msk (0x2UL)

#define	USB_DEVINTSET_EP_SLOWSET_Pos (2UL)

#define	USB_DEVINTSET_EP_SLOWSET_Msk (0x4UL)

#define	USB_DEVINTSET_DEV_STATSET_Pos (3UL)

#define	USB_DEVINTSET_DEV_STATSET_Msk (0x8UL)

#define	USB_DEVINTSET_CCEMPTYSET_Pos (4UL)

#define	USB_DEVINTSET_CCEMPTYSET_Msk (0x10UL)

#define	USB_DEVINTSET_CDFULLSET_Pos (5UL)

#define	USB_DEVINTSET_CDFULLSET_Msk (0x20UL)

#define	USB_DEVINTSET_RxENDPKTSET_Pos (6UL)

#define	USB_DEVINTSET_RxENDPKTSET_Msk (0x40UL)

#define	USB_DEVINTSET_TxENDPKTSET_Pos (7UL)

#define	USB_DEVINTSET_TxENDPKTSET_Msk (0x80UL)

#define	USB_DEVINTSET_EP_RLZEDSET_Pos (8UL)

#define	USB_DEVINTSET_EP_RLZEDSET_Msk (0x100UL)

#define	USB_DEVINTSET_ERR_INTSET_Pos (9UL)

#define	USB_DEVINTSET_ERR_INTSET_Msk (0x200UL)

#define	USB_CMDCODE_CMD_PHASE_Pos (8UL)

#define	USB_CMDCODE_CMD_PHASE_Msk (0xff00UL)

#define	USB_CMDCODE_CMD_CODE_WDATA_Pos (16UL)

#define	USB_CMDCODE_CMD_CODE_WDATA_Msk (0xff0000UL)

#define	USB_CMDDATA_CMD_RDATA_Pos (0UL)

#define	USB_CMDDATA_CMD_RDATA_Msk (0xffUL)

#define	USB_RXDATA_RX_DATA_Pos (0UL)

#define	USB_RXDATA_RX_DATA_Msk (0xffffffffUL)

#define	USB_TXDATA_TX_DATA_Pos (0UL)

#define	USB_TXDATA_TX_DATA_Msk (0xffffffffUL)

#define	USB_RXPLEN_PKT_LNGTH_Pos (0UL)

#define	USB_RXPLEN_PKT_LNGTH_Msk (0x3ffUL)

#define	USB_RXPLEN_DV_Pos (10UL)

#define	USB_RXPLEN_DV_Msk (0x400UL)

#define	USB_RXPLEN_PKT_RDY_Pos (11UL)

#define	USB_RXPLEN_PKT_RDY_Msk (0x800UL)

#define	USB_TXPLEN_PKT_LNGTH_Pos (0UL)

#define	USB_TXPLEN_PKT_LNGTH_Msk (0x3ffUL)

#define	USB_CTRL_RD_EN_Pos (0UL)

#define	USB_CTRL_RD_EN_Msk (0x1UL)

#define	USB_CTRL_WR_EN_Pos (1UL)

#define	USB_CTRL_WR_EN_Msk (0x2UL)

#define	USB_CTRL_LOG_ENDPOINT_Pos (2UL)

#define	USB_CTRL_LOG_ENDPOINT_Msk (0x3cUL)

#define	USB_DEVINTPRI_FRAME_Pos (0UL)

#define	USB_DEVINTPRI_FRAME_Msk (0x1UL)

#define	USB_DEVINTPRI_EP_FAST_Pos (1UL)

#define	USB_DEVINTPRI_EP_FAST_Msk (0x2UL)

#define	USB_EPINTST_EPST0_Pos (0UL)

#define	USB_EPINTST_EPST0_Msk (0x1UL)

#define	USB_EPINTST_EPST1_Pos (1UL)

#define	USB_EPINTST_EPST1_Msk (0x2UL)

#define	USB_EPINTST_EPST2_Pos (2UL)

#define	USB_EPINTST_EPST2_Msk (0x4UL)

#define	USB_EPINTST_EPST3_Pos (3UL)

#define	USB_EPINTST_EPST3_Msk (0x8UL)

#define	USB_EPINTST_EPST4_Pos (4UL)

#define	USB_EPINTST_EPST4_Msk (0x10UL)

#define	USB_EPINTST_EPST5_Pos (5UL)

#define	USB_EPINTST_EPST5_Msk (0x20UL)

#define	USB_EPINTST_EPST6_Pos (6UL)

#define	USB_EPINTST_EPST6_Msk (0x40UL)

#define	USB_EPINTST_EPST7_Pos (7UL)

#define	USB_EPINTST_EPST7_Msk (0x80UL)

#define	USB_EPINTST_EPST8_Pos (8UL)

#define	USB_EPINTST_EPST8_Msk (0x100UL)

#define	USB_EPINTST_EPST9_Pos (9UL)

#define	USB_EPINTST_EPST9_Msk (0x200UL)

#define	USB_EPINTST_EPST10_Pos (10UL)

#define	USB_EPINTST_EPST10_Msk (0x400UL)

#define	USB_EPINTST_EPST11_Pos (11UL)

#define	USB_EPINTST_EPST11_Msk (0x800UL)

#define	USB_EPINTST_EPST12_Pos (12UL)

#define	USB_EPINTST_EPST12_Msk (0x1000UL)

#define	USB_EPINTST_EPST13_Pos (13UL)

#define	USB_EPINTST_EPST13_Msk (0x2000UL)

#define	USB_EPINTST_EPST14_Pos (14UL)

#define	USB_EPINTST_EPST14_Msk (0x4000UL)

#define	USB_EPINTST_EPST15_Pos (15UL)

#define	USB_EPINTST_EPST15_Msk (0x8000UL)

#define	USB_EPINTST_EPST16_Pos (16UL)

#define	USB_EPINTST_EPST16_Msk (0x10000UL)

#define	USB_EPINTST_EPST17_Pos (17UL)

#define	USB_EPINTST_EPST17_Msk (0x20000UL)

#define	USB_EPINTST_EPST18_Pos (18UL)

#define	USB_EPINTST_EPST18_Msk (0x40000UL)

#define	USB_EPINTST_EPST19_Pos (19UL)

#define	USB_EPINTST_EPST19_Msk (0x80000UL)

#define	USB_EPINTST_EPST20_Pos (20UL)

#define	USB_EPINTST_EPST20_Msk (0x100000UL)

#define	USB_EPINTST_EPST21_Pos (21UL)

#define	USB_EPINTST_EPST21_Msk (0x200000UL)

#define	USB_EPINTST_EPST22_Pos (22UL)

#define	USB_EPINTST_EPST22_Msk (0x400000UL)

#define	USB_EPINTST_EPST23_Pos (23UL)

#define	USB_EPINTST_EPST23_Msk (0x800000UL)

#define	USB_EPINTST_EPST24_Pos (24UL)

#define	USB_EPINTST_EPST24_Msk (0x1000000UL)

#define	USB_EPINTST_EPST25_Pos (25UL)

#define	USB_EPINTST_EPST25_Msk (0x2000000UL)

#define	USB_EPINTST_EPST26_Pos (26UL)

#define	USB_EPINTST_EPST26_Msk (0x4000000UL)

#define	USB_EPINTST_EPST27_Pos (27UL)

#define	USB_EPINTST_EPST27_Msk (0x8000000UL)

#define	USB_EPINTST_EPST28_Pos (28UL)

#define	USB_EPINTST_EPST28_Msk (0x10000000UL)

#define	USB_EPINTST_EPST29_Pos (29UL)

#define	USB_EPINTST_EPST29_Msk (0x20000000UL)

#define	USB_EPINTST_EPST30_Pos (30UL)

#define	USB_EPINTST_EPST30_Msk (0x40000000UL)

#define	USB_EPINTST_EPST31_Pos (31UL)

#define	USB_EPINTST_EPST31_Msk (0x80000000UL)

#define	USB_EPINTEN_EPEN0_Pos (0UL)

#define	USB_EPINTEN_EPEN0_Msk (0x1UL)

#define	USB_EPINTEN_EPEN1_Pos (1UL)

#define	USB_EPINTEN_EPEN1_Msk (0x2UL)

#define	USB_EPINTEN_EPEN2_Pos (2UL)

#define	USB_EPINTEN_EPEN2_Msk (0x4UL)

#define	USB_EPINTEN_EPEN3_Pos (3UL)

#define	USB_EPINTEN_EPEN3_Msk (0x8UL)

#define	USB_EPINTEN_EPEN4_Pos (4UL)

#define	USB_EPINTEN_EPEN4_Msk (0x10UL)

#define	USB_EPINTEN_EPEN5_Pos (5UL)

#define	USB_EPINTEN_EPEN5_Msk (0x20UL)

#define	USB_EPINTEN_EPEN6_Pos (6UL)

#define	USB_EPINTEN_EPEN6_Msk (0x40UL)

#define	USB_EPINTEN_EPEN7_Pos (7UL)

#define	USB_EPINTEN_EPEN7_Msk (0x80UL)

#define	USB_EPINTEN_EPEN8_Pos (8UL)

#define	USB_EPINTEN_EPEN8_Msk (0x100UL)

#define	USB_EPINTEN_EPEN9_Pos (9UL)

#define	USB_EPINTEN_EPEN9_Msk (0x200UL)

#define	USB_EPINTEN_EPEN10_Pos (10UL)

#define	USB_EPINTEN_EPEN10_Msk (0x400UL)

#define	USB_EPINTEN_EPEN11_Pos (11UL)

#define	USB_EPINTEN_EPEN11_Msk (0x800UL)

#define	USB_EPINTEN_EPEN12_Pos (12UL)

#define	USB_EPINTEN_EPEN12_Msk (0x1000UL)

#define	USB_EPINTEN_EPEN13_Pos (13UL)

#define	USB_EPINTEN_EPEN13_Msk (0x2000UL)

#define	USB_EPINTEN_EPEN14_Pos (14UL)

#define	USB_EPINTEN_EPEN14_Msk (0x4000UL)

#define	USB_EPINTEN_EPEN15_Pos (15UL)

#define	USB_EPINTEN_EPEN15_Msk (0x8000UL)

#define	USB_EPINTEN_EPEN16_Pos (16UL)

#define	USB_EPINTEN_EPEN16_Msk (0x10000UL)

#define	USB_EPINTEN_EPEN17_Pos (17UL)

#define	USB_EPINTEN_EPEN17_Msk (0x20000UL)

#define	USB_EPINTEN_EPEN18_Pos (18UL)

#define	USB_EPINTEN_EPEN18_Msk (0x40000UL)

#define	USB_EPINTEN_EPEN19_Pos (19UL)

#define	USB_EPINTEN_EPEN19_Msk (0x80000UL)

#define	USB_EPINTEN_EPEN20_Pos (20UL)

#define	USB_EPINTEN_EPEN20_Msk (0x100000UL)

#define	USB_EPINTEN_EPEN21_Pos (21UL)

#define	USB_EPINTEN_EPEN21_Msk (0x200000UL)

#define	USB_EPINTEN_EPEN22_Pos (22UL)

#define	USB_EPINTEN_EPEN22_Msk (0x400000UL)

#define	USB_EPINTEN_EPEN23_Pos (23UL)

#define	USB_EPINTEN_EPEN23_Msk (0x800000UL)

#define	USB_EPINTEN_EPEN24_Pos (24UL)

#define	USB_EPINTEN_EPEN24_Msk (0x1000000UL)

#define	USB_EPINTEN_EPEN25_Pos (25UL)

#define	USB_EPINTEN_EPEN25_Msk (0x2000000UL)

#define	USB_EPINTEN_EPEN26_Pos (26UL)

#define	USB_EPINTEN_EPEN26_Msk (0x4000000UL)

#define	USB_EPINTEN_EPEN27_Pos (27UL)

#define	USB_EPINTEN_EPEN27_Msk (0x8000000UL)

#define	USB_EPINTEN_EPEN28_Pos (28UL)

#define	USB_EPINTEN_EPEN28_Msk (0x10000000UL)

#define	USB_EPINTEN_EPEN29_Pos (29UL)

#define	USB_EPINTEN_EPEN29_Msk (0x20000000UL)

#define	USB_EPINTEN_EPEN30_Pos (30UL)

#define	USB_EPINTEN_EPEN30_Msk (0x40000000UL)

#define	USB_EPINTEN_EPEN31_Pos (31UL)

#define	USB_EPINTEN_EPEN31_Msk (0x80000000UL)

#define	USB_EPINTCLR_EPCLR0_Pos (0UL)

#define	USB_EPINTCLR_EPCLR0_Msk (0x1UL)

#define	USB_EPINTCLR_EPCLR1_Pos (1UL)

#define	USB_EPINTCLR_EPCLR1_Msk (0x2UL)

#define	USB_EPINTCLR_EPCLR2_Pos (2UL)

#define	USB_EPINTCLR_EPCLR2_Msk (0x4UL)

#define	USB_EPINTCLR_EPCLR3_Pos (3UL)

#define	USB_EPINTCLR_EPCLR3_Msk (0x8UL)

#define	USB_EPINTCLR_EPCLR4_Pos (4UL)

#define	USB_EPINTCLR_EPCLR4_Msk (0x10UL)

#define	USB_EPINTCLR_EPCLR5_Pos (5UL)

#define	USB_EPINTCLR_EPCLR5_Msk (0x20UL)

#define	USB_EPINTCLR_EPCLR6_Pos (6UL)

#define	USB_EPINTCLR_EPCLR6_Msk (0x40UL)

#define	USB_EPINTCLR_EPCLR7_Pos (7UL)

#define	USB_EPINTCLR_EPCLR7_Msk (0x80UL)

#define	USB_EPINTCLR_EPCLR8_Pos (8UL)

#define	USB_EPINTCLR_EPCLR8_Msk (0x100UL)

#define	USB_EPINTCLR_EPCLR9_Pos (9UL)

#define	USB_EPINTCLR_EPCLR9_Msk (0x200UL)

#define	USB_EPINTCLR_EPCLR10_Pos (10UL)

#define	USB_EPINTCLR_EPCLR10_Msk (0x400UL)

#define	USB_EPINTCLR_EPCLR11_Pos (11UL)

#define	USB_EPINTCLR_EPCLR11_Msk (0x800UL)

#define	USB_EPINTCLR_EPCLR12_Pos (12UL)

#define	USB_EPINTCLR_EPCLR12_Msk (0x1000UL)

#define	USB_EPINTCLR_EPCLR13_Pos (13UL)

#define	USB_EPINTCLR_EPCLR13_Msk (0x2000UL)

#define	USB_EPINTCLR_EPCLR14_Pos (14UL)

#define	USB_EPINTCLR_EPCLR14_Msk (0x4000UL)

#define	USB_EPINTCLR_EPCLR15_Pos (15UL)

#define	USB_EPINTCLR_EPCLR15_Msk (0x8000UL)

#define	USB_EPINTCLR_EPCLR16_Pos (16UL)

#define	USB_EPINTCLR_EPCLR16_Msk (0x10000UL)

#define	USB_EPINTCLR_EPCLR17_Pos (17UL)

#define	USB_EPINTCLR_EPCLR17_Msk (0x20000UL)

#define	USB_EPINTCLR_EPCLR18_Pos (18UL)

#define	USB_EPINTCLR_EPCLR18_Msk (0x40000UL)

#define	USB_EPINTCLR_EPCLR19_Pos (19UL)

#define	USB_EPINTCLR_EPCLR19_Msk (0x80000UL)

#define	USB_EPINTCLR_EPCLR20_Pos (20UL)

#define	USB_EPINTCLR_EPCLR20_Msk (0x100000UL)

#define	USB_EPINTCLR_EPCLR21_Pos (21UL)

#define	USB_EPINTCLR_EPCLR21_Msk (0x200000UL)

#define	USB_EPINTCLR_EPCLR22_Pos (22UL)

#define	USB_EPINTCLR_EPCLR22_Msk (0x400000UL)

#define	USB_EPINTCLR_EPCLR23_Pos (23UL)

#define	USB_EPINTCLR_EPCLR23_Msk (0x800000UL)

#define	USB_EPINTCLR_EPCLR24_Pos (24UL)

#define	USB_EPINTCLR_EPCLR24_Msk (0x1000000UL)

#define	USB_EPINTCLR_EPCLR25_Pos (25UL)

#define	USB_EPINTCLR_EPCLR25_Msk (0x2000000UL)

#define	USB_EPINTCLR_EPCLR26_Pos (26UL)

#define	USB_EPINTCLR_EPCLR26_Msk (0x4000000UL)

#define	USB_EPINTCLR_EPCLR27_Pos (27UL)

#define	USB_EPINTCLR_EPCLR27_Msk (0x8000000UL)

#define	USB_EPINTCLR_EPCLR28_Pos (28UL)

#define	USB_EPINTCLR_EPCLR28_Msk (0x10000000UL)

#define	USB_EPINTCLR_EPCLR29_Pos (29UL)

#define	USB_EPINTCLR_EPCLR29_Msk (0x20000000UL)

#define	USB_EPINTCLR_EPCLR30_Pos (30UL)

#define	USB_EPINTCLR_EPCLR30_Msk (0x40000000UL)

#define	USB_EPINTCLR_EPCLR31_Pos (31UL)

#define	USB_EPINTCLR_EPCLR31_Msk (0x80000000UL)

#define	USB_EPINTSET_EPSET0_Pos (0UL)

#define	USB_EPINTSET_EPSET0_Msk (0x1UL)

#define	USB_EPINTSET_EPSET1_Pos (1UL)

#define	USB_EPINTSET_EPSET1_Msk (0x2UL)

#define	USB_EPINTSET_EPSET2_Pos (2UL)

#define	USB_EPINTSET_EPSET2_Msk (0x4UL)

#define	USB_EPINTSET_EPSET3_Pos (3UL)

#define	USB_EPINTSET_EPSET3_Msk (0x8UL)

#define	USB_EPINTSET_EPSET4_Pos (4UL)

#define	USB_EPINTSET_EPSET4_Msk (0x10UL)

#define	USB_EPINTSET_EPSET5_Pos (5UL)

#define	USB_EPINTSET_EPSET5_Msk (0x20UL)

#define	USB_EPINTSET_EPSET6_Pos (6UL)

#define	USB_EPINTSET_EPSET6_Msk (0x40UL)

#define	USB_EPINTSET_EPSET7_Pos (7UL)

#define	USB_EPINTSET_EPSET7_Msk (0x80UL)

#define	USB_EPINTSET_EPSET8_Pos (8UL)

#define	USB_EPINTSET_EPSET8_Msk (0x100UL)

#define	USB_EPINTSET_EPSET9_Pos (9UL)

#define	USB_EPINTSET_EPSET9_Msk (0x200UL)

#define	USB_EPINTSET_EPSET10_Pos (10UL)

#define	USB_EPINTSET_EPSET10_Msk (0x400UL)

#define	USB_EPINTSET_EPSET11_Pos (11UL)

#define	USB_EPINTSET_EPSET11_Msk (0x800UL)

#define	USB_EPINTSET_EPSET12_Pos (12UL)

#define	USB_EPINTSET_EPSET12_Msk (0x1000UL)

#define	USB_EPINTSET_EPSET13_Pos (13UL)

#define	USB_EPINTSET_EPSET13_Msk (0x2000UL)

#define	USB_EPINTSET_EPSET14_Pos (14UL)

#define	USB_EPINTSET_EPSET14_Msk (0x4000UL)

#define	USB_EPINTSET_EPSET15_Pos (15UL)

#define	USB_EPINTSET_EPSET15_Msk (0x8000UL)

#define	USB_EPINTSET_EPSET16_Pos (16UL)

#define	USB_EPINTSET_EPSET16_Msk (0x10000UL)

#define	USB_EPINTSET_EPSET17_Pos (17UL)

#define	USB_EPINTSET_EPSET17_Msk (0x20000UL)

#define	USB_EPINTSET_EPSET18_Pos (18UL)

#define	USB_EPINTSET_EPSET18_Msk (0x40000UL)

#define	USB_EPINTSET_EPSET19_Pos (19UL)

#define	USB_EPINTSET_EPSET19_Msk (0x80000UL)

#define	USB_EPINTSET_EPSET20_Pos (20UL)

#define	USB_EPINTSET_EPSET20_Msk (0x100000UL)

#define	USB_EPINTSET_EPSET21_Pos (21UL)

#define	USB_EPINTSET_EPSET21_Msk (0x200000UL)

#define	USB_EPINTSET_EPSET22_Pos (22UL)

#define	USB_EPINTSET_EPSET22_Msk (0x400000UL)

#define	USB_EPINTSET_EPSET23_Pos (23UL)

#define	USB_EPINTSET_EPSET23_Msk (0x800000UL)

#define	USB_EPINTSET_EPSET24_Pos (24UL)

#define	USB_EPINTSET_EPSET24_Msk (0x1000000UL)

#define	USB_EPINTSET_EPSET25_Pos (25UL)

#define	USB_EPINTSET_EPSET25_Msk (0x2000000UL)

#define	USB_EPINTSET_EPSET26_Pos (26UL)

#define	USB_EPINTSET_EPSET26_Msk (0x4000000UL)

#define	USB_EPINTSET_EPSET27_Pos (27UL)

#define	USB_EPINTSET_EPSET27_Msk (0x8000000UL)

#define	USB_EPINTSET_EPSET28_Pos (28UL)

#define	USB_EPINTSET_EPSET28_Msk (0x10000000UL)

#define	USB_EPINTSET_EPSET29_Pos (29UL)

#define	USB_EPINTSET_EPSET29_Msk (0x20000000UL)

#define	USB_EPINTSET_EPSET30_Pos (30UL)

#define	USB_EPINTSET_EPSET30_Msk (0x40000000UL)

#define	USB_EPINTSET_EPSET31_Pos (31UL)

#define	USB_EPINTSET_EPSET31_Msk (0x80000000UL)

#define	USB_EPINTPRI_EPPRI0_Pos (0UL)

#define	USB_EPINTPRI_EPPRI0_Msk (0x1UL)

#define	USB_EPINTPRI_EPPRI1_Pos (1UL)

#define	USB_EPINTPRI_EPPRI1_Msk (0x2UL)

#define	USB_EPINTPRI_EPPRI2_Pos (2UL)

#define	USB_EPINTPRI_EPPRI2_Msk (0x4UL)

#define	USB_EPINTPRI_EPPRI3_Pos (3UL)

#define	USB_EPINTPRI_EPPRI3_Msk (0x8UL)

#define	USB_EPINTPRI_EPPRI4_Pos (4UL)

#define	USB_EPINTPRI_EPPRI4_Msk (0x10UL)

#define	USB_EPINTPRI_EPPRI5_Pos (5UL)

#define	USB_EPINTPRI_EPPRI5_Msk (0x20UL)

#define	USB_EPINTPRI_EPPRI6_Pos (6UL)

#define	USB_EPINTPRI_EPPRI6_Msk (0x40UL)

#define	USB_EPINTPRI_EPPRI7_Pos (7UL)

#define	USB_EPINTPRI_EPPRI7_Msk (0x80UL)

#define	USB_EPINTPRI_EPPRI8_Pos (8UL)

#define	USB_EPINTPRI_EPPRI8_Msk (0x100UL)

#define	USB_EPINTPRI_EPPRI9_Pos (9UL)

#define	USB_EPINTPRI_EPPRI9_Msk (0x200UL)

#define	USB_EPINTPRI_EPPRI10_Pos (10UL)

#define	USB_EPINTPRI_EPPRI10_Msk (0x400UL)

#define	USB_EPINTPRI_EPPRI11_Pos (11UL)

#define	USB_EPINTPRI_EPPRI11_Msk (0x800UL)

#define	USB_EPINTPRI_EPPRI12_Pos (12UL)

#define	USB_EPINTPRI_EPPRI12_Msk (0x1000UL)

#define	USB_EPINTPRI_EPPRI13_Pos (13UL)

#define	USB_EPINTPRI_EPPRI13_Msk (0x2000UL)

#define	USB_EPINTPRI_EPPRI14_Pos (14UL)

#define	USB_EPINTPRI_EPPRI14_Msk (0x4000UL)

#define	USB_EPINTPRI_EPPRI15_Pos (15UL)

#define	USB_EPINTPRI_EPPRI15_Msk (0x8000UL)

#define	USB_EPINTPRI_EPPRI16_Pos (16UL)

#define	USB_EPINTPRI_EPPRI16_Msk (0x10000UL)

#define	USB_EPINTPRI_EPPRI17_Pos (17UL)

#define	USB_EPINTPRI_EPPRI17_Msk (0x20000UL)

#define	USB_EPINTPRI_EPPRI18_Pos (18UL)

#define	USB_EPINTPRI_EPPRI18_Msk (0x40000UL)

#define	USB_EPINTPRI_EPPRI19_Pos (19UL)

#define	USB_EPINTPRI_EPPRI19_Msk (0x80000UL)

#define	USB_EPINTPRI_EPPRI20_Pos (20UL)

#define	USB_EPINTPRI_EPPRI20_Msk (0x100000UL)

#define	USB_EPINTPRI_EPPRI21_Pos (21UL)

#define	USB_EPINTPRI_EPPRI21_Msk (0x200000UL)

#define	USB_EPINTPRI_EPPRI22_Pos (22UL)

#define	USB_EPINTPRI_EPPRI22_Msk (0x400000UL)

#define	USB_EPINTPRI_EPPRI23_Pos (23UL)

#define	USB_EPINTPRI_EPPRI23_Msk (0x800000UL)

#define	USB_EPINTPRI_EPPRI24_Pos (24UL)

#define	USB_EPINTPRI_EPPRI24_Msk (0x1000000UL)

#define	USB_EPINTPRI_EPPRI25_Pos (25UL)

#define	USB_EPINTPRI_EPPRI25_Msk (0x2000000UL)

#define	USB_EPINTPRI_EPPRI26_Pos (26UL)

#define	USB_EPINTPRI_EPPRI26_Msk (0x4000000UL)

#define	USB_EPINTPRI_EPPRI27_Pos (27UL)

#define	USB_EPINTPRI_EPPRI27_Msk (0x8000000UL)

#define	USB_EPINTPRI_EPPRI28_Pos (28UL)

#define	USB_EPINTPRI_EPPRI28_Msk (0x10000000UL)

#define	USB_EPINTPRI_EPPRI29_Pos (29UL)

#define	USB_EPINTPRI_EPPRI29_Msk (0x20000000UL)

#define	USB_EPINTPRI_EPPRI30_Pos (30UL)

#define	USB_EPINTPRI_EPPRI30_Msk (0x40000000UL)

#define	USB_EPINTPRI_EPPRI31_Pos (31UL)

#define	USB_EPINTPRI_EPPRI31_Msk (0x80000000UL)

#define	USB_REEP_EPR0_Pos (0UL)

#define	USB_REEP_EPR0_Msk (0x1UL)

#define	USB_REEP_EPR1_Pos (1UL)

#define	USB_REEP_EPR1_Msk (0x2UL)

#define	USB_REEP_EPR2_Pos (2UL)

#define	USB_REEP_EPR2_Msk (0x4UL)

#define	USB_REEP_EPR3_Pos (3UL)

#define	USB_REEP_EPR3_Msk (0x8UL)

#define	USB_REEP_EPR4_Pos (4UL)

#define	USB_REEP_EPR4_Msk (0x10UL)

#define	USB_REEP_EPR5_Pos (5UL)

#define	USB_REEP_EPR5_Msk (0x20UL)

#define	USB_REEP_EPR6_Pos (6UL)

#define	USB_REEP_EPR6_Msk (0x40UL)

#define	USB_REEP_EPR7_Pos (7UL)

#define	USB_REEP_EPR7_Msk (0x80UL)

#define	USB_REEP_EPR8_Pos (8UL)

#define	USB_REEP_EPR8_Msk (0x100UL)

#define	USB_REEP_EPR9_Pos (9UL)

#define	USB_REEP_EPR9_Msk (0x200UL)

#define	USB_REEP_EPR10_Pos (10UL)

#define	USB_REEP_EPR10_Msk (0x400UL)

#define	USB_REEP_EPR11_Pos (11UL)

#define	USB_REEP_EPR11_Msk (0x800UL)

#define	USB_REEP_EPR12_Pos (12UL)

#define	USB_REEP_EPR12_Msk (0x1000UL)

#define	USB_REEP_EPR13_Pos (13UL)

#define	USB_REEP_EPR13_Msk (0x2000UL)

#define	USB_REEP_EPR14_Pos (14UL)

#define	USB_REEP_EPR14_Msk (0x4000UL)

#define	USB_REEP_EPR15_Pos (15UL)

#define	USB_REEP_EPR15_Msk (0x8000UL)

#define	USB_REEP_EPR16_Pos (16UL)

#define	USB_REEP_EPR16_Msk (0x10000UL)

#define	USB_REEP_EPR17_Pos (17UL)

#define	USB_REEP_EPR17_Msk (0x20000UL)

#define	USB_REEP_EPR18_Pos (18UL)

#define	USB_REEP_EPR18_Msk (0x40000UL)

#define	USB_REEP_EPR19_Pos (19UL)

#define	USB_REEP_EPR19_Msk (0x80000UL)

#define	USB_REEP_EPR20_Pos (20UL)

#define	USB_REEP_EPR20_Msk (0x100000UL)

#define	USB_REEP_EPR21_Pos (21UL)

#define	USB_REEP_EPR21_Msk (0x200000UL)

#define	USB_REEP_EPR22_Pos (22UL)

#define	USB_REEP_EPR22_Msk (0x400000UL)

#define	USB_REEP_EPR23_Pos (23UL)

#define	USB_REEP_EPR23_Msk (0x800000UL)

#define	USB_REEP_EPR24_Pos (24UL)

#define	USB_REEP_EPR24_Msk (0x1000000UL)

#define	USB_REEP_EPR25_Pos (25UL)

#define	USB_REEP_EPR25_Msk (0x2000000UL)

#define	USB_REEP_EPR26_Pos (26UL)

#define	USB_REEP_EPR26_Msk (0x4000000UL)

#define	USB_REEP_EPR27_Pos (27UL)

#define	USB_REEP_EPR27_Msk (0x8000000UL)

#define	USB_REEP_EPR28_Pos (28UL)

#define	USB_REEP_EPR28_Msk (0x10000000UL)

#define	USB_REEP_EPR29_Pos (29UL)

#define	USB_REEP_EPR29_Msk (0x20000000UL)

#define	USB_REEP_EPR30_Pos (30UL)

#define	USB_REEP_EPR30_Msk (0x40000000UL)

#define	USB_REEP_EPR31_Pos (31UL)

#define	USB_REEP_EPR31_Msk (0x80000000UL)

#define	USB_EPIND_PHY_EP_Pos (0UL)

#define	USB_EPIND_PHY_EP_Msk (0x1fUL)

#define	USB_MAXPSIZE_MPS_Pos (0UL)

#define	USB_MAXPSIZE_MPS_Msk (0x3ffUL)

#define	USB_DMARST_EPRST0_Pos (0UL)

#define	USB_DMARST_EPRST0_Msk (0x1UL)

#define	USB_DMARST_EPRST1_Pos (1UL)

#define	USB_DMARST_EPRST1_Msk (0x2UL)

#define	USB_DMARST_EPRST2_Pos (2UL)

#define	USB_DMARST_EPRST2_Msk (0x4UL)

#define	USB_DMARST_EPRST3_Pos (3UL)

#define	USB_DMARST_EPRST3_Msk (0x8UL)

#define	USB_DMARST_EPRST4_Pos (4UL)

#define	USB_DMARST_EPRST4_Msk (0x10UL)

#define	USB_DMARST_EPRST5_Pos (5UL)

#define	USB_DMARST_EPRST5_Msk (0x20UL)

#define	USB_DMARST_EPRST6_Pos (6UL)

#define	USB_DMARST_EPRST6_Msk (0x40UL)

#define	USB_DMARST_EPRST7_Pos (7UL)

#define	USB_DMARST_EPRST7_Msk (0x80UL)

#define	USB_DMARST_EPRST8_Pos (8UL)

#define	USB_DMARST_EPRST8_Msk (0x100UL)

#define	USB_DMARST_EPRST9_Pos (9UL)

#define	USB_DMARST_EPRST9_Msk (0x200UL)

#define	USB_DMARST_EPRST10_Pos (10UL)

#define	USB_DMARST_EPRST10_Msk (0x400UL)

#define	USB_DMARST_EPRST11_Pos (11UL)

#define	USB_DMARST_EPRST11_Msk (0x800UL)

#define	USB_DMARST_EPRST12_Pos (12UL)

#define	USB_DMARST_EPRST12_Msk (0x1000UL)

#define	USB_DMARST_EPRST13_Pos (13UL)

#define	USB_DMARST_EPRST13_Msk (0x2000UL)

#define	USB_DMARST_EPRST14_Pos (14UL)

#define	USB_DMARST_EPRST14_Msk (0x4000UL)

#define	USB_DMARST_EPRST15_Pos (15UL)

#define	USB_DMARST_EPRST15_Msk (0x8000UL)

#define	USB_DMARST_EPRST16_Pos (16UL)

#define	USB_DMARST_EPRST16_Msk (0x10000UL)

#define	USB_DMARST_EPRST17_Pos (17UL)

#define	USB_DMARST_EPRST17_Msk (0x20000UL)

#define	USB_DMARST_EPRST18_Pos (18UL)

#define	USB_DMARST_EPRST18_Msk (0x40000UL)

#define	USB_DMARST_EPRST19_Pos (19UL)

#define	USB_DMARST_EPRST19_Msk (0x80000UL)

#define	USB_DMARST_EPRST20_Pos (20UL)

#define	USB_DMARST_EPRST20_Msk (0x100000UL)

#define	USB_DMARST_EPRST21_Pos (21UL)

#define	USB_DMARST_EPRST21_Msk (0x200000UL)

#define	USB_DMARST_EPRST22_Pos (22UL)

#define	USB_DMARST_EPRST22_Msk (0x400000UL)

#define	USB_DMARST_EPRST23_Pos (23UL)

#define	USB_DMARST_EPRST23_Msk (0x800000UL)

#define	USB_DMARST_EPRST24_Pos (24UL)

#define	USB_DMARST_EPRST24_Msk (0x1000000UL)

#define	USB_DMARST_EPRST25_Pos (25UL)

#define	USB_DMARST_EPRST25_Msk (0x2000000UL)

#define	USB_DMARST_EPRST26_Pos (26UL)

#define	USB_DMARST_EPRST26_Msk (0x4000000UL)

#define	USB_DMARST_EPRST27_Pos (27UL)

#define	USB_DMARST_EPRST27_Msk (0x8000000UL)

#define	USB_DMARST_EPRST28_Pos (28UL)

#define	USB_DMARST_EPRST28_Msk (0x10000000UL)

#define	USB_DMARST_EPRST29_Pos (29UL)

#define	USB_DMARST_EPRST29_Msk (0x20000000UL)

#define	USB_DMARST_EPRST30_Pos (30UL)

#define	USB_DMARST_EPRST30_Msk (0x40000000UL)

#define	USB_DMARST_EPRST31_Pos (31UL)

#define	USB_DMARST_EPRST31_Msk (0x80000000UL)

#define	USB_DMARCLR_EPRCLR0_Pos (0UL)

#define	USB_DMARCLR_EPRCLR0_Msk (0x1UL)

#define	USB_DMARCLR_EPRCLR1_Pos (1UL)

#define	USB_DMARCLR_EPRCLR1_Msk (0x2UL)

#define	USB_DMARCLR_EPRCLR2_Pos (2UL)

#define	USB_DMARCLR_EPRCLR2_Msk (0x4UL)

#define	USB_DMARCLR_EPRCLR3_Pos (3UL)

#define	USB_DMARCLR_EPRCLR3_Msk (0x8UL)

#define	USB_DMARCLR_EPRCLR4_Pos (4UL)

#define	USB_DMARCLR_EPRCLR4_Msk (0x10UL)

#define	USB_DMARCLR_EPRCLR5_Pos (5UL)

#define	USB_DMARCLR_EPRCLR5_Msk (0x20UL)

#define	USB_DMARCLR_EPRCLR6_Pos (6UL)

#define	USB_DMARCLR_EPRCLR6_Msk (0x40UL)

#define	USB_DMARCLR_EPRCLR7_Pos (7UL)

#define	USB_DMARCLR_EPRCLR7_Msk (0x80UL)

#define	USB_DMARCLR_EPRCLR8_Pos (8UL)

#define	USB_DMARCLR_EPRCLR8_Msk (0x100UL)

#define	USB_DMARCLR_EPRCLR9_Pos (9UL)

#define	USB_DMARCLR_EPRCLR9_Msk (0x200UL)

#define	USB_DMARCLR_EPRCLR10_Pos (10UL)

#define	USB_DMARCLR_EPRCLR10_Msk (0x400UL)

#define	USB_DMARCLR_EPRCLR11_Pos (11UL)

#define	USB_DMARCLR_EPRCLR11_Msk (0x800UL)

#define	USB_DMARCLR_EPRCLR12_Pos (12UL)

#define	USB_DMARCLR_EPRCLR12_Msk (0x1000UL)

#define	USB_DMARCLR_EPRCLR13_Pos (13UL)

#define	USB_DMARCLR_EPRCLR13_Msk (0x2000UL)

#define	USB_DMARCLR_EPRCLR14_Pos (14UL)

#define	USB_DMARCLR_EPRCLR14_Msk (0x4000UL)

#define	USB_DMARCLR_EPRCLR15_Pos (15UL)

#define	USB_DMARCLR_EPRCLR15_Msk (0x8000UL)

#define	USB_DMARCLR_EPRCLR16_Pos (16UL)

#define	USB_DMARCLR_EPRCLR16_Msk (0x10000UL)

#define	USB_DMARCLR_EPRCLR17_Pos (17UL)

#define	USB_DMARCLR_EPRCLR17_Msk (0x20000UL)

#define	USB_DMARCLR_EPRCLR18_Pos (18UL)

#define	USB_DMARCLR_EPRCLR18_Msk (0x40000UL)

#define	USB_DMARCLR_EPRCLR19_Pos (19UL)

#define	USB_DMARCLR_EPRCLR19_Msk (0x80000UL)

#define	USB_DMARCLR_EPRCLR20_Pos (20UL)

#define	USB_DMARCLR_EPRCLR20_Msk (0x100000UL)

#define	USB_DMARCLR_EPRCLR21_Pos (21UL)

#define	USB_DMARCLR_EPRCLR21_Msk (0x200000UL)

#define	USB_DMARCLR_EPRCLR22_Pos (22UL)

#define	USB_DMARCLR_EPRCLR22_Msk (0x400000UL)

#define	USB_DMARCLR_EPRCLR23_Pos (23UL)

#define	USB_DMARCLR_EPRCLR23_Msk (0x800000UL)

#define	USB_DMARCLR_EPRCLR24_Pos (24UL)

#define	USB_DMARCLR_EPRCLR24_Msk (0x1000000UL)

#define	USB_DMARCLR_EPRCLR25_Pos (25UL)

#define	USB_DMARCLR_EPRCLR25_Msk (0x2000000UL)

#define	USB_DMARCLR_EPRCLR26_Pos (26UL)

#define	USB_DMARCLR_EPRCLR26_Msk (0x4000000UL)

#define	USB_DMARCLR_EPRCLR27_Pos (27UL)

#define	USB_DMARCLR_EPRCLR27_Msk (0x8000000UL)

#define	USB_DMARCLR_EPRCLR28_Pos (28UL)

#define	USB_DMARCLR_EPRCLR28_Msk (0x10000000UL)

#define	USB_DMARCLR_EPRCLR29_Pos (29UL)

#define	USB_DMARCLR_EPRCLR29_Msk (0x20000000UL)

#define	USB_DMARCLR_EPRCLR30_Pos (30UL)

#define	USB_DMARCLR_EPRCLR30_Msk (0x40000000UL)

#define	USB_DMARCLR_EPRCLR31_Pos (31UL)

#define	USB_DMARCLR_EPRCLR31_Msk (0x80000000UL)

#define	USB_DMARSET_EPRSET0_Pos (0UL)

#define	USB_DMARSET_EPRSET0_Msk (0x1UL)

#define	USB_DMARSET_EPRSET1_Pos (1UL)

#define	USB_DMARSET_EPRSET1_Msk (0x2UL)

#define	USB_DMARSET_EPRSET2_Pos (2UL)

#define	USB_DMARSET_EPRSET2_Msk (0x4UL)

#define	USB_DMARSET_EPRSET3_Pos (3UL)

#define	USB_DMARSET_EPRSET3_Msk (0x8UL)

#define	USB_DMARSET_EPRSET4_Pos (4UL)

#define	USB_DMARSET_EPRSET4_Msk (0x10UL)

#define	USB_DMARSET_EPRSET5_Pos (5UL)

#define	USB_DMARSET_EPRSET5_Msk (0x20UL)

#define	USB_DMARSET_EPRSET6_Pos (6UL)

#define	USB_DMARSET_EPRSET6_Msk (0x40UL)

#define	USB_DMARSET_EPRSET7_Pos (7UL)

#define	USB_DMARSET_EPRSET7_Msk (0x80UL)

#define	USB_DMARSET_EPRSET8_Pos (8UL)

#define	USB_DMARSET_EPRSET8_Msk (0x100UL)

#define	USB_DMARSET_EPRSET9_Pos (9UL)

#define	USB_DMARSET_EPRSET9_Msk (0x200UL)

#define	USB_DMARSET_EPRSET10_Pos (10UL)

#define	USB_DMARSET_EPRSET10_Msk (0x400UL)

#define	USB_DMARSET_EPRSET11_Pos (11UL)

#define	USB_DMARSET_EPRSET11_Msk (0x800UL)

#define	USB_DMARSET_EPRSET12_Pos (12UL)

#define	USB_DMARSET_EPRSET12_Msk (0x1000UL)

#define	USB_DMARSET_EPRSET13_Pos (13UL)

#define	USB_DMARSET_EPRSET13_Msk (0x2000UL)

#define	USB_DMARSET_EPRSET14_Pos (14UL)

#define	USB_DMARSET_EPRSET14_Msk (0x4000UL)

#define	USB_DMARSET_EPRSET15_Pos (15UL)

#define	USB_DMARSET_EPRSET15_Msk (0x8000UL)

#define	USB_DMARSET_EPRSET16_Pos (16UL)

#define	USB_DMARSET_EPRSET16_Msk (0x10000UL)

#define	USB_DMARSET_EPRSET17_Pos (17UL)

#define	USB_DMARSET_EPRSET17_Msk (0x20000UL)

#define	USB_DMARSET_EPRSET18_Pos (18UL)

#define	USB_DMARSET_EPRSET18_Msk (0x40000UL)

#define	USB_DMARSET_EPRSET19_Pos (19UL)

#define	USB_DMARSET_EPRSET19_Msk (0x80000UL)

#define	USB_DMARSET_EPRSET20_Pos (20UL)

#define	USB_DMARSET_EPRSET20_Msk (0x100000UL)

#define	USB_DMARSET_EPRSET21_Pos (21UL)

#define	USB_DMARSET_EPRSET21_Msk (0x200000UL)

#define	USB_DMARSET_EPRSET22_Pos (22UL)

#define	USB_DMARSET_EPRSET22_Msk (0x400000UL)

#define	USB_DMARSET_EPRSET23_Pos (23UL)

#define	USB_DMARSET_EPRSET23_Msk (0x800000UL)

#define	USB_DMARSET_EPRSET24_Pos (24UL)

#define	USB_DMARSET_EPRSET24_Msk (0x1000000UL)

#define	USB_DMARSET_EPRSET25_Pos (25UL)

#define	USB_DMARSET_EPRSET25_Msk (0x2000000UL)

#define	USB_DMARSET_EPRSET26_Pos (26UL)

#define	USB_DMARSET_EPRSET26_Msk (0x4000000UL)

#define	USB_DMARSET_EPRSET27_Pos (27UL)

#define	USB_DMARSET_EPRSET27_Msk (0x8000000UL)

#define	USB_DMARSET_EPRSET28_Pos (28UL)

#define	USB_DMARSET_EPRSET28_Msk (0x10000000UL)

#define	USB_DMARSET_EPRSET29_Pos (29UL)

#define	USB_DMARSET_EPRSET29_Msk (0x20000000UL)

#define	USB_DMARSET_EPRSET30_Pos (30UL)

#define	USB_DMARSET_EPRSET30_Msk (0x40000000UL)

#define	USB_DMARSET_EPRSET31_Pos (31UL)

#define	USB_DMARSET_EPRSET31_Msk (0x80000000UL)

#define	USB_UDCAH_UDCA_ADDR_Pos (7UL)

#define	USB_UDCAH_UDCA_ADDR_Msk (0xffffff80UL)

#define	USB_EPDMAST_EP_DMA_ST0_Pos (0UL)

#define	USB_EPDMAST_EP_DMA_ST0_Msk (0x1UL)

#define	USB_EPDMAST_EP_DMA_ST1_Pos (1UL)

#define	USB_EPDMAST_EP_DMA_ST1_Msk (0x2UL)

#define	USB_EPDMAST_EP_DMA_ST2_Pos (2UL)

#define	USB_EPDMAST_EP_DMA_ST2_Msk (0x4UL)

#define	USB_EPDMAST_EP_DMA_ST3_Pos (3UL)

#define	USB_EPDMAST_EP_DMA_ST3_Msk (0x8UL)

#define	USB_EPDMAST_EP_DMA_ST4_Pos (4UL)

#define	USB_EPDMAST_EP_DMA_ST4_Msk (0x10UL)

#define	USB_EPDMAST_EP_DMA_ST5_Pos (5UL)

#define	USB_EPDMAST_EP_DMA_ST5_Msk (0x20UL)

#define	USB_EPDMAST_EP_DMA_ST6_Pos (6UL)

#define	USB_EPDMAST_EP_DMA_ST6_Msk (0x40UL)

#define	USB_EPDMAST_EP_DMA_ST7_Pos (7UL)

#define	USB_EPDMAST_EP_DMA_ST7_Msk (0x80UL)

#define	USB_EPDMAST_EP_DMA_ST8_Pos (8UL)

#define	USB_EPDMAST_EP_DMA_ST8_Msk (0x100UL)

#define	USB_EPDMAST_EP_DMA_ST9_Pos (9UL)

#define	USB_EPDMAST_EP_DMA_ST9_Msk (0x200UL)

#define	USB_EPDMAST_EP_DMA_ST10_Pos (10UL)

#define	USB_EPDMAST_EP_DMA_ST10_Msk (0x400UL)

#define	USB_EPDMAST_EP_DMA_ST11_Pos (11UL)

#define	USB_EPDMAST_EP_DMA_ST11_Msk (0x800UL)

#define	USB_EPDMAST_EP_DMA_ST12_Pos (12UL)

#define	USB_EPDMAST_EP_DMA_ST12_Msk (0x1000UL)

#define	USB_EPDMAST_EP_DMA_ST13_Pos (13UL)

#define	USB_EPDMAST_EP_DMA_ST13_Msk (0x2000UL)

#define	USB_EPDMAST_EP_DMA_ST14_Pos (14UL)

#define	USB_EPDMAST_EP_DMA_ST14_Msk (0x4000UL)

#define	USB_EPDMAST_EP_DMA_ST15_Pos (15UL)

#define	USB_EPDMAST_EP_DMA_ST15_Msk (0x8000UL)

#define	USB_EPDMAST_EP_DMA_ST16_Pos (16UL)

#define	USB_EPDMAST_EP_DMA_ST16_Msk (0x10000UL)

#define	USB_EPDMAST_EP_DMA_ST17_Pos (17UL)

#define	USB_EPDMAST_EP_DMA_ST17_Msk (0x20000UL)

#define	USB_EPDMAST_EP_DMA_ST18_Pos (18UL)

#define	USB_EPDMAST_EP_DMA_ST18_Msk (0x40000UL)

#define	USB_EPDMAST_EP_DMA_ST19_Pos (19UL)

#define	USB_EPDMAST_EP_DMA_ST19_Msk (0x80000UL)

#define	USB_EPDMAST_EP_DMA_ST20_Pos (20UL)

#define	USB_EPDMAST_EP_DMA_ST20_Msk (0x100000UL)

#define	USB_EPDMAST_EP_DMA_ST21_Pos (21UL)

#define	USB_EPDMAST_EP_DMA_ST21_Msk (0x200000UL)

#define	USB_EPDMAST_EP_DMA_ST22_Pos (22UL)

#define	USB_EPDMAST_EP_DMA_ST22_Msk (0x400000UL)

#define	USB_EPDMAST_EP_DMA_ST23_Pos (23UL)

#define	USB_EPDMAST_EP_DMA_ST23_Msk (0x800000UL)

#define	USB_EPDMAST_EP_DMA_ST24_Pos (24UL)

#define	USB_EPDMAST_EP_DMA_ST24_Msk (0x1000000UL)

#define	USB_EPDMAST_EP_DMA_ST25_Pos (25UL)

#define	USB_EPDMAST_EP_DMA_ST25_Msk (0x2000000UL)

#define	USB_EPDMAST_EP_DMA_ST26_Pos (26UL)

#define	USB_EPDMAST_EP_DMA_ST26_Msk (0x4000000UL)

#define	USB_EPDMAST_EP_DMA_ST27_Pos (27UL)

#define	USB_EPDMAST_EP_DMA_ST27_Msk (0x8000000UL)

#define	USB_EPDMAST_EP_DMA_ST28_Pos (28UL)

#define	USB_EPDMAST_EP_DMA_ST28_Msk (0x10000000UL)

#define	USB_EPDMAST_EP_DMA_ST29_Pos (29UL)

#define	USB_EPDMAST_EP_DMA_ST29_Msk (0x20000000UL)

#define	USB_EPDMAST_EP_DMA_ST30_Pos (30UL)

#define	USB_EPDMAST_EP_DMA_ST30_Msk (0x40000000UL)

#define	USB_EPDMAST_EP_DMA_ST31_Pos (31UL)

#define	USB_EPDMAST_EP_DMA_ST31_Msk (0x80000000UL)

#define	USB_EPDMAEN_EP_DMA_EN0_Pos (0UL)

#define	USB_EPDMAEN_EP_DMA_EN0_Msk (0x1UL)

#define	USB_EPDMAEN_EP_DMA_EN1_Pos (1UL)

#define	USB_EPDMAEN_EP_DMA_EN1_Msk (0x2UL)

#define	USB_EPDMAEN_EP_DMA_EN_Pos (2UL)

#define	USB_EPDMAEN_EP_DMA_EN_Msk (0xfffffffcUL)

#define	USB_EPDMADIS_EP_DMA_DIS0_Pos (0UL)

#define	USB_EPDMADIS_EP_DMA_DIS0_Msk (0x1UL)

#define	USB_EPDMADIS_EP_DMA_DIS1_Pos (1UL)

#define	USB_EPDMADIS_EP_DMA_DIS1_Msk (0x2UL)

#define	USB_EPDMADIS_EP_DMA_DIS2_Pos (2UL)

#define	USB_EPDMADIS_EP_DMA_DIS2_Msk (0x4UL)

#define	USB_EPDMADIS_EP_DMA_DIS3_Pos (3UL)

#define	USB_EPDMADIS_EP_DMA_DIS3_Msk (0x8UL)

#define	USB_EPDMADIS_EP_DMA_DIS4_Pos (4UL)

#define	USB_EPDMADIS_EP_DMA_DIS4_Msk (0x10UL)

#define	USB_EPDMADIS_EP_DMA_DIS5_Pos (5UL)

#define	USB_EPDMADIS_EP_DMA_DIS5_Msk (0x20UL)

#define	USB_EPDMADIS_EP_DMA_DIS6_Pos (6UL)

#define	USB_EPDMADIS_EP_DMA_DIS6_Msk (0x40UL)

#define	USB_EPDMADIS_EP_DMA_DIS7_Pos (7UL)

#define	USB_EPDMADIS_EP_DMA_DIS7_Msk (0x80UL)

#define	USB_EPDMADIS_EP_DMA_DIS8_Pos (8UL)

#define	USB_EPDMADIS_EP_DMA_DIS8_Msk (0x100UL)

#define	USB_EPDMADIS_EP_DMA_DIS9_Pos (9UL)

#define	USB_EPDMADIS_EP_DMA_DIS9_Msk (0x200UL)

#define	USB_EPDMADIS_EP_DMA_DIS10_Pos (10UL)

#define	USB_EPDMADIS_EP_DMA_DIS10_Msk (0x400UL)

#define	USB_EPDMADIS_EP_DMA_DIS11_Pos (11UL)

#define	USB_EPDMADIS_EP_DMA_DIS11_Msk (0x800UL)

#define	USB_EPDMADIS_EP_DMA_DIS12_Pos (12UL)

#define	USB_EPDMADIS_EP_DMA_DIS12_Msk (0x1000UL)

#define	USB_EPDMADIS_EP_DMA_DIS13_Pos (13UL)

#define	USB_EPDMADIS_EP_DMA_DIS13_Msk (0x2000UL)

#define	USB_EPDMADIS_EP_DMA_DIS14_Pos (14UL)

#define	USB_EPDMADIS_EP_DMA_DIS14_Msk (0x4000UL)

#define	USB_EPDMADIS_EP_DMA_DIS15_Pos (15UL)

#define	USB_EPDMADIS_EP_DMA_DIS15_Msk (0x8000UL)

#define	USB_EPDMADIS_EP_DMA_DIS16_Pos (16UL)

#define	USB_EPDMADIS_EP_DMA_DIS16_Msk (0x10000UL)

#define	USB_EPDMADIS_EP_DMA_DIS17_Pos (17UL)

#define	USB_EPDMADIS_EP_DMA_DIS17_Msk (0x20000UL)

#define	USB_EPDMADIS_EP_DMA_DIS18_Pos (18UL)

#define	USB_EPDMADIS_EP_DMA_DIS18_Msk (0x40000UL)

#define	USB_EPDMADIS_EP_DMA_DIS19_Pos (19UL)

#define	USB_EPDMADIS_EP_DMA_DIS19_Msk (0x80000UL)

#define	USB_EPDMADIS_EP_DMA_DIS20_Pos (20UL)

#define	USB_EPDMADIS_EP_DMA_DIS20_Msk (0x100000UL)

#define	USB_EPDMADIS_EP_DMA_DIS21_Pos (21UL)

#define	USB_EPDMADIS_EP_DMA_DIS21_Msk (0x200000UL)

#define	USB_EPDMADIS_EP_DMA_DIS22_Pos (22UL)

#define	USB_EPDMADIS_EP_DMA_DIS22_Msk (0x400000UL)

#define	USB_EPDMADIS_EP_DMA_DIS23_Pos (23UL)

#define	USB_EPDMADIS_EP_DMA_DIS23_Msk (0x800000UL)

#define	USB_EPDMADIS_EP_DMA_DIS24_Pos (24UL)

#define	USB_EPDMADIS_EP_DMA_DIS24_Msk (0x1000000UL)

#define	USB_EPDMADIS_EP_DMA_DIS25_Pos (25UL)

#define	USB_EPDMADIS_EP_DMA_DIS25_Msk (0x2000000UL)

#define	USB_EPDMADIS_EP_DMA_DIS26_Pos (26UL)

#define	USB_EPDMADIS_EP_DMA_DIS26_Msk (0x4000000UL)

#define	USB_EPDMADIS_EP_DMA_DIS27_Pos (27UL)

#define	USB_EPDMADIS_EP_DMA_DIS27_Msk (0x8000000UL)

#define	USB_EPDMADIS_EP_DMA_DIS28_Pos (28UL)

#define	USB_EPDMADIS_EP_DMA_DIS28_Msk (0x10000000UL)

#define	USB_EPDMADIS_EP_DMA_DIS29_Pos (29UL)

#define	USB_EPDMADIS_EP_DMA_DIS29_Msk (0x20000000UL)

#define	USB_EPDMADIS_EP_DMA_DIS30_Pos (30UL)

#define	USB_EPDMADIS_EP_DMA_DIS30_Msk (0x40000000UL)

#define	USB_EPDMADIS_EP_DMA_DIS31_Pos (31UL)

#define	USB_EPDMADIS_EP_DMA_DIS31_Msk (0x80000000UL)

#define	USB_DMAINTST_EOT_Pos (0UL)

#define	USB_DMAINTST_EOT_Msk (0x1UL)

#define	USB_DMAINTST_NDDR_Pos (1UL)

#define	USB_DMAINTST_NDDR_Msk (0x2UL)

#define	USB_DMAINTST_ERR_Pos (2UL)

#define	USB_DMAINTST_ERR_Msk (0x4UL)

#define	USB_DMAINTEN_EOT_Pos (0UL)

#define	USB_DMAINTEN_EOT_Msk (0x1UL)

#define	USB_DMAINTEN_NDDR_Pos (1UL)

#define	USB_DMAINTEN_NDDR_Msk (0x2UL)

#define	USB_DMAINTEN_ERR_Pos (2UL)

#define	USB_DMAINTEN_ERR_Msk (0x4UL)

#define	USB_EOTINTST_EPTXINTST0_Pos (0UL)

#define	USB_EOTINTST_EPTXINTST0_Msk (0x1UL)

#define	USB_EOTINTST_EPTXINTST1_Pos (1UL)

#define	USB_EOTINTST_EPTXINTST1_Msk (0x2UL)

#define	USB_EOTINTST_EPTXINTST2_Pos (2UL)

#define	USB_EOTINTST_EPTXINTST2_Msk (0x4UL)

#define	USB_EOTINTST_EPTXINTST3_Pos (3UL)

#define	USB_EOTINTST_EPTXINTST3_Msk (0x8UL)

#define	USB_EOTINTST_EPTXINTST4_Pos (4UL)

#define	USB_EOTINTST_EPTXINTST4_Msk (0x10UL)

#define	USB_EOTINTST_EPTXINTST5_Pos (5UL)

#define	USB_EOTINTST_EPTXINTST5_Msk (0x20UL)

#define	USB_EOTINTST_EPTXINTST6_Pos (6UL)

#define	USB_EOTINTST_EPTXINTST6_Msk (0x40UL)

#define	USB_EOTINTST_EPTXINTST7_Pos (7UL)

#define	USB_EOTINTST_EPTXINTST7_Msk (0x80UL)

#define	USB_EOTINTST_EPTXINTST8_Pos (8UL)

#define	USB_EOTINTST_EPTXINTST8_Msk (0x100UL)

#define	USB_EOTINTST_EPTXINTST9_Pos (9UL)

#define	USB_EOTINTST_EPTXINTST9_Msk (0x200UL)

#define	USB_EOTINTST_EPTXINTST10_Pos (10UL)

#define	USB_EOTINTST_EPTXINTST10_Msk (0x400UL)

#define	USB_EOTINTST_EPTXINTST11_Pos (11UL)

#define	USB_EOTINTST_EPTXINTST11_Msk (0x800UL)

#define	USB_EOTINTST_EPTXINTST12_Pos (12UL)

#define	USB_EOTINTST_EPTXINTST12_Msk (0x1000UL)

#define	USB_EOTINTST_EPTXINTST13_Pos (13UL)

#define	USB_EOTINTST_EPTXINTST13_Msk (0x2000UL)

#define	USB_EOTINTST_EPTXINTST14_Pos (14UL)

#define	USB_EOTINTST_EPTXINTST14_Msk (0x4000UL)

#define	USB_EOTINTST_EPTXINTST15_Pos (15UL)

#define	USB_EOTINTST_EPTXINTST15_Msk (0x8000UL)

#define	USB_EOTINTST_EPTXINTST16_Pos (16UL)

#define	USB_EOTINTST_EPTXINTST16_Msk (0x10000UL)

#define	USB_EOTINTST_EPTXINTST17_Pos (17UL)

#define	USB_EOTINTST_EPTXINTST17_Msk (0x20000UL)

#define	USB_EOTINTST_EPTXINTST18_Pos (18UL)

#define	USB_EOTINTST_EPTXINTST18_Msk (0x40000UL)

#define	USB_EOTINTST_EPTXINTST19_Pos (19UL)

#define	USB_EOTINTST_EPTXINTST19_Msk (0x80000UL)

#define	USB_EOTINTST_EPTXINTST20_Pos (20UL)

#define	USB_EOTINTST_EPTXINTST20_Msk (0x100000UL)

#define	USB_EOTINTST_EPTXINTST21_Pos (21UL)

#define	USB_EOTINTST_EPTXINTST21_Msk (0x200000UL)

#define	USB_EOTINTST_EPTXINTST22_Pos (22UL)

#define	USB_EOTINTST_EPTXINTST22_Msk (0x400000UL)

#define	USB_EOTINTST_EPTXINTST23_Pos (23UL)

#define	USB_EOTINTST_EPTXINTST23_Msk (0x800000UL)

#define	USB_EOTINTST_EPTXINTST24_Pos (24UL)

#define	USB_EOTINTST_EPTXINTST24_Msk (0x1000000UL)

#define	USB_EOTINTST_EPTXINTST25_Pos (25UL)

#define	USB_EOTINTST_EPTXINTST25_Msk (0x2000000UL)

#define	USB_EOTINTST_EPTXINTST26_Pos (26UL)

#define	USB_EOTINTST_EPTXINTST26_Msk (0x4000000UL)

#define	USB_EOTINTST_EPTXINTST27_Pos (27UL)

#define	USB_EOTINTST_EPTXINTST27_Msk (0x8000000UL)

#define	USB_EOTINTST_EPTXINTST28_Pos (28UL)

#define	USB_EOTINTST_EPTXINTST28_Msk (0x10000000UL)

#define	USB_EOTINTST_EPTXINTST29_Pos (29UL)

#define	USB_EOTINTST_EPTXINTST29_Msk (0x20000000UL)

#define	USB_EOTINTST_EPTXINTST30_Pos (30UL)

#define	USB_EOTINTST_EPTXINTST30_Msk (0x40000000UL)

#define	USB_EOTINTST_EPTXINTST31_Pos (31UL)

#define	USB_EOTINTST_EPTXINTST31_Msk (0x80000000UL)

#define	USB_EOTINTCLR_EPTXINTCLR0_Pos (0UL)

#define	USB_EOTINTCLR_EPTXINTCLR0_Msk (0x1UL)

#define	USB_EOTINTCLR_EPTXINTCLR1_Pos (1UL)

#define	USB_EOTINTCLR_EPTXINTCLR1_Msk (0x2UL)

#define	USB_EOTINTCLR_EPTXINTCLR2_Pos (2UL)

#define	USB_EOTINTCLR_EPTXINTCLR2_Msk (0x4UL)

#define	USB_EOTINTCLR_EPTXINTCLR3_Pos (3UL)

#define	USB_EOTINTCLR_EPTXINTCLR3_Msk (0x8UL)

#define	USB_EOTINTCLR_EPTXINTCLR4_Pos (4UL)

#define	USB_EOTINTCLR_EPTXINTCLR4_Msk (0x10UL)

#define	USB_EOTINTCLR_EPTXINTCLR5_Pos (5UL)

#define	USB_EOTINTCLR_EPTXINTCLR5_Msk (0x20UL)

#define	USB_EOTINTCLR_EPTXINTCLR6_Pos (6UL)

#define	USB_EOTINTCLR_EPTXINTCLR6_Msk (0x40UL)

#define	USB_EOTINTCLR_EPTXINTCLR7_Pos (7UL)

#define	USB_EOTINTCLR_EPTXINTCLR7_Msk (0x80UL)

#define	USB_EOTINTCLR_EPTXINTCLR8_Pos (8UL)

#define	USB_EOTINTCLR_EPTXINTCLR8_Msk (0x100UL)

#define	USB_EOTINTCLR_EPTXINTCLR9_Pos (9UL)

#define	USB_EOTINTCLR_EPTXINTCLR9_Msk (0x200UL)

#define	USB_EOTINTCLR_EPTXINTCLR10_Pos (10UL)

#define	USB_EOTINTCLR_EPTXINTCLR10_Msk (0x400UL)

#define	USB_EOTINTCLR_EPTXINTCLR11_Pos (11UL)

#define	USB_EOTINTCLR_EPTXINTCLR11_Msk (0x800UL)

#define	USB_EOTINTCLR_EPTXINTCLR12_Pos (12UL)

#define	USB_EOTINTCLR_EPTXINTCLR12_Msk (0x1000UL)

#define	USB_EOTINTCLR_EPTXINTCLR13_Pos (13UL)

#define	USB_EOTINTCLR_EPTXINTCLR13_Msk (0x2000UL)

#define	USB_EOTINTCLR_EPTXINTCLR14_Pos (14UL)

#define	USB_EOTINTCLR_EPTXINTCLR14_Msk (0x4000UL)

#define	USB_EOTINTCLR_EPTXINTCLR15_Pos (15UL)

#define	USB_EOTINTCLR_EPTXINTCLR15_Msk (0x8000UL)

#define	USB_EOTINTCLR_EPTXINTCLR16_Pos (16UL)

#define	USB_EOTINTCLR_EPTXINTCLR16_Msk (0x10000UL)

#define	USB_EOTINTCLR_EPTXINTCLR17_Pos (17UL)

#define	USB_EOTINTCLR_EPTXINTCLR17_Msk (0x20000UL)

#define	USB_EOTINTCLR_EPTXINTCLR18_Pos (18UL)

#define	USB_EOTINTCLR_EPTXINTCLR18_Msk (0x40000UL)

#define	USB_EOTINTCLR_EPTXINTCLR19_Pos (19UL)

#define	USB_EOTINTCLR_EPTXINTCLR19_Msk (0x80000UL)

#define	USB_EOTINTCLR_EPTXINTCLR20_Pos (20UL)

#define	USB_EOTINTCLR_EPTXINTCLR20_Msk (0x100000UL)

#define	USB_EOTINTCLR_EPTXINTCLR21_Pos (21UL)

#define	USB_EOTINTCLR_EPTXINTCLR21_Msk (0x200000UL)

#define	USB_EOTINTCLR_EPTXINTCLR22_Pos (22UL)

#define	USB_EOTINTCLR_EPTXINTCLR22_Msk (0x400000UL)

#define	USB_EOTINTCLR_EPTXINTCLR23_Pos (23UL)

#define	USB_EOTINTCLR_EPTXINTCLR23_Msk (0x800000UL)

#define	USB_EOTINTCLR_EPTXINTCLR24_Pos (24UL)

#define	USB_EOTINTCLR_EPTXINTCLR24_Msk (0x1000000UL)

#define	USB_EOTINTCLR_EPTXINTCLR25_Pos (25UL)

#define	USB_EOTINTCLR_EPTXINTCLR25_Msk (0x2000000UL)

#define	USB_EOTINTCLR_EPTXINTCLR26_Pos (26UL)

#define	USB_EOTINTCLR_EPTXINTCLR26_Msk (0x4000000UL)

#define	USB_EOTINTCLR_EPTXINTCLR27_Pos (27UL)

#define	USB_EOTINTCLR_EPTXINTCLR27_Msk (0x8000000UL)

#define	USB_EOTINTCLR_EPTXINTCLR28_Pos (28UL)

#define	USB_EOTINTCLR_EPTXINTCLR28_Msk (0x10000000UL)

#define	USB_EOTINTCLR_EPTXINTCLR29_Pos (29UL)

#define	USB_EOTINTCLR_EPTXINTCLR29_Msk (0x20000000UL)

#define	USB_EOTINTCLR_EPTXINTCLR30_Pos (30UL)

#define	USB_EOTINTCLR_EPTXINTCLR30_Msk (0x40000000UL)

#define	USB_EOTINTCLR_EPTXINTCLR31_Pos (31UL)

#define	USB_EOTINTCLR_EPTXINTCLR31_Msk (0x80000000UL)

#define	USB_EOTINTSET_EPTXINTSET0_Pos (0UL)

#define	USB_EOTINTSET_EPTXINTSET0_Msk (0x1UL)

#define	USB_EOTINTSET_EPTXINTSET1_Pos (1UL)

#define	USB_EOTINTSET_EPTXINTSET1_Msk (0x2UL)

#define	USB_EOTINTSET_EPTXINTSET2_Pos (2UL)

#define	USB_EOTINTSET_EPTXINTSET2_Msk (0x4UL)

#define	USB_EOTINTSET_EPTXINTSET3_Pos (3UL)

#define	USB_EOTINTSET_EPTXINTSET3_Msk (0x8UL)

#define	USB_EOTINTSET_EPTXINTSET4_Pos (4UL)

#define	USB_EOTINTSET_EPTXINTSET4_Msk (0x10UL)

#define	USB_EOTINTSET_EPTXINTSET5_Pos (5UL)

#define	USB_EOTINTSET_EPTXINTSET5_Msk (0x20UL)

#define	USB_EOTINTSET_EPTXINTSET6_Pos (6UL)

#define	USB_EOTINTSET_EPTXINTSET6_Msk (0x40UL)

#define	USB_EOTINTSET_EPTXINTSET7_Pos (7UL)

#define	USB_EOTINTSET_EPTXINTSET7_Msk (0x80UL)

#define	USB_EOTINTSET_EPTXINTSET8_Pos (8UL)

#define	USB_EOTINTSET_EPTXINTSET8_Msk (0x100UL)

#define	USB_EOTINTSET_EPTXINTSET9_Pos (9UL)

#define	USB_EOTINTSET_EPTXINTSET9_Msk (0x200UL)

#define	USB_EOTINTSET_EPTXINTSET10_Pos (10UL)

#define	USB_EOTINTSET_EPTXINTSET10_Msk (0x400UL)

#define	USB_EOTINTSET_EPTXINTSET11_Pos (11UL)

#define	USB_EOTINTSET_EPTXINTSET11_Msk (0x800UL)

#define	USB_EOTINTSET_EPTXINTSET12_Pos (12UL)

#define	USB_EOTINTSET_EPTXINTSET12_Msk (0x1000UL)

#define	USB_EOTINTSET_EPTXINTSET13_Pos (13UL)

#define	USB_EOTINTSET_EPTXINTSET13_Msk (0x2000UL)

#define	USB_EOTINTSET_EPTXINTSET14_Pos (14UL)

#define	USB_EOTINTSET_EPTXINTSET14_Msk (0x4000UL)

#define	USB_EOTINTSET_EPTXINTSET15_Pos (15UL)

#define	USB_EOTINTSET_EPTXINTSET15_Msk (0x8000UL)

#define	USB_EOTINTSET_EPTXINTSET16_Pos (16UL)

#define	USB_EOTINTSET_EPTXINTSET16_Msk (0x10000UL)

#define	USB_EOTINTSET_EPTXINTSET17_Pos (17UL)

#define	USB_EOTINTSET_EPTXINTSET17_Msk (0x20000UL)

#define	USB_EOTINTSET_EPTXINTSET18_Pos (18UL)

#define	USB_EOTINTSET_EPTXINTSET18_Msk (0x40000UL)

#define	USB_EOTINTSET_EPTXINTSET19_Pos (19UL)

#define	USB_EOTINTSET_EPTXINTSET19_Msk (0x80000UL)

#define	USB_EOTINTSET_EPTXINTSET20_Pos (20UL)

#define	USB_EOTINTSET_EPTXINTSET20_Msk (0x100000UL)

#define	USB_EOTINTSET_EPTXINTSET21_Pos (21UL)

#define	USB_EOTINTSET_EPTXINTSET21_Msk (0x200000UL)

#define	USB_EOTINTSET_EPTXINTSET22_Pos (22UL)

#define	USB_EOTINTSET_EPTXINTSET22_Msk (0x400000UL)

#define	USB_EOTINTSET_EPTXINTSET23_Pos (23UL)

#define	USB_EOTINTSET_EPTXINTSET23_Msk (0x800000UL)

#define	USB_EOTINTSET_EPTXINTSET24_Pos (24UL)

#define	USB_EOTINTSET_EPTXINTSET24_Msk (0x1000000UL)

#define	USB_EOTINTSET_EPTXINTSET25_Pos (25UL)

#define	USB_EOTINTSET_EPTXINTSET25_Msk (0x2000000UL)

#define	USB_EOTINTSET_EPTXINTSET26_Pos (26UL)

#define	USB_EOTINTSET_EPTXINTSET26_Msk (0x4000000UL)

#define	USB_EOTINTSET_EPTXINTSET27_Pos (27UL)

#define	USB_EOTINTSET_EPTXINTSET27_Msk (0x8000000UL)

#define	USB_EOTINTSET_EPTXINTSET28_Pos (28UL)

#define	USB_EOTINTSET_EPTXINTSET28_Msk (0x10000000UL)

#define	USB_EOTINTSET_EPTXINTSET29_Pos (29UL)

#define	USB_EOTINTSET_EPTXINTSET29_Msk (0x20000000UL)

#define	USB_EOTINTSET_EPTXINTSET30_Pos (30UL)

#define	USB_EOTINTSET_EPTXINTSET30_Msk (0x40000000UL)

#define	USB_EOTINTSET_EPTXINTSET31_Pos (31UL)

#define	USB_EOTINTSET_EPTXINTSET31_Msk (0x80000000UL)

#define	USB_NDDRINTST_EPNDDINTST0_Pos (0UL)

#define	USB_NDDRINTST_EPNDDINTST0_Msk (0x1UL)

#define	USB_NDDRINTST_EPNDDINTST1_Pos (1UL)

#define	USB_NDDRINTST_EPNDDINTST1_Msk (0x2UL)

#define	USB_NDDRINTST_EPNDDINTST2_Pos (2UL)

#define	USB_NDDRINTST_EPNDDINTST2_Msk (0x4UL)

#define	USB_NDDRINTST_EPNDDINTST3_Pos (3UL)

#define	USB_NDDRINTST_EPNDDINTST3_Msk (0x8UL)

#define	USB_NDDRINTST_EPNDDINTST4_Pos (4UL)

#define	USB_NDDRINTST_EPNDDINTST4_Msk (0x10UL)

#define	USB_NDDRINTST_EPNDDINTST5_Pos (5UL)

#define	USB_NDDRINTST_EPNDDINTST5_Msk (0x20UL)

#define	USB_NDDRINTST_EPNDDINTST6_Pos (6UL)

#define	USB_NDDRINTST_EPNDDINTST6_Msk (0x40UL)

#define	USB_NDDRINTST_EPNDDINTST7_Pos (7UL)

#define	USB_NDDRINTST_EPNDDINTST7_Msk (0x80UL)

#define	USB_NDDRINTST_EPNDDINTST8_Pos (8UL)

#define	USB_NDDRINTST_EPNDDINTST8_Msk (0x100UL)

#define	USB_NDDRINTST_EPNDDINTST9_Pos (9UL)

#define	USB_NDDRINTST_EPNDDINTST9_Msk (0x200UL)

#define	USB_NDDRINTST_EPNDDINTST10_Pos (10UL)

#define	USB_NDDRINTST_EPNDDINTST10_Msk (0x400UL)

#define	USB_NDDRINTST_EPNDDINTST11_Pos (11UL)

#define	USB_NDDRINTST_EPNDDINTST11_Msk (0x800UL)

#define	USB_NDDRINTST_EPNDDINTST12_Pos (12UL)

#define	USB_NDDRINTST_EPNDDINTST12_Msk (0x1000UL)

#define	USB_NDDRINTST_EPNDDINTST13_Pos (13UL)

#define	USB_NDDRINTST_EPNDDINTST13_Msk (0x2000UL)

#define	USB_NDDRINTST_EPNDDINTST14_Pos (14UL)

#define	USB_NDDRINTST_EPNDDINTST14_Msk (0x4000UL)

#define	USB_NDDRINTST_EPNDDINTST15_Pos (15UL)

#define	USB_NDDRINTST_EPNDDINTST15_Msk (0x8000UL)

#define	USB_NDDRINTST_EPNDDINTST16_Pos (16UL)

#define	USB_NDDRINTST_EPNDDINTST16_Msk (0x10000UL)

#define	USB_NDDRINTST_EPNDDINTST17_Pos (17UL)

#define	USB_NDDRINTST_EPNDDINTST17_Msk (0x20000UL)

#define	USB_NDDRINTST_EPNDDINTST18_Pos (18UL)

#define	USB_NDDRINTST_EPNDDINTST18_Msk (0x40000UL)

#define	USB_NDDRINTST_EPNDDINTST19_Pos (19UL)

#define	USB_NDDRINTST_EPNDDINTST19_Msk (0x80000UL)

#define	USB_NDDRINTST_EPNDDINTST20_Pos (20UL)

#define	USB_NDDRINTST_EPNDDINTST20_Msk (0x100000UL)

#define	USB_NDDRINTST_EPNDDINTST21_Pos (21UL)

#define	USB_NDDRINTST_EPNDDINTST21_Msk (0x200000UL)

#define	USB_NDDRINTST_EPNDDINTST22_Pos (22UL)

#define	USB_NDDRINTST_EPNDDINTST22_Msk (0x400000UL)

#define	USB_NDDRINTST_EPNDDINTST23_Pos (23UL)

#define	USB_NDDRINTST_EPNDDINTST23_Msk (0x800000UL)

#define	USB_NDDRINTST_EPNDDINTST24_Pos (24UL)

#define	USB_NDDRINTST_EPNDDINTST24_Msk (0x1000000UL)

#define	USB_NDDRINTST_EPNDDINTST25_Pos (25UL)

#define	USB_NDDRINTST_EPNDDINTST25_Msk (0x2000000UL)

#define	USB_NDDRINTST_EPNDDINTST26_Pos (26UL)

#define	USB_NDDRINTST_EPNDDINTST26_Msk (0x4000000UL)

#define	USB_NDDRINTST_EPNDDINTST27_Pos (27UL)

#define	USB_NDDRINTST_EPNDDINTST27_Msk (0x8000000UL)

#define	USB_NDDRINTST_EPNDDINTST28_Pos (28UL)

#define	USB_NDDRINTST_EPNDDINTST28_Msk (0x10000000UL)

#define	USB_NDDRINTST_EPNDDINTST29_Pos (29UL)

#define	USB_NDDRINTST_EPNDDINTST29_Msk (0x20000000UL)

#define	USB_NDDRINTST_EPNDDINTST30_Pos (30UL)

#define	USB_NDDRINTST_EPNDDINTST30_Msk (0x40000000UL)

#define	USB_NDDRINTST_EPNDDINTST31_Pos (31UL)

#define	USB_NDDRINTST_EPNDDINTST31_Msk (0x80000000UL)

#define	USB_NDDRINTCLR_EPNDDINTCLR0_Pos (0UL)

#define	USB_NDDRINTCLR_EPNDDINTCLR0_Msk (0x1UL)

#define	USB_NDDRINTCLR_EPNDDINTCLR1_Pos (1UL)

#define	USB_NDDRINTCLR_EPNDDINTCLR1_Msk (0x2UL)

#define	USB_NDDRINTCLR_EPNDDINTCLR2_Pos (2UL)

#define	USB_NDDRINTCLR_EPNDDINTCLR2_Msk (0x4UL)

#define	USB_NDDRINTCLR_EPNDDINTCLR3_Pos (3UL)

#define	USB_NDDRINTCLR_EPNDDINTCLR3_Msk (0x8UL)

#define	USB_NDDRINTCLR_EPNDDINTCLR4_Pos (4UL)

#define	USB_NDDRINTCLR_EPNDDINTCLR4_Msk (0x10UL)

#define	USB_NDDRINTCLR_EPNDDINTCLR5_Pos (5UL)

#define	USB_NDDRINTCLR_EPNDDINTCLR5_Msk (0x20UL)

#define	USB_NDDRINTCLR_EPNDDINTCLR6_Pos (6UL)

#define	USB_NDDRINTCLR_EPNDDINTCLR6_Msk (0x40UL)

#define	USB_NDDRINTCLR_EPNDDINTCLR7_Pos (7UL)

#define	USB_NDDRINTCLR_EPNDDINTCLR7_Msk (0x80UL)

#define	USB_NDDRINTCLR_EPNDDINTCLR8_Pos (8UL)

#define	USB_NDDRINTCLR_EPNDDINTCLR8_Msk (0x100UL)

#define	USB_NDDRINTCLR_EPNDDINTCLR9_Pos (9UL)

#define	USB_NDDRINTCLR_EPNDDINTCLR9_Msk (0x200UL)

#define	USB_NDDRINTCLR_EPNDDINTCLR10_Pos (10UL)

#define	USB_NDDRINTCLR_EPNDDINTCLR10_Msk (0x400UL)

#define	USB_NDDRINTCLR_EPNDDINTCLR11_Pos (11UL)

#define	USB_NDDRINTCLR_EPNDDINTCLR11_Msk (0x800UL)

#define	USB_NDDRINTCLR_EPNDDINTCLR12_Pos (12UL)

#define	USB_NDDRINTCLR_EPNDDINTCLR12_Msk (0x1000UL)

#define	USB_NDDRINTCLR_EPNDDINTCLR13_Pos (13UL)

#define	USB_NDDRINTCLR_EPNDDINTCLR13_Msk (0x2000UL)

#define	USB_NDDRINTCLR_EPNDDINTCLR14_Pos (14UL)

#define	USB_NDDRINTCLR_EPNDDINTCLR14_Msk (0x4000UL)

#define	USB_NDDRINTCLR_EPNDDINTCLR15_Pos (15UL)

#define	USB_NDDRINTCLR_EPNDDINTCLR15_Msk (0x8000UL)

#define	USB_NDDRINTCLR_EPNDDINTCLR16_Pos (16UL)

#define	USB_NDDRINTCLR_EPNDDINTCLR16_Msk (0x10000UL)

#define	USB_NDDRINTCLR_EPNDDINTCLR17_Pos (17UL)

#define	USB_NDDRINTCLR_EPNDDINTCLR17_Msk (0x20000UL)

#define	USB_NDDRINTCLR_EPNDDINTCLR18_Pos (18UL)

#define	USB_NDDRINTCLR_EPNDDINTCLR18_Msk (0x40000UL)

#define	USB_NDDRINTCLR_EPNDDINTCLR19_Pos (19UL)

#define	USB_NDDRINTCLR_EPNDDINTCLR19_Msk (0x80000UL)

#define	USB_NDDRINTCLR_EPNDDINTCLR20_Pos (20UL)

#define	USB_NDDRINTCLR_EPNDDINTCLR20_Msk (0x100000UL)

#define	USB_NDDRINTCLR_EPNDDINTCLR21_Pos (21UL)

#define	USB_NDDRINTCLR_EPNDDINTCLR21_Msk (0x200000UL)

#define	USB_NDDRINTCLR_EPNDDINTCLR22_Pos (22UL)

#define	USB_NDDRINTCLR_EPNDDINTCLR22_Msk (0x400000UL)

#define	USB_NDDRINTCLR_EPNDDINTCLR23_Pos (23UL)

#define	USB_NDDRINTCLR_EPNDDINTCLR23_Msk (0x800000UL)

#define	USB_NDDRINTCLR_EPNDDINTCLR24_Pos (24UL)

#define	USB_NDDRINTCLR_EPNDDINTCLR24_Msk (0x1000000UL)

#define	USB_NDDRINTCLR_EPNDDINTCLR25_Pos (25UL)

#define	USB_NDDRINTCLR_EPNDDINTCLR25_Msk (0x2000000UL)

#define	USB_NDDRINTCLR_EPNDDINTCLR26_Pos (26UL)

#define	USB_NDDRINTCLR_EPNDDINTCLR26_Msk (0x4000000UL)

#define	USB_NDDRINTCLR_EPNDDINTCLR27_Pos (27UL)

#define	USB_NDDRINTCLR_EPNDDINTCLR27_Msk (0x8000000UL)

#define	USB_NDDRINTCLR_EPNDDINTCLR28_Pos (28UL)

#define	USB_NDDRINTCLR_EPNDDINTCLR28_Msk (0x10000000UL)

#define	USB_NDDRINTCLR_EPNDDINTCLR29_Pos (29UL)

#define	USB_NDDRINTCLR_EPNDDINTCLR29_Msk (0x20000000UL)

#define	USB_NDDRINTCLR_EPNDDINTCLR30_Pos (30UL)

#define	USB_NDDRINTCLR_EPNDDINTCLR30_Msk (0x40000000UL)

#define	USB_NDDRINTCLR_EPNDDINTCLR31_Pos (31UL)

#define	USB_NDDRINTCLR_EPNDDINTCLR31_Msk (0x80000000UL)

#define	USB_NDDRINTSET_EPNDDINTSET0_Pos (0UL)

#define	USB_NDDRINTSET_EPNDDINTSET0_Msk (0x1UL)

#define	USB_NDDRINTSET_EPNDDINTSET1_Pos (1UL)

#define	USB_NDDRINTSET_EPNDDINTSET1_Msk (0x2UL)

#define	USB_NDDRINTSET_EPNDDINTSET2_Pos (2UL)

#define	USB_NDDRINTSET_EPNDDINTSET2_Msk (0x4UL)

#define	USB_NDDRINTSET_EPNDDINTSET3_Pos (3UL)

#define	USB_NDDRINTSET_EPNDDINTSET3_Msk (0x8UL)

#define	USB_NDDRINTSET_EPNDDINTSET4_Pos (4UL)

#define	USB_NDDRINTSET_EPNDDINTSET4_Msk (0x10UL)

#define	USB_NDDRINTSET_EPNDDINTSET5_Pos (5UL)

#define	USB_NDDRINTSET_EPNDDINTSET5_Msk (0x20UL)

#define	USB_NDDRINTSET_EPNDDINTSET6_Pos (6UL)

#define	USB_NDDRINTSET_EPNDDINTSET6_Msk (0x40UL)

#define	USB_NDDRINTSET_EPNDDINTSET7_Pos (7UL)

#define	USB_NDDRINTSET_EPNDDINTSET7_Msk (0x80UL)

#define	USB_NDDRINTSET_EPNDDINTSET8_Pos (8UL)

#define	USB_NDDRINTSET_EPNDDINTSET8_Msk (0x100UL)

#define	USB_NDDRINTSET_EPNDDINTSET9_Pos (9UL)

#define	USB_NDDRINTSET_EPNDDINTSET9_Msk (0x200UL)

#define	USB_NDDRINTSET_EPNDDINTSET10_Pos (10UL)

#define	USB_NDDRINTSET_EPNDDINTSET10_Msk (0x400UL)

#define	USB_NDDRINTSET_EPNDDINTSET11_Pos (11UL)

#define	USB_NDDRINTSET_EPNDDINTSET11_Msk (0x800UL)

#define	USB_NDDRINTSET_EPNDDINTSET12_Pos (12UL)

#define	USB_NDDRINTSET_EPNDDINTSET12_Msk (0x1000UL)

#define	USB_NDDRINTSET_EPNDDINTSET13_Pos (13UL)

#define	USB_NDDRINTSET_EPNDDINTSET13_Msk (0x2000UL)

#define	USB_NDDRINTSET_EPNDDINTSET14_Pos (14UL)

#define	USB_NDDRINTSET_EPNDDINTSET14_Msk (0x4000UL)

#define	USB_NDDRINTSET_EPNDDINTSET15_Pos (15UL)

#define	USB_NDDRINTSET_EPNDDINTSET15_Msk (0x8000UL)

#define	USB_NDDRINTSET_EPNDDINTSET16_Pos (16UL)

#define	USB_NDDRINTSET_EPNDDINTSET16_Msk (0x10000UL)

#define	USB_NDDRINTSET_EPNDDINTSET17_Pos (17UL)

#define	USB_NDDRINTSET_EPNDDINTSET17_Msk (0x20000UL)

#define	USB_NDDRINTSET_EPNDDINTSET18_Pos (18UL)

#define	USB_NDDRINTSET_EPNDDINTSET18_Msk (0x40000UL)

#define	USB_NDDRINTSET_EPNDDINTSET19_Pos (19UL)

#define	USB_NDDRINTSET_EPNDDINTSET19_Msk (0x80000UL)

#define	USB_NDDRINTSET_EPNDDINTSET20_Pos (20UL)

#define	USB_NDDRINTSET_EPNDDINTSET20_Msk (0x100000UL)

#define	USB_NDDRINTSET_EPNDDINTSET21_Pos (21UL)

#define	USB_NDDRINTSET_EPNDDINTSET21_Msk (0x200000UL)

#define	USB_NDDRINTSET_EPNDDINTSET22_Pos (22UL)

#define	USB_NDDRINTSET_EPNDDINTSET22_Msk (0x400000UL)

#define	USB_NDDRINTSET_EPNDDINTSET23_Pos (23UL)

#define	USB_NDDRINTSET_EPNDDINTSET23_Msk (0x800000UL)

#define	USB_NDDRINTSET_EPNDDINTSET24_Pos (24UL)

#define	USB_NDDRINTSET_EPNDDINTSET24_Msk (0x1000000UL)

#define	USB_NDDRINTSET_EPNDDINTSET25_Pos (25UL)

#define	USB_NDDRINTSET_EPNDDINTSET25_Msk (0x2000000UL)

#define	USB_NDDRINTSET_EPNDDINTSET26_Pos (26UL)

#define	USB_NDDRINTSET_EPNDDINTSET26_Msk (0x4000000UL)

#define	USB_NDDRINTSET_EPNDDINTSET27_Pos (27UL)

#define	USB_NDDRINTSET_EPNDDINTSET27_Msk (0x8000000UL)

#define	USB_NDDRINTSET_EPNDDINTSET28_Pos (28UL)

#define	USB_NDDRINTSET_EPNDDINTSET28_Msk (0x10000000UL)

#define	USB_NDDRINTSET_EPNDDINTSET29_Pos (29UL)

#define	USB_NDDRINTSET_EPNDDINTSET29_Msk (0x20000000UL)

#define	USB_NDDRINTSET_EPNDDINTSET30_Pos (30UL)

#define	USB_NDDRINTSET_EPNDDINTSET30_Msk (0x40000000UL)

#define	USB_NDDRINTSET_EPNDDINTSET31_Pos (31UL)

#define	USB_NDDRINTSET_EPNDDINTSET31_Msk (0x80000000UL)

#define	USB_SYSERRINTST_EPERRINTST0_Pos (0UL)

#define	USB_SYSERRINTST_EPERRINTST0_Msk (0x1UL)

#define	USB_SYSERRINTST_EPERRINTST1_Pos (1UL)

#define	USB_SYSERRINTST_EPERRINTST1_Msk (0x2UL)

#define	USB_SYSERRINTST_EPERRINTST2_Pos (2UL)

#define	USB_SYSERRINTST_EPERRINTST2_Msk (0x4UL)

#define	USB_SYSERRINTST_EPERRINTST3_Pos (3UL)

#define	USB_SYSERRINTST_EPERRINTST3_Msk (0x8UL)

#define	USB_SYSERRINTST_EPERRINTST4_Pos (4UL)

#define	USB_SYSERRINTST_EPERRINTST4_Msk (0x10UL)

#define	USB_SYSERRINTST_EPERRINTST5_Pos (5UL)

#define	USB_SYSERRINTST_EPERRINTST5_Msk (0x20UL)

#define	USB_SYSERRINTST_EPERRINTST6_Pos (6UL)

#define	USB_SYSERRINTST_EPERRINTST6_Msk (0x40UL)

#define	USB_SYSERRINTST_EPERRINTST7_Pos (7UL)

#define	USB_SYSERRINTST_EPERRINTST7_Msk (0x80UL)

#define	USB_SYSERRINTST_EPERRINTST8_Pos (8UL)

#define	USB_SYSERRINTST_EPERRINTST8_Msk (0x100UL)

#define	USB_SYSERRINTST_EPERRINTST9_Pos (9UL)

#define	USB_SYSERRINTST_EPERRINTST9_Msk (0x200UL)

#define	USB_SYSERRINTST_EPERRINTST10_Pos (10UL)

#define	USB_SYSERRINTST_EPERRINTST10_Msk (0x400UL)

#define	USB_SYSERRINTST_EPERRINTST11_Pos (11UL)

#define	USB_SYSERRINTST_EPERRINTST11_Msk (0x800UL)

#define	USB_SYSERRINTST_EPERRINTST12_Pos (12UL)

#define	USB_SYSERRINTST_EPERRINTST12_Msk (0x1000UL)

#define	USB_SYSERRINTST_EPERRINTST13_Pos (13UL)

#define	USB_SYSERRINTST_EPERRINTST13_Msk (0x2000UL)

#define	USB_SYSERRINTST_EPERRINTST14_Pos (14UL)

#define	USB_SYSERRINTST_EPERRINTST14_Msk (0x4000UL)

#define	USB_SYSERRINTST_EPERRINTST15_Pos (15UL)

#define	USB_SYSERRINTST_EPERRINTST15_Msk (0x8000UL)

#define	USB_SYSERRINTST_EPERRINTST16_Pos (16UL)

#define	USB_SYSERRINTST_EPERRINTST16_Msk (0x10000UL)

#define	USB_SYSERRINTST_EPERRINTST17_Pos (17UL)

#define	USB_SYSERRINTST_EPERRINTST17_Msk (0x20000UL)

#define	USB_SYSERRINTST_EPERRINTST18_Pos (18UL)

#define	USB_SYSERRINTST_EPERRINTST18_Msk (0x40000UL)

#define	USB_SYSERRINTST_EPERRINTST19_Pos (19UL)

#define	USB_SYSERRINTST_EPERRINTST19_Msk (0x80000UL)

#define	USB_SYSERRINTST_EPERRINTST20_Pos (20UL)

#define	USB_SYSERRINTST_EPERRINTST20_Msk (0x100000UL)

#define	USB_SYSERRINTST_EPERRINTST21_Pos (21UL)

#define	USB_SYSERRINTST_EPERRINTST21_Msk (0x200000UL)

#define	USB_SYSERRINTST_EPERRINTST22_Pos (22UL)

#define	USB_SYSERRINTST_EPERRINTST22_Msk (0x400000UL)

#define	USB_SYSERRINTST_EPERRINTST23_Pos (23UL)

#define	USB_SYSERRINTST_EPERRINTST23_Msk (0x800000UL)

#define	USB_SYSERRINTST_EPERRINTST24_Pos (24UL)

#define	USB_SYSERRINTST_EPERRINTST24_Msk (0x1000000UL)

#define	USB_SYSERRINTST_EPERRINTST25_Pos (25UL)

#define	USB_SYSERRINTST_EPERRINTST25_Msk (0x2000000UL)

#define	USB_SYSERRINTST_EPERRINTST26_Pos (26UL)

#define	USB_SYSERRINTST_EPERRINTST26_Msk (0x4000000UL)

#define	USB_SYSERRINTST_EPERRINTST27_Pos (27UL)

#define	USB_SYSERRINTST_EPERRINTST27_Msk (0x8000000UL)

#define	USB_SYSERRINTST_EPERRINTST28_Pos (28UL)

#define	USB_SYSERRINTST_EPERRINTST28_Msk (0x10000000UL)

#define	USB_SYSERRINTST_EPERRINTST29_Pos (29UL)

#define	USB_SYSERRINTST_EPERRINTST29_Msk (0x20000000UL)

#define	USB_SYSERRINTST_EPERRINTST30_Pos (30UL)

#define	USB_SYSERRINTST_EPERRINTST30_Msk (0x40000000UL)

#define	USB_SYSERRINTST_EPERRINTST31_Pos (31UL)

#define	USB_SYSERRINTST_EPERRINTST31_Msk (0x80000000UL)

#define	USB_SYSERRINTCLR_EPERRINTCLR0_Pos (0UL)

#define	USB_SYSERRINTCLR_EPERRINTCLR0_Msk (0x1UL)

#define	USB_SYSERRINTCLR_EPERRINTCLR1_Pos (1UL)

#define	USB_SYSERRINTCLR_EPERRINTCLR1_Msk (0x2UL)

#define	USB_SYSERRINTCLR_EPERRINTCLR2_Pos (2UL)

#define	USB_SYSERRINTCLR_EPERRINTCLR2_Msk (0x4UL)

#define	USB_SYSERRINTCLR_EPERRINTCLR3_Pos (3UL)

#define	USB_SYSERRINTCLR_EPERRINTCLR3_Msk (0x8UL)

#define	USB_SYSERRINTCLR_EPERRINTCLR4_Pos (4UL)

#define	USB_SYSERRINTCLR_EPERRINTCLR4_Msk (0x10UL)

#define	USB_SYSERRINTCLR_EPERRINTCLR5_Pos (5UL)

#define	USB_SYSERRINTCLR_EPERRINTCLR5_Msk (0x20UL)

#define	USB_SYSERRINTCLR_EPERRINTCLR6_Pos (6UL)

#define	USB_SYSERRINTCLR_EPERRINTCLR6_Msk (0x40UL)

#define	USB_SYSERRINTCLR_EPERRINTCLR7_Pos (7UL)

#define	USB_SYSERRINTCLR_EPERRINTCLR7_Msk (0x80UL)

#define	USB_SYSERRINTCLR_EPERRINTCLR8_Pos (8UL)

#define	USB_SYSERRINTCLR_EPERRINTCLR8_Msk (0x100UL)

#define	USB_SYSERRINTCLR_EPERRINTCLR9_Pos (9UL)

#define	USB_SYSERRINTCLR_EPERRINTCLR9_Msk (0x200UL)

#define	USB_SYSERRINTCLR_EPERRINTCLR10_Pos (10UL)

#define	USB_SYSERRINTCLR_EPERRINTCLR10_Msk (0x400UL)

#define	USB_SYSERRINTCLR_EPERRINTCLR11_Pos (11UL)

#define	USB_SYSERRINTCLR_EPERRINTCLR11_Msk (0x800UL)

#define	USB_SYSERRINTCLR_EPERRINTCLR12_Pos (12UL)

#define	USB_SYSERRINTCLR_EPERRINTCLR12_Msk (0x1000UL)

#define	USB_SYSERRINTCLR_EPERRINTCLR13_Pos (13UL)

#define	USB_SYSERRINTCLR_EPERRINTCLR13_Msk (0x2000UL)

#define	USB_SYSERRINTCLR_EPERRINTCLR14_Pos (14UL)

#define	USB_SYSERRINTCLR_EPERRINTCLR14_Msk (0x4000UL)

#define	USB_SYSERRINTCLR_EPERRINTCLR15_Pos (15UL)

#define	USB_SYSERRINTCLR_EPERRINTCLR15_Msk (0x8000UL)

#define	USB_SYSERRINTCLR_EPERRINTCLR16_Pos (16UL)

#define	USB_SYSERRINTCLR_EPERRINTCLR16_Msk (0x10000UL)

#define	USB_SYSERRINTCLR_EPERRINTCLR17_Pos (17UL)

#define	USB_SYSERRINTCLR_EPERRINTCLR17_Msk (0x20000UL)

#define	USB_SYSERRINTCLR_EPERRINTCLR18_Pos (18UL)

#define	USB_SYSERRINTCLR_EPERRINTCLR18_Msk (0x40000UL)

#define	USB_SYSERRINTCLR_EPERRINTCLR19_Pos (19UL)

#define	USB_SYSERRINTCLR_EPERRINTCLR19_Msk (0x80000UL)

#define	USB_SYSERRINTCLR_EPERRINTCLR20_Pos (20UL)

#define	USB_SYSERRINTCLR_EPERRINTCLR20_Msk (0x100000UL)

#define	USB_SYSERRINTCLR_EPERRINTCLR21_Pos (21UL)

#define	USB_SYSERRINTCLR_EPERRINTCLR21_Msk (0x200000UL)

#define	USB_SYSERRINTCLR_EPERRINTCLR22_Pos (22UL)

#define	USB_SYSERRINTCLR_EPERRINTCLR22_Msk (0x400000UL)

#define	USB_SYSERRINTCLR_EPERRINTCLR23_Pos (23UL)

#define	USB_SYSERRINTCLR_EPERRINTCLR23_Msk (0x800000UL)

#define	USB_SYSERRINTCLR_EPERRINTCLR24_Pos (24UL)

#define	USB_SYSERRINTCLR_EPERRINTCLR24_Msk (0x1000000UL)

#define	USB_SYSERRINTCLR_EPERRINTCLR25_Pos (25UL)

#define	USB_SYSERRINTCLR_EPERRINTCLR25_Msk (0x2000000UL)

#define	USB_SYSERRINTCLR_EPERRINTCLR26_Pos (26UL)

#define	USB_SYSERRINTCLR_EPERRINTCLR26_Msk (0x4000000UL)

#define	USB_SYSERRINTCLR_EPERRINTCLR27_Pos (27UL)

#define	USB_SYSERRINTCLR_EPERRINTCLR27_Msk (0x8000000UL)

#define	USB_SYSERRINTCLR_EPERRINTCLR28_Pos (28UL)

#define	USB_SYSERRINTCLR_EPERRINTCLR28_Msk (0x10000000UL)

#define	USB_SYSERRINTCLR_EPERRINTCLR29_Pos (29UL)

#define	USB_SYSERRINTCLR_EPERRINTCLR29_Msk (0x20000000UL)

#define	USB_SYSERRINTCLR_EPERRINTCLR30_Pos (30UL)

#define	USB_SYSERRINTCLR_EPERRINTCLR30_Msk (0x40000000UL)

#define	USB_SYSERRINTCLR_EPERRINTCLR31_Pos (31UL)

#define	USB_SYSERRINTCLR_EPERRINTCLR31_Msk (0x80000000UL)

#define	USB_SYSERRINTSET_EPERRINTSET0_Pos (0UL)

#define	USB_SYSERRINTSET_EPERRINTSET0_Msk (0x1UL)

#define	USB_SYSERRINTSET_EPERRINTSET1_Pos (1UL)

#define	USB_SYSERRINTSET_EPERRINTSET1_Msk (0x2UL)

#define	USB_SYSERRINTSET_EPERRINTSET2_Pos (2UL)

#define	USB_SYSERRINTSET_EPERRINTSET2_Msk (0x4UL)

#define	USB_SYSERRINTSET_EPERRINTSET3_Pos (3UL)

#define	USB_SYSERRINTSET_EPERRINTSET3_Msk (0x8UL)

#define	USB_SYSERRINTSET_EPERRINTSET4_Pos (4UL)

#define	USB_SYSERRINTSET_EPERRINTSET4_Msk (0x10UL)

#define	USB_SYSERRINTSET_EPERRINTSET5_Pos (5UL)

#define	USB_SYSERRINTSET_EPERRINTSET5_Msk (0x20UL)

#define	USB_SYSERRINTSET_EPERRINTSET6_Pos (6UL)

#define	USB_SYSERRINTSET_EPERRINTSET6_Msk (0x40UL)

#define	USB_SYSERRINTSET_EPERRINTSET7_Pos (7UL)

#define	USB_SYSERRINTSET_EPERRINTSET7_Msk (0x80UL)

#define	USB_SYSERRINTSET_EPERRINTSET8_Pos (8UL)

#define	USB_SYSERRINTSET_EPERRINTSET8_Msk (0x100UL)

#define	USB_SYSERRINTSET_EPERRINTSET9_Pos (9UL)

#define	USB_SYSERRINTSET_EPERRINTSET9_Msk (0x200UL)

#define	USB_SYSERRINTSET_EPERRINTSET10_Pos (10UL)

#define	USB_SYSERRINTSET_EPERRINTSET10_Msk (0x400UL)

#define	USB_SYSERRINTSET_EPERRINTSET11_Pos (11UL)

#define	USB_SYSERRINTSET_EPERRINTSET11_Msk (0x800UL)

#define	USB_SYSERRINTSET_EPERRINTSET12_Pos (12UL)

#define	USB_SYSERRINTSET_EPERRINTSET12_Msk (0x1000UL)

#define	USB_SYSERRINTSET_EPERRINTSET13_Pos (13UL)

#define	USB_SYSERRINTSET_EPERRINTSET13_Msk (0x2000UL)

#define	USB_SYSERRINTSET_EPERRINTSET14_Pos (14UL)

#define	USB_SYSERRINTSET_EPERRINTSET14_Msk (0x4000UL)

#define	USB_SYSERRINTSET_EPERRINTSET15_Pos (15UL)

#define	USB_SYSERRINTSET_EPERRINTSET15_Msk (0x8000UL)

#define	USB_SYSERRINTSET_EPERRINTSET16_Pos (16UL)

#define	USB_SYSERRINTSET_EPERRINTSET16_Msk (0x10000UL)

#define	USB_SYSERRINTSET_EPERRINTSET17_Pos (17UL)

#define	USB_SYSERRINTSET_EPERRINTSET17_Msk (0x20000UL)

#define	USB_SYSERRINTSET_EPERRINTSET18_Pos (18UL)

#define	USB_SYSERRINTSET_EPERRINTSET18_Msk (0x40000UL)

#define	USB_SYSERRINTSET_EPERRINTSET19_Pos (19UL)

#define	USB_SYSERRINTSET_EPERRINTSET19_Msk (0x80000UL)

#define	USB_SYSERRINTSET_EPERRINTSET20_Pos (20UL)

#define	USB_SYSERRINTSET_EPERRINTSET20_Msk (0x100000UL)

#define	USB_SYSERRINTSET_EPERRINTSET21_Pos (21UL)

#define	USB_SYSERRINTSET_EPERRINTSET21_Msk (0x200000UL)

#define	USB_SYSERRINTSET_EPERRINTSET22_Pos (22UL)

#define	USB_SYSERRINTSET_EPERRINTSET22_Msk (0x400000UL)

#define	USB_SYSERRINTSET_EPERRINTSET23_Pos (23UL)

#define	USB_SYSERRINTSET_EPERRINTSET23_Msk (0x800000UL)

#define	USB_SYSERRINTSET_EPERRINTSET24_Pos (24UL)

#define	USB_SYSERRINTSET_EPERRINTSET24_Msk (0x1000000UL)

#define	USB_SYSERRINTSET_EPERRINTSET25_Pos (25UL)

#define	USB_SYSERRINTSET_EPERRINTSET25_Msk (0x2000000UL)

#define	USB_SYSERRINTSET_EPERRINTSET26_Pos (26UL)

#define	USB_SYSERRINTSET_EPERRINTSET26_Msk (0x4000000UL)

#define	USB_SYSERRINTSET_EPERRINTSET27_Pos (27UL)

#define	USB_SYSERRINTSET_EPERRINTSET27_Msk (0x8000000UL)

#define	USB_SYSERRINTSET_EPERRINTSET28_Pos (28UL)

#define	USB_SYSERRINTSET_EPERRINTSET28_Msk (0x10000000UL)

#define	USB_SYSERRINTSET_EPERRINTSET29_Pos (29UL)

#define	USB_SYSERRINTSET_EPERRINTSET29_Msk (0x20000000UL)

#define	USB_SYSERRINTSET_EPERRINTSET30_Pos (30UL)

#define	USB_SYSERRINTSET_EPERRINTSET30_Msk (0x40000000UL)

#define	USB_SYSERRINTSET_EPERRINTSET31_Pos (31UL)

#define	USB_SYSERRINTSET_EPERRINTSET31_Msk (0x80000000UL)

#define	USB_I2C_RX_RXDATA_Pos (0UL)

#define	USB_I2C_RX_RXDATA_Msk (0xffUL)

#define	USB_I2C_WO_TXDATA_Pos (0UL)

#define	USB_I2C_WO_TXDATA_Msk (0xffUL)

#define	USB_I2C_WO_START_Pos (8UL)

#define	USB_I2C_WO_START_Msk (0x100UL)

#define	USB_I2C_WO_STOP_Pos (9UL)

#define	USB_I2C_WO_STOP_Msk (0x200UL)

#define	USB_I2C_STS_TDI_Pos (0UL)

#define	USB_I2C_STS_TDI_Msk (0x1UL)

#define	USB_I2C_STS_AFI_Pos (1UL)

#define	USB_I2C_STS_AFI_Msk (0x2UL)

#define	USB_I2C_STS_NAI_Pos (2UL)

#define	USB_I2C_STS_NAI_Msk (0x4UL)

#define	USB_I2C_STS_DRMI_Pos (3UL)

#define	USB_I2C_STS_DRMI_Msk (0x8UL)

#define	USB_I2C_STS_DRSI_Pos (4UL)

#define	USB_I2C_STS_DRSI_Msk (0x10UL)

#define	USB_I2C_STS_Active_Pos (5UL)

#define	USB_I2C_STS_Active_Msk (0x20UL)

#define	USB_I2C_STS_SCL_Pos (6UL)

#define	USB_I2C_STS_SCL_Msk (0x40UL)

#define	USB_I2C_STS_SDA_Pos (7UL)

#define	USB_I2C_STS_SDA_Msk (0x80UL)

#define	USB_I2C_STS_RFF_Pos (8UL)

#define	USB_I2C_STS_RFF_Msk (0x100UL)

#define	USB_I2C_STS_RFE_Pos (9UL)

#define	USB_I2C_STS_RFE_Msk (0x200UL)

#define	USB_I2C_STS_TFF_Pos (10UL)

#define	USB_I2C_STS_TFF_Msk (0x400UL)

#define	USB_I2C_STS_TFE_Pos (11UL)

#define	USB_I2C_STS_TFE_Msk (0x800UL)

#define	USB_I2C_CTL_TDIE_Pos (0UL)

#define	USB_I2C_CTL_TDIE_Msk (0x1UL)

#define	USB_I2C_CTL_AFIE_Pos (1UL)

#define	USB_I2C_CTL_AFIE_Msk (0x2UL)

#define	USB_I2C_CTL_NAIE_Pos (2UL)

#define	USB_I2C_CTL_NAIE_Msk (0x4UL)

#define	USB_I2C_CTL_DRMIE_Pos (3UL)

#define	USB_I2C_CTL_DRMIE_Msk (0x8UL)

#define	USB_I2C_CTL_DRSIE_Pos (4UL)

#define	USB_I2C_CTL_DRSIE_Msk (0x10UL)

#define	USB_I2C_CTL_REFIE_Pos (5UL)

#define	USB_I2C_CTL_REFIE_Msk (0x20UL)

#define	USB_I2C_CTL_RFDAIE_Pos (6UL)

#define	USB_I2C_CTL_RFDAIE_Msk (0x40UL)

#define	USB_I2C_CTL_TFFIE_Pos (7UL)

#define	USB_I2C_CTL_TFFIE_Msk (0x80UL)

#define	USB_I2C_CTL_SRST_Pos (8UL)

#define	USB_I2C_CTL_SRST_Msk (0x100UL)

#define	USB_I2C_CLKHI_CDHI_Pos (0UL)

#define	USB_I2C_CLKHI_CDHI_Msk (0xffUL)

#define	USB_I2C_CLKLO_CDLO_Pos (0UL)

#define	USB_I2C_CLKLO_CDLO_Msk (0xffUL)

#define	USB_USBCLKCTRL_DEV_CLK_EN_Pos (1UL)

#define	USB_USBCLKCTRL_DEV_CLK_EN_Msk (0x2UL)

#define	USB_USBCLKCTRL_PORTSEL_CLK_EN_Pos (3UL)

#define	USB_USBCLKCTRL_PORTSEL_CLK_EN_Msk (0x8UL)

#define	USB_USBCLKCTRL_AHB_CLK_EN_Pos (4UL)

#define	USB_USBCLKCTRL_AHB_CLK_EN_Msk (0x10UL)

#define	USB_OTGCLKCTRL_HOST_CLK_EN_Pos (0UL)

#define	USB_OTGCLKCTRL_HOST_CLK_EN_Msk (0x1UL)

#define	USB_OTGCLKCTRL_DEV_CLK_EN_Pos (1UL)

#define	USB_OTGCLKCTRL_DEV_CLK_EN_Msk (0x2UL)

#define	USB_OTGCLKCTRL_I2C_CLK_EN_Pos (2UL)

#define	USB_OTGCLKCTRL_I2C_CLK_EN_Msk (0x4UL)

#define	USB_OTGCLKCTRL_OTG_CLK_EN_Pos (3UL)

#define	USB_OTGCLKCTRL_OTG_CLK_EN_Msk (0x8UL)

#define	USB_OTGCLKCTRL_AHB_CLK_EN_Pos (4UL)

#define	USB_OTGCLKCTRL_AHB_CLK_EN_Msk (0x10UL)

#define	USB_USBCLKST_DEV_CLK_ON_Pos (1UL)

#define	USB_USBCLKST_DEV_CLK_ON_Msk (0x2UL)

#define	USB_USBCLKST_PORTSEL_CLK_ON_Pos (3UL)

#define	USB_USBCLKST_PORTSEL_CLK_ON_Msk (0x8UL)

#define	USB_USBCLKST_AHB_CLK_ON_Pos (4UL)

#define	USB_USBCLKST_AHB_CLK_ON_Msk (0x10UL)

#define	USB_OTGCLKST_HOST_CLK_ON_Pos (0UL)

#define	USB_OTGCLKST_HOST_CLK_ON_Msk (0x1UL)

#define	USB_OTGCLKST_DEV_CLK_ON_Pos (1UL)

#define	USB_OTGCLKST_DEV_CLK_ON_Msk (0x2UL)

#define	USB_OTGCLKST_I2C_CLK_ON_Pos (2UL)

#define	USB_OTGCLKST_I2C_CLK_ON_Msk (0x4UL)

#define	USB_OTGCLKST_OTG_CLK_ON_Pos (3UL)

#define	USB_OTGCLKST_OTG_CLK_ON_Msk (0x8UL)

#define	USB_OTGCLKST_AHB_CLK_ON_Pos (4UL)

#define	USB_OTGCLKST_AHB_CLK_ON_Msk (0x10UL)

#define	GPIO_DIR0_PINDIR0_Pos (0UL)

#define	GPIO_DIR0_PINDIR0_Msk (0x1UL)

#define	GPIO_DIR0_PINDIR1_Pos (1UL)

#define	GPIO_DIR0_PINDIR1_Msk (0x2UL)

#define	GPIO_DIR0_PINDIR2_Pos (2UL)

#define	GPIO_DIR0_PINDIR2_Msk (0x4UL)

#define	GPIO_DIR0_PINDIR3_Pos (3UL)

#define	GPIO_DIR0_PINDIR3_Msk (0x8UL)

#define	GPIO_DIR0_PINDIR4_Pos (4UL)

#define	GPIO_DIR0_PINDIR4_Msk (0x10UL)

#define	GPIO_DIR0_PINDIR5_Pos (5UL)

#define	GPIO_DIR0_PINDIR5_Msk (0x20UL)

#define	GPIO_DIR0_PINDIR6_Pos (6UL)

#define	GPIO_DIR0_PINDIR6_Msk (0x40UL)

#define	GPIO_DIR0_PINDIR7_Pos (7UL)

#define	GPIO_DIR0_PINDIR7_Msk (0x80UL)

#define	GPIO_DIR0_PINDIR8_Pos (8UL)

#define	GPIO_DIR0_PINDIR8_Msk (0x100UL)

#define	GPIO_DIR0_PINDIR9_Pos (9UL)

#define	GPIO_DIR0_PINDIR9_Msk (0x200UL)

#define	GPIO_DIR0_PINDIR10_Pos (10UL)

#define	GPIO_DIR0_PINDIR10_Msk (0x400UL)

#define	GPIO_DIR0_PINDIR11_Pos (11UL)

#define	GPIO_DIR0_PINDIR11_Msk (0x800UL)

#define	GPIO_DIR0_PINDIR12_Pos (12UL)

#define	GPIO_DIR0_PINDIR12_Msk (0x1000UL)

#define	GPIO_DIR0_PINDIR13_Pos (13UL)

#define	GPIO_DIR0_PINDIR13_Msk (0x2000UL)

#define	GPIO_DIR0_PINDIR14_Pos (14UL)

#define	GPIO_DIR0_PINDIR14_Msk (0x4000UL)

#define	GPIO_DIR0_PINDIR15_Pos (15UL)

#define	GPIO_DIR0_PINDIR15_Msk (0x8000UL)

#define	GPIO_DIR0_PINDIR16_Pos (16UL)

#define	GPIO_DIR0_PINDIR16_Msk (0x10000UL)

#define	GPIO_DIR0_PINDIR17_Pos (17UL)

#define	GPIO_DIR0_PINDIR17_Msk (0x20000UL)

#define	GPIO_DIR0_PINDIR18_Pos (18UL)

#define	GPIO_DIR0_PINDIR18_Msk (0x40000UL)

#define	GPIO_DIR0_PINDIR19_Pos (19UL)

#define	GPIO_DIR0_PINDIR19_Msk (0x80000UL)

#define	GPIO_DIR0_PINDIR20_Pos (20UL)

#define	GPIO_DIR0_PINDIR20_Msk (0x100000UL)

#define	GPIO_DIR0_PINDIR21_Pos (21UL)

#define	GPIO_DIR0_PINDIR21_Msk (0x200000UL)

#define	GPIO_DIR0_PINDIR22_Pos (22UL)

#define	GPIO_DIR0_PINDIR22_Msk (0x400000UL)

#define	GPIO_DIR0_PINDIR23_Pos (23UL)

#define	GPIO_DIR0_PINDIR23_Msk (0x800000UL)

#define	GPIO_DIR0_PINDIR24_Pos (24UL)

#define	GPIO_DIR0_PINDIR24_Msk (0x1000000UL)

#define	GPIO_DIR0_PINDIR25_Pos (25UL)

#define	GPIO_DIR0_PINDIR25_Msk (0x2000000UL)

#define	GPIO_DIR0_PINDIR26_Pos (26UL)

#define	GPIO_DIR0_PINDIR26_Msk (0x4000000UL)

#define	GPIO_DIR0_PINDIR27_Pos (27UL)

#define	GPIO_DIR0_PINDIR27_Msk (0x8000000UL)

#define	GPIO_DIR0_PINDIR28_Pos (28UL)

#define	GPIO_DIR0_PINDIR28_Msk (0x10000000UL)

#define	GPIO_DIR0_PINDIR29_Pos (29UL)

#define	GPIO_DIR0_PINDIR29_Msk (0x20000000UL)

#define	GPIO_DIR0_PINDIR30_Pos (30UL)

#define	GPIO_DIR0_PINDIR30_Msk (0x40000000UL)

#define	GPIO_DIR0_PINDIR31_Pos (31UL)

#define	GPIO_DIR0_PINDIR31_Msk (0x80000000UL)

#define	GPIO_DIR1_PINDIR0_Pos (0UL)

#define	GPIO_DIR1_PINDIR0_Msk (0x1UL)

#define	GPIO_DIR1_PINDIR1_Pos (1UL)

#define	GPIO_DIR1_PINDIR1_Msk (0x2UL)

#define	GPIO_DIR1_PINDIR2_Pos (2UL)

#define	GPIO_DIR1_PINDIR2_Msk (0x4UL)

#define	GPIO_DIR1_PINDIR3_Pos (3UL)

#define	GPIO_DIR1_PINDIR3_Msk (0x8UL)

#define	GPIO_DIR1_PINDIR4_Pos (4UL)

#define	GPIO_DIR1_PINDIR4_Msk (0x10UL)

#define	GPIO_DIR1_PINDIR5_Pos (5UL)

#define	GPIO_DIR1_PINDIR5_Msk (0x20UL)

#define	GPIO_DIR1_PINDIR6_Pos (6UL)

#define	GPIO_DIR1_PINDIR6_Msk (0x40UL)

#define	GPIO_DIR1_PINDIR7_Pos (7UL)

#define	GPIO_DIR1_PINDIR7_Msk (0x80UL)

#define	GPIO_DIR1_PINDIR8_Pos (8UL)

#define	GPIO_DIR1_PINDIR8_Msk (0x100UL)

#define	GPIO_DIR1_PINDIR9_Pos (9UL)

#define	GPIO_DIR1_PINDIR9_Msk (0x200UL)

#define	GPIO_DIR1_PINDIR10_Pos (10UL)

#define	GPIO_DIR1_PINDIR10_Msk (0x400UL)

#define	GPIO_DIR1_PINDIR11_Pos (11UL)

#define	GPIO_DIR1_PINDIR11_Msk (0x800UL)

#define	GPIO_DIR1_PINDIR12_Pos (12UL)

#define	GPIO_DIR1_PINDIR12_Msk (0x1000UL)

#define	GPIO_DIR1_PINDIR13_Pos (13UL)

#define	GPIO_DIR1_PINDIR13_Msk (0x2000UL)

#define	GPIO_DIR1_PINDIR14_Pos (14UL)

#define	GPIO_DIR1_PINDIR14_Msk (0x4000UL)

#define	GPIO_DIR1_PINDIR15_Pos (15UL)

#define	GPIO_DIR1_PINDIR15_Msk (0x8000UL)

#define	GPIO_DIR1_PINDIR16_Pos (16UL)

#define	GPIO_DIR1_PINDIR16_Msk (0x10000UL)

#define	GPIO_DIR1_PINDIR17_Pos (17UL)

#define	GPIO_DIR1_PINDIR17_Msk (0x20000UL)

#define	GPIO_DIR1_PINDIR18_Pos (18UL)

#define	GPIO_DIR1_PINDIR18_Msk (0x40000UL)

#define	GPIO_DIR1_PINDIR19_Pos (19UL)

#define	GPIO_DIR1_PINDIR19_Msk (0x80000UL)

#define	GPIO_DIR1_PINDIR20_Pos (20UL)

#define	GPIO_DIR1_PINDIR20_Msk (0x100000UL)

#define	GPIO_DIR1_PINDIR21_Pos (21UL)

#define	GPIO_DIR1_PINDIR21_Msk (0x200000UL)

#define	GPIO_DIR1_PINDIR22_Pos (22UL)

#define	GPIO_DIR1_PINDIR22_Msk (0x400000UL)

#define	GPIO_DIR1_PINDIR23_Pos (23UL)

#define	GPIO_DIR1_PINDIR23_Msk (0x800000UL)

#define	GPIO_DIR1_PINDIR24_Pos (24UL)

#define	GPIO_DIR1_PINDIR24_Msk (0x1000000UL)

#define	GPIO_DIR1_PINDIR25_Pos (25UL)

#define	GPIO_DIR1_PINDIR25_Msk (0x2000000UL)

#define	GPIO_DIR1_PINDIR26_Pos (26UL)

#define	GPIO_DIR1_PINDIR26_Msk (0x4000000UL)

#define	GPIO_DIR1_PINDIR27_Pos (27UL)

#define	GPIO_DIR1_PINDIR27_Msk (0x8000000UL)

#define	GPIO_DIR1_PINDIR28_Pos (28UL)

#define	GPIO_DIR1_PINDIR28_Msk (0x10000000UL)

#define	GPIO_DIR1_PINDIR29_Pos (29UL)

#define	GPIO_DIR1_PINDIR29_Msk (0x20000000UL)

#define	GPIO_DIR1_PINDIR30_Pos (30UL)

#define	GPIO_DIR1_PINDIR30_Msk (0x40000000UL)

#define	GPIO_DIR1_PINDIR31_Pos (31UL)

#define	GPIO_DIR1_PINDIR31_Msk (0x80000000UL)

#define	GPIO_DIR2_PINDIR0_Pos (0UL)

#define	GPIO_DIR2_PINDIR0_Msk (0x1UL)

#define	GPIO_DIR2_PINDIR1_Pos (1UL)

#define	GPIO_DIR2_PINDIR1_Msk (0x2UL)

#define	GPIO_DIR2_PINDIR2_Pos (2UL)

#define	GPIO_DIR2_PINDIR2_Msk (0x4UL)

#define	GPIO_DIR2_PINDIR3_Pos (3UL)

#define	GPIO_DIR2_PINDIR3_Msk (0x8UL)

#define	GPIO_DIR2_PINDIR4_Pos (4UL)

#define	GPIO_DIR2_PINDIR4_Msk (0x10UL)

#define	GPIO_DIR2_PINDIR5_Pos (5UL)

#define	GPIO_DIR2_PINDIR5_Msk (0x20UL)

#define	GPIO_DIR2_PINDIR6_Pos (6UL)

#define	GPIO_DIR2_PINDIR6_Msk (0x40UL)

#define	GPIO_DIR2_PINDIR7_Pos (7UL)

#define	GPIO_DIR2_PINDIR7_Msk (0x80UL)

#define	GPIO_DIR2_PINDIR8_Pos (8UL)

#define	GPIO_DIR2_PINDIR8_Msk (0x100UL)

#define	GPIO_DIR2_PINDIR9_Pos (9UL)

#define	GPIO_DIR2_PINDIR9_Msk (0x200UL)

#define	GPIO_DIR2_PINDIR10_Pos (10UL)

#define	GPIO_DIR2_PINDIR10_Msk (0x400UL)

#define	GPIO_DIR2_PINDIR11_Pos (11UL)

#define	GPIO_DIR2_PINDIR11_Msk (0x800UL)

#define	GPIO_DIR2_PINDIR12_Pos (12UL)

#define	GPIO_DIR2_PINDIR12_Msk (0x1000UL)

#define	GPIO_DIR2_PINDIR13_Pos (13UL)

#define	GPIO_DIR2_PINDIR13_Msk (0x2000UL)

#define	GPIO_DIR2_PINDIR14_Pos (14UL)

#define	GPIO_DIR2_PINDIR14_Msk (0x4000UL)

#define	GPIO_DIR2_PINDIR15_Pos (15UL)

#define	GPIO_DIR2_PINDIR15_Msk (0x8000UL)

#define	GPIO_DIR2_PINDIR16_Pos (16UL)

#define	GPIO_DIR2_PINDIR16_Msk (0x10000UL)

#define	GPIO_DIR2_PINDIR17_Pos (17UL)

#define	GPIO_DIR2_PINDIR17_Msk (0x20000UL)

#define	GPIO_DIR2_PINDIR18_Pos (18UL)

#define	GPIO_DIR2_PINDIR18_Msk (0x40000UL)

#define	GPIO_DIR2_PINDIR19_Pos (19UL)

#define	GPIO_DIR2_PINDIR19_Msk (0x80000UL)

#define	GPIO_DIR2_PINDIR20_Pos (20UL)

#define	GPIO_DIR2_PINDIR20_Msk (0x100000UL)

#define	GPIO_DIR2_PINDIR21_Pos (21UL)

#define	GPIO_DIR2_PINDIR21_Msk (0x200000UL)

#define	GPIO_DIR2_PINDIR22_Pos (22UL)

#define	GPIO_DIR2_PINDIR22_Msk (0x400000UL)

#define	GPIO_DIR2_PINDIR23_Pos (23UL)

#define	GPIO_DIR2_PINDIR23_Msk (0x800000UL)

#define	GPIO_DIR2_PINDIR24_Pos (24UL)

#define	GPIO_DIR2_PINDIR24_Msk (0x1000000UL)

#define	GPIO_DIR2_PINDIR25_Pos (25UL)

#define	GPIO_DIR2_PINDIR25_Msk (0x2000000UL)

#define	GPIO_DIR2_PINDIR26_Pos (26UL)

#define	GPIO_DIR2_PINDIR26_Msk (0x4000000UL)

#define	GPIO_DIR2_PINDIR27_Pos (27UL)

#define	GPIO_DIR2_PINDIR27_Msk (0x8000000UL)

#define	GPIO_DIR2_PINDIR28_Pos (28UL)

#define	GPIO_DIR2_PINDIR28_Msk (0x10000000UL)

#define	GPIO_DIR2_PINDIR29_Pos (29UL)

#define	GPIO_DIR2_PINDIR29_Msk (0x20000000UL)

#define	GPIO_DIR2_PINDIR30_Pos (30UL)

#define	GPIO_DIR2_PINDIR30_Msk (0x40000000UL)

#define	GPIO_DIR2_PINDIR31_Pos (31UL)

#define	GPIO_DIR2_PINDIR31_Msk (0x80000000UL)

#define	GPIO_DIR3_PINDIR0_Pos (0UL)

#define	GPIO_DIR3_PINDIR0_Msk (0x1UL)

#define	GPIO_DIR3_PINDIR1_Pos (1UL)

#define	GPIO_DIR3_PINDIR1_Msk (0x2UL)

#define	GPIO_DIR3_PINDIR2_Pos (2UL)

#define	GPIO_DIR3_PINDIR2_Msk (0x4UL)

#define	GPIO_DIR3_PINDIR3_Pos (3UL)

#define	GPIO_DIR3_PINDIR3_Msk (0x8UL)

#define	GPIO_DIR3_PINDIR4_Pos (4UL)

#define	GPIO_DIR3_PINDIR4_Msk (0x10UL)

#define	GPIO_DIR3_PINDIR5_Pos (5UL)

#define	GPIO_DIR3_PINDIR5_Msk (0x20UL)

#define	GPIO_DIR3_PINDIR6_Pos (6UL)

#define	GPIO_DIR3_PINDIR6_Msk (0x40UL)

#define	GPIO_DIR3_PINDIR7_Pos (7UL)

#define	GPIO_DIR3_PINDIR7_Msk (0x80UL)

#define	GPIO_DIR3_PINDIR8_Pos (8UL)

#define	GPIO_DIR3_PINDIR8_Msk (0x100UL)

#define	GPIO_DIR3_PINDIR9_Pos (9UL)

#define	GPIO_DIR3_PINDIR9_Msk (0x200UL)

#define	GPIO_DIR3_PINDIR10_Pos (10UL)

#define	GPIO_DIR3_PINDIR10_Msk (0x400UL)

#define	GPIO_DIR3_PINDIR11_Pos (11UL)

#define	GPIO_DIR3_PINDIR11_Msk (0x800UL)

#define	GPIO_DIR3_PINDIR12_Pos (12UL)

#define	GPIO_DIR3_PINDIR12_Msk (0x1000UL)

#define	GPIO_DIR3_PINDIR13_Pos (13UL)

#define	GPIO_DIR3_PINDIR13_Msk (0x2000UL)

#define	GPIO_DIR3_PINDIR14_Pos (14UL)

#define	GPIO_DIR3_PINDIR14_Msk (0x4000UL)

#define	GPIO_DIR3_PINDIR15_Pos (15UL)

#define	GPIO_DIR3_PINDIR15_Msk (0x8000UL)

#define	GPIO_DIR3_PINDIR16_Pos (16UL)

#define	GPIO_DIR3_PINDIR16_Msk (0x10000UL)

#define	GPIO_DIR3_PINDIR17_Pos (17UL)

#define	GPIO_DIR3_PINDIR17_Msk (0x20000UL)

#define	GPIO_DIR3_PINDIR18_Pos (18UL)

#define	GPIO_DIR3_PINDIR18_Msk (0x40000UL)

#define	GPIO_DIR3_PINDIR19_Pos (19UL)

#define	GPIO_DIR3_PINDIR19_Msk (0x80000UL)

#define	GPIO_DIR3_PINDIR20_Pos (20UL)

#define	GPIO_DIR3_PINDIR20_Msk (0x100000UL)

#define	GPIO_DIR3_PINDIR21_Pos (21UL)

#define	GPIO_DIR3_PINDIR21_Msk (0x200000UL)

#define	GPIO_DIR3_PINDIR22_Pos (22UL)

#define	GPIO_DIR3_PINDIR22_Msk (0x400000UL)

#define	GPIO_DIR3_PINDIR23_Pos (23UL)

#define	GPIO_DIR3_PINDIR23_Msk (0x800000UL)

#define	GPIO_DIR3_PINDIR24_Pos (24UL)

#define	GPIO_DIR3_PINDIR24_Msk (0x1000000UL)

#define	GPIO_DIR3_PINDIR25_Pos (25UL)

#define	GPIO_DIR3_PINDIR25_Msk (0x2000000UL)

#define	GPIO_DIR3_PINDIR26_Pos (26UL)

#define	GPIO_DIR3_PINDIR26_Msk (0x4000000UL)

#define	GPIO_DIR3_PINDIR27_Pos (27UL)

#define	GPIO_DIR3_PINDIR27_Msk (0x8000000UL)

#define	GPIO_DIR3_PINDIR28_Pos (28UL)

#define	GPIO_DIR3_PINDIR28_Msk (0x10000000UL)

#define	GPIO_DIR3_PINDIR29_Pos (29UL)

#define	GPIO_DIR3_PINDIR29_Msk (0x20000000UL)

#define	GPIO_DIR3_PINDIR30_Pos (30UL)

#define	GPIO_DIR3_PINDIR30_Msk (0x40000000UL)

#define	GPIO_DIR3_PINDIR31_Pos (31UL)

#define	GPIO_DIR3_PINDIR31_Msk (0x80000000UL)

#define	GPIO_DIR4_PINDIR0_Pos (0UL)

#define	GPIO_DIR4_PINDIR0_Msk (0x1UL)

#define	GPIO_DIR4_PINDIR1_Pos (1UL)

#define	GPIO_DIR4_PINDIR1_Msk (0x2UL)

#define	GPIO_DIR4_PINDIR2_Pos (2UL)

#define	GPIO_DIR4_PINDIR2_Msk (0x4UL)

#define	GPIO_DIR4_PINDIR3_Pos (3UL)

#define	GPIO_DIR4_PINDIR3_Msk (0x8UL)

#define	GPIO_DIR4_PINDIR4_Pos (4UL)

#define	GPIO_DIR4_PINDIR4_Msk (0x10UL)

#define	GPIO_DIR4_PINDIR5_Pos (5UL)

#define	GPIO_DIR4_PINDIR5_Msk (0x20UL)

#define	GPIO_DIR4_PINDIR6_Pos (6UL)

#define	GPIO_DIR4_PINDIR6_Msk (0x40UL)

#define	GPIO_DIR4_PINDIR7_Pos (7UL)

#define	GPIO_DIR4_PINDIR7_Msk (0x80UL)

#define	GPIO_DIR4_PINDIR8_Pos (8UL)

#define	GPIO_DIR4_PINDIR8_Msk (0x100UL)

#define	GPIO_DIR4_PINDIR9_Pos (9UL)

#define	GPIO_DIR4_PINDIR9_Msk (0x200UL)

#define	GPIO_DIR4_PINDIR10_Pos (10UL)

#define	GPIO_DIR4_PINDIR10_Msk (0x400UL)

#define	GPIO_DIR4_PINDIR11_Pos (11UL)

#define	GPIO_DIR4_PINDIR11_Msk (0x800UL)

#define	GPIO_DIR4_PINDIR12_Pos (12UL)

#define	GPIO_DIR4_PINDIR12_Msk (0x1000UL)

#define	GPIO_DIR4_PINDIR13_Pos (13UL)

#define	GPIO_DIR4_PINDIR13_Msk (0x2000UL)

#define	GPIO_DIR4_PINDIR14_Pos (14UL)

#define	GPIO_DIR4_PINDIR14_Msk (0x4000UL)

#define	GPIO_DIR4_PINDIR15_Pos (15UL)

#define	GPIO_DIR4_PINDIR15_Msk (0x8000UL)

#define	GPIO_DIR4_PINDIR16_Pos (16UL)

#define	GPIO_DIR4_PINDIR16_Msk (0x10000UL)

#define	GPIO_DIR4_PINDIR17_Pos (17UL)

#define	GPIO_DIR4_PINDIR17_Msk (0x20000UL)

#define	GPIO_DIR4_PINDIR18_Pos (18UL)

#define	GPIO_DIR4_PINDIR18_Msk (0x40000UL)

#define	GPIO_DIR4_PINDIR19_Pos (19UL)

#define	GPIO_DIR4_PINDIR19_Msk (0x80000UL)

#define	GPIO_DIR4_PINDIR20_Pos (20UL)

#define	GPIO_DIR4_PINDIR20_Msk (0x100000UL)

#define	GPIO_DIR4_PINDIR21_Pos (21UL)

#define	GPIO_DIR4_PINDIR21_Msk (0x200000UL)

#define	GPIO_DIR4_PINDIR22_Pos (22UL)

#define	GPIO_DIR4_PINDIR22_Msk (0x400000UL)

#define	GPIO_DIR4_PINDIR23_Pos (23UL)

#define	GPIO_DIR4_PINDIR23_Msk (0x800000UL)

#define	GPIO_DIR4_PINDIR24_Pos (24UL)

#define	GPIO_DIR4_PINDIR24_Msk (0x1000000UL)

#define	GPIO_DIR4_PINDIR25_Pos (25UL)

#define	GPIO_DIR4_PINDIR25_Msk (0x2000000UL)

#define	GPIO_DIR4_PINDIR26_Pos (26UL)

#define	GPIO_DIR4_PINDIR26_Msk (0x4000000UL)

#define	GPIO_DIR4_PINDIR27_Pos (27UL)

#define	GPIO_DIR4_PINDIR27_Msk (0x8000000UL)

#define	GPIO_DIR4_PINDIR28_Pos (28UL)

#define	GPIO_DIR4_PINDIR28_Msk (0x10000000UL)

#define	GPIO_DIR4_PINDIR29_Pos (29UL)

#define	GPIO_DIR4_PINDIR29_Msk (0x20000000UL)

#define	GPIO_DIR4_PINDIR30_Pos (30UL)

#define	GPIO_DIR4_PINDIR30_Msk (0x40000000UL)

#define	GPIO_DIR4_PINDIR31_Pos (31UL)

#define	GPIO_DIR4_PINDIR31_Msk (0x80000000UL)

#define	GPIO_MASK0_PINMASK0_Pos (0UL)

#define	GPIO_MASK0_PINMASK0_Msk (0x1UL)

#define	GPIO_MASK0_PINMASK1_Pos (1UL)

#define	GPIO_MASK0_PINMASK1_Msk (0x2UL)

#define	GPIO_MASK0_PINMASK2_Pos (2UL)

#define	GPIO_MASK0_PINMASK2_Msk (0x4UL)

#define	GPIO_MASK0_PINMASK3_Pos (3UL)

#define	GPIO_MASK0_PINMASK3_Msk (0x8UL)

#define	GPIO_MASK0_PINMASK4_Pos (4UL)

#define	GPIO_MASK0_PINMASK4_Msk (0x10UL)

#define	GPIO_MASK0_PINMASK5_Pos (5UL)

#define	GPIO_MASK0_PINMASK5_Msk (0x20UL)

#define	GPIO_MASK0_PINMASK6_Pos (6UL)

#define	GPIO_MASK0_PINMASK6_Msk (0x40UL)

#define	GPIO_MASK0_PINMASK7_Pos (7UL)

#define	GPIO_MASK0_PINMASK7_Msk (0x80UL)

#define	GPIO_MASK0_PINMASK8_Pos (8UL)

#define	GPIO_MASK0_PINMASK8_Msk (0x100UL)

#define	GPIO_MASK0_PINMASK9_Pos (9UL)

#define	GPIO_MASK0_PINMASK9_Msk (0x200UL)

#define	GPIO_MASK0_PINMASK10_Pos (10UL)

#define	GPIO_MASK0_PINMASK10_Msk (0x400UL)

#define	GPIO_MASK0_PINMASK11_Pos (11UL)

#define	GPIO_MASK0_PINMASK11_Msk (0x800UL)

#define	GPIO_MASK0_PINMASK12_Pos (12UL)

#define	GPIO_MASK0_PINMASK12_Msk (0x1000UL)

#define	GPIO_MASK0_PINMASK13_Pos (13UL)

#define	GPIO_MASK0_PINMASK13_Msk (0x2000UL)

#define	GPIO_MASK0_PINMASK14_Pos (14UL)

#define	GPIO_MASK0_PINMASK14_Msk (0x4000UL)

#define	GPIO_MASK0_PINMASK15_Pos (15UL)

#define	GPIO_MASK0_PINMASK15_Msk (0x8000UL)

#define	GPIO_MASK0_PINMASK16_Pos (16UL)

#define	GPIO_MASK0_PINMASK16_Msk (0x10000UL)

#define	GPIO_MASK0_PINMASK17_Pos (17UL)

#define	GPIO_MASK0_PINMASK17_Msk (0x20000UL)

#define	GPIO_MASK0_PINMASK18_Pos (18UL)

#define	GPIO_MASK0_PINMASK18_Msk (0x40000UL)

#define	GPIO_MASK0_PINMASK19_Pos (19UL)

#define	GPIO_MASK0_PINMASK19_Msk (0x80000UL)

#define	GPIO_MASK0_PINMASK20_Pos (20UL)

#define	GPIO_MASK0_PINMASK20_Msk (0x100000UL)

#define	GPIO_MASK0_PINMASK21_Pos (21UL)

#define	GPIO_MASK0_PINMASK21_Msk (0x200000UL)

#define	GPIO_MASK0_PINMASK22_Pos (22UL)

#define	GPIO_MASK0_PINMASK22_Msk (0x400000UL)

#define	GPIO_MASK0_PINMASK23_Pos (23UL)

#define	GPIO_MASK0_PINMASK23_Msk (0x800000UL)

#define	GPIO_MASK0_PINMASK24_Pos (24UL)

#define	GPIO_MASK0_PINMASK24_Msk (0x1000000UL)

#define	GPIO_MASK0_PINMASK25_Pos (25UL)

#define	GPIO_MASK0_PINMASK25_Msk (0x2000000UL)

#define	GPIO_MASK0_PINMASK26_Pos (26UL)

#define	GPIO_MASK0_PINMASK26_Msk (0x4000000UL)

#define	GPIO_MASK0_PINMASK27_Pos (27UL)

#define	GPIO_MASK0_PINMASK27_Msk (0x8000000UL)

#define	GPIO_MASK0_PINMASK28_Pos (28UL)

#define	GPIO_MASK0_PINMASK28_Msk (0x10000000UL)

#define	GPIO_MASK0_PINMASK29_Pos (29UL)

#define	GPIO_MASK0_PINMASK29_Msk (0x20000000UL)

#define	GPIO_MASK0_PINMASK30_Pos (30UL)

#define	GPIO_MASK0_PINMASK30_Msk (0x40000000UL)

#define	GPIO_MASK0_PINMASK31_Pos (31UL)

#define	GPIO_MASK0_PINMASK31_Msk (0x80000000UL)

#define	GPIO_MASK1_PINMASK0_Pos (0UL)

#define	GPIO_MASK1_PINMASK0_Msk (0x1UL)

#define	GPIO_MASK1_PINMASK1_Pos (1UL)

#define	GPIO_MASK1_PINMASK1_Msk (0x2UL)

#define	GPIO_MASK1_PINMASK2_Pos (2UL)

#define	GPIO_MASK1_PINMASK2_Msk (0x4UL)

#define	GPIO_MASK1_PINMASK3_Pos (3UL)

#define	GPIO_MASK1_PINMASK3_Msk (0x8UL)

#define	GPIO_MASK1_PINMASK4_Pos (4UL)

#define	GPIO_MASK1_PINMASK4_Msk (0x10UL)

#define	GPIO_MASK1_PINMASK5_Pos (5UL)

#define	GPIO_MASK1_PINMASK5_Msk (0x20UL)

#define	GPIO_MASK1_PINMASK6_Pos (6UL)

#define	GPIO_MASK1_PINMASK6_Msk (0x40UL)

#define	GPIO_MASK1_PINMASK7_Pos (7UL)

#define	GPIO_MASK1_PINMASK7_Msk (0x80UL)

#define	GPIO_MASK1_PINMASK8_Pos (8UL)

#define	GPIO_MASK1_PINMASK8_Msk (0x100UL)

#define	GPIO_MASK1_PINMASK9_Pos (9UL)

#define	GPIO_MASK1_PINMASK9_Msk (0x200UL)

#define	GPIO_MASK1_PINMASK10_Pos (10UL)

#define	GPIO_MASK1_PINMASK10_Msk (0x400UL)

#define	GPIO_MASK1_PINMASK11_Pos (11UL)

#define	GPIO_MASK1_PINMASK11_Msk (0x800UL)

#define	GPIO_MASK1_PINMASK12_Pos (12UL)

#define	GPIO_MASK1_PINMASK12_Msk (0x1000UL)

#define	GPIO_MASK1_PINMASK13_Pos (13UL)

#define	GPIO_MASK1_PINMASK13_Msk (0x2000UL)

#define	GPIO_MASK1_PINMASK14_Pos (14UL)

#define	GPIO_MASK1_PINMASK14_Msk (0x4000UL)

#define	GPIO_MASK1_PINMASK15_Pos (15UL)

#define	GPIO_MASK1_PINMASK15_Msk (0x8000UL)

#define	GPIO_MASK1_PINMASK16_Pos (16UL)

#define	GPIO_MASK1_PINMASK16_Msk (0x10000UL)

#define	GPIO_MASK1_PINMASK17_Pos (17UL)

#define	GPIO_MASK1_PINMASK17_Msk (0x20000UL)

#define	GPIO_MASK1_PINMASK18_Pos (18UL)

#define	GPIO_MASK1_PINMASK18_Msk (0x40000UL)

#define	GPIO_MASK1_PINMASK19_Pos (19UL)

#define	GPIO_MASK1_PINMASK19_Msk (0x80000UL)

#define	GPIO_MASK1_PINMASK20_Pos (20UL)

#define	GPIO_MASK1_PINMASK20_Msk (0x100000UL)

#define	GPIO_MASK1_PINMASK21_Pos (21UL)

#define	GPIO_MASK1_PINMASK21_Msk (0x200000UL)

#define	GPIO_MASK1_PINMASK22_Pos (22UL)

#define	GPIO_MASK1_PINMASK22_Msk (0x400000UL)

#define	GPIO_MASK1_PINMASK23_Pos (23UL)

#define	GPIO_MASK1_PINMASK23_Msk (0x800000UL)

#define	GPIO_MASK1_PINMASK24_Pos (24UL)

#define	GPIO_MASK1_PINMASK24_Msk (0x1000000UL)

#define	GPIO_MASK1_PINMASK25_Pos (25UL)

#define	GPIO_MASK1_PINMASK25_Msk (0x2000000UL)

#define	GPIO_MASK1_PINMASK26_Pos (26UL)

#define	GPIO_MASK1_PINMASK26_Msk (0x4000000UL)

#define	GPIO_MASK1_PINMASK27_Pos (27UL)

#define	GPIO_MASK1_PINMASK27_Msk (0x8000000UL)

#define	GPIO_MASK1_PINMASK28_Pos (28UL)

#define	GPIO_MASK1_PINMASK28_Msk (0x10000000UL)

#define	GPIO_MASK1_PINMASK29_Pos (29UL)

#define	GPIO_MASK1_PINMASK29_Msk (0x20000000UL)

#define	GPIO_MASK1_PINMASK30_Pos (30UL)

#define	GPIO_MASK1_PINMASK30_Msk (0x40000000UL)

#define	GPIO_MASK1_PINMASK31_Pos (31UL)

#define	GPIO_MASK1_PINMASK31_Msk (0x80000000UL)

#define	GPIO_MASK2_PINMASK0_Pos (0UL)

#define	GPIO_MASK2_PINMASK0_Msk (0x1UL)

#define	GPIO_MASK2_PINMASK1_Pos (1UL)

#define	GPIO_MASK2_PINMASK1_Msk (0x2UL)

#define	GPIO_MASK2_PINMASK2_Pos (2UL)

#define	GPIO_MASK2_PINMASK2_Msk (0x4UL)

#define	GPIO_MASK2_PINMASK3_Pos (3UL)

#define	GPIO_MASK2_PINMASK3_Msk (0x8UL)

#define	GPIO_MASK2_PINMASK4_Pos (4UL)

#define	GPIO_MASK2_PINMASK4_Msk (0x10UL)

#define	GPIO_MASK2_PINMASK5_Pos (5UL)

#define	GPIO_MASK2_PINMASK5_Msk (0x20UL)

#define	GPIO_MASK2_PINMASK6_Pos (6UL)

#define	GPIO_MASK2_PINMASK6_Msk (0x40UL)

#define	GPIO_MASK2_PINMASK7_Pos (7UL)

#define	GPIO_MASK2_PINMASK7_Msk (0x80UL)

#define	GPIO_MASK2_PINMASK8_Pos (8UL)

#define	GPIO_MASK2_PINMASK8_Msk (0x100UL)

#define	GPIO_MASK2_PINMASK9_Pos (9UL)

#define	GPIO_MASK2_PINMASK9_Msk (0x200UL)

#define	GPIO_MASK2_PINMASK10_Pos (10UL)

#define	GPIO_MASK2_PINMASK10_Msk (0x400UL)

#define	GPIO_MASK2_PINMASK11_Pos (11UL)

#define	GPIO_MASK2_PINMASK11_Msk (0x800UL)

#define	GPIO_MASK2_PINMASK12_Pos (12UL)

#define	GPIO_MASK2_PINMASK12_Msk (0x1000UL)

#define	GPIO_MASK2_PINMASK13_Pos (13UL)

#define	GPIO_MASK2_PINMASK13_Msk (0x2000UL)

#define	GPIO_MASK2_PINMASK14_Pos (14UL)

#define	GPIO_MASK2_PINMASK14_Msk (0x4000UL)

#define	GPIO_MASK2_PINMASK15_Pos (15UL)

#define	GPIO_MASK2_PINMASK15_Msk (0x8000UL)

#define	GPIO_MASK2_PINMASK16_Pos (16UL)

#define	GPIO_MASK2_PINMASK16_Msk (0x10000UL)

#define	GPIO_MASK2_PINMASK17_Pos (17UL)

#define	GPIO_MASK2_PINMASK17_Msk (0x20000UL)

#define	GPIO_MASK2_PINMASK18_Pos (18UL)

#define	GPIO_MASK2_PINMASK18_Msk (0x40000UL)

#define	GPIO_MASK2_PINMASK19_Pos (19UL)

#define	GPIO_MASK2_PINMASK19_Msk (0x80000UL)

#define	GPIO_MASK2_PINMASK20_Pos (20UL)

#define	GPIO_MASK2_PINMASK20_Msk (0x100000UL)

#define	GPIO_MASK2_PINMASK21_Pos (21UL)

#define	GPIO_MASK2_PINMASK21_Msk (0x200000UL)

#define	GPIO_MASK2_PINMASK22_Pos (22UL)

#define	GPIO_MASK2_PINMASK22_Msk (0x400000UL)

#define	GPIO_MASK2_PINMASK23_Pos (23UL)

#define	GPIO_MASK2_PINMASK23_Msk (0x800000UL)

#define	GPIO_MASK2_PINMASK24_Pos (24UL)

#define	GPIO_MASK2_PINMASK24_Msk (0x1000000UL)

#define	GPIO_MASK2_PINMASK25_Pos (25UL)

#define	GPIO_MASK2_PINMASK25_Msk (0x2000000UL)

#define	GPIO_MASK2_PINMASK26_Pos (26UL)

#define	GPIO_MASK2_PINMASK26_Msk (0x4000000UL)

#define	GPIO_MASK2_PINMASK27_Pos (27UL)

#define	GPIO_MASK2_PINMASK27_Msk (0x8000000UL)

#define	GPIO_MASK2_PINMASK28_Pos (28UL)

#define	GPIO_MASK2_PINMASK28_Msk (0x10000000UL)

#define	GPIO_MASK2_PINMASK29_Pos (29UL)

#define	GPIO_MASK2_PINMASK29_Msk (0x20000000UL)

#define	GPIO_MASK2_PINMASK30_Pos (30UL)

#define	GPIO_MASK2_PINMASK30_Msk (0x40000000UL)

#define	GPIO_MASK2_PINMASK31_Pos (31UL)

#define	GPIO_MASK2_PINMASK31_Msk (0x80000000UL)

#define	GPIO_MASK3_PINMASK0_Pos (0UL)

#define	GPIO_MASK3_PINMASK0_Msk (0x1UL)

#define	GPIO_MASK3_PINMASK1_Pos (1UL)

#define	GPIO_MASK3_PINMASK1_Msk (0x2UL)

#define	GPIO_MASK3_PINMASK2_Pos (2UL)

#define	GPIO_MASK3_PINMASK2_Msk (0x4UL)

#define	GPIO_MASK3_PINMASK3_Pos (3UL)

#define	GPIO_MASK3_PINMASK3_Msk (0x8UL)

#define	GPIO_MASK3_PINMASK4_Pos (4UL)

#define	GPIO_MASK3_PINMASK4_Msk (0x10UL)

#define	GPIO_MASK3_PINMASK5_Pos (5UL)

#define	GPIO_MASK3_PINMASK5_Msk (0x20UL)

#define	GPIO_MASK3_PINMASK6_Pos (6UL)

#define	GPIO_MASK3_PINMASK6_Msk (0x40UL)

#define	GPIO_MASK3_PINMASK7_Pos (7UL)

#define	GPIO_MASK3_PINMASK7_Msk (0x80UL)

#define	GPIO_MASK3_PINMASK8_Pos (8UL)

#define	GPIO_MASK3_PINMASK8_Msk (0x100UL)

#define	GPIO_MASK3_PINMASK9_Pos (9UL)

#define	GPIO_MASK3_PINMASK9_Msk (0x200UL)

#define	GPIO_MASK3_PINMASK10_Pos (10UL)

#define	GPIO_MASK3_PINMASK10_Msk (0x400UL)

#define	GPIO_MASK3_PINMASK11_Pos (11UL)

#define	GPIO_MASK3_PINMASK11_Msk (0x800UL)

#define	GPIO_MASK3_PINMASK12_Pos (12UL)

#define	GPIO_MASK3_PINMASK12_Msk (0x1000UL)

#define	GPIO_MASK3_PINMASK13_Pos (13UL)

#define	GPIO_MASK3_PINMASK13_Msk (0x2000UL)

#define	GPIO_MASK3_PINMASK14_Pos (14UL)

#define	GPIO_MASK3_PINMASK14_Msk (0x4000UL)

#define	GPIO_MASK3_PINMASK15_Pos (15UL)

#define	GPIO_MASK3_PINMASK15_Msk (0x8000UL)

#define	GPIO_MASK3_PINMASK16_Pos (16UL)

#define	GPIO_MASK3_PINMASK16_Msk (0x10000UL)

#define	GPIO_MASK3_PINMASK17_Pos (17UL)

#define	GPIO_MASK3_PINMASK17_Msk (0x20000UL)

#define	GPIO_MASK3_PINMASK18_Pos (18UL)

#define	GPIO_MASK3_PINMASK18_Msk (0x40000UL)

#define	GPIO_MASK3_PINMASK19_Pos (19UL)

#define	GPIO_MASK3_PINMASK19_Msk (0x80000UL)

#define	GPIO_MASK3_PINMASK20_Pos (20UL)

#define	GPIO_MASK3_PINMASK20_Msk (0x100000UL)

#define	GPIO_MASK3_PINMASK21_Pos (21UL)

#define	GPIO_MASK3_PINMASK21_Msk (0x200000UL)

#define	GPIO_MASK3_PINMASK22_Pos (22UL)

#define	GPIO_MASK3_PINMASK22_Msk (0x400000UL)

#define	GPIO_MASK3_PINMASK23_Pos (23UL)

#define	GPIO_MASK3_PINMASK23_Msk (0x800000UL)

#define	GPIO_MASK3_PINMASK24_Pos (24UL)

#define	GPIO_MASK3_PINMASK24_Msk (0x1000000UL)

#define	GPIO_MASK3_PINMASK25_Pos (25UL)

#define	GPIO_MASK3_PINMASK25_Msk (0x2000000UL)

#define	GPIO_MASK3_PINMASK26_Pos (26UL)

#define	GPIO_MASK3_PINMASK26_Msk (0x4000000UL)

#define	GPIO_MASK3_PINMASK27_Pos (27UL)

#define	GPIO_MASK3_PINMASK27_Msk (0x8000000UL)

#define	GPIO_MASK3_PINMASK28_Pos (28UL)

#define	GPIO_MASK3_PINMASK28_Msk (0x10000000UL)

#define	GPIO_MASK3_PINMASK29_Pos (29UL)

#define	GPIO_MASK3_PINMASK29_Msk (0x20000000UL)

#define	GPIO_MASK3_PINMASK30_Pos (30UL)

#define	GPIO_MASK3_PINMASK30_Msk (0x40000000UL)

#define	GPIO_MASK3_PINMASK31_Pos (31UL)

#define	GPIO_MASK3_PINMASK31_Msk (0x80000000UL)

#define	GPIO_MASK4_PINMASK0_Pos (0UL)

#define	GPIO_MASK4_PINMASK0_Msk (0x1UL)

#define	GPIO_MASK4_PINMASK1_Pos (1UL)

#define	GPIO_MASK4_PINMASK1_Msk (0x2UL)

#define	GPIO_MASK4_PINMASK2_Pos (2UL)

#define	GPIO_MASK4_PINMASK2_Msk (0x4UL)

#define	GPIO_MASK4_PINMASK3_Pos (3UL)

#define	GPIO_MASK4_PINMASK3_Msk (0x8UL)

#define	GPIO_MASK4_PINMASK4_Pos (4UL)

#define	GPIO_MASK4_PINMASK4_Msk (0x10UL)

#define	GPIO_MASK4_PINMASK5_Pos (5UL)

#define	GPIO_MASK4_PINMASK5_Msk (0x20UL)

#define	GPIO_MASK4_PINMASK6_Pos (6UL)

#define	GPIO_MASK4_PINMASK6_Msk (0x40UL)

#define	GPIO_MASK4_PINMASK7_Pos (7UL)

#define	GPIO_MASK4_PINMASK7_Msk (0x80UL)

#define	GPIO_MASK4_PINMASK8_Pos (8UL)

#define	GPIO_MASK4_PINMASK8_Msk (0x100UL)

#define	GPIO_MASK4_PINMASK9_Pos (9UL)

#define	GPIO_MASK4_PINMASK9_Msk (0x200UL)

#define	GPIO_MASK4_PINMASK10_Pos (10UL)

#define	GPIO_MASK4_PINMASK10_Msk (0x400UL)

#define	GPIO_MASK4_PINMASK11_Pos (11UL)

#define	GPIO_MASK4_PINMASK11_Msk (0x800UL)

#define	GPIO_MASK4_PINMASK12_Pos (12UL)

#define	GPIO_MASK4_PINMASK12_Msk (0x1000UL)

#define	GPIO_MASK4_PINMASK13_Pos (13UL)

#define	GPIO_MASK4_PINMASK13_Msk (0x2000UL)

#define	GPIO_MASK4_PINMASK14_Pos (14UL)

#define	GPIO_MASK4_PINMASK14_Msk (0x4000UL)

#define	GPIO_MASK4_PINMASK15_Pos (15UL)

#define	GPIO_MASK4_PINMASK15_Msk (0x8000UL)

#define	GPIO_MASK4_PINMASK16_Pos (16UL)

#define	GPIO_MASK4_PINMASK16_Msk (0x10000UL)

#define	GPIO_MASK4_PINMASK17_Pos (17UL)

#define	GPIO_MASK4_PINMASK17_Msk (0x20000UL)

#define	GPIO_MASK4_PINMASK18_Pos (18UL)

#define	GPIO_MASK4_PINMASK18_Msk (0x40000UL)

#define	GPIO_MASK4_PINMASK19_Pos (19UL)

#define	GPIO_MASK4_PINMASK19_Msk (0x80000UL)

#define	GPIO_MASK4_PINMASK20_Pos (20UL)

#define	GPIO_MASK4_PINMASK20_Msk (0x100000UL)

#define	GPIO_MASK4_PINMASK21_Pos (21UL)

#define	GPIO_MASK4_PINMASK21_Msk (0x200000UL)

#define	GPIO_MASK4_PINMASK22_Pos (22UL)

#define	GPIO_MASK4_PINMASK22_Msk (0x400000UL)

#define	GPIO_MASK4_PINMASK23_Pos (23UL)

#define	GPIO_MASK4_PINMASK23_Msk (0x800000UL)

#define	GPIO_MASK4_PINMASK24_Pos (24UL)

#define	GPIO_MASK4_PINMASK24_Msk (0x1000000UL)

#define	GPIO_MASK4_PINMASK25_Pos (25UL)

#define	GPIO_MASK4_PINMASK25_Msk (0x2000000UL)

#define	GPIO_MASK4_PINMASK26_Pos (26UL)

#define	GPIO_MASK4_PINMASK26_Msk (0x4000000UL)

#define	GPIO_MASK4_PINMASK27_Pos (27UL)

#define	GPIO_MASK4_PINMASK27_Msk (0x8000000UL)

#define	GPIO_MASK4_PINMASK28_Pos (28UL)

#define	GPIO_MASK4_PINMASK28_Msk (0x10000000UL)

#define	GPIO_MASK4_PINMASK29_Pos (29UL)

#define	GPIO_MASK4_PINMASK29_Msk (0x20000000UL)

#define	GPIO_MASK4_PINMASK30_Pos (30UL)

#define	GPIO_MASK4_PINMASK30_Msk (0x40000000UL)

#define	GPIO_MASK4_PINMASK31_Pos (31UL)

#define	GPIO_MASK4_PINMASK31_Msk (0x80000000UL)

#define	GPIO_PIN0_PINVAL0_Pos (0UL)

#define	GPIO_PIN0_PINVAL0_Msk (0x1UL)

#define	GPIO_PIN0_PINVAL1_Pos (1UL)

#define	GPIO_PIN0_PINVAL1_Msk (0x2UL)

#define	GPIO_PIN0_PINVAL2_Pos (2UL)

#define	GPIO_PIN0_PINVAL2_Msk (0x4UL)

#define	GPIO_PIN0_PINVAL3_Pos (3UL)

#define	GPIO_PIN0_PINVAL3_Msk (0x8UL)

#define	GPIO_PIN0_PINVAL4_Pos (4UL)

#define	GPIO_PIN0_PINVAL4_Msk (0x10UL)

#define	GPIO_PIN0_PINVAL5_Pos (5UL)

#define	GPIO_PIN0_PINVAL5_Msk (0x20UL)

#define	GPIO_PIN0_PINVAL6_Pos (6UL)

#define	GPIO_PIN0_PINVAL6_Msk (0x40UL)

#define	GPIO_PIN0_PINVAL7_Pos (7UL)

#define	GPIO_PIN0_PINVAL7_Msk (0x80UL)

#define	GPIO_PIN0_PINVAL8_Pos (8UL)

#define	GPIO_PIN0_PINVAL8_Msk (0x100UL)

#define	GPIO_PIN0_PINVAL9_Pos (9UL)

#define	GPIO_PIN0_PINVAL9_Msk (0x200UL)

#define	GPIO_PIN0_PINVAL10_Pos (10UL)

#define	GPIO_PIN0_PINVAL10_Msk (0x400UL)

#define	GPIO_PIN0_PINVAL11_Pos (11UL)

#define	GPIO_PIN0_PINVAL11_Msk (0x800UL)

#define	GPIO_PIN0_PINVAL12_Pos (12UL)

#define	GPIO_PIN0_PINVAL12_Msk (0x1000UL)

#define	GPIO_PIN0_PINVAL13_Pos (13UL)

#define	GPIO_PIN0_PINVAL13_Msk (0x2000UL)

#define	GPIO_PIN0_PINVAL14_Pos (14UL)

#define	GPIO_PIN0_PINVAL14_Msk (0x4000UL)

#define	GPIO_PIN0_PINVAL15_Pos (15UL)

#define	GPIO_PIN0_PINVAL15_Msk (0x8000UL)

#define	GPIO_PIN0_PINVAL16_Pos (16UL)

#define	GPIO_PIN0_PINVAL16_Msk (0x10000UL)

#define	GPIO_PIN0_PINVAL17_Pos (17UL)

#define	GPIO_PIN0_PINVAL17_Msk (0x20000UL)

#define	GPIO_PIN0_PINVAL18_Pos (18UL)

#define	GPIO_PIN0_PINVAL18_Msk (0x40000UL)

#define	GPIO_PIN0_PINVAL19_Pos (19UL)

#define	GPIO_PIN0_PINVAL19_Msk (0x80000UL)

#define	GPIO_PIN0_PINVAL20_Pos (20UL)

#define	GPIO_PIN0_PINVAL20_Msk (0x100000UL)

#define	GPIO_PIN0_PINVAL21_Pos (21UL)

#define	GPIO_PIN0_PINVAL21_Msk (0x200000UL)

#define	GPIO_PIN0_PINVAL22_Pos (22UL)

#define	GPIO_PIN0_PINVAL22_Msk (0x400000UL)

#define	GPIO_PIN0_PINVAL23_Pos (23UL)

#define	GPIO_PIN0_PINVAL23_Msk (0x800000UL)

#define	GPIO_PIN0_PINVAL24_Pos (24UL)

#define	GPIO_PIN0_PINVAL24_Msk (0x1000000UL)

#define	GPIO_PIN0_PINVAL25_Pos (25UL)

#define	GPIO_PIN0_PINVAL25_Msk (0x2000000UL)

#define	GPIO_PIN0_PINVAL26_Pos (26UL)

#define	GPIO_PIN0_PINVAL26_Msk (0x4000000UL)

#define	GPIO_PIN0_PINVAL27_Pos (27UL)

#define	GPIO_PIN0_PINVAL27_Msk (0x8000000UL)

#define	GPIO_PIN0_PINVAL28_Pos (28UL)

#define	GPIO_PIN0_PINVAL28_Msk (0x10000000UL)

#define	GPIO_PIN0_PINVAL29_Pos (29UL)

#define	GPIO_PIN0_PINVAL29_Msk (0x20000000UL)

#define	GPIO_PIN0_PINVAL30_Pos (30UL)

#define	GPIO_PIN0_PINVAL30_Msk (0x40000000UL)

#define	GPIO_PIN0_PINVAL31_Pos (31UL)

#define	GPIO_PIN0_PINVAL31_Msk (0x80000000UL)

#define	GPIO_PIN1_PINVAL0_Pos (0UL)

#define	GPIO_PIN1_PINVAL0_Msk (0x1UL)

#define	GPIO_PIN1_PINVAL1_Pos (1UL)

#define	GPIO_PIN1_PINVAL1_Msk (0x2UL)

#define	GPIO_PIN1_PINVAL2_Pos (2UL)

#define	GPIO_PIN1_PINVAL2_Msk (0x4UL)

#define	GPIO_PIN1_PINVAL3_Pos (3UL)

#define	GPIO_PIN1_PINVAL3_Msk (0x8UL)

#define	GPIO_PIN1_PINVAL4_Pos (4UL)

#define	GPIO_PIN1_PINVAL4_Msk (0x10UL)

#define	GPIO_PIN1_PINVAL5_Pos (5UL)

#define	GPIO_PIN1_PINVAL5_Msk (0x20UL)

#define	GPIO_PIN1_PINVAL6_Pos (6UL)

#define	GPIO_PIN1_PINVAL6_Msk (0x40UL)

#define	GPIO_PIN1_PINVAL7_Pos (7UL)

#define	GPIO_PIN1_PINVAL7_Msk (0x80UL)

#define	GPIO_PIN1_PINVAL8_Pos (8UL)

#define	GPIO_PIN1_PINVAL8_Msk (0x100UL)

#define	GPIO_PIN1_PINVAL9_Pos (9UL)

#define	GPIO_PIN1_PINVAL9_Msk (0x200UL)

#define	GPIO_PIN1_PINVAL10_Pos (10UL)

#define	GPIO_PIN1_PINVAL10_Msk (0x400UL)

#define	GPIO_PIN1_PINVAL11_Pos (11UL)

#define	GPIO_PIN1_PINVAL11_Msk (0x800UL)

#define	GPIO_PIN1_PINVAL12_Pos (12UL)

#define	GPIO_PIN1_PINVAL12_Msk (0x1000UL)

#define	GPIO_PIN1_PINVAL13_Pos (13UL)

#define	GPIO_PIN1_PINVAL13_Msk (0x2000UL)

#define	GPIO_PIN1_PINVAL14_Pos (14UL)

#define	GPIO_PIN1_PINVAL14_Msk (0x4000UL)

#define	GPIO_PIN1_PINVAL15_Pos (15UL)

#define	GPIO_PIN1_PINVAL15_Msk (0x8000UL)

#define	GPIO_PIN1_PINVAL16_Pos (16UL)

#define	GPIO_PIN1_PINVAL16_Msk (0x10000UL)

#define	GPIO_PIN1_PINVAL17_Pos (17UL)

#define	GPIO_PIN1_PINVAL17_Msk (0x20000UL)

#define	GPIO_PIN1_PINVAL18_Pos (18UL)

#define	GPIO_PIN1_PINVAL18_Msk (0x40000UL)

#define	GPIO_PIN1_PINVAL19_Pos (19UL)

#define	GPIO_PIN1_PINVAL19_Msk (0x80000UL)

#define	GPIO_PIN1_PINVAL20_Pos (20UL)

#define	GPIO_PIN1_PINVAL20_Msk (0x100000UL)

#define	GPIO_PIN1_PINVAL21_Pos (21UL)

#define	GPIO_PIN1_PINVAL21_Msk (0x200000UL)

#define	GPIO_PIN1_PINVAL22_Pos (22UL)

#define	GPIO_PIN1_PINVAL22_Msk (0x400000UL)

#define	GPIO_PIN1_PINVAL23_Pos (23UL)

#define	GPIO_PIN1_PINVAL23_Msk (0x800000UL)

#define	GPIO_PIN1_PINVAL24_Pos (24UL)

#define	GPIO_PIN1_PINVAL24_Msk (0x1000000UL)

#define	GPIO_PIN1_PINVAL25_Pos (25UL)

#define	GPIO_PIN1_PINVAL25_Msk (0x2000000UL)

#define	GPIO_PIN1_PINVAL26_Pos (26UL)

#define	GPIO_PIN1_PINVAL26_Msk (0x4000000UL)

#define	GPIO_PIN1_PINVAL27_Pos (27UL)

#define	GPIO_PIN1_PINVAL27_Msk (0x8000000UL)

#define	GPIO_PIN1_PINVAL28_Pos (28UL)

#define	GPIO_PIN1_PINVAL28_Msk (0x10000000UL)

#define	GPIO_PIN1_PINVAL29_Pos (29UL)

#define	GPIO_PIN1_PINVAL29_Msk (0x20000000UL)

#define	GPIO_PIN1_PINVAL30_Pos (30UL)

#define	GPIO_PIN1_PINVAL30_Msk (0x40000000UL)

#define	GPIO_PIN1_PINVAL31_Pos (31UL)

#define	GPIO_PIN1_PINVAL31_Msk (0x80000000UL)

#define	GPIO_PIN2_PINVAL0_Pos (0UL)

#define	GPIO_PIN2_PINVAL0_Msk (0x1UL)

#define	GPIO_PIN2_PINVAL1_Pos (1UL)

#define	GPIO_PIN2_PINVAL1_Msk (0x2UL)

#define	GPIO_PIN2_PINVAL2_Pos (2UL)

#define	GPIO_PIN2_PINVAL2_Msk (0x4UL)

#define	GPIO_PIN2_PINVAL3_Pos (3UL)

#define	GPIO_PIN2_PINVAL3_Msk (0x8UL)

#define	GPIO_PIN2_PINVAL4_Pos (4UL)

#define	GPIO_PIN2_PINVAL4_Msk (0x10UL)

#define	GPIO_PIN2_PINVAL5_Pos (5UL)

#define	GPIO_PIN2_PINVAL5_Msk (0x20UL)

#define	GPIO_PIN2_PINVAL6_Pos (6UL)

#define	GPIO_PIN2_PINVAL6_Msk (0x40UL)

#define	GPIO_PIN2_PINVAL7_Pos (7UL)

#define	GPIO_PIN2_PINVAL7_Msk (0x80UL)

#define	GPIO_PIN2_PINVAL8_Pos (8UL)

#define	GPIO_PIN2_PINVAL8_Msk (0x100UL)

#define	GPIO_PIN2_PINVAL9_Pos (9UL)

#define	GPIO_PIN2_PINVAL9_Msk (0x200UL)

#define	GPIO_PIN2_PINVAL10_Pos (10UL)

#define	GPIO_PIN2_PINVAL10_Msk (0x400UL)

#define	GPIO_PIN2_PINVAL11_Pos (11UL)

#define	GPIO_PIN2_PINVAL11_Msk (0x800UL)

#define	GPIO_PIN2_PINVAL12_Pos (12UL)

#define	GPIO_PIN2_PINVAL12_Msk (0x1000UL)

#define	GPIO_PIN2_PINVAL13_Pos (13UL)

#define	GPIO_PIN2_PINVAL13_Msk (0x2000UL)

#define	GPIO_PIN2_PINVAL14_Pos (14UL)

#define	GPIO_PIN2_PINVAL14_Msk (0x4000UL)

#define	GPIO_PIN2_PINVAL15_Pos (15UL)

#define	GPIO_PIN2_PINVAL15_Msk (0x8000UL)

#define	GPIO_PIN2_PINVAL16_Pos (16UL)

#define	GPIO_PIN2_PINVAL16_Msk (0x10000UL)

#define	GPIO_PIN2_PINVAL17_Pos (17UL)

#define	GPIO_PIN2_PINVAL17_Msk (0x20000UL)

#define	GPIO_PIN2_PINVAL18_Pos (18UL)

#define	GPIO_PIN2_PINVAL18_Msk (0x40000UL)

#define	GPIO_PIN2_PINVAL19_Pos (19UL)

#define	GPIO_PIN2_PINVAL19_Msk (0x80000UL)

#define	GPIO_PIN2_PINVAL20_Pos (20UL)

#define	GPIO_PIN2_PINVAL20_Msk (0x100000UL)

#define	GPIO_PIN2_PINVAL21_Pos (21UL)

#define	GPIO_PIN2_PINVAL21_Msk (0x200000UL)

#define	GPIO_PIN2_PINVAL22_Pos (22UL)

#define	GPIO_PIN2_PINVAL22_Msk (0x400000UL)

#define	GPIO_PIN2_PINVAL23_Pos (23UL)

#define	GPIO_PIN2_PINVAL23_Msk (0x800000UL)

#define	GPIO_PIN2_PINVAL24_Pos (24UL)

#define	GPIO_PIN2_PINVAL24_Msk (0x1000000UL)

#define	GPIO_PIN2_PINVAL25_Pos (25UL)

#define	GPIO_PIN2_PINVAL25_Msk (0x2000000UL)

#define	GPIO_PIN2_PINVAL26_Pos (26UL)

#define	GPIO_PIN2_PINVAL26_Msk (0x4000000UL)

#define	GPIO_PIN2_PINVAL27_Pos (27UL)

#define	GPIO_PIN2_PINVAL27_Msk (0x8000000UL)

#define	GPIO_PIN2_PINVAL28_Pos (28UL)

#define	GPIO_PIN2_PINVAL28_Msk (0x10000000UL)

#define	GPIO_PIN2_PINVAL29_Pos (29UL)

#define	GPIO_PIN2_PINVAL29_Msk (0x20000000UL)

#define	GPIO_PIN2_PINVAL30_Pos (30UL)

#define	GPIO_PIN2_PINVAL30_Msk (0x40000000UL)

#define	GPIO_PIN2_PINVAL31_Pos (31UL)

#define	GPIO_PIN2_PINVAL31_Msk (0x80000000UL)

#define	GPIO_PIN3_PINVAL0_Pos (0UL)

#define	GPIO_PIN3_PINVAL0_Msk (0x1UL)

#define	GPIO_PIN3_PINVAL1_Pos (1UL)

#define	GPIO_PIN3_PINVAL1_Msk (0x2UL)

#define	GPIO_PIN3_PINVAL2_Pos (2UL)

#define	GPIO_PIN3_PINVAL2_Msk (0x4UL)

#define	GPIO_PIN3_PINVAL3_Pos (3UL)

#define	GPIO_PIN3_PINVAL3_Msk (0x8UL)

#define	GPIO_PIN3_PINVAL4_Pos (4UL)

#define	GPIO_PIN3_PINVAL4_Msk (0x10UL)

#define	GPIO_PIN3_PINVAL5_Pos (5UL)

#define	GPIO_PIN3_PINVAL5_Msk (0x20UL)

#define	GPIO_PIN3_PINVAL6_Pos (6UL)

#define	GPIO_PIN3_PINVAL6_Msk (0x40UL)

#define	GPIO_PIN3_PINVAL7_Pos (7UL)

#define	GPIO_PIN3_PINVAL7_Msk (0x80UL)

#define	GPIO_PIN3_PINVAL8_Pos (8UL)

#define	GPIO_PIN3_PINVAL8_Msk (0x100UL)

#define	GPIO_PIN3_PINVAL9_Pos (9UL)

#define	GPIO_PIN3_PINVAL9_Msk (0x200UL)

#define	GPIO_PIN3_PINVAL10_Pos (10UL)

#define	GPIO_PIN3_PINVAL10_Msk (0x400UL)

#define	GPIO_PIN3_PINVAL11_Pos (11UL)

#define	GPIO_PIN3_PINVAL11_Msk (0x800UL)

#define	GPIO_PIN3_PINVAL12_Pos (12UL)

#define	GPIO_PIN3_PINVAL12_Msk (0x1000UL)

#define	GPIO_PIN3_PINVAL13_Pos (13UL)

#define	GPIO_PIN3_PINVAL13_Msk (0x2000UL)

#define	GPIO_PIN3_PINVAL14_Pos (14UL)

#define	GPIO_PIN3_PINVAL14_Msk (0x4000UL)

#define	GPIO_PIN3_PINVAL15_Pos (15UL)

#define	GPIO_PIN3_PINVAL15_Msk (0x8000UL)

#define	GPIO_PIN3_PINVAL16_Pos (16UL)

#define	GPIO_PIN3_PINVAL16_Msk (0x10000UL)

#define	GPIO_PIN3_PINVAL17_Pos (17UL)

#define	GPIO_PIN3_PINVAL17_Msk (0x20000UL)

#define	GPIO_PIN3_PINVAL18_Pos (18UL)

#define	GPIO_PIN3_PINVAL18_Msk (0x40000UL)

#define	GPIO_PIN3_PINVAL19_Pos (19UL)

#define	GPIO_PIN3_PINVAL19_Msk (0x80000UL)

#define	GPIO_PIN3_PINVAL20_Pos (20UL)

#define	GPIO_PIN3_PINVAL20_Msk (0x100000UL)

#define	GPIO_PIN3_PINVAL21_Pos (21UL)

#define	GPIO_PIN3_PINVAL21_Msk (0x200000UL)

#define	GPIO_PIN3_PINVAL22_Pos (22UL)

#define	GPIO_PIN3_PINVAL22_Msk (0x400000UL)

#define	GPIO_PIN3_PINVAL23_Pos (23UL)

#define	GPIO_PIN3_PINVAL23_Msk (0x800000UL)

#define	GPIO_PIN3_PINVAL24_Pos (24UL)

#define	GPIO_PIN3_PINVAL24_Msk (0x1000000UL)

#define	GPIO_PIN3_PINVAL25_Pos (25UL)

#define	GPIO_PIN3_PINVAL25_Msk (0x2000000UL)

#define	GPIO_PIN3_PINVAL26_Pos (26UL)

#define	GPIO_PIN3_PINVAL26_Msk (0x4000000UL)

#define	GPIO_PIN3_PINVAL27_Pos (27UL)

#define	GPIO_PIN3_PINVAL27_Msk (0x8000000UL)

#define	GPIO_PIN3_PINVAL28_Pos (28UL)

#define	GPIO_PIN3_PINVAL28_Msk (0x10000000UL)

#define	GPIO_PIN3_PINVAL29_Pos (29UL)

#define	GPIO_PIN3_PINVAL29_Msk (0x20000000UL)

#define	GPIO_PIN3_PINVAL30_Pos (30UL)

#define	GPIO_PIN3_PINVAL30_Msk (0x40000000UL)

#define	GPIO_PIN3_PINVAL31_Pos (31UL)

#define	GPIO_PIN3_PINVAL31_Msk (0x80000000UL)

#define	GPIO_PIN4_PINVAL0_Pos (0UL)

#define	GPIO_PIN4_PINVAL0_Msk (0x1UL)

#define	GPIO_PIN4_PINVAL1_Pos (1UL)

#define	GPIO_PIN4_PINVAL1_Msk (0x2UL)

#define	GPIO_PIN4_PINVAL2_Pos (2UL)

#define	GPIO_PIN4_PINVAL2_Msk (0x4UL)

#define	GPIO_PIN4_PINVAL3_Pos (3UL)

#define	GPIO_PIN4_PINVAL3_Msk (0x8UL)

#define	GPIO_PIN4_PINVAL4_Pos (4UL)

#define	GPIO_PIN4_PINVAL4_Msk (0x10UL)

#define	GPIO_PIN4_PINVAL5_Pos (5UL)

#define	GPIO_PIN4_PINVAL5_Msk (0x20UL)

#define	GPIO_PIN4_PINVAL6_Pos (6UL)

#define	GPIO_PIN4_PINVAL6_Msk (0x40UL)

#define	GPIO_PIN4_PINVAL7_Pos (7UL)

#define	GPIO_PIN4_PINVAL7_Msk (0x80UL)

#define	GPIO_PIN4_PINVAL8_Pos (8UL)

#define	GPIO_PIN4_PINVAL8_Msk (0x100UL)

#define	GPIO_PIN4_PINVAL9_Pos (9UL)

#define	GPIO_PIN4_PINVAL9_Msk (0x200UL)

#define	GPIO_PIN4_PINVAL10_Pos (10UL)

#define	GPIO_PIN4_PINVAL10_Msk (0x400UL)

#define	GPIO_PIN4_PINVAL11_Pos (11UL)

#define	GPIO_PIN4_PINVAL11_Msk (0x800UL)

#define	GPIO_PIN4_PINVAL12_Pos (12UL)

#define	GPIO_PIN4_PINVAL12_Msk (0x1000UL)

#define	GPIO_PIN4_PINVAL13_Pos (13UL)

#define	GPIO_PIN4_PINVAL13_Msk (0x2000UL)

#define	GPIO_PIN4_PINVAL14_Pos (14UL)

#define	GPIO_PIN4_PINVAL14_Msk (0x4000UL)

#define	GPIO_PIN4_PINVAL15_Pos (15UL)

#define	GPIO_PIN4_PINVAL15_Msk (0x8000UL)

#define	GPIO_PIN4_PINVAL16_Pos (16UL)

#define	GPIO_PIN4_PINVAL16_Msk (0x10000UL)

#define	GPIO_PIN4_PINVAL17_Pos (17UL)

#define	GPIO_PIN4_PINVAL17_Msk (0x20000UL)

#define	GPIO_PIN4_PINVAL18_Pos (18UL)

#define	GPIO_PIN4_PINVAL18_Msk (0x40000UL)

#define	GPIO_PIN4_PINVAL19_Pos (19UL)

#define	GPIO_PIN4_PINVAL19_Msk (0x80000UL)

#define	GPIO_PIN4_PINVAL20_Pos (20UL)

#define	GPIO_PIN4_PINVAL20_Msk (0x100000UL)

#define	GPIO_PIN4_PINVAL21_Pos (21UL)

#define	GPIO_PIN4_PINVAL21_Msk (0x200000UL)

#define	GPIO_PIN4_PINVAL22_Pos (22UL)

#define	GPIO_PIN4_PINVAL22_Msk (0x400000UL)

#define	GPIO_PIN4_PINVAL23_Pos (23UL)

#define	GPIO_PIN4_PINVAL23_Msk (0x800000UL)

#define	GPIO_PIN4_PINVAL24_Pos (24UL)

#define	GPIO_PIN4_PINVAL24_Msk (0x1000000UL)

#define	GPIO_PIN4_PINVAL25_Pos (25UL)

#define	GPIO_PIN4_PINVAL25_Msk (0x2000000UL)

#define	GPIO_PIN4_PINVAL26_Pos (26UL)

#define	GPIO_PIN4_PINVAL26_Msk (0x4000000UL)

#define	GPIO_PIN4_PINVAL27_Pos (27UL)

#define	GPIO_PIN4_PINVAL27_Msk (0x8000000UL)

#define	GPIO_PIN4_PINVAL28_Pos (28UL)

#define	GPIO_PIN4_PINVAL28_Msk (0x10000000UL)

#define	GPIO_PIN4_PINVAL29_Pos (29UL)

#define	GPIO_PIN4_PINVAL29_Msk (0x20000000UL)

#define	GPIO_PIN4_PINVAL30_Pos (30UL)

#define	GPIO_PIN4_PINVAL30_Msk (0x40000000UL)

#define	GPIO_PIN4_PINVAL31_Pos (31UL)

#define	GPIO_PIN4_PINVAL31_Msk (0x80000000UL)

#define	GPIO_SET0_PINSET0_Pos (0UL)

#define	GPIO_SET0_PINSET0_Msk (0x1UL)

#define	GPIO_SET0_PINSET1_Pos (1UL)

#define	GPIO_SET0_PINSET1_Msk (0x2UL)

#define	GPIO_SET0_PINSET2_Pos (2UL)

#define	GPIO_SET0_PINSET2_Msk (0x4UL)

#define	GPIO_SET0_PINSET3_Pos (3UL)

#define	GPIO_SET0_PINSET3_Msk (0x8UL)

#define	GPIO_SET0_PINSET4_Pos (4UL)

#define	GPIO_SET0_PINSET4_Msk (0x10UL)

#define	GPIO_SET0_PINSET5_Pos (5UL)

#define	GPIO_SET0_PINSET5_Msk (0x20UL)

#define	GPIO_SET0_PINSET6_Pos (6UL)

#define	GPIO_SET0_PINSET6_Msk (0x40UL)

#define	GPIO_SET0_PINSET7_Pos (7UL)

#define	GPIO_SET0_PINSET7_Msk (0x80UL)

#define	GPIO_SET0_PINSET8_Pos (8UL)

#define	GPIO_SET0_PINSET8_Msk (0x100UL)

#define	GPIO_SET0_PINSET9_Pos (9UL)

#define	GPIO_SET0_PINSET9_Msk (0x200UL)

#define	GPIO_SET0_PINSET10_Pos (10UL)

#define	GPIO_SET0_PINSET10_Msk (0x400UL)

#define	GPIO_SET0_PINSET11_Pos (11UL)

#define	GPIO_SET0_PINSET11_Msk (0x800UL)

#define	GPIO_SET0_PINSET12_Pos (12UL)

#define	GPIO_SET0_PINSET12_Msk (0x1000UL)

#define	GPIO_SET0_PINSET13_Pos (13UL)

#define	GPIO_SET0_PINSET13_Msk (0x2000UL)

#define	GPIO_SET0_PINSET14_Pos (14UL)

#define	GPIO_SET0_PINSET14_Msk (0x4000UL)

#define	GPIO_SET0_PINSET15_Pos (15UL)

#define	GPIO_SET0_PINSET15_Msk (0x8000UL)

#define	GPIO_SET0_PINSET16_Pos (16UL)

#define	GPIO_SET0_PINSET16_Msk (0x10000UL)

#define	GPIO_SET0_PINSET17_Pos (17UL)

#define	GPIO_SET0_PINSET17_Msk (0x20000UL)

#define	GPIO_SET0_PINSET18_Pos (18UL)

#define	GPIO_SET0_PINSET18_Msk (0x40000UL)

#define	GPIO_SET0_PINSET19_Pos (19UL)

#define	GPIO_SET0_PINSET19_Msk (0x80000UL)

#define	GPIO_SET0_PINSET20_Pos (20UL)

#define	GPIO_SET0_PINSET20_Msk (0x100000UL)

#define	GPIO_SET0_PINSET21_Pos (21UL)

#define	GPIO_SET0_PINSET21_Msk (0x200000UL)

#define	GPIO_SET0_PINSET22_Pos (22UL)

#define	GPIO_SET0_PINSET22_Msk (0x400000UL)

#define	GPIO_SET0_PINSET23_Pos (23UL)

#define	GPIO_SET0_PINSET23_Msk (0x800000UL)

#define	GPIO_SET0_PINSET24_Pos (24UL)

#define	GPIO_SET0_PINSET24_Msk (0x1000000UL)

#define	GPIO_SET0_PINSET25_Pos (25UL)

#define	GPIO_SET0_PINSET25_Msk (0x2000000UL)

#define	GPIO_SET0_PINSET26_Pos (26UL)

#define	GPIO_SET0_PINSET26_Msk (0x4000000UL)

#define	GPIO_SET0_PINSET27_Pos (27UL)

#define	GPIO_SET0_PINSET27_Msk (0x8000000UL)

#define	GPIO_SET0_PINSET28_Pos (28UL)

#define	GPIO_SET0_PINSET28_Msk (0x10000000UL)

#define	GPIO_SET0_PINSET29_Pos (29UL)

#define	GPIO_SET0_PINSET29_Msk (0x20000000UL)

#define	GPIO_SET0_PINSET30_Pos (30UL)

#define	GPIO_SET0_PINSET30_Msk (0x40000000UL)

#define	GPIO_SET0_PINSET31_Pos (31UL)

#define	GPIO_SET0_PINSET31_Msk (0x80000000UL)

#define	GPIO_SET1_PINSET0_Pos (0UL)

#define	GPIO_SET1_PINSET0_Msk (0x1UL)

#define	GPIO_SET1_PINSET1_Pos (1UL)

#define	GPIO_SET1_PINSET1_Msk (0x2UL)

#define	GPIO_SET1_PINSET2_Pos (2UL)

#define	GPIO_SET1_PINSET2_Msk (0x4UL)

#define	GPIO_SET1_PINSET3_Pos (3UL)

#define	GPIO_SET1_PINSET3_Msk (0x8UL)

#define	GPIO_SET1_PINSET4_Pos (4UL)

#define	GPIO_SET1_PINSET4_Msk (0x10UL)

#define	GPIO_SET1_PINSET5_Pos (5UL)

#define	GPIO_SET1_PINSET5_Msk (0x20UL)

#define	GPIO_SET1_PINSET6_Pos (6UL)

#define	GPIO_SET1_PINSET6_Msk (0x40UL)

#define	GPIO_SET1_PINSET7_Pos (7UL)

#define	GPIO_SET1_PINSET7_Msk (0x80UL)

#define	GPIO_SET1_PINSET8_Pos (8UL)

#define	GPIO_SET1_PINSET8_Msk (0x100UL)

#define	GPIO_SET1_PINSET9_Pos (9UL)

#define	GPIO_SET1_PINSET9_Msk (0x200UL)

#define	GPIO_SET1_PINSET10_Pos (10UL)

#define	GPIO_SET1_PINSET10_Msk (0x400UL)

#define	GPIO_SET1_PINSET11_Pos (11UL)

#define	GPIO_SET1_PINSET11_Msk (0x800UL)

#define	GPIO_SET1_PINSET12_Pos (12UL)

#define	GPIO_SET1_PINSET12_Msk (0x1000UL)

#define	GPIO_SET1_PINSET13_Pos (13UL)

#define	GPIO_SET1_PINSET13_Msk (0x2000UL)

#define	GPIO_SET1_PINSET14_Pos (14UL)

#define	GPIO_SET1_PINSET14_Msk (0x4000UL)

#define	GPIO_SET1_PINSET15_Pos (15UL)

#define	GPIO_SET1_PINSET15_Msk (0x8000UL)

#define	GPIO_SET1_PINSET16_Pos (16UL)

#define	GPIO_SET1_PINSET16_Msk (0x10000UL)

#define	GPIO_SET1_PINSET17_Pos (17UL)

#define	GPIO_SET1_PINSET17_Msk (0x20000UL)

#define	GPIO_SET1_PINSET18_Pos (18UL)

#define	GPIO_SET1_PINSET18_Msk (0x40000UL)

#define	GPIO_SET1_PINSET19_Pos (19UL)

#define	GPIO_SET1_PINSET19_Msk (0x80000UL)

#define	GPIO_SET1_PINSET20_Pos (20UL)

#define	GPIO_SET1_PINSET20_Msk (0x100000UL)

#define	GPIO_SET1_PINSET21_Pos (21UL)

#define	GPIO_SET1_PINSET21_Msk (0x200000UL)

#define	GPIO_SET1_PINSET22_Pos (22UL)

#define	GPIO_SET1_PINSET22_Msk (0x400000UL)

#define	GPIO_SET1_PINSET23_Pos (23UL)

#define	GPIO_SET1_PINSET23_Msk (0x800000UL)

#define	GPIO_SET1_PINSET24_Pos (24UL)

#define	GPIO_SET1_PINSET24_Msk (0x1000000UL)

#define	GPIO_SET1_PINSET25_Pos (25UL)

#define	GPIO_SET1_PINSET25_Msk (0x2000000UL)

#define	GPIO_SET1_PINSET26_Pos (26UL)

#define	GPIO_SET1_PINSET26_Msk (0x4000000UL)

#define	GPIO_SET1_PINSET27_Pos (27UL)

#define	GPIO_SET1_PINSET27_Msk (0x8000000UL)

#define	GPIO_SET1_PINSET28_Pos (28UL)

#define	GPIO_SET1_PINSET28_Msk (0x10000000UL)

#define	GPIO_SET1_PINSET29_Pos (29UL)

#define	GPIO_SET1_PINSET29_Msk (0x20000000UL)

#define	GPIO_SET1_PINSET30_Pos (30UL)

#define	GPIO_SET1_PINSET30_Msk (0x40000000UL)

#define	GPIO_SET1_PINSET31_Pos (31UL)

#define	GPIO_SET1_PINSET31_Msk (0x80000000UL)

#define	GPIO_SET2_PINSET0_Pos (0UL)

#define	GPIO_SET2_PINSET0_Msk (0x1UL)

#define	GPIO_SET2_PINSET1_Pos (1UL)

#define	GPIO_SET2_PINSET1_Msk (0x2UL)

#define	GPIO_SET2_PINSET2_Pos (2UL)

#define	GPIO_SET2_PINSET2_Msk (0x4UL)

#define	GPIO_SET2_PINSET3_Pos (3UL)

#define	GPIO_SET2_PINSET3_Msk (0x8UL)

#define	GPIO_SET2_PINSET4_Pos (4UL)

#define	GPIO_SET2_PINSET4_Msk (0x10UL)

#define	GPIO_SET2_PINSET5_Pos (5UL)

#define	GPIO_SET2_PINSET5_Msk (0x20UL)

#define	GPIO_SET2_PINSET6_Pos (6UL)

#define	GPIO_SET2_PINSET6_Msk (0x40UL)

#define	GPIO_SET2_PINSET7_Pos (7UL)

#define	GPIO_SET2_PINSET7_Msk (0x80UL)

#define	GPIO_SET2_PINSET8_Pos (8UL)

#define	GPIO_SET2_PINSET8_Msk (0x100UL)

#define	GPIO_SET2_PINSET9_Pos (9UL)

#define	GPIO_SET2_PINSET9_Msk (0x200UL)

#define	GPIO_SET2_PINSET10_Pos (10UL)

#define	GPIO_SET2_PINSET10_Msk (0x400UL)

#define	GPIO_SET2_PINSET11_Pos (11UL)

#define	GPIO_SET2_PINSET11_Msk (0x800UL)

#define	GPIO_SET2_PINSET12_Pos (12UL)

#define	GPIO_SET2_PINSET12_Msk (0x1000UL)

#define	GPIO_SET2_PINSET13_Pos (13UL)

#define	GPIO_SET2_PINSET13_Msk (0x2000UL)

#define	GPIO_SET2_PINSET14_Pos (14UL)

#define	GPIO_SET2_PINSET14_Msk (0x4000UL)

#define	GPIO_SET2_PINSET15_Pos (15UL)

#define	GPIO_SET2_PINSET15_Msk (0x8000UL)

#define	GPIO_SET2_PINSET16_Pos (16UL)

#define	GPIO_SET2_PINSET16_Msk (0x10000UL)

#define	GPIO_SET2_PINSET17_Pos (17UL)

#define	GPIO_SET2_PINSET17_Msk (0x20000UL)

#define	GPIO_SET2_PINSET18_Pos (18UL)

#define	GPIO_SET2_PINSET18_Msk (0x40000UL)

#define	GPIO_SET2_PINSET19_Pos (19UL)

#define	GPIO_SET2_PINSET19_Msk (0x80000UL)

#define	GPIO_SET2_PINSET20_Pos (20UL)

#define	GPIO_SET2_PINSET20_Msk (0x100000UL)

#define	GPIO_SET2_PINSET21_Pos (21UL)

#define	GPIO_SET2_PINSET21_Msk (0x200000UL)

#define	GPIO_SET2_PINSET22_Pos (22UL)

#define	GPIO_SET2_PINSET22_Msk (0x400000UL)

#define	GPIO_SET2_PINSET23_Pos (23UL)

#define	GPIO_SET2_PINSET23_Msk (0x800000UL)

#define	GPIO_SET2_PINSET24_Pos (24UL)

#define	GPIO_SET2_PINSET24_Msk (0x1000000UL)

#define	GPIO_SET2_PINSET25_Pos (25UL)

#define	GPIO_SET2_PINSET25_Msk (0x2000000UL)

#define	GPIO_SET2_PINSET26_Pos (26UL)

#define	GPIO_SET2_PINSET26_Msk (0x4000000UL)

#define	GPIO_SET2_PINSET27_Pos (27UL)

#define	GPIO_SET2_PINSET27_Msk (0x8000000UL)

#define	GPIO_SET2_PINSET28_Pos (28UL)

#define	GPIO_SET2_PINSET28_Msk (0x10000000UL)

#define	GPIO_SET2_PINSET29_Pos (29UL)

#define	GPIO_SET2_PINSET29_Msk (0x20000000UL)

#define	GPIO_SET2_PINSET30_Pos (30UL)

#define	GPIO_SET2_PINSET30_Msk (0x40000000UL)

#define	GPIO_SET2_PINSET31_Pos (31UL)

#define	GPIO_SET2_PINSET31_Msk (0x80000000UL)

#define	GPIO_SET3_PINSET0_Pos (0UL)

#define	GPIO_SET3_PINSET0_Msk (0x1UL)

#define	GPIO_SET3_PINSET1_Pos (1UL)

#define	GPIO_SET3_PINSET1_Msk (0x2UL)

#define	GPIO_SET3_PINSET2_Pos (2UL)

#define	GPIO_SET3_PINSET2_Msk (0x4UL)

#define	GPIO_SET3_PINSET3_Pos (3UL)

#define	GPIO_SET3_PINSET3_Msk (0x8UL)

#define	GPIO_SET3_PINSET4_Pos (4UL)

#define	GPIO_SET3_PINSET4_Msk (0x10UL)

#define	GPIO_SET3_PINSET5_Pos (5UL)

#define	GPIO_SET3_PINSET5_Msk (0x20UL)

#define	GPIO_SET3_PINSET6_Pos (6UL)

#define	GPIO_SET3_PINSET6_Msk (0x40UL)

#define	GPIO_SET3_PINSET7_Pos (7UL)

#define	GPIO_SET3_PINSET7_Msk (0x80UL)

#define	GPIO_SET3_PINSET8_Pos (8UL)

#define	GPIO_SET3_PINSET8_Msk (0x100UL)

#define	GPIO_SET3_PINSET9_Pos (9UL)

#define	GPIO_SET3_PINSET9_Msk (0x200UL)

#define	GPIO_SET3_PINSET10_Pos (10UL)

#define	GPIO_SET3_PINSET10_Msk (0x400UL)

#define	GPIO_SET3_PINSET11_Pos (11UL)

#define	GPIO_SET3_PINSET11_Msk (0x800UL)

#define	GPIO_SET3_PINSET12_Pos (12UL)

#define	GPIO_SET3_PINSET12_Msk (0x1000UL)

#define	GPIO_SET3_PINSET13_Pos (13UL)

#define	GPIO_SET3_PINSET13_Msk (0x2000UL)

#define	GPIO_SET3_PINSET14_Pos (14UL)

#define	GPIO_SET3_PINSET14_Msk (0x4000UL)

#define	GPIO_SET3_PINSET15_Pos (15UL)

#define	GPIO_SET3_PINSET15_Msk (0x8000UL)

#define	GPIO_SET3_PINSET16_Pos (16UL)

#define	GPIO_SET3_PINSET16_Msk (0x10000UL)

#define	GPIO_SET3_PINSET17_Pos (17UL)

#define	GPIO_SET3_PINSET17_Msk (0x20000UL)

#define	GPIO_SET3_PINSET18_Pos (18UL)

#define	GPIO_SET3_PINSET18_Msk (0x40000UL)

#define	GPIO_SET3_PINSET19_Pos (19UL)

#define	GPIO_SET3_PINSET19_Msk (0x80000UL)

#define	GPIO_SET3_PINSET20_Pos (20UL)

#define	GPIO_SET3_PINSET20_Msk (0x100000UL)

#define	GPIO_SET3_PINSET21_Pos (21UL)

#define	GPIO_SET3_PINSET21_Msk (0x200000UL)

#define	GPIO_SET3_PINSET22_Pos (22UL)

#define	GPIO_SET3_PINSET22_Msk (0x400000UL)

#define	GPIO_SET3_PINSET23_Pos (23UL)

#define	GPIO_SET3_PINSET23_Msk (0x800000UL)

#define	GPIO_SET3_PINSET24_Pos (24UL)

#define	GPIO_SET3_PINSET24_Msk (0x1000000UL)

#define	GPIO_SET3_PINSET25_Pos (25UL)

#define	GPIO_SET3_PINSET25_Msk (0x2000000UL)

#define	GPIO_SET3_PINSET26_Pos (26UL)

#define	GPIO_SET3_PINSET26_Msk (0x4000000UL)

#define	GPIO_SET3_PINSET27_Pos (27UL)

#define	GPIO_SET3_PINSET27_Msk (0x8000000UL)

#define	GPIO_SET3_PINSET28_Pos (28UL)

#define	GPIO_SET3_PINSET28_Msk (0x10000000UL)

#define	GPIO_SET3_PINSET29_Pos (29UL)

#define	GPIO_SET3_PINSET29_Msk (0x20000000UL)

#define	GPIO_SET3_PINSET30_Pos (30UL)

#define	GPIO_SET3_PINSET30_Msk (0x40000000UL)

#define	GPIO_SET3_PINSET31_Pos (31UL)

#define	GPIO_SET3_PINSET31_Msk (0x80000000UL)

#define	GPIO_SET4_PINSET0_Pos (0UL)

#define	GPIO_SET4_PINSET0_Msk (0x1UL)

#define	GPIO_SET4_PINSET1_Pos (1UL)

#define	GPIO_SET4_PINSET1_Msk (0x2UL)

#define	GPIO_SET4_PINSET2_Pos (2UL)

#define	GPIO_SET4_PINSET2_Msk (0x4UL)

#define	GPIO_SET4_PINSET3_Pos (3UL)

#define	GPIO_SET4_PINSET3_Msk (0x8UL)

#define	GPIO_SET4_PINSET4_Pos (4UL)

#define	GPIO_SET4_PINSET4_Msk (0x10UL)

#define	GPIO_SET4_PINSET5_Pos (5UL)

#define	GPIO_SET4_PINSET5_Msk (0x20UL)

#define	GPIO_SET4_PINSET6_Pos (6UL)

#define	GPIO_SET4_PINSET6_Msk (0x40UL)

#define	GPIO_SET4_PINSET7_Pos (7UL)

#define	GPIO_SET4_PINSET7_Msk (0x80UL)

#define	GPIO_SET4_PINSET8_Pos (8UL)

#define	GPIO_SET4_PINSET8_Msk (0x100UL)

#define	GPIO_SET4_PINSET9_Pos (9UL)

#define	GPIO_SET4_PINSET9_Msk (0x200UL)

#define	GPIO_SET4_PINSET10_Pos (10UL)

#define	GPIO_SET4_PINSET10_Msk (0x400UL)

#define	GPIO_SET4_PINSET11_Pos (11UL)

#define	GPIO_SET4_PINSET11_Msk (0x800UL)

#define	GPIO_SET4_PINSET12_Pos (12UL)

#define	GPIO_SET4_PINSET12_Msk (0x1000UL)

#define	GPIO_SET4_PINSET13_Pos (13UL)

#define	GPIO_SET4_PINSET13_Msk (0x2000UL)

#define	GPIO_SET4_PINSET14_Pos (14UL)

#define	GPIO_SET4_PINSET14_Msk (0x4000UL)

#define	GPIO_SET4_PINSET15_Pos (15UL)

#define	GPIO_SET4_PINSET15_Msk (0x8000UL)

#define	GPIO_SET4_PINSET16_Pos (16UL)

#define	GPIO_SET4_PINSET16_Msk (0x10000UL)

#define	GPIO_SET4_PINSET17_Pos (17UL)

#define	GPIO_SET4_PINSET17_Msk (0x20000UL)

#define	GPIO_SET4_PINSET18_Pos (18UL)

#define	GPIO_SET4_PINSET18_Msk (0x40000UL)

#define	GPIO_SET4_PINSET19_Pos (19UL)

#define	GPIO_SET4_PINSET19_Msk (0x80000UL)

#define	GPIO_SET4_PINSET20_Pos (20UL)

#define	GPIO_SET4_PINSET20_Msk (0x100000UL)

#define	GPIO_SET4_PINSET21_Pos (21UL)

#define	GPIO_SET4_PINSET21_Msk (0x200000UL)

#define	GPIO_SET4_PINSET22_Pos (22UL)

#define	GPIO_SET4_PINSET22_Msk (0x400000UL)

#define	GPIO_SET4_PINSET23_Pos (23UL)

#define	GPIO_SET4_PINSET23_Msk (0x800000UL)

#define	GPIO_SET4_PINSET24_Pos (24UL)

#define	GPIO_SET4_PINSET24_Msk (0x1000000UL)

#define	GPIO_SET4_PINSET25_Pos (25UL)

#define	GPIO_SET4_PINSET25_Msk (0x2000000UL)

#define	GPIO_SET4_PINSET26_Pos (26UL)

#define	GPIO_SET4_PINSET26_Msk (0x4000000UL)

#define	GPIO_SET4_PINSET27_Pos (27UL)

#define	GPIO_SET4_PINSET27_Msk (0x8000000UL)

#define	GPIO_SET4_PINSET28_Pos (28UL)

#define	GPIO_SET4_PINSET28_Msk (0x10000000UL)

#define	GPIO_SET4_PINSET29_Pos (29UL)

#define	GPIO_SET4_PINSET29_Msk (0x20000000UL)

#define	GPIO_SET4_PINSET30_Pos (30UL)

#define	GPIO_SET4_PINSET30_Msk (0x40000000UL)

#define	GPIO_SET4_PINSET31_Pos (31UL)

#define	GPIO_SET4_PINSET31_Msk (0x80000000UL)

#define	GPIO_CLR0_PINCLR0_Pos (0UL)

#define	GPIO_CLR0_PINCLR0_Msk (0x1UL)

#define	GPIO_CLR0_PINCLR1_Pos (1UL)

#define	GPIO_CLR0_PINCLR1_Msk (0x2UL)

#define	GPIO_CLR0_PINCLR2_Pos (2UL)

#define	GPIO_CLR0_PINCLR2_Msk (0x4UL)

#define	GPIO_CLR0_PINCLR3_Pos (3UL)

#define	GPIO_CLR0_PINCLR3_Msk (0x8UL)

#define	GPIO_CLR0_PINCLR4_Pos (4UL)

#define	GPIO_CLR0_PINCLR4_Msk (0x10UL)

#define	GPIO_CLR0_PINCLR5_Pos (5UL)

#define	GPIO_CLR0_PINCLR5_Msk (0x20UL)

#define	GPIO_CLR0_PINCLR6_Pos (6UL)

#define	GPIO_CLR0_PINCLR6_Msk (0x40UL)

#define	GPIO_CLR0_PINCLR7_Pos (7UL)

#define	GPIO_CLR0_PINCLR7_Msk (0x80UL)

#define	GPIO_CLR0_PINCLR8_Pos (8UL)

#define	GPIO_CLR0_PINCLR8_Msk (0x100UL)

#define	GPIO_CLR0_PINCLR9_Pos (9UL)

#define	GPIO_CLR0_PINCLR9_Msk (0x200UL)

#define	GPIO_CLR0_PINCLR10_Pos (10UL)

#define	GPIO_CLR0_PINCLR10_Msk (0x400UL)

#define	GPIO_CLR0_PINCLR11_Pos (11UL)

#define	GPIO_CLR0_PINCLR11_Msk (0x800UL)

#define	GPIO_CLR0_PINCLR12_Pos (12UL)

#define	GPIO_CLR0_PINCLR12_Msk (0x1000UL)

#define	GPIO_CLR0_PINCLR13_Pos (13UL)

#define	GPIO_CLR0_PINCLR13_Msk (0x2000UL)

#define	GPIO_CLR0_PINCLR14_Pos (14UL)

#define	GPIO_CLR0_PINCLR14_Msk (0x4000UL)

#define	GPIO_CLR0_PINCLR15_Pos (15UL)

#define	GPIO_CLR0_PINCLR15_Msk (0x8000UL)

#define	GPIO_CLR0_PINCLR16_Pos (16UL)

#define	GPIO_CLR0_PINCLR16_Msk (0x10000UL)

#define	GPIO_CLR0_PINCLR17_Pos (17UL)

#define	GPIO_CLR0_PINCLR17_Msk (0x20000UL)

#define	GPIO_CLR0_PINCLR18_Pos (18UL)

#define	GPIO_CLR0_PINCLR18_Msk (0x40000UL)

#define	GPIO_CLR0_PINCLR19_Pos (19UL)

#define	GPIO_CLR0_PINCLR19_Msk (0x80000UL)

#define	GPIO_CLR0_PINCLR20_Pos (20UL)

#define	GPIO_CLR0_PINCLR20_Msk (0x100000UL)

#define	GPIO_CLR0_PINCLR21_Pos (21UL)

#define	GPIO_CLR0_PINCLR21_Msk (0x200000UL)

#define	GPIO_CLR0_PINCLR22_Pos (22UL)

#define	GPIO_CLR0_PINCLR22_Msk (0x400000UL)

#define	GPIO_CLR0_PINCLR23_Pos (23UL)

#define	GPIO_CLR0_PINCLR23_Msk (0x800000UL)

#define	GPIO_CLR0_PINCLR24_Pos (24UL)

#define	GPIO_CLR0_PINCLR24_Msk (0x1000000UL)

#define	GPIO_CLR0_PINCLR25_Pos (25UL)

#define	GPIO_CLR0_PINCLR25_Msk (0x2000000UL)

#define	GPIO_CLR0_PINCLR26_Pos (26UL)

#define	GPIO_CLR0_PINCLR26_Msk (0x4000000UL)

#define	GPIO_CLR0_PINCLR27_Pos (27UL)

#define	GPIO_CLR0_PINCLR27_Msk (0x8000000UL)

#define	GPIO_CLR0_PINCLR28_Pos (28UL)

#define	GPIO_CLR0_PINCLR28_Msk (0x10000000UL)

#define	GPIO_CLR0_PINCLR29_Pos (29UL)

#define	GPIO_CLR0_PINCLR29_Msk (0x20000000UL)

#define	GPIO_CLR0_PINCLR30_Pos (30UL)

#define	GPIO_CLR0_PINCLR30_Msk (0x40000000UL)

#define	GPIO_CLR0_PINCLR31_Pos (31UL)

#define	GPIO_CLR0_PINCLR31_Msk (0x80000000UL)

#define	GPIO_CLR1_PINCLR0_Pos (0UL)

#define	GPIO_CLR1_PINCLR0_Msk (0x1UL)

#define	GPIO_CLR1_PINCLR1_Pos (1UL)

#define	GPIO_CLR1_PINCLR1_Msk (0x2UL)

#define	GPIO_CLR1_PINCLR2_Pos (2UL)

#define	GPIO_CLR1_PINCLR2_Msk (0x4UL)

#define	GPIO_CLR1_PINCLR3_Pos (3UL)

#define	GPIO_CLR1_PINCLR3_Msk (0x8UL)

#define	GPIO_CLR1_PINCLR4_Pos (4UL)

#define	GPIO_CLR1_PINCLR4_Msk (0x10UL)

#define	GPIO_CLR1_PINCLR5_Pos (5UL)

#define	GPIO_CLR1_PINCLR5_Msk (0x20UL)

#define	GPIO_CLR1_PINCLR6_Pos (6UL)

#define	GPIO_CLR1_PINCLR6_Msk (0x40UL)

#define	GPIO_CLR1_PINCLR7_Pos (7UL)

#define	GPIO_CLR1_PINCLR7_Msk (0x80UL)

#define	GPIO_CLR1_PINCLR8_Pos (8UL)

#define	GPIO_CLR1_PINCLR8_Msk (0x100UL)

#define	GPIO_CLR1_PINCLR9_Pos (9UL)

#define	GPIO_CLR1_PINCLR9_Msk (0x200UL)

#define	GPIO_CLR1_PINCLR10_Pos (10UL)

#define	GPIO_CLR1_PINCLR10_Msk (0x400UL)

#define	GPIO_CLR1_PINCLR11_Pos (11UL)

#define	GPIO_CLR1_PINCLR11_Msk (0x800UL)

#define	GPIO_CLR1_PINCLR12_Pos (12UL)

#define	GPIO_CLR1_PINCLR12_Msk (0x1000UL)

#define	GPIO_CLR1_PINCLR13_Pos (13UL)

#define	GPIO_CLR1_PINCLR13_Msk (0x2000UL)

#define	GPIO_CLR1_PINCLR14_Pos (14UL)

#define	GPIO_CLR1_PINCLR14_Msk (0x4000UL)

#define	GPIO_CLR1_PINCLR15_Pos (15UL)

#define	GPIO_CLR1_PINCLR15_Msk (0x8000UL)

#define	GPIO_CLR1_PINCLR16_Pos (16UL)

#define	GPIO_CLR1_PINCLR16_Msk (0x10000UL)

#define	GPIO_CLR1_PINCLR17_Pos (17UL)

#define	GPIO_CLR1_PINCLR17_Msk (0x20000UL)

#define	GPIO_CLR1_PINCLR18_Pos (18UL)

#define	GPIO_CLR1_PINCLR18_Msk (0x40000UL)

#define	GPIO_CLR1_PINCLR19_Pos (19UL)

#define	GPIO_CLR1_PINCLR19_Msk (0x80000UL)

#define	GPIO_CLR1_PINCLR20_Pos (20UL)

#define	GPIO_CLR1_PINCLR20_Msk (0x100000UL)

#define	GPIO_CLR1_PINCLR21_Pos (21UL)

#define	GPIO_CLR1_PINCLR21_Msk (0x200000UL)

#define	GPIO_CLR1_PINCLR22_Pos (22UL)

#define	GPIO_CLR1_PINCLR22_Msk (0x400000UL)

#define	GPIO_CLR1_PINCLR23_Pos (23UL)

#define	GPIO_CLR1_PINCLR23_Msk (0x800000UL)

#define	GPIO_CLR1_PINCLR24_Pos (24UL)

#define	GPIO_CLR1_PINCLR24_Msk (0x1000000UL)

#define	GPIO_CLR1_PINCLR25_Pos (25UL)

#define	GPIO_CLR1_PINCLR25_Msk (0x2000000UL)

#define	GPIO_CLR1_PINCLR26_Pos (26UL)

#define	GPIO_CLR1_PINCLR26_Msk (0x4000000UL)

#define	GPIO_CLR1_PINCLR27_Pos (27UL)

#define	GPIO_CLR1_PINCLR27_Msk (0x8000000UL)

#define	GPIO_CLR1_PINCLR28_Pos (28UL)

#define	GPIO_CLR1_PINCLR28_Msk (0x10000000UL)

#define	GPIO_CLR1_PINCLR29_Pos (29UL)

#define	GPIO_CLR1_PINCLR29_Msk (0x20000000UL)

#define	GPIO_CLR1_PINCLR30_Pos (30UL)

#define	GPIO_CLR1_PINCLR30_Msk (0x40000000UL)

#define	GPIO_CLR1_PINCLR31_Pos (31UL)

#define	GPIO_CLR1_PINCLR31_Msk (0x80000000UL)

#define	GPIO_CLR2_PINCLR0_Pos (0UL)

#define	GPIO_CLR2_PINCLR0_Msk (0x1UL)

#define	GPIO_CLR2_PINCLR1_Pos (1UL)

#define	GPIO_CLR2_PINCLR1_Msk (0x2UL)

#define	GPIO_CLR2_PINCLR2_Pos (2UL)

#define	GPIO_CLR2_PINCLR2_Msk (0x4UL)

#define	GPIO_CLR2_PINCLR3_Pos (3UL)

#define	GPIO_CLR2_PINCLR3_Msk (0x8UL)

#define	GPIO_CLR2_PINCLR4_Pos (4UL)

#define	GPIO_CLR2_PINCLR4_Msk (0x10UL)

#define	GPIO_CLR2_PINCLR5_Pos (5UL)

#define	GPIO_CLR2_PINCLR5_Msk (0x20UL)

#define	GPIO_CLR2_PINCLR6_Pos (6UL)

#define	GPIO_CLR2_PINCLR6_Msk (0x40UL)

#define	GPIO_CLR2_PINCLR7_Pos (7UL)

#define	GPIO_CLR2_PINCLR7_Msk (0x80UL)

#define	GPIO_CLR2_PINCLR8_Pos (8UL)

#define	GPIO_CLR2_PINCLR8_Msk (0x100UL)

#define	GPIO_CLR2_PINCLR9_Pos (9UL)

#define	GPIO_CLR2_PINCLR9_Msk (0x200UL)

#define	GPIO_CLR2_PINCLR10_Pos (10UL)

#define	GPIO_CLR2_PINCLR10_Msk (0x400UL)

#define	GPIO_CLR2_PINCLR11_Pos (11UL)

#define	GPIO_CLR2_PINCLR11_Msk (0x800UL)

#define	GPIO_CLR2_PINCLR12_Pos (12UL)

#define	GPIO_CLR2_PINCLR12_Msk (0x1000UL)

#define	GPIO_CLR2_PINCLR13_Pos (13UL)

#define	GPIO_CLR2_PINCLR13_Msk (0x2000UL)

#define	GPIO_CLR2_PINCLR14_Pos (14UL)

#define	GPIO_CLR2_PINCLR14_Msk (0x4000UL)

#define	GPIO_CLR2_PINCLR15_Pos (15UL)

#define	GPIO_CLR2_PINCLR15_Msk (0x8000UL)

#define	GPIO_CLR2_PINCLR16_Pos (16UL)

#define	GPIO_CLR2_PINCLR16_Msk (0x10000UL)

#define	GPIO_CLR2_PINCLR17_Pos (17UL)

#define	GPIO_CLR2_PINCLR17_Msk (0x20000UL)

#define	GPIO_CLR2_PINCLR18_Pos (18UL)

#define	GPIO_CLR2_PINCLR18_Msk (0x40000UL)

#define	GPIO_CLR2_PINCLR19_Pos (19UL)

#define	GPIO_CLR2_PINCLR19_Msk (0x80000UL)

#define	GPIO_CLR2_PINCLR20_Pos (20UL)

#define	GPIO_CLR2_PINCLR20_Msk (0x100000UL)

#define	GPIO_CLR2_PINCLR21_Pos (21UL)

#define	GPIO_CLR2_PINCLR21_Msk (0x200000UL)

#define	GPIO_CLR2_PINCLR22_Pos (22UL)

#define	GPIO_CLR2_PINCLR22_Msk (0x400000UL)

#define	GPIO_CLR2_PINCLR23_Pos (23UL)

#define	GPIO_CLR2_PINCLR23_Msk (0x800000UL)

#define	GPIO_CLR2_PINCLR24_Pos (24UL)

#define	GPIO_CLR2_PINCLR24_Msk (0x1000000UL)

#define	GPIO_CLR2_PINCLR25_Pos (25UL)

#define	GPIO_CLR2_PINCLR25_Msk (0x2000000UL)

#define	GPIO_CLR2_PINCLR26_Pos (26UL)

#define	GPIO_CLR2_PINCLR26_Msk (0x4000000UL)

#define	GPIO_CLR2_PINCLR27_Pos (27UL)

#define	GPIO_CLR2_PINCLR27_Msk (0x8000000UL)

#define	GPIO_CLR2_PINCLR28_Pos (28UL)

#define	GPIO_CLR2_PINCLR28_Msk (0x10000000UL)

#define	GPIO_CLR2_PINCLR29_Pos (29UL)

#define	GPIO_CLR2_PINCLR29_Msk (0x20000000UL)

#define	GPIO_CLR2_PINCLR30_Pos (30UL)

#define	GPIO_CLR2_PINCLR30_Msk (0x40000000UL)

#define	GPIO_CLR2_PINCLR31_Pos (31UL)

#define	GPIO_CLR2_PINCLR31_Msk (0x80000000UL)

#define	GPIO_CLR3_PINCLR0_Pos (0UL)

#define	GPIO_CLR3_PINCLR0_Msk (0x1UL)

#define	GPIO_CLR3_PINCLR1_Pos (1UL)

#define	GPIO_CLR3_PINCLR1_Msk (0x2UL)

#define	GPIO_CLR3_PINCLR2_Pos (2UL)

#define	GPIO_CLR3_PINCLR2_Msk (0x4UL)

#define	GPIO_CLR3_PINCLR3_Pos (3UL)

#define	GPIO_CLR3_PINCLR3_Msk (0x8UL)

#define	GPIO_CLR3_PINCLR4_Pos (4UL)

#define	GPIO_CLR3_PINCLR4_Msk (0x10UL)

#define	GPIO_CLR3_PINCLR5_Pos (5UL)

#define	GPIO_CLR3_PINCLR5_Msk (0x20UL)

#define	GPIO_CLR3_PINCLR6_Pos (6UL)

#define	GPIO_CLR3_PINCLR6_Msk (0x40UL)

#define	GPIO_CLR3_PINCLR7_Pos (7UL)

#define	GPIO_CLR3_PINCLR7_Msk (0x80UL)

#define	GPIO_CLR3_PINCLR8_Pos (8UL)

#define	GPIO_CLR3_PINCLR8_Msk (0x100UL)

#define	GPIO_CLR3_PINCLR9_Pos (9UL)

#define	GPIO_CLR3_PINCLR9_Msk (0x200UL)

#define	GPIO_CLR3_PINCLR10_Pos (10UL)

#define	GPIO_CLR3_PINCLR10_Msk (0x400UL)

#define	GPIO_CLR3_PINCLR11_Pos (11UL)

#define	GPIO_CLR3_PINCLR11_Msk (0x800UL)

#define	GPIO_CLR3_PINCLR12_Pos (12UL)

#define	GPIO_CLR3_PINCLR12_Msk (0x1000UL)

#define	GPIO_CLR3_PINCLR13_Pos (13UL)

#define	GPIO_CLR3_PINCLR13_Msk (0x2000UL)

#define	GPIO_CLR3_PINCLR14_Pos (14UL)

#define	GPIO_CLR3_PINCLR14_Msk (0x4000UL)

#define	GPIO_CLR3_PINCLR15_Pos (15UL)

#define	GPIO_CLR3_PINCLR15_Msk (0x8000UL)

#define	GPIO_CLR3_PINCLR16_Pos (16UL)

#define	GPIO_CLR3_PINCLR16_Msk (0x10000UL)

#define	GPIO_CLR3_PINCLR17_Pos (17UL)

#define	GPIO_CLR3_PINCLR17_Msk (0x20000UL)

#define	GPIO_CLR3_PINCLR18_Pos (18UL)

#define	GPIO_CLR3_PINCLR18_Msk (0x40000UL)

#define	GPIO_CLR3_PINCLR19_Pos (19UL)

#define	GPIO_CLR3_PINCLR19_Msk (0x80000UL)

#define	GPIO_CLR3_PINCLR20_Pos (20UL)

#define	GPIO_CLR3_PINCLR20_Msk (0x100000UL)

#define	GPIO_CLR3_PINCLR21_Pos (21UL)

#define	GPIO_CLR3_PINCLR21_Msk (0x200000UL)

#define	GPIO_CLR3_PINCLR22_Pos (22UL)

#define	GPIO_CLR3_PINCLR22_Msk (0x400000UL)

#define	GPIO_CLR3_PINCLR23_Pos (23UL)

#define	GPIO_CLR3_PINCLR23_Msk (0x800000UL)

#define	GPIO_CLR3_PINCLR24_Pos (24UL)

#define	GPIO_CLR3_PINCLR24_Msk (0x1000000UL)

#define	GPIO_CLR3_PINCLR25_Pos (25UL)

#define	GPIO_CLR3_PINCLR25_Msk (0x2000000UL)

#define	GPIO_CLR3_PINCLR26_Pos (26UL)

#define	GPIO_CLR3_PINCLR26_Msk (0x4000000UL)

#define	GPIO_CLR3_PINCLR27_Pos (27UL)

#define	GPIO_CLR3_PINCLR27_Msk (0x8000000UL)

#define	GPIO_CLR3_PINCLR28_Pos (28UL)

#define	GPIO_CLR3_PINCLR28_Msk (0x10000000UL)

#define	GPIO_CLR3_PINCLR29_Pos (29UL)

#define	GPIO_CLR3_PINCLR29_Msk (0x20000000UL)

#define	GPIO_CLR3_PINCLR30_Pos (30UL)

#define	GPIO_CLR3_PINCLR30_Msk (0x40000000UL)

#define	GPIO_CLR3_PINCLR31_Pos (31UL)

#define	GPIO_CLR3_PINCLR31_Msk (0x80000000UL)

#define	GPIO_CLR4_PINCLR0_Pos (0UL)

#define	GPIO_CLR4_PINCLR0_Msk (0x1UL)

#define	GPIO_CLR4_PINCLR1_Pos (1UL)

#define	GPIO_CLR4_PINCLR1_Msk (0x2UL)

#define	GPIO_CLR4_PINCLR2_Pos (2UL)

#define	GPIO_CLR4_PINCLR2_Msk (0x4UL)

#define	GPIO_CLR4_PINCLR3_Pos (3UL)

#define	GPIO_CLR4_PINCLR3_Msk (0x8UL)

#define	GPIO_CLR4_PINCLR4_Pos (4UL)

#define	GPIO_CLR4_PINCLR4_Msk (0x10UL)

#define	GPIO_CLR4_PINCLR5_Pos (5UL)

#define	GPIO_CLR4_PINCLR5_Msk (0x20UL)

#define	GPIO_CLR4_PINCLR6_Pos (6UL)

#define	GPIO_CLR4_PINCLR6_Msk (0x40UL)

#define	GPIO_CLR4_PINCLR7_Pos (7UL)

#define	GPIO_CLR4_PINCLR7_Msk (0x80UL)

#define	GPIO_CLR4_PINCLR8_Pos (8UL)

#define	GPIO_CLR4_PINCLR8_Msk (0x100UL)

#define	GPIO_CLR4_PINCLR9_Pos (9UL)

#define	GPIO_CLR4_PINCLR9_Msk (0x200UL)

#define	GPIO_CLR4_PINCLR10_Pos (10UL)

#define	GPIO_CLR4_PINCLR10_Msk (0x400UL)

#define	GPIO_CLR4_PINCLR11_Pos (11UL)

#define	GPIO_CLR4_PINCLR11_Msk (0x800UL)

#define	GPIO_CLR4_PINCLR12_Pos (12UL)

#define	GPIO_CLR4_PINCLR12_Msk (0x1000UL)

#define	GPIO_CLR4_PINCLR13_Pos (13UL)

#define	GPIO_CLR4_PINCLR13_Msk (0x2000UL)

#define	GPIO_CLR4_PINCLR14_Pos (14UL)

#define	GPIO_CLR4_PINCLR14_Msk (0x4000UL)

#define	GPIO_CLR4_PINCLR15_Pos (15UL)

#define	GPIO_CLR4_PINCLR15_Msk (0x8000UL)

#define	GPIO_CLR4_PINCLR16_Pos (16UL)

#define	GPIO_CLR4_PINCLR16_Msk (0x10000UL)

#define	GPIO_CLR4_PINCLR17_Pos (17UL)

#define	GPIO_CLR4_PINCLR17_Msk (0x20000UL)

#define	GPIO_CLR4_PINCLR18_Pos (18UL)

#define	GPIO_CLR4_PINCLR18_Msk (0x40000UL)

#define	GPIO_CLR4_PINCLR19_Pos (19UL)

#define	GPIO_CLR4_PINCLR19_Msk (0x80000UL)

#define	GPIO_CLR4_PINCLR20_Pos (20UL)

#define	GPIO_CLR4_PINCLR20_Msk (0x100000UL)

#define	GPIO_CLR4_PINCLR21_Pos (21UL)

#define	GPIO_CLR4_PINCLR21_Msk (0x200000UL)

#define	GPIO_CLR4_PINCLR22_Pos (22UL)

#define	GPIO_CLR4_PINCLR22_Msk (0x400000UL)

#define	GPIO_CLR4_PINCLR23_Pos (23UL)

#define	GPIO_CLR4_PINCLR23_Msk (0x800000UL)

#define	GPIO_CLR4_PINCLR24_Pos (24UL)

#define	GPIO_CLR4_PINCLR24_Msk (0x1000000UL)

#define	GPIO_CLR4_PINCLR25_Pos (25UL)

#define	GPIO_CLR4_PINCLR25_Msk (0x2000000UL)

#define	GPIO_CLR4_PINCLR26_Pos (26UL)

#define	GPIO_CLR4_PINCLR26_Msk (0x4000000UL)

#define	GPIO_CLR4_PINCLR27_Pos (27UL)

#define	GPIO_CLR4_PINCLR27_Msk (0x8000000UL)

#define	GPIO_CLR4_PINCLR28_Pos (28UL)

#define	GPIO_CLR4_PINCLR28_Msk (0x10000000UL)

#define	GPIO_CLR4_PINCLR29_Pos (29UL)

#define	GPIO_CLR4_PINCLR29_Msk (0x20000000UL)

#define	GPIO_CLR4_PINCLR30_Pos (30UL)

#define	GPIO_CLR4_PINCLR30_Msk (0x40000000UL)

#define	GPIO_CLR4_PINCLR31_Pos (31UL)

#define	GPIO_CLR4_PINCLR31_Msk (0x80000000UL)

Detailed Description

Macro Definition Documentation

◆ ADC_CR_BURST_Msk

#define ADC_CR_BURST_Msk (0x10000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

BURST (Bitfield-Mask: 0x01)

◆ ADC_CR_BURST_Pos

#define ADC_CR_BURST_Pos (16UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

BURST (Bit 16)

◆ ADC_CR_CLKDIV_Msk

#define ADC_CR_CLKDIV_Msk (0xff00UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CLKDIV (Bitfield-Mask: 0xff)

◆ ADC_CR_CLKDIV_Pos

#define ADC_CR_CLKDIV_Pos (8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CLKDIV (Bit 8)

◆ ADC_CR_EDGE_Msk

#define ADC_CR_EDGE_Msk (0x8000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EDGE (Bitfield-Mask: 0x01)

◆ ADC_CR_EDGE_Pos

#define ADC_CR_EDGE_Pos (27UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EDGE (Bit 27)

◆ ADC_CR_PDN_Msk

#define ADC_CR_PDN_Msk (0x200000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PDN (Bitfield-Mask: 0x01)

◆ ADC_CR_PDN_Pos

#define ADC_CR_PDN_Pos (21UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PDN (Bit 21)

◆ ADC_CR_SEL_Msk

#define ADC_CR_SEL_Msk (0xffUL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

SEL (Bitfield-Mask: 0xff)

◆ ADC_CR_SEL_Pos

#define ADC_CR_SEL_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

SEL (Bit 0)

◆ ADC_CR_START_Msk

#define ADC_CR_START_Msk (0x7000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

START (Bitfield-Mask: 0x07)

◆ ADC_CR_START_Pos

#define ADC_CR_START_Pos (24UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

START (Bit 24)

◆ ADC_GDR_CHN_Msk

#define ADC_GDR_CHN_Msk (0x7000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CHN (Bitfield-Mask: 0x07)

◆ ADC_GDR_CHN_Pos

#define ADC_GDR_CHN_Pos (24UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CHN (Bit 24)

◆ ADC_GDR_DONE_Msk

#define ADC_GDR_DONE_Msk (0x80000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DONE (Bitfield-Mask: 0x01)

◆ ADC_GDR_DONE_Pos

#define ADC_GDR_DONE_Pos (31UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DONE (Bit 31)

◆ ADC_GDR_OVERRUN_Msk

#define ADC_GDR_OVERRUN_Msk (0x40000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

OVERRUN (Bitfield-Mask: 0x01)

◆ ADC_GDR_OVERRUN_Pos

#define ADC_GDR_OVERRUN_Pos (30UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

OVERRUN (Bit 30)

◆ ADC_GDR_RESULT_Msk

#define ADC_GDR_RESULT_Msk (0xfff0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RESULT (Bitfield-Mask: 0xfff)

◆ ADC_GDR_RESULT_Pos

#define ADC_GDR_RESULT_Pos (4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RESULT (Bit 4)

◆ ADC_INTEN_ADGINTEN_Msk

#define ADC_INTEN_ADGINTEN_Msk (0x100UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

ADGINTEN (Bitfield-Mask: 0x01)

◆ ADC_INTEN_ADGINTEN_Pos

#define ADC_INTEN_ADGINTEN_Pos (8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

ADGINTEN (Bit 8)

◆ ADC_INTEN_ADINTEN0_Msk

#define ADC_INTEN_ADINTEN0_Msk (0x1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

ADINTEN0 (Bitfield-Mask: 0x01)

◆ ADC_INTEN_ADINTEN0_Pos

#define ADC_INTEN_ADINTEN0_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

ADINTEN0 (Bit 0)

◆ ADC_INTEN_ADINTEN1_Msk

#define ADC_INTEN_ADINTEN1_Msk (0x2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

ADINTEN1 (Bitfield-Mask: 0x01)

◆ ADC_INTEN_ADINTEN1_Pos

#define ADC_INTEN_ADINTEN1_Pos (1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

ADINTEN1 (Bit 1)

◆ ADC_INTEN_ADINTEN2_Msk

#define ADC_INTEN_ADINTEN2_Msk (0x4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

ADINTEN2 (Bitfield-Mask: 0x01)

◆ ADC_INTEN_ADINTEN2_Pos

#define ADC_INTEN_ADINTEN2_Pos (2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

ADINTEN2 (Bit 2)

◆ ADC_INTEN_ADINTEN3_Msk

#define ADC_INTEN_ADINTEN3_Msk (0x8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

ADINTEN3 (Bitfield-Mask: 0x01)

◆ ADC_INTEN_ADINTEN3_Pos

#define ADC_INTEN_ADINTEN3_Pos (3UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

ADINTEN3 (Bit 3)

◆ ADC_INTEN_ADINTEN4_Msk

#define ADC_INTEN_ADINTEN4_Msk (0x10UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

ADINTEN4 (Bitfield-Mask: 0x01)

◆ ADC_INTEN_ADINTEN4_Pos

#define ADC_INTEN_ADINTEN4_Pos (4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

ADINTEN4 (Bit 4)

◆ ADC_INTEN_ADINTEN5_Msk

#define ADC_INTEN_ADINTEN5_Msk (0x20UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

ADINTEN5 (Bitfield-Mask: 0x01)

◆ ADC_INTEN_ADINTEN5_Pos

#define ADC_INTEN_ADINTEN5_Pos (5UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

ADINTEN5 (Bit 5)

◆ ADC_INTEN_ADINTEN6_Msk

#define ADC_INTEN_ADINTEN6_Msk (0x40UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

ADINTEN6 (Bitfield-Mask: 0x01)

◆ ADC_INTEN_ADINTEN6_Pos

#define ADC_INTEN_ADINTEN6_Pos (6UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

ADINTEN6 (Bit 6)

◆ ADC_INTEN_ADINTEN7_Msk

#define ADC_INTEN_ADINTEN7_Msk (0x80UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

ADINTEN7 (Bitfield-Mask: 0x01)

◆ ADC_INTEN_ADINTEN7_Pos

#define ADC_INTEN_ADINTEN7_Pos (7UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

ADINTEN7 (Bit 7)

◆ ADC_STAT_ADINT_Msk

#define ADC_STAT_ADINT_Msk (0x10000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

ADINT (Bitfield-Mask: 0x01)

◆ ADC_STAT_ADINT_Pos

#define ADC_STAT_ADINT_Pos (16UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

ADINT (Bit 16)

◆ ADC_STAT_DONE0_Msk

#define ADC_STAT_DONE0_Msk (0x1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DONE0 (Bitfield-Mask: 0x01)

◆ ADC_STAT_DONE0_Pos

#define ADC_STAT_DONE0_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DONE0 (Bit 0)

◆ ADC_STAT_DONE1_Msk

#define ADC_STAT_DONE1_Msk (0x2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DONE1 (Bitfield-Mask: 0x01)

◆ ADC_STAT_DONE1_Pos

#define ADC_STAT_DONE1_Pos (1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DONE1 (Bit 1)

◆ ADC_STAT_DONE2_Msk

#define ADC_STAT_DONE2_Msk (0x4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DONE2 (Bitfield-Mask: 0x01)

◆ ADC_STAT_DONE2_Pos

#define ADC_STAT_DONE2_Pos (2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DONE2 (Bit 2)

◆ ADC_STAT_DONE3_Msk

#define ADC_STAT_DONE3_Msk (0x8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DONE3 (Bitfield-Mask: 0x01)

◆ ADC_STAT_DONE3_Pos

#define ADC_STAT_DONE3_Pos (3UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DONE3 (Bit 3)

◆ ADC_STAT_DONE4_Msk

#define ADC_STAT_DONE4_Msk (0x10UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DONE4 (Bitfield-Mask: 0x01)

◆ ADC_STAT_DONE4_Pos

#define ADC_STAT_DONE4_Pos (4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DONE4 (Bit 4)

◆ ADC_STAT_DONE5_Msk

#define ADC_STAT_DONE5_Msk (0x20UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DONE5 (Bitfield-Mask: 0x01)

◆ ADC_STAT_DONE5_Pos

#define ADC_STAT_DONE5_Pos (5UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DONE5 (Bit 5)

◆ ADC_STAT_DONE6_Msk

#define ADC_STAT_DONE6_Msk (0x40UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DONE6 (Bitfield-Mask: 0x01)

◆ ADC_STAT_DONE6_Pos

#define ADC_STAT_DONE6_Pos (6UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DONE6 (Bit 6)

◆ ADC_STAT_DONE7_Msk

#define ADC_STAT_DONE7_Msk (0x80UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DONE7 (Bitfield-Mask: 0x01)

◆ ADC_STAT_DONE7_Pos

#define ADC_STAT_DONE7_Pos (7UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DONE7 (Bit 7)

◆ ADC_STAT_OVERRUN0_Msk

#define ADC_STAT_OVERRUN0_Msk (0x100UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

OVERRUN0 (Bitfield-Mask: 0x01)

◆ ADC_STAT_OVERRUN0_Pos

#define ADC_STAT_OVERRUN0_Pos (8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

OVERRUN0 (Bit 8)

◆ ADC_STAT_OVERRUN1_Msk

#define ADC_STAT_OVERRUN1_Msk (0x200UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

OVERRUN1 (Bitfield-Mask: 0x01)

◆ ADC_STAT_OVERRUN1_Pos

#define ADC_STAT_OVERRUN1_Pos (9UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

OVERRUN1 (Bit 9)

◆ ADC_STAT_OVERRUN2_Msk

#define ADC_STAT_OVERRUN2_Msk (0x400UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

OVERRUN2 (Bitfield-Mask: 0x01)

◆ ADC_STAT_OVERRUN2_Pos

#define ADC_STAT_OVERRUN2_Pos (10UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

OVERRUN2 (Bit 10)

◆ ADC_STAT_OVERRUN3_Msk

#define ADC_STAT_OVERRUN3_Msk (0x800UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

OVERRUN3 (Bitfield-Mask: 0x01)

◆ ADC_STAT_OVERRUN3_Pos

#define ADC_STAT_OVERRUN3_Pos (11UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

OVERRUN3 (Bit 11)

◆ ADC_STAT_OVERRUN4_Msk

#define ADC_STAT_OVERRUN4_Msk (0x1000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

OVERRUN4 (Bitfield-Mask: 0x01)

◆ ADC_STAT_OVERRUN4_Pos

#define ADC_STAT_OVERRUN4_Pos (12UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

OVERRUN4 (Bit 12)

◆ ADC_STAT_OVERRUN5_Msk

#define ADC_STAT_OVERRUN5_Msk (0x2000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

OVERRUN5 (Bitfield-Mask: 0x01)

◆ ADC_STAT_OVERRUN5_Pos

#define ADC_STAT_OVERRUN5_Pos (13UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

OVERRUN5 (Bit 13)

◆ ADC_STAT_OVERRUN6_Msk

#define ADC_STAT_OVERRUN6_Msk (0x4000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

OVERRUN6 (Bitfield-Mask: 0x01)

◆ ADC_STAT_OVERRUN6_Pos

#define ADC_STAT_OVERRUN6_Pos (14UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

OVERRUN6 (Bit 14)

◆ ADC_STAT_OVERRUN7_Msk

#define ADC_STAT_OVERRUN7_Msk (0x8000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

OVERRUN7 (Bitfield-Mask: 0x01)

◆ ADC_STAT_OVERRUN7_Pos

#define ADC_STAT_OVERRUN7_Pos (15UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

OVERRUN7 (Bit 15)

◆ ADC_TRM_ADCOFFS_Msk

#define ADC_TRM_ADCOFFS_Msk (0xf0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

ADCOFFS (Bitfield-Mask: 0x0f)

◆ ADC_TRM_ADCOFFS_Pos

#define ADC_TRM_ADCOFFS_Pos (4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

ADCOFFS (Bit 4)

◆ ADC_TRM_TRIM_Msk

#define ADC_TRM_TRIM_Msk (0xf00UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TRIM (Bitfield-Mask: 0x0f)

◆ ADC_TRM_TRIM_Pos

#define ADC_TRM_TRIM_Pos (8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TRIM (Bit 8)

◆ CAN1_BTR_BRP_Msk

#define CAN1_BTR_BRP_Msk (0x3ffUL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

BRP (Bitfield-Mask: 0x3ff)

◆ CAN1_BTR_BRP_Pos

#define CAN1_BTR_BRP_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

BRP (Bit 0)

◆ CAN1_BTR_SAM_Msk

#define CAN1_BTR_SAM_Msk (0x800000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

SAM (Bitfield-Mask: 0x01)

◆ CAN1_BTR_SAM_Pos

#define CAN1_BTR_SAM_Pos (23UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

SAM (Bit 23)

◆ CAN1_BTR_SJW_Msk

#define CAN1_BTR_SJW_Msk (0xc000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

SJW (Bitfield-Mask: 0x03)

◆ CAN1_BTR_SJW_Pos

#define CAN1_BTR_SJW_Pos (14UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

SJW (Bit 14)

◆ CAN1_BTR_TESG1_Msk

#define CAN1_BTR_TESG1_Msk (0xf0000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TESG1 (Bitfield-Mask: 0x0f)

◆ CAN1_BTR_TESG1_Pos

#define CAN1_BTR_TESG1_Pos (16UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TESG1 (Bit 16)

◆ CAN1_BTR_TESG2_Msk

#define CAN1_BTR_TESG2_Msk (0x700000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TESG2 (Bitfield-Mask: 0x07)

◆ CAN1_BTR_TESG2_Pos

#define CAN1_BTR_TESG2_Pos (20UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TESG2 (Bit 20)

◆ CAN1_CMR_AT_Msk

#define CAN1_CMR_AT_Msk (0x2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

AT (Bitfield-Mask: 0x01)

◆ CAN1_CMR_AT_Pos

#define CAN1_CMR_AT_Pos (1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

AT (Bit 1)

◆ CAN1_CMR_CDO_Msk

#define CAN1_CMR_CDO_Msk (0x8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CDO (Bitfield-Mask: 0x01)

◆ CAN1_CMR_CDO_Pos

#define CAN1_CMR_CDO_Pos (3UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CDO (Bit 3)

◆ CAN1_CMR_RRB_Msk

#define CAN1_CMR_RRB_Msk (0x4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RRB (Bitfield-Mask: 0x01)

◆ CAN1_CMR_RRB_Pos

#define CAN1_CMR_RRB_Pos (2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RRB (Bit 2)

◆ CAN1_CMR_SRR_Msk

#define CAN1_CMR_SRR_Msk (0x10UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

SRR (Bitfield-Mask: 0x01)

◆ CAN1_CMR_SRR_Pos

#define CAN1_CMR_SRR_Pos (4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

SRR (Bit 4)

◆ CAN1_CMR_STB1_Msk

#define CAN1_CMR_STB1_Msk (0x20UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

STB1 (Bitfield-Mask: 0x01)

◆ CAN1_CMR_STB1_Pos

#define CAN1_CMR_STB1_Pos (5UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

STB1 (Bit 5)

◆ CAN1_CMR_STB2_Msk

#define CAN1_CMR_STB2_Msk (0x40UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

STB2 (Bitfield-Mask: 0x01)

◆ CAN1_CMR_STB2_Pos

#define CAN1_CMR_STB2_Pos (6UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

STB2 (Bit 6)

◆ CAN1_CMR_STB3_Msk

#define CAN1_CMR_STB3_Msk (0x80UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

STB3 (Bitfield-Mask: 0x01)

◆ CAN1_CMR_STB3_Pos

#define CAN1_CMR_STB3_Pos (7UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

STB3 (Bit 7)

◆ CAN1_CMR_TR_Msk

#define CAN1_CMR_TR_Msk (0x1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TR (Bitfield-Mask: 0x01)

◆ CAN1_CMR_TR_Pos

#define CAN1_CMR_TR_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TR (Bit 0)

◆ CAN1_EWL_EWL_Msk

#define CAN1_EWL_EWL_Msk (0xffUL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EWL (Bitfield-Mask: 0xff)

◆ CAN1_EWL_EWL_Pos

#define CAN1_EWL_EWL_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EWL (Bit 0)

◆ CAN1_GSR_BS_Msk

#define CAN1_GSR_BS_Msk (0x80UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

BS (Bitfield-Mask: 0x01)

◆ CAN1_GSR_BS_Pos

#define CAN1_GSR_BS_Pos (7UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

BS (Bit 7)

◆ CAN1_GSR_DOS_Msk

#define CAN1_GSR_DOS_Msk (0x2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DOS (Bitfield-Mask: 0x01)

◆ CAN1_GSR_DOS_Pos

#define CAN1_GSR_DOS_Pos (1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DOS (Bit 1)

◆ CAN1_GSR_ES_Msk

#define CAN1_GSR_ES_Msk (0x40UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

ES (Bitfield-Mask: 0x01)

◆ CAN1_GSR_ES_Pos

#define CAN1_GSR_ES_Pos (6UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

ES (Bit 6)

◆ CAN1_GSR_RBS_Msk

#define CAN1_GSR_RBS_Msk (0x1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RBS (Bitfield-Mask: 0x01)

◆ CAN1_GSR_RBS_Pos

#define CAN1_GSR_RBS_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RBS (Bit 0)

◆ CAN1_GSR_RS_Msk

#define CAN1_GSR_RS_Msk (0x10UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RS (Bitfield-Mask: 0x01)

◆ CAN1_GSR_RS_Pos

#define CAN1_GSR_RS_Pos (4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RS (Bit 4)

◆ CAN1_GSR_RXERR_Msk

#define CAN1_GSR_RXERR_Msk (0xff0000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RXERR (Bitfield-Mask: 0xff)

◆ CAN1_GSR_RXERR_Pos

#define CAN1_GSR_RXERR_Pos (16UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RXERR (Bit 16)

◆ CAN1_GSR_TBS_Msk

#define CAN1_GSR_TBS_Msk (0x4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TBS (Bitfield-Mask: 0x01)

◆ CAN1_GSR_TBS_Pos

#define CAN1_GSR_TBS_Pos (2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TBS (Bit 2)

◆ CAN1_GSR_TCS_Msk

#define CAN1_GSR_TCS_Msk (0x8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TCS (Bitfield-Mask: 0x01)

◆ CAN1_GSR_TCS_Pos

#define CAN1_GSR_TCS_Pos (3UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TCS (Bit 3)

◆ CAN1_GSR_TS_Msk

#define CAN1_GSR_TS_Msk (0x20UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TS (Bitfield-Mask: 0x01)

◆ CAN1_GSR_TS_Pos

#define CAN1_GSR_TS_Pos (5UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TS (Bit 5)

◆ CAN1_GSR_TXERR_Msk

#define CAN1_GSR_TXERR_Msk (0xff000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TXERR (Bitfield-Mask: 0xff)

◆ CAN1_GSR_TXERR_Pos

#define CAN1_GSR_TXERR_Pos (24UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TXERR (Bit 24)

◆ CAN1_ICR_ALCBIT_Msk

#define CAN1_ICR_ALCBIT_Msk (0xff000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

ALCBIT (Bitfield-Mask: 0xff)

◆ CAN1_ICR_ALCBIT_Pos

#define CAN1_ICR_ALCBIT_Pos (24UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

ALCBIT (Bit 24)

◆ CAN1_ICR_ALI_Msk

#define CAN1_ICR_ALI_Msk (0x40UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

ALI (Bitfield-Mask: 0x01)

◆ CAN1_ICR_ALI_Pos

#define CAN1_ICR_ALI_Pos (6UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

ALI (Bit 6)

◆ CAN1_ICR_BEI_Msk

#define CAN1_ICR_BEI_Msk (0x80UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

BEI (Bitfield-Mask: 0x01)

◆ CAN1_ICR_BEI_Pos

#define CAN1_ICR_BEI_Pos (7UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

BEI (Bit 7)

◆ CAN1_ICR_DOI_Msk

#define CAN1_ICR_DOI_Msk (0x8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DOI (Bitfield-Mask: 0x01)

◆ CAN1_ICR_DOI_Pos

#define CAN1_ICR_DOI_Pos (3UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DOI (Bit 3)

◆ CAN1_ICR_EI_Msk

#define CAN1_ICR_EI_Msk (0x4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EI (Bitfield-Mask: 0x01)

◆ CAN1_ICR_EI_Pos

#define CAN1_ICR_EI_Pos (2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EI (Bit 2)

◆ CAN1_ICR_EPI_Msk

#define CAN1_ICR_EPI_Msk (0x20UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPI (Bitfield-Mask: 0x01)

◆ CAN1_ICR_EPI_Pos

#define CAN1_ICR_EPI_Pos (5UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPI (Bit 5)

◆ CAN1_ICR_ERRBIT4_0_Msk

#define CAN1_ICR_ERRBIT4_0_Msk (0x1f0000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

ERRBIT4_0 (Bitfield-Mask: 0x1f)

◆ CAN1_ICR_ERRBIT4_0_Pos

#define CAN1_ICR_ERRBIT4_0_Pos (16UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

ERRBIT4_0 (Bit 16)

◆ CAN1_ICR_ERRC1_0_Msk

#define CAN1_ICR_ERRC1_0_Msk (0xc00000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

ERRC1_0 (Bitfield-Mask: 0x03)

◆ CAN1_ICR_ERRC1_0_Pos

#define CAN1_ICR_ERRC1_0_Pos (22UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

ERRC1_0 (Bit 22)

◆ CAN1_ICR_ERRDIR_Msk

#define CAN1_ICR_ERRDIR_Msk (0x200000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

ERRDIR (Bitfield-Mask: 0x01)

◆ CAN1_ICR_ERRDIR_Pos

#define CAN1_ICR_ERRDIR_Pos (21UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

ERRDIR (Bit 21)

◆ CAN1_ICR_IDI_Msk

#define CAN1_ICR_IDI_Msk (0x100UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

IDI (Bitfield-Mask: 0x01)

◆ CAN1_ICR_IDI_Pos

#define CAN1_ICR_IDI_Pos (8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

IDI (Bit 8)

◆ CAN1_ICR_RI_Msk

#define CAN1_ICR_RI_Msk (0x1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RI (Bitfield-Mask: 0x01)

◆ CAN1_ICR_RI_Pos

#define CAN1_ICR_RI_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RI (Bit 0)

◆ CAN1_ICR_TI1_Msk

#define CAN1_ICR_TI1_Msk (0x2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TI1 (Bitfield-Mask: 0x01)

◆ CAN1_ICR_TI1_Pos

#define CAN1_ICR_TI1_Pos (1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TI1 (Bit 1)

◆ CAN1_ICR_TI2_Msk

#define CAN1_ICR_TI2_Msk (0x200UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TI2 (Bitfield-Mask: 0x01)

◆ CAN1_ICR_TI2_Pos

#define CAN1_ICR_TI2_Pos (9UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TI2 (Bit 9)

◆ CAN1_ICR_TI3_Msk

#define CAN1_ICR_TI3_Msk (0x400UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TI3 (Bitfield-Mask: 0x01)

◆ CAN1_ICR_TI3_Pos

#define CAN1_ICR_TI3_Pos (10UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TI3 (Bit 10)

◆ CAN1_ICR_WUI_Msk

#define CAN1_ICR_WUI_Msk (0x10UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

WUI (Bitfield-Mask: 0x01)

◆ CAN1_ICR_WUI_Pos

#define CAN1_ICR_WUI_Pos (4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

WUI (Bit 4)

◆ CAN1_IER_ALIE_Msk

#define CAN1_IER_ALIE_Msk (0x40UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

ALIE (Bitfield-Mask: 0x01)

◆ CAN1_IER_ALIE_Pos

#define CAN1_IER_ALIE_Pos (6UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

ALIE (Bit 6)

◆ CAN1_IER_BEIE_Msk

#define CAN1_IER_BEIE_Msk (0x80UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

BEIE (Bitfield-Mask: 0x01)

◆ CAN1_IER_BEIE_Pos

#define CAN1_IER_BEIE_Pos (7UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

BEIE (Bit 7)

◆ CAN1_IER_DOIE_Msk

#define CAN1_IER_DOIE_Msk (0x8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DOIE (Bitfield-Mask: 0x01)

◆ CAN1_IER_DOIE_Pos

#define CAN1_IER_DOIE_Pos (3UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DOIE (Bit 3)

◆ CAN1_IER_EIE_Msk

#define CAN1_IER_EIE_Msk (0x4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EIE (Bitfield-Mask: 0x01)

◆ CAN1_IER_EIE_Pos

#define CAN1_IER_EIE_Pos (2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EIE (Bit 2)

◆ CAN1_IER_EPIE_Msk

#define CAN1_IER_EPIE_Msk (0x20UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPIE (Bitfield-Mask: 0x01)

◆ CAN1_IER_EPIE_Pos

#define CAN1_IER_EPIE_Pos (5UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPIE (Bit 5)

◆ CAN1_IER_IDIE_Msk

#define CAN1_IER_IDIE_Msk (0x100UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

IDIE (Bitfield-Mask: 0x01)

◆ CAN1_IER_IDIE_Pos

#define CAN1_IER_IDIE_Pos (8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

IDIE (Bit 8)

◆ CAN1_IER_RIE_Msk

#define CAN1_IER_RIE_Msk (0x1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RIE (Bitfield-Mask: 0x01)

◆ CAN1_IER_RIE_Pos

#define CAN1_IER_RIE_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RIE (Bit 0)

◆ CAN1_IER_TIE1_Msk

#define CAN1_IER_TIE1_Msk (0x2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TIE1 (Bitfield-Mask: 0x01)

◆ CAN1_IER_TIE1_Pos

#define CAN1_IER_TIE1_Pos (1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TIE1 (Bit 1)

◆ CAN1_IER_TIE2_Msk

#define CAN1_IER_TIE2_Msk (0x200UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TIE2 (Bitfield-Mask: 0x01)

◆ CAN1_IER_TIE2_Pos

#define CAN1_IER_TIE2_Pos (9UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TIE2 (Bit 9)

◆ CAN1_IER_TIE3_Msk

#define CAN1_IER_TIE3_Msk (0x400UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TIE3 (Bitfield-Mask: 0x01)

◆ CAN1_IER_TIE3_Pos

#define CAN1_IER_TIE3_Pos (10UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TIE3 (Bit 10)

◆ CAN1_IER_WUIE_Msk

#define CAN1_IER_WUIE_Msk (0x10UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

WUIE (Bitfield-Mask: 0x01)

◆ CAN1_IER_WUIE_Pos

#define CAN1_IER_WUIE_Pos (4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

WUIE (Bit 4)

◆ CAN1_MOD_LOM_Msk

#define CAN1_MOD_LOM_Msk (0x2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

LOM (Bitfield-Mask: 0x01)

◆ CAN1_MOD_LOM_Pos

#define CAN1_MOD_LOM_Pos (1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

LOM (Bit 1)

◆ CAN1_MOD_RM_Msk

#define CAN1_MOD_RM_Msk (0x1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RM (Bitfield-Mask: 0x01)

◆ CAN1_MOD_RM_Pos

#define CAN1_MOD_RM_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RM (Bit 0)

◆ CAN1_MOD_RPM_Msk

#define CAN1_MOD_RPM_Msk (0x20UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RPM (Bitfield-Mask: 0x01)

◆ CAN1_MOD_RPM_Pos

#define CAN1_MOD_RPM_Pos (5UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RPM (Bit 5)

◆ CAN1_MOD_SM_Msk

#define CAN1_MOD_SM_Msk (0x10UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

SM (Bitfield-Mask: 0x01)

◆ CAN1_MOD_SM_Pos

#define CAN1_MOD_SM_Pos (4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

SM (Bit 4)

◆ CAN1_MOD_STM_Msk

#define CAN1_MOD_STM_Msk (0x4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

STM (Bitfield-Mask: 0x01)

◆ CAN1_MOD_STM_Pos

#define CAN1_MOD_STM_Pos (2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

STM (Bit 2)

◆ CAN1_MOD_TM_Msk

#define CAN1_MOD_TM_Msk (0x80UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TM (Bitfield-Mask: 0x01)

◆ CAN1_MOD_TM_Pos

#define CAN1_MOD_TM_Pos (7UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TM (Bit 7)

◆ CAN1_MOD_TPM_Msk

#define CAN1_MOD_TPM_Msk (0x8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TPM (Bitfield-Mask: 0x01)

◆ CAN1_MOD_TPM_Pos

#define CAN1_MOD_TPM_Pos (3UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TPM (Bit 3)

◆ CAN1_RDA_DATA1_Msk

#define CAN1_RDA_DATA1_Msk (0xffUL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DATA1 (Bitfield-Mask: 0xff)

◆ CAN1_RDA_DATA1_Pos

#define CAN1_RDA_DATA1_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DATA1 (Bit 0)

◆ CAN1_RDA_DATA2_Msk

#define CAN1_RDA_DATA2_Msk (0xff00UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DATA2 (Bitfield-Mask: 0xff)

◆ CAN1_RDA_DATA2_Pos

#define CAN1_RDA_DATA2_Pos (8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DATA2 (Bit 8)

◆ CAN1_RDA_DATA3_Msk

#define CAN1_RDA_DATA3_Msk (0xff0000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DATA3 (Bitfield-Mask: 0xff)

◆ CAN1_RDA_DATA3_Pos

#define CAN1_RDA_DATA3_Pos (16UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DATA3 (Bit 16)

◆ CAN1_RDA_DATA4_Msk

#define CAN1_RDA_DATA4_Msk (0xff000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DATA4 (Bitfield-Mask: 0xff)

◆ CAN1_RDA_DATA4_Pos

#define CAN1_RDA_DATA4_Pos (24UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DATA4 (Bit 24)

◆ CAN1_RDB_DATA5_Msk

#define CAN1_RDB_DATA5_Msk (0xffUL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DATA5 (Bitfield-Mask: 0xff)

◆ CAN1_RDB_DATA5_Pos

#define CAN1_RDB_DATA5_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DATA5 (Bit 0)

◆ CAN1_RDB_DATA6_Msk

#define CAN1_RDB_DATA6_Msk (0xff00UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DATA6 (Bitfield-Mask: 0xff)

◆ CAN1_RDB_DATA6_Pos

#define CAN1_RDB_DATA6_Pos (8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DATA6 (Bit 8)

◆ CAN1_RDB_DATA7_Msk

#define CAN1_RDB_DATA7_Msk (0xff0000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DATA7 (Bitfield-Mask: 0xff)

◆ CAN1_RDB_DATA7_Pos

#define CAN1_RDB_DATA7_Pos (16UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DATA7 (Bit 16)

◆ CAN1_RDB_DATA8_Msk

#define CAN1_RDB_DATA8_Msk (0xff000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DATA8 (Bitfield-Mask: 0xff)

◆ CAN1_RDB_DATA8_Pos

#define CAN1_RDB_DATA8_Pos (24UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DATA8 (Bit 24)

◆ CAN1_RFS_BP_Msk

#define CAN1_RFS_BP_Msk (0x400UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

BP (Bitfield-Mask: 0x01)

◆ CAN1_RFS_BP_Pos

#define CAN1_RFS_BP_Pos (10UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

BP (Bit 10)

◆ CAN1_RFS_DLC_Msk

#define CAN1_RFS_DLC_Msk (0xf0000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DLC (Bitfield-Mask: 0x0f)

◆ CAN1_RFS_DLC_Pos

#define CAN1_RFS_DLC_Pos (16UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DLC (Bit 16)

◆ CAN1_RFS_FF_Msk

#define CAN1_RFS_FF_Msk (0x80000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

FF (Bitfield-Mask: 0x01)

◆ CAN1_RFS_FF_Pos

#define CAN1_RFS_FF_Pos (31UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

FF (Bit 31)

◆ CAN1_RFS_IDINDEX_Msk

#define CAN1_RFS_IDINDEX_Msk (0x3ffUL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

IDINDEX (Bitfield-Mask: 0x3ff)

◆ CAN1_RFS_IDINDEX_Pos

#define CAN1_RFS_IDINDEX_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

IDINDEX (Bit 0)

◆ CAN1_RFS_RTR_Msk

#define CAN1_RFS_RTR_Msk (0x40000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RTR (Bitfield-Mask: 0x01)

◆ CAN1_RFS_RTR_Pos

#define CAN1_RFS_RTR_Pos (30UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RTR (Bit 30)

◆ CAN1_RID_ID_Msk

#define CAN1_RID_ID_Msk (0x7ffUL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

ID (Bitfield-Mask: 0x7ff)

◆ CAN1_RID_ID_Pos

#define CAN1_RID_ID_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

ID (Bit 0)

◆ CAN1_SR_BS_1_Msk

#define CAN1_SR_BS_1_Msk (0x80UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

BS_1 (Bitfield-Mask: 0x01)

◆ CAN1_SR_BS_1_Pos

#define CAN1_SR_BS_1_Pos (7UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

BS_1 (Bit 7)

◆ CAN1_SR_BS_2_Msk

#define CAN1_SR_BS_2_Msk (0x8000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

BS_2 (Bitfield-Mask: 0x01)

◆ CAN1_SR_BS_2_Pos

#define CAN1_SR_BS_2_Pos (15UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

BS_2 (Bit 15)

◆ CAN1_SR_BS_3_Msk

#define CAN1_SR_BS_3_Msk (0x800000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

BS_3 (Bitfield-Mask: 0x01)

◆ CAN1_SR_BS_3_Pos

#define CAN1_SR_BS_3_Pos (23UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

BS_3 (Bit 23)

◆ CAN1_SR_DOS_1_Msk

#define CAN1_SR_DOS_1_Msk (0x2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DOS_1 (Bitfield-Mask: 0x01)

◆ CAN1_SR_DOS_1_Pos

#define CAN1_SR_DOS_1_Pos (1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DOS_1 (Bit 1)

◆ CAN1_SR_DOS_2_Msk

#define CAN1_SR_DOS_2_Msk (0x200UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DOS_2 (Bitfield-Mask: 0x01)

◆ CAN1_SR_DOS_2_Pos

#define CAN1_SR_DOS_2_Pos (9UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DOS_2 (Bit 9)

◆ CAN1_SR_DOS_3_Msk

#define CAN1_SR_DOS_3_Msk (0x20000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DOS_3 (Bitfield-Mask: 0x01)

◆ CAN1_SR_DOS_3_Pos

#define CAN1_SR_DOS_3_Pos (17UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DOS_3 (Bit 17)

◆ CAN1_SR_ES_1_Msk

#define CAN1_SR_ES_1_Msk (0x40UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

ES_1 (Bitfield-Mask: 0x01)

◆ CAN1_SR_ES_1_Pos

#define CAN1_SR_ES_1_Pos (6UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

ES_1 (Bit 6)

◆ CAN1_SR_ES_2_Msk

#define CAN1_SR_ES_2_Msk (0x4000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

ES_2 (Bitfield-Mask: 0x01)

◆ CAN1_SR_ES_2_Pos

#define CAN1_SR_ES_2_Pos (14UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

ES_2 (Bit 14)

◆ CAN1_SR_ES_3_Msk

#define CAN1_SR_ES_3_Msk (0x400000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

ES_3 (Bitfield-Mask: 0x01)

◆ CAN1_SR_ES_3_Pos

#define CAN1_SR_ES_3_Pos (22UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

ES_3 (Bit 22)

◆ CAN1_SR_RBS_1_Msk

#define CAN1_SR_RBS_1_Msk (0x1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RBS_1 (Bitfield-Mask: 0x01)

◆ CAN1_SR_RBS_1_Pos

#define CAN1_SR_RBS_1_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RBS_1 (Bit 0)

◆ CAN1_SR_RBS_2_Msk

#define CAN1_SR_RBS_2_Msk (0x100UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RBS_2 (Bitfield-Mask: 0x01)

◆ CAN1_SR_RBS_2_Pos

#define CAN1_SR_RBS_2_Pos (8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RBS_2 (Bit 8)

◆ CAN1_SR_RBS_3_Msk

#define CAN1_SR_RBS_3_Msk (0x10000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RBS_3 (Bitfield-Mask: 0x01)

◆ CAN1_SR_RBS_3_Pos

#define CAN1_SR_RBS_3_Pos (16UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RBS_3 (Bit 16)

◆ CAN1_SR_RS_1_Msk

#define CAN1_SR_RS_1_Msk (0x10UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RS_1 (Bitfield-Mask: 0x01)

◆ CAN1_SR_RS_1_Pos

#define CAN1_SR_RS_1_Pos (4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RS_1 (Bit 4)

◆ CAN1_SR_RS_2_Msk

#define CAN1_SR_RS_2_Msk (0x1000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RS_2 (Bitfield-Mask: 0x01)

◆ CAN1_SR_RS_2_Pos

#define CAN1_SR_RS_2_Pos (12UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RS_2 (Bit 12)

◆ CAN1_SR_RS_3_Msk

#define CAN1_SR_RS_3_Msk (0x100000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RS_3 (Bitfield-Mask: 0x01)

◆ CAN1_SR_RS_3_Pos

#define CAN1_SR_RS_3_Pos (20UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RS_3 (Bit 20)

◆ CAN1_SR_TBS1_1_Msk

#define CAN1_SR_TBS1_1_Msk (0x4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TBS1_1 (Bitfield-Mask: 0x01)

◆ CAN1_SR_TBS1_1_Pos

#define CAN1_SR_TBS1_1_Pos (2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TBS1_1 (Bit 2)

◆ CAN1_SR_TBS2_2_Msk

#define CAN1_SR_TBS2_2_Msk (0x400UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TBS2_2 (Bitfield-Mask: 0x01)

◆ CAN1_SR_TBS2_2_Pos

#define CAN1_SR_TBS2_2_Pos (10UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TBS2_2 (Bit 10)

◆ CAN1_SR_TBS3_3_Msk

#define CAN1_SR_TBS3_3_Msk (0x40000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TBS3_3 (Bitfield-Mask: 0x01)

◆ CAN1_SR_TBS3_3_Pos

#define CAN1_SR_TBS3_3_Pos (18UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TBS3_3 (Bit 18)

◆ CAN1_SR_TCS1_1_Msk

#define CAN1_SR_TCS1_1_Msk (0x8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TCS1_1 (Bitfield-Mask: 0x01)

◆ CAN1_SR_TCS1_1_Pos

#define CAN1_SR_TCS1_1_Pos (3UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TCS1_1 (Bit 3)

◆ CAN1_SR_TCS2_2_Msk

#define CAN1_SR_TCS2_2_Msk (0x800UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TCS2_2 (Bitfield-Mask: 0x01)

◆ CAN1_SR_TCS2_2_Pos

#define CAN1_SR_TCS2_2_Pos (11UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TCS2_2 (Bit 11)

◆ CAN1_SR_TCS3_3_Msk

#define CAN1_SR_TCS3_3_Msk (0x80000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TCS3_3 (Bitfield-Mask: 0x01)

◆ CAN1_SR_TCS3_3_Pos

#define CAN1_SR_TCS3_3_Pos (19UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TCS3_3 (Bit 19)

◆ CAN1_SR_TS1_1_Msk

#define CAN1_SR_TS1_1_Msk (0x20UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TS1_1 (Bitfield-Mask: 0x01)

◆ CAN1_SR_TS1_1_Pos

#define CAN1_SR_TS1_1_Pos (5UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TS1_1 (Bit 5)

◆ CAN1_SR_TS2_2_Msk

#define CAN1_SR_TS2_2_Msk (0x2000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TS2_2 (Bitfield-Mask: 0x01)

◆ CAN1_SR_TS2_2_Pos

#define CAN1_SR_TS2_2_Pos (13UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TS2_2 (Bit 13)

◆ CAN1_SR_TS3_3_Msk

#define CAN1_SR_TS3_3_Msk (0x200000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TS3_3 (Bitfield-Mask: 0x01)

◆ CAN1_SR_TS3_3_Pos

#define CAN1_SR_TS3_3_Pos (21UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TS3_3 (Bit 21)

◆ CAN1_TDA1_DATA1_Msk

#define CAN1_TDA1_DATA1_Msk (0xffUL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DATA1 (Bitfield-Mask: 0xff)

◆ CAN1_TDA1_DATA1_Pos

#define CAN1_TDA1_DATA1_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DATA1 (Bit 0)

◆ CAN1_TDA1_DATA2_Msk

#define CAN1_TDA1_DATA2_Msk (0xff00UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DATA2 (Bitfield-Mask: 0xff)

◆ CAN1_TDA1_DATA2_Pos

#define CAN1_TDA1_DATA2_Pos (8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DATA2 (Bit 8)

◆ CAN1_TDA1_DATA3_Msk

#define CAN1_TDA1_DATA3_Msk (0xff0000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DATA3 (Bitfield-Mask: 0xff)

◆ CAN1_TDA1_DATA3_Pos

#define CAN1_TDA1_DATA3_Pos (16UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DATA3 (Bit 16)

◆ CAN1_TDA1_DATA4_Msk

#define CAN1_TDA1_DATA4_Msk (0xff000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DATA4 (Bitfield-Mask: 0xff)

◆ CAN1_TDA1_DATA4_Pos

#define CAN1_TDA1_DATA4_Pos (24UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DATA4 (Bit 24)

◆ CAN1_TDA2_DATA1_Msk

#define CAN1_TDA2_DATA1_Msk (0xffUL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DATA1 (Bitfield-Mask: 0xff)

◆ CAN1_TDA2_DATA1_Pos

#define CAN1_TDA2_DATA1_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DATA1 (Bit 0)

◆ CAN1_TDA2_DATA2_Msk

#define CAN1_TDA2_DATA2_Msk (0xff00UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DATA2 (Bitfield-Mask: 0xff)

◆ CAN1_TDA2_DATA2_Pos

#define CAN1_TDA2_DATA2_Pos (8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DATA2 (Bit 8)

◆ CAN1_TDA2_DATA3_Msk

#define CAN1_TDA2_DATA3_Msk (0xff0000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DATA3 (Bitfield-Mask: 0xff)

◆ CAN1_TDA2_DATA3_Pos

#define CAN1_TDA2_DATA3_Pos (16UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DATA3 (Bit 16)

◆ CAN1_TDA2_DATA4_Msk

#define CAN1_TDA2_DATA4_Msk (0xff000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DATA4 (Bitfield-Mask: 0xff)

◆ CAN1_TDA2_DATA4_Pos

#define CAN1_TDA2_DATA4_Pos (24UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DATA4 (Bit 24)

◆ CAN1_TDA3_DATA1_Msk

#define CAN1_TDA3_DATA1_Msk (0xffUL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DATA1 (Bitfield-Mask: 0xff)

◆ CAN1_TDA3_DATA1_Pos

#define CAN1_TDA3_DATA1_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DATA1 (Bit 0)

◆ CAN1_TDA3_DATA2_Msk

#define CAN1_TDA3_DATA2_Msk (0xff00UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DATA2 (Bitfield-Mask: 0xff)

◆ CAN1_TDA3_DATA2_Pos

#define CAN1_TDA3_DATA2_Pos (8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DATA2 (Bit 8)

◆ CAN1_TDA3_DATA3_Msk

#define CAN1_TDA3_DATA3_Msk (0xff0000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DATA3 (Bitfield-Mask: 0xff)

◆ CAN1_TDA3_DATA3_Pos

#define CAN1_TDA3_DATA3_Pos (16UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DATA3 (Bit 16)

◆ CAN1_TDA3_DATA4_Msk

#define CAN1_TDA3_DATA4_Msk (0xff000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DATA4 (Bitfield-Mask: 0xff)

◆ CAN1_TDA3_DATA4_Pos

#define CAN1_TDA3_DATA4_Pos (24UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DATA4 (Bit 24)

◆ CAN1_TDB1_DATA5_Msk

#define CAN1_TDB1_DATA5_Msk (0xffUL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DATA5 (Bitfield-Mask: 0xff)

◆ CAN1_TDB1_DATA5_Pos

#define CAN1_TDB1_DATA5_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DATA5 (Bit 0)

◆ CAN1_TDB1_DATA6_Msk

#define CAN1_TDB1_DATA6_Msk (0xff00UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DATA6 (Bitfield-Mask: 0xff)

◆ CAN1_TDB1_DATA6_Pos

#define CAN1_TDB1_DATA6_Pos (8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DATA6 (Bit 8)

◆ CAN1_TDB1_DATA7_Msk

#define CAN1_TDB1_DATA7_Msk (0xff0000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DATA7 (Bitfield-Mask: 0xff)

◆ CAN1_TDB1_DATA7_Pos

#define CAN1_TDB1_DATA7_Pos (16UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DATA7 (Bit 16)

◆ CAN1_TDB1_DATA8_Msk

#define CAN1_TDB1_DATA8_Msk (0xff000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DATA8 (Bitfield-Mask: 0xff)

◆ CAN1_TDB1_DATA8_Pos

#define CAN1_TDB1_DATA8_Pos (24UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DATA8 (Bit 24)

◆ CAN1_TDB2_DATA5_Msk

#define CAN1_TDB2_DATA5_Msk (0xffUL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DATA5 (Bitfield-Mask: 0xff)

◆ CAN1_TDB2_DATA5_Pos

#define CAN1_TDB2_DATA5_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DATA5 (Bit 0)

◆ CAN1_TDB2_DATA6_Msk

#define CAN1_TDB2_DATA6_Msk (0xff00UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DATA6 (Bitfield-Mask: 0xff)

◆ CAN1_TDB2_DATA6_Pos

#define CAN1_TDB2_DATA6_Pos (8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DATA6 (Bit 8)

◆ CAN1_TDB2_DATA7_Msk

#define CAN1_TDB2_DATA7_Msk (0xff0000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DATA7 (Bitfield-Mask: 0xff)

◆ CAN1_TDB2_DATA7_Pos

#define CAN1_TDB2_DATA7_Pos (16UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DATA7 (Bit 16)

◆ CAN1_TDB2_DATA8_Msk

#define CAN1_TDB2_DATA8_Msk (0xff000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DATA8 (Bitfield-Mask: 0xff)

◆ CAN1_TDB2_DATA8_Pos

#define CAN1_TDB2_DATA8_Pos (24UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DATA8 (Bit 24)

◆ CAN1_TDB3_DATA5_Msk

#define CAN1_TDB3_DATA5_Msk (0xffUL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DATA5 (Bitfield-Mask: 0xff)

◆ CAN1_TDB3_DATA5_Pos

#define CAN1_TDB3_DATA5_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DATA5 (Bit 0)

◆ CAN1_TDB3_DATA6_Msk

#define CAN1_TDB3_DATA6_Msk (0xff00UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DATA6 (Bitfield-Mask: 0xff)

◆ CAN1_TDB3_DATA6_Pos

#define CAN1_TDB3_DATA6_Pos (8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DATA6 (Bit 8)

◆ CAN1_TDB3_DATA7_Msk

#define CAN1_TDB3_DATA7_Msk (0xff0000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DATA7 (Bitfield-Mask: 0xff)

◆ CAN1_TDB3_DATA7_Pos

#define CAN1_TDB3_DATA7_Pos (16UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DATA7 (Bit 16)

◆ CAN1_TDB3_DATA8_Msk

#define CAN1_TDB3_DATA8_Msk (0xff000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DATA8 (Bitfield-Mask: 0xff)

◆ CAN1_TDB3_DATA8_Pos

#define CAN1_TDB3_DATA8_Pos (24UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DATA8 (Bit 24)

◆ CAN1_TFI1_DLC_Msk

#define CAN1_TFI1_DLC_Msk (0xf0000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DLC (Bitfield-Mask: 0x0f)

◆ CAN1_TFI1_DLC_Pos

#define CAN1_TFI1_DLC_Pos (16UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DLC (Bit 16)

◆ CAN1_TFI1_FF_Msk

#define CAN1_TFI1_FF_Msk (0x80000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

FF (Bitfield-Mask: 0x01)

◆ CAN1_TFI1_FF_Pos

#define CAN1_TFI1_FF_Pos (31UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

FF (Bit 31)

◆ CAN1_TFI1_PRIO_Msk

#define CAN1_TFI1_PRIO_Msk (0xffUL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PRIO (Bitfield-Mask: 0xff)

◆ CAN1_TFI1_PRIO_Pos

#define CAN1_TFI1_PRIO_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PRIO (Bit 0)

◆ CAN1_TFI1_RTR_Msk

#define CAN1_TFI1_RTR_Msk (0x40000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RTR (Bitfield-Mask: 0x01)

◆ CAN1_TFI1_RTR_Pos

#define CAN1_TFI1_RTR_Pos (30UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RTR (Bit 30)

◆ CAN1_TFI2_DLC_Msk

#define CAN1_TFI2_DLC_Msk (0xf0000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DLC (Bitfield-Mask: 0x0f)

◆ CAN1_TFI2_DLC_Pos

#define CAN1_TFI2_DLC_Pos (16UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DLC (Bit 16)

◆ CAN1_TFI2_FF_Msk

#define CAN1_TFI2_FF_Msk (0x80000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

FF (Bitfield-Mask: 0x01)

◆ CAN1_TFI2_FF_Pos

#define CAN1_TFI2_FF_Pos (31UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

FF (Bit 31)

◆ CAN1_TFI2_PRIO_Msk

#define CAN1_TFI2_PRIO_Msk (0xffUL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PRIO (Bitfield-Mask: 0xff)

◆ CAN1_TFI2_PRIO_Pos

#define CAN1_TFI2_PRIO_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PRIO (Bit 0)

◆ CAN1_TFI2_RTR_Msk

#define CAN1_TFI2_RTR_Msk (0x40000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RTR (Bitfield-Mask: 0x01)

◆ CAN1_TFI2_RTR_Pos

#define CAN1_TFI2_RTR_Pos (30UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RTR (Bit 30)

◆ CAN1_TFI3_DLC_Msk

#define CAN1_TFI3_DLC_Msk (0xf0000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DLC (Bitfield-Mask: 0x0f)

◆ CAN1_TFI3_DLC_Pos

#define CAN1_TFI3_DLC_Pos (16UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DLC (Bit 16)

◆ CAN1_TFI3_FF_Msk

#define CAN1_TFI3_FF_Msk (0x80000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

FF (Bitfield-Mask: 0x01)

◆ CAN1_TFI3_FF_Pos

#define CAN1_TFI3_FF_Pos (31UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

FF (Bit 31)

◆ CAN1_TFI3_PRIO_Msk

#define CAN1_TFI3_PRIO_Msk (0xffUL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PRIO (Bitfield-Mask: 0xff)

◆ CAN1_TFI3_PRIO_Pos

#define CAN1_TFI3_PRIO_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PRIO (Bit 0)

◆ CAN1_TFI3_RTR_Msk

#define CAN1_TFI3_RTR_Msk (0x40000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RTR (Bitfield-Mask: 0x01)

◆ CAN1_TFI3_RTR_Pos

#define CAN1_TFI3_RTR_Pos (30UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RTR (Bit 30)

◆ CAN1_TID1_ID_Msk

#define CAN1_TID1_ID_Msk (0x7ffUL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

ID (Bitfield-Mask: 0x7ff)

◆ CAN1_TID1_ID_Pos

#define CAN1_TID1_ID_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

ID (Bit 0)

◆ CAN1_TID2_ID_Msk

#define CAN1_TID2_ID_Msk (0x7ffUL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

ID (Bitfield-Mask: 0x7ff)

◆ CAN1_TID2_ID_Pos

#define CAN1_TID2_ID_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

ID (Bit 0)

◆ CAN1_TID3_ID_Msk

#define CAN1_TID3_ID_Msk (0x7ffUL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

ID (Bitfield-Mask: 0x7ff)

◆ CAN1_TID3_ID_Pos

#define CAN1_TID3_ID_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

ID (Bit 0)

◆ CAN2_BTR_BRP_Msk

#define CAN2_BTR_BRP_Msk (0x3ffUL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

BRP (Bitfield-Mask: 0x3ff)

◆ CAN2_BTR_BRP_Pos

#define CAN2_BTR_BRP_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

BRP (Bit 0)

◆ CAN2_BTR_SAM_Msk

#define CAN2_BTR_SAM_Msk (0x800000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

SAM (Bitfield-Mask: 0x01)

◆ CAN2_BTR_SAM_Pos

#define CAN2_BTR_SAM_Pos (23UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

SAM (Bit 23)

◆ CAN2_BTR_SJW_Msk

#define CAN2_BTR_SJW_Msk (0xc000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

SJW (Bitfield-Mask: 0x03)

◆ CAN2_BTR_SJW_Pos

#define CAN2_BTR_SJW_Pos (14UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

SJW (Bit 14)

◆ CAN2_BTR_TESG1_Msk

#define CAN2_BTR_TESG1_Msk (0xf0000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TESG1 (Bitfield-Mask: 0x0f)

◆ CAN2_BTR_TESG1_Pos

#define CAN2_BTR_TESG1_Pos (16UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TESG1 (Bit 16)

◆ CAN2_BTR_TESG2_Msk

#define CAN2_BTR_TESG2_Msk (0x700000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TESG2 (Bitfield-Mask: 0x07)

◆ CAN2_BTR_TESG2_Pos

#define CAN2_BTR_TESG2_Pos (20UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TESG2 (Bit 20)

◆ CAN2_CMR_AT_Msk

#define CAN2_CMR_AT_Msk (0x2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

AT (Bitfield-Mask: 0x01)

◆ CAN2_CMR_AT_Pos

#define CAN2_CMR_AT_Pos (1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

AT (Bit 1)

◆ CAN2_CMR_CDO_Msk

#define CAN2_CMR_CDO_Msk (0x8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CDO (Bitfield-Mask: 0x01)

◆ CAN2_CMR_CDO_Pos

#define CAN2_CMR_CDO_Pos (3UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CDO (Bit 3)

◆ CAN2_CMR_RRB_Msk

#define CAN2_CMR_RRB_Msk (0x4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RRB (Bitfield-Mask: 0x01)

◆ CAN2_CMR_RRB_Pos

#define CAN2_CMR_RRB_Pos (2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RRB (Bit 2)

◆ CAN2_CMR_SRR_Msk

#define CAN2_CMR_SRR_Msk (0x10UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

SRR (Bitfield-Mask: 0x01)

◆ CAN2_CMR_SRR_Pos

#define CAN2_CMR_SRR_Pos (4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

SRR (Bit 4)

◆ CAN2_CMR_STB1_Msk

#define CAN2_CMR_STB1_Msk (0x20UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

STB1 (Bitfield-Mask: 0x01)

◆ CAN2_CMR_STB1_Pos

#define CAN2_CMR_STB1_Pos (5UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

STB1 (Bit 5)

◆ CAN2_CMR_STB2_Msk

#define CAN2_CMR_STB2_Msk (0x40UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

STB2 (Bitfield-Mask: 0x01)

◆ CAN2_CMR_STB2_Pos

#define CAN2_CMR_STB2_Pos (6UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

STB2 (Bit 6)

◆ CAN2_CMR_STB3_Msk

#define CAN2_CMR_STB3_Msk (0x80UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

STB3 (Bitfield-Mask: 0x01)

◆ CAN2_CMR_STB3_Pos

#define CAN2_CMR_STB3_Pos (7UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

STB3 (Bit 7)

◆ CAN2_CMR_TR_Msk

#define CAN2_CMR_TR_Msk (0x1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TR (Bitfield-Mask: 0x01)

◆ CAN2_CMR_TR_Pos

#define CAN2_CMR_TR_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TR (Bit 0)

◆ CAN2_EWL_EWL_Msk

#define CAN2_EWL_EWL_Msk (0xffUL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EWL (Bitfield-Mask: 0xff)

◆ CAN2_EWL_EWL_Pos

#define CAN2_EWL_EWL_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EWL (Bit 0)

◆ CAN2_GSR_BS_Msk

#define CAN2_GSR_BS_Msk (0x80UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

BS (Bitfield-Mask: 0x01)

◆ CAN2_GSR_BS_Pos

#define CAN2_GSR_BS_Pos (7UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

BS (Bit 7)

◆ CAN2_GSR_DOS_Msk

#define CAN2_GSR_DOS_Msk (0x2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DOS (Bitfield-Mask: 0x01)

◆ CAN2_GSR_DOS_Pos

#define CAN2_GSR_DOS_Pos (1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DOS (Bit 1)

◆ CAN2_GSR_ES_Msk

#define CAN2_GSR_ES_Msk (0x40UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

ES (Bitfield-Mask: 0x01)

◆ CAN2_GSR_ES_Pos

#define CAN2_GSR_ES_Pos (6UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

ES (Bit 6)

◆ CAN2_GSR_RBS_Msk

#define CAN2_GSR_RBS_Msk (0x1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RBS (Bitfield-Mask: 0x01)

◆ CAN2_GSR_RBS_Pos

#define CAN2_GSR_RBS_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RBS (Bit 0)

◆ CAN2_GSR_RS_Msk

#define CAN2_GSR_RS_Msk (0x10UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RS (Bitfield-Mask: 0x01)

◆ CAN2_GSR_RS_Pos

#define CAN2_GSR_RS_Pos (4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RS (Bit 4)

◆ CAN2_GSR_RXERR_Msk

#define CAN2_GSR_RXERR_Msk (0xff0000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RXERR (Bitfield-Mask: 0xff)

◆ CAN2_GSR_RXERR_Pos

#define CAN2_GSR_RXERR_Pos (16UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RXERR (Bit 16)

◆ CAN2_GSR_TBS_Msk

#define CAN2_GSR_TBS_Msk (0x4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TBS (Bitfield-Mask: 0x01)

◆ CAN2_GSR_TBS_Pos

#define CAN2_GSR_TBS_Pos (2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TBS (Bit 2)

◆ CAN2_GSR_TCS_Msk

#define CAN2_GSR_TCS_Msk (0x8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TCS (Bitfield-Mask: 0x01)

◆ CAN2_GSR_TCS_Pos

#define CAN2_GSR_TCS_Pos (3UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TCS (Bit 3)

◆ CAN2_GSR_TS_Msk

#define CAN2_GSR_TS_Msk (0x20UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TS (Bitfield-Mask: 0x01)

◆ CAN2_GSR_TS_Pos

#define CAN2_GSR_TS_Pos (5UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TS (Bit 5)

◆ CAN2_GSR_TXERR_Msk

#define CAN2_GSR_TXERR_Msk (0xff000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TXERR (Bitfield-Mask: 0xff)

◆ CAN2_GSR_TXERR_Pos

#define CAN2_GSR_TXERR_Pos (24UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TXERR (Bit 24)

◆ CAN2_ICR_ALCBIT_Msk

#define CAN2_ICR_ALCBIT_Msk (0xff000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

ALCBIT (Bitfield-Mask: 0xff)

◆ CAN2_ICR_ALCBIT_Pos

#define CAN2_ICR_ALCBIT_Pos (24UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

ALCBIT (Bit 24)

◆ CAN2_ICR_ALI_Msk

#define CAN2_ICR_ALI_Msk (0x40UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

ALI (Bitfield-Mask: 0x01)

◆ CAN2_ICR_ALI_Pos

#define CAN2_ICR_ALI_Pos (6UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

ALI (Bit 6)

◆ CAN2_ICR_BEI_Msk

#define CAN2_ICR_BEI_Msk (0x80UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

BEI (Bitfield-Mask: 0x01)

◆ CAN2_ICR_BEI_Pos

#define CAN2_ICR_BEI_Pos (7UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

BEI (Bit 7)

◆ CAN2_ICR_DOI_Msk

#define CAN2_ICR_DOI_Msk (0x8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DOI (Bitfield-Mask: 0x01)

◆ CAN2_ICR_DOI_Pos

#define CAN2_ICR_DOI_Pos (3UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DOI (Bit 3)

◆ CAN2_ICR_EI_Msk

#define CAN2_ICR_EI_Msk (0x4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EI (Bitfield-Mask: 0x01)

◆ CAN2_ICR_EI_Pos

#define CAN2_ICR_EI_Pos (2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EI (Bit 2)

◆ CAN2_ICR_EPI_Msk

#define CAN2_ICR_EPI_Msk (0x20UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPI (Bitfield-Mask: 0x01)

◆ CAN2_ICR_EPI_Pos

#define CAN2_ICR_EPI_Pos (5UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPI (Bit 5)

◆ CAN2_ICR_ERRBIT4_0_Msk

#define CAN2_ICR_ERRBIT4_0_Msk (0x1f0000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

ERRBIT4_0 (Bitfield-Mask: 0x1f)

◆ CAN2_ICR_ERRBIT4_0_Pos

#define CAN2_ICR_ERRBIT4_0_Pos (16UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

ERRBIT4_0 (Bit 16)

◆ CAN2_ICR_ERRC1_0_Msk

#define CAN2_ICR_ERRC1_0_Msk (0xc00000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

ERRC1_0 (Bitfield-Mask: 0x03)

◆ CAN2_ICR_ERRC1_0_Pos

#define CAN2_ICR_ERRC1_0_Pos (22UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

ERRC1_0 (Bit 22)

◆ CAN2_ICR_ERRDIR_Msk

#define CAN2_ICR_ERRDIR_Msk (0x200000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

ERRDIR (Bitfield-Mask: 0x01)

◆ CAN2_ICR_ERRDIR_Pos

#define CAN2_ICR_ERRDIR_Pos (21UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

ERRDIR (Bit 21)

◆ CAN2_ICR_IDI_Msk

#define CAN2_ICR_IDI_Msk (0x100UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

IDI (Bitfield-Mask: 0x01)

◆ CAN2_ICR_IDI_Pos

#define CAN2_ICR_IDI_Pos (8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

IDI (Bit 8)

◆ CAN2_ICR_RI_Msk

#define CAN2_ICR_RI_Msk (0x1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RI (Bitfield-Mask: 0x01)

◆ CAN2_ICR_RI_Pos

#define CAN2_ICR_RI_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RI (Bit 0)

◆ CAN2_ICR_TI1_Msk

#define CAN2_ICR_TI1_Msk (0x2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TI1 (Bitfield-Mask: 0x01)

◆ CAN2_ICR_TI1_Pos

#define CAN2_ICR_TI1_Pos (1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TI1 (Bit 1)

◆ CAN2_ICR_TI2_Msk

#define CAN2_ICR_TI2_Msk (0x200UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TI2 (Bitfield-Mask: 0x01)

◆ CAN2_ICR_TI2_Pos

#define CAN2_ICR_TI2_Pos (9UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TI2 (Bit 9)

◆ CAN2_ICR_TI3_Msk

#define CAN2_ICR_TI3_Msk (0x400UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TI3 (Bitfield-Mask: 0x01)

◆ CAN2_ICR_TI3_Pos

#define CAN2_ICR_TI3_Pos (10UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TI3 (Bit 10)

◆ CAN2_ICR_WUI_Msk

#define CAN2_ICR_WUI_Msk (0x10UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

WUI (Bitfield-Mask: 0x01)

◆ CAN2_ICR_WUI_Pos

#define CAN2_ICR_WUI_Pos (4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

WUI (Bit 4)

◆ CAN2_IER_ALIE_Msk

#define CAN2_IER_ALIE_Msk (0x40UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

ALIE (Bitfield-Mask: 0x01)

◆ CAN2_IER_ALIE_Pos

#define CAN2_IER_ALIE_Pos (6UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

ALIE (Bit 6)

◆ CAN2_IER_BEIE_Msk

#define CAN2_IER_BEIE_Msk (0x80UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

BEIE (Bitfield-Mask: 0x01)

◆ CAN2_IER_BEIE_Pos

#define CAN2_IER_BEIE_Pos (7UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

BEIE (Bit 7)

◆ CAN2_IER_DOIE_Msk

#define CAN2_IER_DOIE_Msk (0x8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DOIE (Bitfield-Mask: 0x01)

◆ CAN2_IER_DOIE_Pos

#define CAN2_IER_DOIE_Pos (3UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DOIE (Bit 3)

◆ CAN2_IER_EIE_Msk

#define CAN2_IER_EIE_Msk (0x4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EIE (Bitfield-Mask: 0x01)

◆ CAN2_IER_EIE_Pos

#define CAN2_IER_EIE_Pos (2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EIE (Bit 2)

◆ CAN2_IER_EPIE_Msk

#define CAN2_IER_EPIE_Msk (0x20UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPIE (Bitfield-Mask: 0x01)

◆ CAN2_IER_EPIE_Pos

#define CAN2_IER_EPIE_Pos (5UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPIE (Bit 5)

◆ CAN2_IER_IDIE_Msk

#define CAN2_IER_IDIE_Msk (0x100UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

IDIE (Bitfield-Mask: 0x01)

◆ CAN2_IER_IDIE_Pos

#define CAN2_IER_IDIE_Pos (8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

IDIE (Bit 8)

◆ CAN2_IER_RIE_Msk

#define CAN2_IER_RIE_Msk (0x1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RIE (Bitfield-Mask: 0x01)

◆ CAN2_IER_RIE_Pos

#define CAN2_IER_RIE_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RIE (Bit 0)

◆ CAN2_IER_TIE1_Msk

#define CAN2_IER_TIE1_Msk (0x2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TIE1 (Bitfield-Mask: 0x01)

◆ CAN2_IER_TIE1_Pos

#define CAN2_IER_TIE1_Pos (1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TIE1 (Bit 1)

◆ CAN2_IER_TIE2_Msk

#define CAN2_IER_TIE2_Msk (0x200UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TIE2 (Bitfield-Mask: 0x01)

◆ CAN2_IER_TIE2_Pos

#define CAN2_IER_TIE2_Pos (9UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TIE2 (Bit 9)

◆ CAN2_IER_TIE3_Msk

#define CAN2_IER_TIE3_Msk (0x400UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TIE3 (Bitfield-Mask: 0x01)

◆ CAN2_IER_TIE3_Pos

#define CAN2_IER_TIE3_Pos (10UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TIE3 (Bit 10)

◆ CAN2_IER_WUIE_Msk

#define CAN2_IER_WUIE_Msk (0x10UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

WUIE (Bitfield-Mask: 0x01)

◆ CAN2_IER_WUIE_Pos

#define CAN2_IER_WUIE_Pos (4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

WUIE (Bit 4)

◆ CAN2_MOD_LOM_Msk

#define CAN2_MOD_LOM_Msk (0x2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

LOM (Bitfield-Mask: 0x01)

◆ CAN2_MOD_LOM_Pos

#define CAN2_MOD_LOM_Pos (1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

LOM (Bit 1)

◆ CAN2_MOD_RM_Msk

#define CAN2_MOD_RM_Msk (0x1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RM (Bitfield-Mask: 0x01)

◆ CAN2_MOD_RM_Pos

#define CAN2_MOD_RM_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RM (Bit 0)

◆ CAN2_MOD_RPM_Msk

#define CAN2_MOD_RPM_Msk (0x20UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RPM (Bitfield-Mask: 0x01)

◆ CAN2_MOD_RPM_Pos

#define CAN2_MOD_RPM_Pos (5UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RPM (Bit 5)

◆ CAN2_MOD_SM_Msk

#define CAN2_MOD_SM_Msk (0x10UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

SM (Bitfield-Mask: 0x01)

◆ CAN2_MOD_SM_Pos

#define CAN2_MOD_SM_Pos (4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

SM (Bit 4)

◆ CAN2_MOD_STM_Msk

#define CAN2_MOD_STM_Msk (0x4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

STM (Bitfield-Mask: 0x01)

◆ CAN2_MOD_STM_Pos

#define CAN2_MOD_STM_Pos (2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

STM (Bit 2)

◆ CAN2_MOD_TM_Msk

#define CAN2_MOD_TM_Msk (0x80UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TM (Bitfield-Mask: 0x01)

◆ CAN2_MOD_TM_Pos

#define CAN2_MOD_TM_Pos (7UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TM (Bit 7)

◆ CAN2_MOD_TPM_Msk

#define CAN2_MOD_TPM_Msk (0x8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TPM (Bitfield-Mask: 0x01)

◆ CAN2_MOD_TPM_Pos

#define CAN2_MOD_TPM_Pos (3UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TPM (Bit 3)

◆ CAN2_RDA_DATA1_Msk

#define CAN2_RDA_DATA1_Msk (0xffUL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DATA1 (Bitfield-Mask: 0xff)

◆ CAN2_RDA_DATA1_Pos

#define CAN2_RDA_DATA1_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DATA1 (Bit 0)

◆ CAN2_RDA_DATA2_Msk

#define CAN2_RDA_DATA2_Msk (0xff00UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DATA2 (Bitfield-Mask: 0xff)

◆ CAN2_RDA_DATA2_Pos

#define CAN2_RDA_DATA2_Pos (8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DATA2 (Bit 8)

◆ CAN2_RDA_DATA3_Msk

#define CAN2_RDA_DATA3_Msk (0xff0000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DATA3 (Bitfield-Mask: 0xff)

◆ CAN2_RDA_DATA3_Pos

#define CAN2_RDA_DATA3_Pos (16UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DATA3 (Bit 16)

◆ CAN2_RDA_DATA4_Msk

#define CAN2_RDA_DATA4_Msk (0xff000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DATA4 (Bitfield-Mask: 0xff)

◆ CAN2_RDA_DATA4_Pos

#define CAN2_RDA_DATA4_Pos (24UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DATA4 (Bit 24)

◆ CAN2_RDB_DATA5_Msk

#define CAN2_RDB_DATA5_Msk (0xffUL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DATA5 (Bitfield-Mask: 0xff)

◆ CAN2_RDB_DATA5_Pos

#define CAN2_RDB_DATA5_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DATA5 (Bit 0)

◆ CAN2_RDB_DATA6_Msk

#define CAN2_RDB_DATA6_Msk (0xff00UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DATA6 (Bitfield-Mask: 0xff)

◆ CAN2_RDB_DATA6_Pos

#define CAN2_RDB_DATA6_Pos (8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DATA6 (Bit 8)

◆ CAN2_RDB_DATA7_Msk

#define CAN2_RDB_DATA7_Msk (0xff0000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DATA7 (Bitfield-Mask: 0xff)

◆ CAN2_RDB_DATA7_Pos

#define CAN2_RDB_DATA7_Pos (16UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DATA7 (Bit 16)

◆ CAN2_RDB_DATA8_Msk

#define CAN2_RDB_DATA8_Msk (0xff000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DATA8 (Bitfield-Mask: 0xff)

◆ CAN2_RDB_DATA8_Pos

#define CAN2_RDB_DATA8_Pos (24UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DATA8 (Bit 24)

◆ CAN2_RFS_BP_Msk

#define CAN2_RFS_BP_Msk (0x400UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

BP (Bitfield-Mask: 0x01)

◆ CAN2_RFS_BP_Pos

#define CAN2_RFS_BP_Pos (10UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

BP (Bit 10)

◆ CAN2_RFS_DLC_Msk

#define CAN2_RFS_DLC_Msk (0xf0000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DLC (Bitfield-Mask: 0x0f)

◆ CAN2_RFS_DLC_Pos

#define CAN2_RFS_DLC_Pos (16UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DLC (Bit 16)

◆ CAN2_RFS_FF_Msk

#define CAN2_RFS_FF_Msk (0x80000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

FF (Bitfield-Mask: 0x01)

◆ CAN2_RFS_FF_Pos

#define CAN2_RFS_FF_Pos (31UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

FF (Bit 31)

◆ CAN2_RFS_IDINDEX_Msk

#define CAN2_RFS_IDINDEX_Msk (0x3ffUL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

IDINDEX (Bitfield-Mask: 0x3ff)

◆ CAN2_RFS_IDINDEX_Pos

#define CAN2_RFS_IDINDEX_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

IDINDEX (Bit 0)

◆ CAN2_RFS_RTR_Msk

#define CAN2_RFS_RTR_Msk (0x40000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RTR (Bitfield-Mask: 0x01)

◆ CAN2_RFS_RTR_Pos

#define CAN2_RFS_RTR_Pos (30UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RTR (Bit 30)

◆ CAN2_RID_ID_Msk

#define CAN2_RID_ID_Msk (0x7ffUL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

ID (Bitfield-Mask: 0x7ff)

◆ CAN2_RID_ID_Pos

#define CAN2_RID_ID_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

ID (Bit 0)

◆ CAN2_SR_BS_1_Msk

#define CAN2_SR_BS_1_Msk (0x80UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

BS_1 (Bitfield-Mask: 0x01)

◆ CAN2_SR_BS_1_Pos

#define CAN2_SR_BS_1_Pos (7UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

BS_1 (Bit 7)

◆ CAN2_SR_BS_2_Msk

#define CAN2_SR_BS_2_Msk (0x8000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

BS_2 (Bitfield-Mask: 0x01)

◆ CAN2_SR_BS_2_Pos

#define CAN2_SR_BS_2_Pos (15UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

BS_2 (Bit 15)

◆ CAN2_SR_BS_3_Msk

#define CAN2_SR_BS_3_Msk (0x800000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

BS_3 (Bitfield-Mask: 0x01)

◆ CAN2_SR_BS_3_Pos

#define CAN2_SR_BS_3_Pos (23UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

BS_3 (Bit 23)

◆ CAN2_SR_DOS_1_Msk

#define CAN2_SR_DOS_1_Msk (0x2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DOS_1 (Bitfield-Mask: 0x01)

◆ CAN2_SR_DOS_1_Pos

#define CAN2_SR_DOS_1_Pos (1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DOS_1 (Bit 1)

◆ CAN2_SR_DOS_2_Msk

#define CAN2_SR_DOS_2_Msk (0x200UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DOS_2 (Bitfield-Mask: 0x01)

◆ CAN2_SR_DOS_2_Pos

#define CAN2_SR_DOS_2_Pos (9UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DOS_2 (Bit 9)

◆ CAN2_SR_DOS_3_Msk

#define CAN2_SR_DOS_3_Msk (0x20000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DOS_3 (Bitfield-Mask: 0x01)

◆ CAN2_SR_DOS_3_Pos

#define CAN2_SR_DOS_3_Pos (17UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DOS_3 (Bit 17)

◆ CAN2_SR_ES_1_Msk

#define CAN2_SR_ES_1_Msk (0x40UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

ES_1 (Bitfield-Mask: 0x01)

◆ CAN2_SR_ES_1_Pos

#define CAN2_SR_ES_1_Pos (6UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

ES_1 (Bit 6)

◆ CAN2_SR_ES_2_Msk

#define CAN2_SR_ES_2_Msk (0x4000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

ES_2 (Bitfield-Mask: 0x01)

◆ CAN2_SR_ES_2_Pos

#define CAN2_SR_ES_2_Pos (14UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

ES_2 (Bit 14)

◆ CAN2_SR_ES_3_Msk

#define CAN2_SR_ES_3_Msk (0x400000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

ES_3 (Bitfield-Mask: 0x01)

◆ CAN2_SR_ES_3_Pos

#define CAN2_SR_ES_3_Pos (22UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

ES_3 (Bit 22)

◆ CAN2_SR_RBS_1_Msk

#define CAN2_SR_RBS_1_Msk (0x1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RBS_1 (Bitfield-Mask: 0x01)

◆ CAN2_SR_RBS_1_Pos

#define CAN2_SR_RBS_1_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RBS_1 (Bit 0)

◆ CAN2_SR_RBS_2_Msk

#define CAN2_SR_RBS_2_Msk (0x100UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RBS_2 (Bitfield-Mask: 0x01)

◆ CAN2_SR_RBS_2_Pos

#define CAN2_SR_RBS_2_Pos (8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RBS_2 (Bit 8)

◆ CAN2_SR_RBS_3_Msk

#define CAN2_SR_RBS_3_Msk (0x10000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RBS_3 (Bitfield-Mask: 0x01)

◆ CAN2_SR_RBS_3_Pos

#define CAN2_SR_RBS_3_Pos (16UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RBS_3 (Bit 16)

◆ CAN2_SR_RS_1_Msk

#define CAN2_SR_RS_1_Msk (0x10UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RS_1 (Bitfield-Mask: 0x01)

◆ CAN2_SR_RS_1_Pos

#define CAN2_SR_RS_1_Pos (4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RS_1 (Bit 4)

◆ CAN2_SR_RS_2_Msk

#define CAN2_SR_RS_2_Msk (0x1000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RS_2 (Bitfield-Mask: 0x01)

◆ CAN2_SR_RS_2_Pos

#define CAN2_SR_RS_2_Pos (12UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RS_2 (Bit 12)

◆ CAN2_SR_RS_3_Msk

#define CAN2_SR_RS_3_Msk (0x100000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RS_3 (Bitfield-Mask: 0x01)

◆ CAN2_SR_RS_3_Pos

#define CAN2_SR_RS_3_Pos (20UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RS_3 (Bit 20)

◆ CAN2_SR_TBS1_1_Msk

#define CAN2_SR_TBS1_1_Msk (0x4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TBS1_1 (Bitfield-Mask: 0x01)

◆ CAN2_SR_TBS1_1_Pos

#define CAN2_SR_TBS1_1_Pos (2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TBS1_1 (Bit 2)

◆ CAN2_SR_TBS2_2_Msk

#define CAN2_SR_TBS2_2_Msk (0x400UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TBS2_2 (Bitfield-Mask: 0x01)

◆ CAN2_SR_TBS2_2_Pos

#define CAN2_SR_TBS2_2_Pos (10UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TBS2_2 (Bit 10)

◆ CAN2_SR_TBS3_3_Msk

#define CAN2_SR_TBS3_3_Msk (0x40000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TBS3_3 (Bitfield-Mask: 0x01)

◆ CAN2_SR_TBS3_3_Pos

#define CAN2_SR_TBS3_3_Pos (18UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TBS3_3 (Bit 18)

◆ CAN2_SR_TCS1_1_Msk

#define CAN2_SR_TCS1_1_Msk (0x8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TCS1_1 (Bitfield-Mask: 0x01)

◆ CAN2_SR_TCS1_1_Pos

#define CAN2_SR_TCS1_1_Pos (3UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TCS1_1 (Bit 3)

◆ CAN2_SR_TCS2_2_Msk

#define CAN2_SR_TCS2_2_Msk (0x800UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TCS2_2 (Bitfield-Mask: 0x01)

◆ CAN2_SR_TCS2_2_Pos

#define CAN2_SR_TCS2_2_Pos (11UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TCS2_2 (Bit 11)

◆ CAN2_SR_TCS3_3_Msk

#define CAN2_SR_TCS3_3_Msk (0x80000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TCS3_3 (Bitfield-Mask: 0x01)

◆ CAN2_SR_TCS3_3_Pos

#define CAN2_SR_TCS3_3_Pos (19UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TCS3_3 (Bit 19)

◆ CAN2_SR_TS1_1_Msk

#define CAN2_SR_TS1_1_Msk (0x20UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TS1_1 (Bitfield-Mask: 0x01)

◆ CAN2_SR_TS1_1_Pos

#define CAN2_SR_TS1_1_Pos (5UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TS1_1 (Bit 5)

◆ CAN2_SR_TS2_2_Msk

#define CAN2_SR_TS2_2_Msk (0x2000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TS2_2 (Bitfield-Mask: 0x01)

◆ CAN2_SR_TS2_2_Pos

#define CAN2_SR_TS2_2_Pos (13UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TS2_2 (Bit 13)

◆ CAN2_SR_TS3_3_Msk

#define CAN2_SR_TS3_3_Msk (0x200000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TS3_3 (Bitfield-Mask: 0x01)

◆ CAN2_SR_TS3_3_Pos

#define CAN2_SR_TS3_3_Pos (21UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TS3_3 (Bit 21)

◆ CAN2_TDA1_DATA1_Msk

#define CAN2_TDA1_DATA1_Msk (0xffUL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DATA1 (Bitfield-Mask: 0xff)

◆ CAN2_TDA1_DATA1_Pos

#define CAN2_TDA1_DATA1_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DATA1 (Bit 0)

◆ CAN2_TDA1_DATA2_Msk

#define CAN2_TDA1_DATA2_Msk (0xff00UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DATA2 (Bitfield-Mask: 0xff)

◆ CAN2_TDA1_DATA2_Pos

#define CAN2_TDA1_DATA2_Pos (8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DATA2 (Bit 8)

◆ CAN2_TDA1_DATA3_Msk

#define CAN2_TDA1_DATA3_Msk (0xff0000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DATA3 (Bitfield-Mask: 0xff)

◆ CAN2_TDA1_DATA3_Pos

#define CAN2_TDA1_DATA3_Pos (16UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DATA3 (Bit 16)

◆ CAN2_TDA1_DATA4_Msk

#define CAN2_TDA1_DATA4_Msk (0xff000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DATA4 (Bitfield-Mask: 0xff)

◆ CAN2_TDA1_DATA4_Pos

#define CAN2_TDA1_DATA4_Pos (24UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DATA4 (Bit 24)

◆ CAN2_TDA2_DATA1_Msk

#define CAN2_TDA2_DATA1_Msk (0xffUL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DATA1 (Bitfield-Mask: 0xff)

◆ CAN2_TDA2_DATA1_Pos

#define CAN2_TDA2_DATA1_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DATA1 (Bit 0)

◆ CAN2_TDA2_DATA2_Msk

#define CAN2_TDA2_DATA2_Msk (0xff00UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DATA2 (Bitfield-Mask: 0xff)

◆ CAN2_TDA2_DATA2_Pos

#define CAN2_TDA2_DATA2_Pos (8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DATA2 (Bit 8)

◆ CAN2_TDA2_DATA3_Msk

#define CAN2_TDA2_DATA3_Msk (0xff0000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DATA3 (Bitfield-Mask: 0xff)

◆ CAN2_TDA2_DATA3_Pos

#define CAN2_TDA2_DATA3_Pos (16UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DATA3 (Bit 16)

◆ CAN2_TDA2_DATA4_Msk

#define CAN2_TDA2_DATA4_Msk (0xff000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DATA4 (Bitfield-Mask: 0xff)

◆ CAN2_TDA2_DATA4_Pos

#define CAN2_TDA2_DATA4_Pos (24UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DATA4 (Bit 24)

◆ CAN2_TDA3_DATA1_Msk

#define CAN2_TDA3_DATA1_Msk (0xffUL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DATA1 (Bitfield-Mask: 0xff)

◆ CAN2_TDA3_DATA1_Pos

#define CAN2_TDA3_DATA1_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DATA1 (Bit 0)

◆ CAN2_TDA3_DATA2_Msk

#define CAN2_TDA3_DATA2_Msk (0xff00UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DATA2 (Bitfield-Mask: 0xff)

◆ CAN2_TDA3_DATA2_Pos

#define CAN2_TDA3_DATA2_Pos (8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DATA2 (Bit 8)

◆ CAN2_TDA3_DATA3_Msk

#define CAN2_TDA3_DATA3_Msk (0xff0000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DATA3 (Bitfield-Mask: 0xff)

◆ CAN2_TDA3_DATA3_Pos

#define CAN2_TDA3_DATA3_Pos (16UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DATA3 (Bit 16)

◆ CAN2_TDA3_DATA4_Msk

#define CAN2_TDA3_DATA4_Msk (0xff000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DATA4 (Bitfield-Mask: 0xff)

◆ CAN2_TDA3_DATA4_Pos

#define CAN2_TDA3_DATA4_Pos (24UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DATA4 (Bit 24)

◆ CAN2_TDB1_DATA5_Msk

#define CAN2_TDB1_DATA5_Msk (0xffUL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DATA5 (Bitfield-Mask: 0xff)

◆ CAN2_TDB1_DATA5_Pos

#define CAN2_TDB1_DATA5_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DATA5 (Bit 0)

◆ CAN2_TDB1_DATA6_Msk

#define CAN2_TDB1_DATA6_Msk (0xff00UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DATA6 (Bitfield-Mask: 0xff)

◆ CAN2_TDB1_DATA6_Pos

#define CAN2_TDB1_DATA6_Pos (8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DATA6 (Bit 8)

◆ CAN2_TDB1_DATA7_Msk

#define CAN2_TDB1_DATA7_Msk (0xff0000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DATA7 (Bitfield-Mask: 0xff)

◆ CAN2_TDB1_DATA7_Pos

#define CAN2_TDB1_DATA7_Pos (16UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DATA7 (Bit 16)

◆ CAN2_TDB1_DATA8_Msk

#define CAN2_TDB1_DATA8_Msk (0xff000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DATA8 (Bitfield-Mask: 0xff)

◆ CAN2_TDB1_DATA8_Pos

#define CAN2_TDB1_DATA8_Pos (24UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DATA8 (Bit 24)

◆ CAN2_TDB2_DATA5_Msk

#define CAN2_TDB2_DATA5_Msk (0xffUL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DATA5 (Bitfield-Mask: 0xff)

◆ CAN2_TDB2_DATA5_Pos

#define CAN2_TDB2_DATA5_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DATA5 (Bit 0)

◆ CAN2_TDB2_DATA6_Msk

#define CAN2_TDB2_DATA6_Msk (0xff00UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DATA6 (Bitfield-Mask: 0xff)

◆ CAN2_TDB2_DATA6_Pos

#define CAN2_TDB2_DATA6_Pos (8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DATA6 (Bit 8)

◆ CAN2_TDB2_DATA7_Msk

#define CAN2_TDB2_DATA7_Msk (0xff0000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DATA7 (Bitfield-Mask: 0xff)

◆ CAN2_TDB2_DATA7_Pos

#define CAN2_TDB2_DATA7_Pos (16UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DATA7 (Bit 16)

◆ CAN2_TDB2_DATA8_Msk

#define CAN2_TDB2_DATA8_Msk (0xff000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DATA8 (Bitfield-Mask: 0xff)

◆ CAN2_TDB2_DATA8_Pos

#define CAN2_TDB2_DATA8_Pos (24UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DATA8 (Bit 24)

◆ CAN2_TDB3_DATA5_Msk

#define CAN2_TDB3_DATA5_Msk (0xffUL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DATA5 (Bitfield-Mask: 0xff)

◆ CAN2_TDB3_DATA5_Pos

#define CAN2_TDB3_DATA5_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DATA5 (Bit 0)

◆ CAN2_TDB3_DATA6_Msk

#define CAN2_TDB3_DATA6_Msk (0xff00UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DATA6 (Bitfield-Mask: 0xff)

◆ CAN2_TDB3_DATA6_Pos

#define CAN2_TDB3_DATA6_Pos (8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DATA6 (Bit 8)

◆ CAN2_TDB3_DATA7_Msk

#define CAN2_TDB3_DATA7_Msk (0xff0000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DATA7 (Bitfield-Mask: 0xff)

◆ CAN2_TDB3_DATA7_Pos

#define CAN2_TDB3_DATA7_Pos (16UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DATA7 (Bit 16)

◆ CAN2_TDB3_DATA8_Msk

#define CAN2_TDB3_DATA8_Msk (0xff000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DATA8 (Bitfield-Mask: 0xff)

◆ CAN2_TDB3_DATA8_Pos

#define CAN2_TDB3_DATA8_Pos (24UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DATA8 (Bit 24)

◆ CAN2_TFI1_DLC_Msk

#define CAN2_TFI1_DLC_Msk (0xf0000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DLC (Bitfield-Mask: 0x0f)

◆ CAN2_TFI1_DLC_Pos

#define CAN2_TFI1_DLC_Pos (16UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DLC (Bit 16)

◆ CAN2_TFI1_FF_Msk

#define CAN2_TFI1_FF_Msk (0x80000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

FF (Bitfield-Mask: 0x01)

◆ CAN2_TFI1_FF_Pos

#define CAN2_TFI1_FF_Pos (31UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

FF (Bit 31)

◆ CAN2_TFI1_PRIO_Msk

#define CAN2_TFI1_PRIO_Msk (0xffUL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PRIO (Bitfield-Mask: 0xff)

◆ CAN2_TFI1_PRIO_Pos

#define CAN2_TFI1_PRIO_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PRIO (Bit 0)

◆ CAN2_TFI1_RTR_Msk

#define CAN2_TFI1_RTR_Msk (0x40000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RTR (Bitfield-Mask: 0x01)

◆ CAN2_TFI1_RTR_Pos

#define CAN2_TFI1_RTR_Pos (30UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RTR (Bit 30)

◆ CAN2_TFI2_DLC_Msk

#define CAN2_TFI2_DLC_Msk (0xf0000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DLC (Bitfield-Mask: 0x0f)

◆ CAN2_TFI2_DLC_Pos

#define CAN2_TFI2_DLC_Pos (16UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DLC (Bit 16)

◆ CAN2_TFI2_FF_Msk

#define CAN2_TFI2_FF_Msk (0x80000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

FF (Bitfield-Mask: 0x01)

◆ CAN2_TFI2_FF_Pos

#define CAN2_TFI2_FF_Pos (31UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

FF (Bit 31)

◆ CAN2_TFI2_PRIO_Msk

#define CAN2_TFI2_PRIO_Msk (0xffUL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PRIO (Bitfield-Mask: 0xff)

◆ CAN2_TFI2_PRIO_Pos

#define CAN2_TFI2_PRIO_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PRIO (Bit 0)

◆ CAN2_TFI2_RTR_Msk

#define CAN2_TFI2_RTR_Msk (0x40000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RTR (Bitfield-Mask: 0x01)

◆ CAN2_TFI2_RTR_Pos

#define CAN2_TFI2_RTR_Pos (30UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RTR (Bit 30)

◆ CAN2_TFI3_DLC_Msk

#define CAN2_TFI3_DLC_Msk (0xf0000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DLC (Bitfield-Mask: 0x0f)

◆ CAN2_TFI3_DLC_Pos

#define CAN2_TFI3_DLC_Pos (16UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DLC (Bit 16)

◆ CAN2_TFI3_FF_Msk

#define CAN2_TFI3_FF_Msk (0x80000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

FF (Bitfield-Mask: 0x01)

◆ CAN2_TFI3_FF_Pos

#define CAN2_TFI3_FF_Pos (31UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

FF (Bit 31)

◆ CAN2_TFI3_PRIO_Msk

#define CAN2_TFI3_PRIO_Msk (0xffUL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PRIO (Bitfield-Mask: 0xff)

◆ CAN2_TFI3_PRIO_Pos

#define CAN2_TFI3_PRIO_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PRIO (Bit 0)

◆ CAN2_TFI3_RTR_Msk

#define CAN2_TFI3_RTR_Msk (0x40000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RTR (Bitfield-Mask: 0x01)

◆ CAN2_TFI3_RTR_Pos

#define CAN2_TFI3_RTR_Pos (30UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RTR (Bit 30)

◆ CAN2_TID1_ID_Msk

#define CAN2_TID1_ID_Msk (0x7ffUL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

ID (Bitfield-Mask: 0x7ff)

◆ CAN2_TID1_ID_Pos

#define CAN2_TID1_ID_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

ID (Bit 0)

◆ CAN2_TID2_ID_Msk

#define CAN2_TID2_ID_Msk (0x7ffUL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

ID (Bitfield-Mask: 0x7ff)

◆ CAN2_TID2_ID_Pos

#define CAN2_TID2_ID_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

ID (Bit 0)

◆ CAN2_TID3_ID_Msk

#define CAN2_TID3_ID_Msk (0x7ffUL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

ID (Bitfield-Mask: 0x7ff)

◆ CAN2_TID3_ID_Pos

#define CAN2_TID3_ID_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

ID (Bit 0)

◆ CANAF_AFMR_ACCBP_Msk

#define CANAF_AFMR_ACCBP_Msk (0x2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

ACCBP (Bitfield-Mask: 0x01)

◆ CANAF_AFMR_ACCBP_Pos

#define CANAF_AFMR_ACCBP_Pos (1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

ACCBP (Bit 1)

◆ CANAF_AFMR_ACCOFF_Msk

#define CANAF_AFMR_ACCOFF_Msk (0x1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

ACCOFF (Bitfield-Mask: 0x01)

◆ CANAF_AFMR_ACCOFF_Pos

#define CANAF_AFMR_ACCOFF_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

ACCOFF (Bit 0)

◆ CANAF_AFMR_EFCAN_Msk

#define CANAF_AFMR_EFCAN_Msk (0x4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EFCAN (Bitfield-Mask: 0x01)

◆ CANAF_AFMR_EFCAN_Pos

#define CANAF_AFMR_EFCAN_Pos (2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EFCAN (Bit 2)

◆ CANAF_EFF_GRP_SA_EFF_GRP_SA_Msk

#define CANAF_EFF_GRP_SA_EFF_GRP_SA_Msk (0xffcUL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EFF_GRP_SA (Bitfield-Mask: 0x3ff)

◆ CANAF_EFF_GRP_SA_EFF_GRP_SA_Pos

#define CANAF_EFF_GRP_SA_EFF_GRP_SA_Pos (2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EFF_GRP_SA (Bit 2)

◆ CANAF_EFF_SA_EFF_SA_Msk

#define CANAF_EFF_SA_EFF_SA_Msk (0x7fcUL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EFF_SA (Bitfield-Mask: 0x1ff)

◆ CANAF_EFF_SA_EFF_SA_Pos

#define CANAF_EFF_SA_EFF_SA_Pos (2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EFF_SA (Bit 2)

◆ CANAF_ENDOFTABLE_ENDOFTABLE_Msk

#define CANAF_ENDOFTABLE_ENDOFTABLE_Msk (0xffcUL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

ENDOFTABLE (Bitfield-Mask: 0x3ff)

◆ CANAF_ENDOFTABLE_ENDOFTABLE_Pos

#define CANAF_ENDOFTABLE_ENDOFTABLE_Pos (2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

ENDOFTABLE (Bit 2)

◆ CANAF_FCANIC0_INTPND_Msk

#define CANAF_FCANIC0_INTPND_Msk (0xffffffffUL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

INTPND (Bitfield-Mask: 0xffffffff)

◆ CANAF_FCANIC0_INTPND_Pos

#define CANAF_FCANIC0_INTPND_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

INTPND (Bit 0)

◆ CANAF_FCANIC1_IntPnd32_Msk

#define CANAF_FCANIC1_IntPnd32_Msk (0xffffffffUL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

IntPnd32 (Bitfield-Mask: 0xffffffff)

◆ CANAF_FCANIC1_IntPnd32_Pos

#define CANAF_FCANIC1_IntPnd32_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

IntPnd32 (Bit 0)

◆ CANAF_FCANIE_FCANIE_Msk

#define CANAF_FCANIE_FCANIE_Msk (0x1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

FCANIE (Bitfield-Mask: 0x01)

◆ CANAF_FCANIE_FCANIE_Pos

#define CANAF_FCANIE_FCANIE_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

FCANIE (Bit 0)

◆ CANAF_LUTERR_LUTERR_Msk

#define CANAF_LUTERR_LUTERR_Msk (0x1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

LUTERR (Bitfield-Mask: 0x01)

◆ CANAF_LUTERR_LUTERR_Pos

#define CANAF_LUTERR_LUTERR_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

LUTERR (Bit 0)

◆ CANAF_LUTERRAD_LUTERRAD_Msk

#define CANAF_LUTERRAD_LUTERRAD_Msk (0x7fcUL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

LUTERRAD (Bitfield-Mask: 0x1ff)

◆ CANAF_LUTERRAD_LUTERRAD_Pos

#define CANAF_LUTERRAD_LUTERRAD_Pos (2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

LUTERRAD (Bit 2)

◆ CANAF_SFF_GRP_SA_SFF_GRP_SA_Msk

#define CANAF_SFF_GRP_SA_SFF_GRP_SA_Msk (0xffcUL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

SFF_GRP_SA (Bitfield-Mask: 0x3ff)

◆ CANAF_SFF_GRP_SA_SFF_GRP_SA_Pos

#define CANAF_SFF_GRP_SA_SFF_GRP_SA_Pos (2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

SFF_GRP_SA (Bit 2)

◆ CANAF_SFF_SA_SFF_SA_Msk

#define CANAF_SFF_SA_SFF_SA_Msk (0x7fcUL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

SFF_SA (Bitfield-Mask: 0x1ff)

◆ CANAF_SFF_SA_SFF_SA_Pos

#define CANAF_SFF_SA_SFF_SA_Pos (2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

SFF_SA (Bit 2)

◆ CCAN_MSR_BS1_Msk

#define CCAN_MSR_BS1_Msk (0x100UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

BS1 (Bitfield-Mask: 0x01)

◆ CCAN_MSR_BS1_Pos

#define CCAN_MSR_BS1_Pos (8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

BS1 (Bit 8)

◆ CCAN_MSR_BS2_Msk

#define CCAN_MSR_BS2_Msk (0x200UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

BS2 (Bitfield-Mask: 0x01)

◆ CCAN_MSR_BS2_Pos

#define CCAN_MSR_BS2_Pos (9UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

BS2 (Bit 9)

◆ CCAN_MSR_E1_Msk

#define CCAN_MSR_E1_Msk (0x1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

E1 (Bitfield-Mask: 0x01)

◆ CCAN_MSR_E1_Pos

#define CCAN_MSR_E1_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

E1 (Bit 0)

◆ CCAN_MSR_E2_Msk

#define CCAN_MSR_E2_Msk (0x2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

E2 (Bitfield-Mask: 0x01)

◆ CCAN_MSR_E2_Pos

#define CCAN_MSR_E2_Pos (1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

E2 (Bit 1)

◆ CCAN_RXSR_DOS1_Msk

#define CCAN_RXSR_DOS1_Msk (0x10000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DOS1 (Bitfield-Mask: 0x01)

◆ CCAN_RXSR_DOS1_Pos

#define CCAN_RXSR_DOS1_Pos (16UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DOS1 (Bit 16)

◆ CCAN_RXSR_DOS2_Msk

#define CCAN_RXSR_DOS2_Msk (0x20000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DOS2 (Bitfield-Mask: 0x01)

◆ CCAN_RXSR_DOS2_Pos

#define CCAN_RXSR_DOS2_Pos (17UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DOS2 (Bit 17)

◆ CCAN_RXSR_RB1_Msk

#define CCAN_RXSR_RB1_Msk (0x100UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RB1 (Bitfield-Mask: 0x01)

◆ CCAN_RXSR_RB1_Pos

#define CCAN_RXSR_RB1_Pos (8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RB1 (Bit 8)

◆ CCAN_RXSR_RB2_Msk

#define CCAN_RXSR_RB2_Msk (0x200UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RB2 (Bitfield-Mask: 0x01)

◆ CCAN_RXSR_RB2_Pos

#define CCAN_RXSR_RB2_Pos (9UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RB2 (Bit 9)

◆ CCAN_RXSR_RS1_Msk

#define CCAN_RXSR_RS1_Msk (0x1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RS1 (Bitfield-Mask: 0x01)

◆ CCAN_RXSR_RS1_Pos

#define CCAN_RXSR_RS1_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RS1 (Bit 0)

◆ CCAN_RXSR_RS2_Msk

#define CCAN_RXSR_RS2_Msk (0x2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RS2 (Bitfield-Mask: 0x01)

◆ CCAN_RXSR_RS2_Pos

#define CCAN_RXSR_RS2_Pos (1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RS2 (Bit 1)

◆ CCAN_TXSR_TBS1_Msk

#define CCAN_TXSR_TBS1_Msk (0x100UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TBS1 (Bitfield-Mask: 0x01)

◆ CCAN_TXSR_TBS1_Pos

#define CCAN_TXSR_TBS1_Pos (8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TBS1 (Bit 8)

◆ CCAN_TXSR_TBS2_Msk

#define CCAN_TXSR_TBS2_Msk (0x200UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TBS2 (Bitfield-Mask: 0x01)

◆ CCAN_TXSR_TBS2_Pos

#define CCAN_TXSR_TBS2_Pos (9UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TBS2 (Bit 9)

◆ CCAN_TXSR_TCS1_Msk

#define CCAN_TXSR_TCS1_Msk (0x10000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TCS1 (Bitfield-Mask: 0x01)

◆ CCAN_TXSR_TCS1_Pos

#define CCAN_TXSR_TCS1_Pos (16UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TCS1 (Bit 16)

◆ CCAN_TXSR_TCS2_Msk

#define CCAN_TXSR_TCS2_Msk (0x20000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TCS2 (Bitfield-Mask: 0x01)

◆ CCAN_TXSR_TCS2_Pos

#define CCAN_TXSR_TCS2_Pos (17UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TCS2 (Bit 17)

◆ CCAN_TXSR_TS1_Msk

#define CCAN_TXSR_TS1_Msk (0x1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TS1 (Bitfield-Mask: 0x01)

◆ CCAN_TXSR_TS1_Pos

#define CCAN_TXSR_TS1_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TS1 (Bit 0)

◆ CCAN_TXSR_TS2_Msk

#define CCAN_TXSR_TS2_Msk (0x2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TS2 (Bitfield-Mask: 0x01)

◆ CCAN_TXSR_TS2_Pos

#define CCAN_TXSR_TS2_Pos (1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TS2 (Bit 1)

◆ DAC_CNTVAL_VALUE_Msk

#define DAC_CNTVAL_VALUE_Msk (0xffffUL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

VALUE (Bitfield-Mask: 0xffff)

◆ DAC_CNTVAL_VALUE_Pos

#define DAC_CNTVAL_VALUE_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

VALUE (Bit 0)

◆ DAC_CR_BIAS_Msk

#define DAC_CR_BIAS_Msk (0x10000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

BIAS (Bitfield-Mask: 0x01)

◆ DAC_CR_BIAS_Pos

#define DAC_CR_BIAS_Pos (16UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

BIAS (Bit 16)

◆ DAC_CR_VALUE_Msk

#define DAC_CR_VALUE_Msk (0xffc0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

VALUE (Bitfield-Mask: 0x3ff)

◆ DAC_CR_VALUE_Pos

#define DAC_CR_VALUE_Pos (6UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

VALUE (Bit 6)

◆ DAC_CTRL_CNT_ENA_Msk

#define DAC_CTRL_CNT_ENA_Msk (0x4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CNT_ENA (Bitfield-Mask: 0x01)

◆ DAC_CTRL_CNT_ENA_Pos

#define DAC_CTRL_CNT_ENA_Pos (2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CNT_ENA (Bit 2)

◆ DAC_CTRL_DBLBUF_ENA_Msk

#define DAC_CTRL_DBLBUF_ENA_Msk (0x2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DBLBUF_ENA (Bitfield-Mask: 0x01)

◆ DAC_CTRL_DBLBUF_ENA_Pos

#define DAC_CTRL_DBLBUF_ENA_Pos (1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DBLBUF_ENA (Bit 1)

◆ DAC_CTRL_DMA_ENA_Msk

#define DAC_CTRL_DMA_ENA_Msk (0x8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DMA_ENA (Bitfield-Mask: 0x01)

◆ DAC_CTRL_DMA_ENA_Pos

#define DAC_CTRL_DMA_ENA_Pos (3UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DMA_ENA (Bit 3)

◆ DAC_CTRL_INT_DMA_REQ_Msk

#define DAC_CTRL_INT_DMA_REQ_Msk (0x1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

INT_DMA_REQ (Bitfield-Mask: 0x01)

◆ DAC_CTRL_INT_DMA_REQ_Pos

#define DAC_CTRL_INT_DMA_REQ_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

INT_DMA_REQ (Bit 0)

◆ EMAC_CLRT_COLLWIN_Msk

#define EMAC_CLRT_COLLWIN_Msk (0x3f00UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

COLLWIN (Bitfield-Mask: 0x3f)

◆ EMAC_CLRT_COLLWIN_Pos

#define EMAC_CLRT_COLLWIN_Pos (8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

COLLWIN (Bit 8)

◆ EMAC_CLRT_RETRANSMAX_Msk

#define EMAC_CLRT_RETRANSMAX_Msk (0xfUL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RETRANSMAX (Bitfield-Mask: 0x0f)

◆ EMAC_CLRT_RETRANSMAX_Pos

#define EMAC_CLRT_RETRANSMAX_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RETRANSMAX (Bit 0)

◆ EMAC_COMMAND_FULLDUPLEX_Msk

#define EMAC_COMMAND_FULLDUPLEX_Msk (0x400UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

FULLDUPLEX (Bitfield-Mask: 0x01)

◆ EMAC_COMMAND_FULLDUPLEX_Pos

#define EMAC_COMMAND_FULLDUPLEX_Pos (10UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

FULLDUPLEX (Bit 10)

◆ EMAC_COMMAND_PASSRUNTFRAME_Msk

#define EMAC_COMMAND_PASSRUNTFRAME_Msk (0x40UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PASSRUNTFRAME (Bitfield-Mask: 0x01)

◆ EMAC_COMMAND_PASSRUNTFRAME_Pos

#define EMAC_COMMAND_PASSRUNTFRAME_Pos (6UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PASSRUNTFRAME (Bit 6)

◆ EMAC_COMMAND_PASSRXFILTER_Msk

#define EMAC_COMMAND_PASSRXFILTER_Msk (0x80UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PASSRXFILTER (Bitfield-Mask: 0x01)

◆ EMAC_COMMAND_PASSRXFILTER_Pos

#define EMAC_COMMAND_PASSRXFILTER_Pos (7UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PASSRXFILTER (Bit 7)

◆ EMAC_COMMAND_REGRESET_Msk

#define EMAC_COMMAND_REGRESET_Msk (0x8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

REGRESET (Bitfield-Mask: 0x01)

◆ EMAC_COMMAND_REGRESET_Pos

#define EMAC_COMMAND_REGRESET_Pos (3UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

REGRESET (Bit 3)

◆ EMAC_COMMAND_RMII_Msk

#define EMAC_COMMAND_RMII_Msk (0x200UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RMII (Bitfield-Mask: 0x01)

◆ EMAC_COMMAND_RMII_Pos

#define EMAC_COMMAND_RMII_Pos (9UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RMII (Bit 9)

◆ EMAC_COMMAND_RXENABLE_Msk

#define EMAC_COMMAND_RXENABLE_Msk (0x1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RXENABLE (Bitfield-Mask: 0x01)

◆ EMAC_COMMAND_RXENABLE_Pos

#define EMAC_COMMAND_RXENABLE_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RXENABLE (Bit 0)

◆ EMAC_COMMAND_RXRESET_Msk

#define EMAC_COMMAND_RXRESET_Msk (0x20UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RXRESET (Bitfield-Mask: 0x01)

◆ EMAC_COMMAND_RXRESET_Pos

#define EMAC_COMMAND_RXRESET_Pos (5UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RXRESET (Bit 5)

◆ EMAC_COMMAND_TXENABLE_Msk

#define EMAC_COMMAND_TXENABLE_Msk (0x2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TXENABLE (Bitfield-Mask: 0x01)

◆ EMAC_COMMAND_TXENABLE_Pos

#define EMAC_COMMAND_TXENABLE_Pos (1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TXENABLE (Bit 1)

◆ EMAC_COMMAND_TXFLOWCONTROL_Msk

#define EMAC_COMMAND_TXFLOWCONTROL_Msk (0x100UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TXFLOWCONTROL (Bitfield-Mask: 0x01)

◆ EMAC_COMMAND_TXFLOWCONTROL_Pos

#define EMAC_COMMAND_TXFLOWCONTROL_Pos (8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TXFLOWCONTROL (Bit 8)

◆ EMAC_COMMAND_TXRESET_Msk

#define EMAC_COMMAND_TXRESET_Msk (0x10UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TXRESET (Bitfield-Mask: 0x01)

◆ EMAC_COMMAND_TXRESET_Pos

#define EMAC_COMMAND_TXRESET_Pos (4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TXRESET (Bit 4)

◆ EMAC_FLOWCONTROLCOUNTER_MC_Msk

#define EMAC_FLOWCONTROLCOUNTER_MC_Msk (0xffffUL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

MC (Bitfield-Mask: 0xffff)

◆ EMAC_FLOWCONTROLCOUNTER_MC_Pos

#define EMAC_FLOWCONTROLCOUNTER_MC_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

MC (Bit 0)

◆ EMAC_FLOWCONTROLCOUNTER_PT_Msk

#define EMAC_FLOWCONTROLCOUNTER_PT_Msk (0xffff0000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PT (Bitfield-Mask: 0xffff)

◆ EMAC_FLOWCONTROLCOUNTER_PT_Pos

#define EMAC_FLOWCONTROLCOUNTER_PT_Pos (16UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PT (Bit 16)

◆ EMAC_FLOWCONTROLSTATUS_MCC_Msk

#define EMAC_FLOWCONTROLSTATUS_MCC_Msk (0xffffUL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

MCC (Bitfield-Mask: 0xffff)

◆ EMAC_FLOWCONTROLSTATUS_MCC_Pos

#define EMAC_FLOWCONTROLSTATUS_MCC_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

MCC (Bit 0)

◆ EMAC_HASHFILTERH_HFH_Msk

#define EMAC_HASHFILTERH_HFH_Msk (0xffffffffUL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

HFH (Bitfield-Mask: 0xffffffff)

◆ EMAC_HASHFILTERH_HFH_Pos

#define EMAC_HASHFILTERH_HFH_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

HFH (Bit 0)

◆ EMAC_HASHFILTERL_HFL_Msk

#define EMAC_HASHFILTERL_HFL_Msk (0xffffffffUL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

HFL (Bitfield-Mask: 0xffffffff)

◆ EMAC_HASHFILTERL_HFL_Pos

#define EMAC_HASHFILTERL_HFL_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

HFL (Bit 0)

◆ EMAC_INTCLEAR_RXDONEINTCLR_Msk

#define EMAC_INTCLEAR_RXDONEINTCLR_Msk (0x8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RXDONEINTCLR (Bitfield-Mask: 0x01)

◆ EMAC_INTCLEAR_RXDONEINTCLR_Pos

#define EMAC_INTCLEAR_RXDONEINTCLR_Pos (3UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RXDONEINTCLR (Bit 3)

◆ EMAC_INTCLEAR_RXERRORINTCLR_Msk

#define EMAC_INTCLEAR_RXERRORINTCLR_Msk (0x2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RXERRORINTCLR (Bitfield-Mask: 0x01)

◆ EMAC_INTCLEAR_RXERRORINTCLR_Pos

#define EMAC_INTCLEAR_RXERRORINTCLR_Pos (1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RXERRORINTCLR (Bit 1)

◆ EMAC_INTCLEAR_RXFINISHEDINTCLR_Msk

#define EMAC_INTCLEAR_RXFINISHEDINTCLR_Msk (0x4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RXFINISHEDINTCLR (Bitfield-Mask: 0x01)

◆ EMAC_INTCLEAR_RXFINISHEDINTCLR_Pos

#define EMAC_INTCLEAR_RXFINISHEDINTCLR_Pos (2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RXFINISHEDINTCLR (Bit 2)

◆ EMAC_INTCLEAR_RXOVERRUNINTCLR_Msk

#define EMAC_INTCLEAR_RXOVERRUNINTCLR_Msk (0x1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RXOVERRUNINTCLR (Bitfield-Mask: 0x01)

◆ EMAC_INTCLEAR_RXOVERRUNINTCLR_Pos

#define EMAC_INTCLEAR_RXOVERRUNINTCLR_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RXOVERRUNINTCLR (Bit 0)

◆ EMAC_INTCLEAR_SOFTINTCLR_Msk

#define EMAC_INTCLEAR_SOFTINTCLR_Msk (0x1000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

SOFTINTCLR (Bitfield-Mask: 0x01)

◆ EMAC_INTCLEAR_SOFTINTCLR_Pos

#define EMAC_INTCLEAR_SOFTINTCLR_Pos (12UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

SOFTINTCLR (Bit 12)

◆ EMAC_INTCLEAR_TXDONEINTCLR_Msk

#define EMAC_INTCLEAR_TXDONEINTCLR_Msk (0x80UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TXDONEINTCLR (Bitfield-Mask: 0x01)

◆ EMAC_INTCLEAR_TXDONEINTCLR_Pos

#define EMAC_INTCLEAR_TXDONEINTCLR_Pos (7UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TXDONEINTCLR (Bit 7)

◆ EMAC_INTCLEAR_TXERRORINTCLR_Msk

#define EMAC_INTCLEAR_TXERRORINTCLR_Msk (0x20UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TXERRORINTCLR (Bitfield-Mask: 0x01)

◆ EMAC_INTCLEAR_TXERRORINTCLR_Pos

#define EMAC_INTCLEAR_TXERRORINTCLR_Pos (5UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TXERRORINTCLR (Bit 5)

◆ EMAC_INTCLEAR_TXFINISHEDINTCLR_Msk

#define EMAC_INTCLEAR_TXFINISHEDINTCLR_Msk (0x40UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TXFINISHEDINTCLR (Bitfield-Mask: 0x01)

◆ EMAC_INTCLEAR_TXFINISHEDINTCLR_Pos

#define EMAC_INTCLEAR_TXFINISHEDINTCLR_Pos (6UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TXFINISHEDINTCLR (Bit 6)

◆ EMAC_INTCLEAR_TXUNDERRUNINTCLR_Msk

#define EMAC_INTCLEAR_TXUNDERRUNINTCLR_Msk (0x10UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TXUNDERRUNINTCLR (Bitfield-Mask: 0x01)

◆ EMAC_INTCLEAR_TXUNDERRUNINTCLR_Pos

#define EMAC_INTCLEAR_TXUNDERRUNINTCLR_Pos (4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TXUNDERRUNINTCLR (Bit 4)

◆ EMAC_INTCLEAR_WAKEUPINTCLR_Msk

#define EMAC_INTCLEAR_WAKEUPINTCLR_Msk (0x2000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

WAKEUPINTCLR (Bitfield-Mask: 0x01)

◆ EMAC_INTCLEAR_WAKEUPINTCLR_Pos

#define EMAC_INTCLEAR_WAKEUPINTCLR_Pos (13UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

WAKEUPINTCLR (Bit 13)

◆ EMAC_INTENABLE_RXDONEINTEN_Msk

#define EMAC_INTENABLE_RXDONEINTEN_Msk (0x8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RXDONEINTEN (Bitfield-Mask: 0x01)

◆ EMAC_INTENABLE_RXDONEINTEN_Pos

#define EMAC_INTENABLE_RXDONEINTEN_Pos (3UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RXDONEINTEN (Bit 3)

◆ EMAC_INTENABLE_RXERRORINTEN_Msk

#define EMAC_INTENABLE_RXERRORINTEN_Msk (0x2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RXERRORINTEN (Bitfield-Mask: 0x01)

◆ EMAC_INTENABLE_RXERRORINTEN_Pos

#define EMAC_INTENABLE_RXERRORINTEN_Pos (1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RXERRORINTEN (Bit 1)

◆ EMAC_INTENABLE_RXFINISHEDINTEN_Msk

#define EMAC_INTENABLE_RXFINISHEDINTEN_Msk (0x4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RXFINISHEDINTEN (Bitfield-Mask: 0x01)

◆ EMAC_INTENABLE_RXFINISHEDINTEN_Pos

#define EMAC_INTENABLE_RXFINISHEDINTEN_Pos (2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RXFINISHEDINTEN (Bit 2)

◆ EMAC_INTENABLE_RXOVERRUNINTEN_Msk

#define EMAC_INTENABLE_RXOVERRUNINTEN_Msk (0x1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RXOVERRUNINTEN (Bitfield-Mask: 0x01)

◆ EMAC_INTENABLE_RXOVERRUNINTEN_Pos

#define EMAC_INTENABLE_RXOVERRUNINTEN_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RXOVERRUNINTEN (Bit 0)

◆ EMAC_INTENABLE_SOFTINTEN_Msk

#define EMAC_INTENABLE_SOFTINTEN_Msk (0x1000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

SOFTINTEN (Bitfield-Mask: 0x01)

◆ EMAC_INTENABLE_SOFTINTEN_Pos

#define EMAC_INTENABLE_SOFTINTEN_Pos (12UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

SOFTINTEN (Bit 12)

◆ EMAC_INTENABLE_TXDONEINTEN_Msk

#define EMAC_INTENABLE_TXDONEINTEN_Msk (0x80UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TXDONEINTEN (Bitfield-Mask: 0x01)

◆ EMAC_INTENABLE_TXDONEINTEN_Pos

#define EMAC_INTENABLE_TXDONEINTEN_Pos (7UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TXDONEINTEN (Bit 7)

◆ EMAC_INTENABLE_TXERRORINTEN_Msk

#define EMAC_INTENABLE_TXERRORINTEN_Msk (0x20UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TXERRORINTEN (Bitfield-Mask: 0x01)

◆ EMAC_INTENABLE_TXERRORINTEN_Pos

#define EMAC_INTENABLE_TXERRORINTEN_Pos (5UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TXERRORINTEN (Bit 5)

◆ EMAC_INTENABLE_TXFINISHEDINTEN_Msk

#define EMAC_INTENABLE_TXFINISHEDINTEN_Msk (0x40UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TXFINISHEDINTEN (Bitfield-Mask: 0x01)

◆ EMAC_INTENABLE_TXFINISHEDINTEN_Pos

#define EMAC_INTENABLE_TXFINISHEDINTEN_Pos (6UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TXFINISHEDINTEN (Bit 6)

◆ EMAC_INTENABLE_TXUNDERRUNINTEN_Msk

#define EMAC_INTENABLE_TXUNDERRUNINTEN_Msk (0x10UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TXUNDERRUNINTEN (Bitfield-Mask: 0x01)

◆ EMAC_INTENABLE_TXUNDERRUNINTEN_Pos

#define EMAC_INTENABLE_TXUNDERRUNINTEN_Pos (4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TXUNDERRUNINTEN (Bit 4)

◆ EMAC_INTENABLE_WAKEUPINTEN_Msk

#define EMAC_INTENABLE_WAKEUPINTEN_Msk (0x2000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

WAKEUPINTEN (Bitfield-Mask: 0x01)

◆ EMAC_INTENABLE_WAKEUPINTEN_Pos

#define EMAC_INTENABLE_WAKEUPINTEN_Pos (13UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

WAKEUPINTEN (Bit 13)

◆ EMAC_INTSET_RXDONEINTSET_Msk

#define EMAC_INTSET_RXDONEINTSET_Msk (0x8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RXDONEINTSET (Bitfield-Mask: 0x01)

◆ EMAC_INTSET_RXDONEINTSET_Pos

#define EMAC_INTSET_RXDONEINTSET_Pos (3UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RXDONEINTSET (Bit 3)

◆ EMAC_INTSET_RXERRORINTSET_Msk

#define EMAC_INTSET_RXERRORINTSET_Msk (0x2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RXERRORINTSET (Bitfield-Mask: 0x01)

◆ EMAC_INTSET_RXERRORINTSET_Pos

#define EMAC_INTSET_RXERRORINTSET_Pos (1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RXERRORINTSET (Bit 1)

◆ EMAC_INTSET_RXFINISHEDINTSET_Msk

#define EMAC_INTSET_RXFINISHEDINTSET_Msk (0x4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RXFINISHEDINTSET (Bitfield-Mask: 0x01)

◆ EMAC_INTSET_RXFINISHEDINTSET_Pos

#define EMAC_INTSET_RXFINISHEDINTSET_Pos (2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RXFINISHEDINTSET (Bit 2)

◆ EMAC_INTSET_RXOVERRUNINTSET_Msk

#define EMAC_INTSET_RXOVERRUNINTSET_Msk (0x1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RXOVERRUNINTSET (Bitfield-Mask: 0x01)

◆ EMAC_INTSET_RXOVERRUNINTSET_Pos

#define EMAC_INTSET_RXOVERRUNINTSET_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RXOVERRUNINTSET (Bit 0)

◆ EMAC_INTSET_SOFTINTSET_Msk

#define EMAC_INTSET_SOFTINTSET_Msk (0x1000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

SOFTINTSET (Bitfield-Mask: 0x01)

◆ EMAC_INTSET_SOFTINTSET_Pos

#define EMAC_INTSET_SOFTINTSET_Pos (12UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

SOFTINTSET (Bit 12)

◆ EMAC_INTSET_TXDONEINTSET_Msk

#define EMAC_INTSET_TXDONEINTSET_Msk (0x80UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TXDONEINTSET (Bitfield-Mask: 0x01)

◆ EMAC_INTSET_TXDONEINTSET_Pos

#define EMAC_INTSET_TXDONEINTSET_Pos (7UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TXDONEINTSET (Bit 7)

◆ EMAC_INTSET_TXERRORINTSET_Msk

#define EMAC_INTSET_TXERRORINTSET_Msk (0x20UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TXERRORINTSET (Bitfield-Mask: 0x01)

◆ EMAC_INTSET_TXERRORINTSET_Pos

#define EMAC_INTSET_TXERRORINTSET_Pos (5UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TXERRORINTSET (Bit 5)

◆ EMAC_INTSET_TXFINISHEDINTSET_Msk

#define EMAC_INTSET_TXFINISHEDINTSET_Msk (0x40UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TXFINISHEDINTSET (Bitfield-Mask: 0x01)

◆ EMAC_INTSET_TXFINISHEDINTSET_Pos

#define EMAC_INTSET_TXFINISHEDINTSET_Pos (6UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TXFINISHEDINTSET (Bit 6)

◆ EMAC_INTSET_TXUNDERRUNINTSET_Msk

#define EMAC_INTSET_TXUNDERRUNINTSET_Msk (0x10UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TXUNDERRUNINTSET (Bitfield-Mask: 0x01)

◆ EMAC_INTSET_TXUNDERRUNINTSET_Pos

#define EMAC_INTSET_TXUNDERRUNINTSET_Pos (4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TXUNDERRUNINTSET (Bit 4)

◆ EMAC_INTSET_WAKEUPINTSET_Msk

#define EMAC_INTSET_WAKEUPINTSET_Msk (0x2000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

WAKEUPINTSET (Bitfield-Mask: 0x01)

◆ EMAC_INTSET_WAKEUPINTSET_Pos

#define EMAC_INTSET_WAKEUPINTSET_Pos (13UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

WAKEUPINTSET (Bit 13)

◆ EMAC_INTSTATUS_RXDONEINT_Msk

#define EMAC_INTSTATUS_RXDONEINT_Msk (0x8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RXDONEINT (Bitfield-Mask: 0x01)

◆ EMAC_INTSTATUS_RXDONEINT_Pos

#define EMAC_INTSTATUS_RXDONEINT_Pos (3UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RXDONEINT (Bit 3)

◆ EMAC_INTSTATUS_RXERRORINT_Msk

#define EMAC_INTSTATUS_RXERRORINT_Msk (0x2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RXERRORINT (Bitfield-Mask: 0x01)

◆ EMAC_INTSTATUS_RXERRORINT_Pos

#define EMAC_INTSTATUS_RXERRORINT_Pos (1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RXERRORINT (Bit 1)

◆ EMAC_INTSTATUS_RXFINISHEDINT_Msk

#define EMAC_INTSTATUS_RXFINISHEDINT_Msk (0x4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RXFINISHEDINT (Bitfield-Mask: 0x01)

◆ EMAC_INTSTATUS_RXFINISHEDINT_Pos

#define EMAC_INTSTATUS_RXFINISHEDINT_Pos (2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RXFINISHEDINT (Bit 2)

◆ EMAC_INTSTATUS_RXOVERRUNINT_Msk

#define EMAC_INTSTATUS_RXOVERRUNINT_Msk (0x1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RXOVERRUNINT (Bitfield-Mask: 0x01)

◆ EMAC_INTSTATUS_RXOVERRUNINT_Pos

#define EMAC_INTSTATUS_RXOVERRUNINT_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RXOVERRUNINT (Bit 0)

◆ EMAC_INTSTATUS_SOFTINT_Msk

#define EMAC_INTSTATUS_SOFTINT_Msk (0x1000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

SOFTINT (Bitfield-Mask: 0x01)

◆ EMAC_INTSTATUS_SOFTINT_Pos

#define EMAC_INTSTATUS_SOFTINT_Pos (12UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

SOFTINT (Bit 12)

◆ EMAC_INTSTATUS_TXDONEINT_Msk

#define EMAC_INTSTATUS_TXDONEINT_Msk (0x80UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TXDONEINT (Bitfield-Mask: 0x01)

◆ EMAC_INTSTATUS_TXDONEINT_Pos

#define EMAC_INTSTATUS_TXDONEINT_Pos (7UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TXDONEINT (Bit 7)

◆ EMAC_INTSTATUS_TXERRORINT_Msk

#define EMAC_INTSTATUS_TXERRORINT_Msk (0x20UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TXERRORINT (Bitfield-Mask: 0x01)

◆ EMAC_INTSTATUS_TXERRORINT_Pos

#define EMAC_INTSTATUS_TXERRORINT_Pos (5UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TXERRORINT (Bit 5)

◆ EMAC_INTSTATUS_TXFINISHEDINT_Msk

#define EMAC_INTSTATUS_TXFINISHEDINT_Msk (0x40UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TXFINISHEDINT (Bitfield-Mask: 0x01)

◆ EMAC_INTSTATUS_TXFINISHEDINT_Pos

#define EMAC_INTSTATUS_TXFINISHEDINT_Pos (6UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TXFINISHEDINT (Bit 6)

◆ EMAC_INTSTATUS_TXUNDERRUNINT_Msk

#define EMAC_INTSTATUS_TXUNDERRUNINT_Msk (0x10UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TXUNDERRUNINT (Bitfield-Mask: 0x01)

◆ EMAC_INTSTATUS_TXUNDERRUNINT_Pos

#define EMAC_INTSTATUS_TXUNDERRUNINT_Pos (4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TXUNDERRUNINT (Bit 4)

◆ EMAC_INTSTATUS_WAKEUPINT_Msk

#define EMAC_INTSTATUS_WAKEUPINT_Msk (0x2000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

WAKEUPINT (Bitfield-Mask: 0x01)

◆ EMAC_INTSTATUS_WAKEUPINT_Pos

#define EMAC_INTSTATUS_WAKEUPINT_Pos (13UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

WAKEUPINT (Bit 13)

◆ EMAC_IPGR_NBTOBINTEGAP1_Msk

#define EMAC_IPGR_NBTOBINTEGAP1_Msk (0x7f00UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

NBTOBINTEGAP1 (Bitfield-Mask: 0x7f)

◆ EMAC_IPGR_NBTOBINTEGAP1_Pos

#define EMAC_IPGR_NBTOBINTEGAP1_Pos (8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

NBTOBINTEGAP1 (Bit 8)

◆ EMAC_IPGR_NBTOBINTEGAP2_Msk

#define EMAC_IPGR_NBTOBINTEGAP2_Msk (0x7fUL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

NBTOBINTEGAP2 (Bitfield-Mask: 0x7f)

◆ EMAC_IPGR_NBTOBINTEGAP2_Pos

#define EMAC_IPGR_NBTOBINTEGAP2_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

NBTOBINTEGAP2 (Bit 0)

◆ EMAC_IPGT_BTOBINTEGAP_Msk

#define EMAC_IPGT_BTOBINTEGAP_Msk (0x7fUL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

BTOBINTEGAP (Bitfield-Mask: 0x7f)

◆ EMAC_IPGT_BTOBINTEGAP_Pos

#define EMAC_IPGT_BTOBINTEGAP_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

BTOBINTEGAP (Bit 0)

◆ EMAC_MAC1_LOOPBACK_Msk

#define EMAC_MAC1_LOOPBACK_Msk (0x10UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

LOOPBACK (Bitfield-Mask: 0x01)

◆ EMAC_MAC1_LOOPBACK_Pos

#define EMAC_MAC1_LOOPBACK_Pos (4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

LOOPBACK (Bit 4)

◆ EMAC_MAC1_PARF_Msk

#define EMAC_MAC1_PARF_Msk (0x2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PARF (Bitfield-Mask: 0x01)

◆ EMAC_MAC1_PARF_Pos

#define EMAC_MAC1_PARF_Pos (1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PARF (Bit 1)

◆ EMAC_MAC1_RESETMCSRX_Msk

#define EMAC_MAC1_RESETMCSRX_Msk (0x800UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RESETMCSRX (Bitfield-Mask: 0x01)

◆ EMAC_MAC1_RESETMCSRX_Pos

#define EMAC_MAC1_RESETMCSRX_Pos (11UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RESETMCSRX (Bit 11)

◆ EMAC_MAC1_RESETMCSTX_Msk

#define EMAC_MAC1_RESETMCSTX_Msk (0x200UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RESETMCSTX (Bitfield-Mask: 0x01)

◆ EMAC_MAC1_RESETMCSTX_Pos

#define EMAC_MAC1_RESETMCSTX_Pos (9UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RESETMCSTX (Bit 9)

◆ EMAC_MAC1_RESETRX_Msk

#define EMAC_MAC1_RESETRX_Msk (0x400UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RESETRX (Bitfield-Mask: 0x01)

◆ EMAC_MAC1_RESETRX_Pos

#define EMAC_MAC1_RESETRX_Pos (10UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RESETRX (Bit 10)

◆ EMAC_MAC1_RESETTX_Msk

#define EMAC_MAC1_RESETTX_Msk (0x100UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RESETTX (Bitfield-Mask: 0x01)

◆ EMAC_MAC1_RESETTX_Pos

#define EMAC_MAC1_RESETTX_Pos (8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RESETTX (Bit 8)

◆ EMAC_MAC1_RXENABLE_Msk

#define EMAC_MAC1_RXENABLE_Msk (0x1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RXENABLE (Bitfield-Mask: 0x01)

◆ EMAC_MAC1_RXENABLE_Pos

#define EMAC_MAC1_RXENABLE_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RXENABLE (Bit 0)

◆ EMAC_MAC1_RXFLOWCTRL_Msk

#define EMAC_MAC1_RXFLOWCTRL_Msk (0x4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RXFLOWCTRL (Bitfield-Mask: 0x01)

◆ EMAC_MAC1_RXFLOWCTRL_Pos

#define EMAC_MAC1_RXFLOWCTRL_Pos (2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RXFLOWCTRL (Bit 2)

◆ EMAC_MAC1_SIMRESET_Msk

#define EMAC_MAC1_SIMRESET_Msk (0x4000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

SIMRESET (Bitfield-Mask: 0x01)

◆ EMAC_MAC1_SIMRESET_Pos

#define EMAC_MAC1_SIMRESET_Pos (14UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

SIMRESET (Bit 14)

◆ EMAC_MAC1_SOFTRESET_Msk

#define EMAC_MAC1_SOFTRESET_Msk (0x8000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

SOFTRESET (Bitfield-Mask: 0x01)

◆ EMAC_MAC1_SOFTRESET_Pos

#define EMAC_MAC1_SOFTRESET_Pos (15UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

SOFTRESET (Bit 15)

◆ EMAC_MAC1_TXFLOWCTRL_Msk

#define EMAC_MAC1_TXFLOWCTRL_Msk (0x8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TXFLOWCTRL (Bitfield-Mask: 0x01)

◆ EMAC_MAC1_TXFLOWCTRL_Pos

#define EMAC_MAC1_TXFLOWCTRL_Pos (3UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TXFLOWCTRL (Bit 3)

◆ EMAC_MAC2_AUTODETPADEN_Msk

#define EMAC_MAC2_AUTODETPADEN_Msk (0x80UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

AUTODETPADEN (Bitfield-Mask: 0x01)

◆ EMAC_MAC2_AUTODETPADEN_Pos

#define EMAC_MAC2_AUTODETPADEN_Pos (7UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

AUTODETPADEN (Bit 7)

◆ EMAC_MAC2_BP_NOBACKOFF_Msk

#define EMAC_MAC2_BP_NOBACKOFF_Msk (0x2000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

BP_NOBACKOFF (Bitfield-Mask: 0x01)

◆ EMAC_MAC2_BP_NOBACKOFF_Pos

#define EMAC_MAC2_BP_NOBACKOFF_Pos (13UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

BP_NOBACKOFF (Bit 13)

◆ EMAC_MAC2_CRCEN_Msk

#define EMAC_MAC2_CRCEN_Msk (0x10UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CRCEN (Bitfield-Mask: 0x01)

◆ EMAC_MAC2_CRCEN_Pos

#define EMAC_MAC2_CRCEN_Pos (4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CRCEN (Bit 4)

◆ EMAC_MAC2_DELAYEDCRC_Msk

#define EMAC_MAC2_DELAYEDCRC_Msk (0x8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DELAYEDCRC (Bitfield-Mask: 0x01)

◆ EMAC_MAC2_DELAYEDCRC_Pos

#define EMAC_MAC2_DELAYEDCRC_Pos (3UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DELAYEDCRC (Bit 3)

◆ EMAC_MAC2_EXCESSDEFER_Msk

#define EMAC_MAC2_EXCESSDEFER_Msk (0x4000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EXCESSDEFER (Bitfield-Mask: 0x01)

◆ EMAC_MAC2_EXCESSDEFER_Pos

#define EMAC_MAC2_EXCESSDEFER_Pos (14UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EXCESSDEFER (Bit 14)

◆ EMAC_MAC2_FLC_Msk

#define EMAC_MAC2_FLC_Msk (0x2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

FLC (Bitfield-Mask: 0x01)

◆ EMAC_MAC2_FLC_Pos

#define EMAC_MAC2_FLC_Pos (1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

FLC (Bit 1)

◆ EMAC_MAC2_FULLDUPLEX_Msk

#define EMAC_MAC2_FULLDUPLEX_Msk (0x1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

FULLDUPLEX (Bitfield-Mask: 0x01)

◆ EMAC_MAC2_FULLDUPLEX_Pos

#define EMAC_MAC2_FULLDUPLEX_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

FULLDUPLEX (Bit 0)

◆ EMAC_MAC2_HFEN_Msk

#define EMAC_MAC2_HFEN_Msk (0x4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

HFEN (Bitfield-Mask: 0x01)

◆ EMAC_MAC2_HFEN_Pos

#define EMAC_MAC2_HFEN_Pos (2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

HFEN (Bit 2)

◆ EMAC_MAC2_LPENF_Msk

#define EMAC_MAC2_LPENF_Msk (0x200UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

LPENF (Bitfield-Mask: 0x01)

◆ EMAC_MAC2_LPENF_Pos

#define EMAC_MAC2_LPENF_Pos (9UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

LPENF (Bit 9)

◆ EMAC_MAC2_NOBACKOFF_Msk

#define EMAC_MAC2_NOBACKOFF_Msk (0x1000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

NOBACKOFF (Bitfield-Mask: 0x01)

◆ EMAC_MAC2_NOBACKOFF_Pos

#define EMAC_MAC2_NOBACKOFF_Pos (12UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

NOBACKOFF (Bit 12)

◆ EMAC_MAC2_PADCRCEN_Msk

#define EMAC_MAC2_PADCRCEN_Msk (0x20UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PADCRCEN (Bitfield-Mask: 0x01)

◆ EMAC_MAC2_PADCRCEN_Pos

#define EMAC_MAC2_PADCRCEN_Pos (5UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PADCRCEN (Bit 5)

◆ EMAC_MAC2_PPENF_Msk

#define EMAC_MAC2_PPENF_Msk (0x100UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PPENF (Bitfield-Mask: 0x01)

◆ EMAC_MAC2_PPENF_Pos

#define EMAC_MAC2_PPENF_Pos (8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PPENF (Bit 8)

◆ EMAC_MAC2_VLANPADEN_Msk

#define EMAC_MAC2_VLANPADEN_Msk (0x40UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

VLANPADEN (Bitfield-Mask: 0x01)

◆ EMAC_MAC2_VLANPADEN_Pos

#define EMAC_MAC2_VLANPADEN_Pos (6UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

VLANPADEN (Bit 6)

◆ EMAC_MADR_PHYADDR_Msk

#define EMAC_MADR_PHYADDR_Msk (0x1f00UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PHYADDR (Bitfield-Mask: 0x1f)

◆ EMAC_MADR_PHYADDR_Pos

#define EMAC_MADR_PHYADDR_Pos (8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PHYADDR (Bit 8)

◆ EMAC_MADR_REGADDR_Msk

#define EMAC_MADR_REGADDR_Msk (0x1fUL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

REGADDR (Bitfield-Mask: 0x1f)

◆ EMAC_MADR_REGADDR_Pos

#define EMAC_MADR_REGADDR_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

REGADDR (Bit 0)

◆ EMAC_MAXF_MAXFLEN_Msk

#define EMAC_MAXF_MAXFLEN_Msk (0xffffUL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

MAXFLEN (Bitfield-Mask: 0xffff)

◆ EMAC_MAXF_MAXFLEN_Pos

#define EMAC_MAXF_MAXFLEN_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

MAXFLEN (Bit 0)

◆ EMAC_MCFG_CLOCKSEL_Msk

#define EMAC_MCFG_CLOCKSEL_Msk (0x3cUL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CLOCKSEL (Bitfield-Mask: 0x0f)

◆ EMAC_MCFG_CLOCKSEL_Pos

#define EMAC_MCFG_CLOCKSEL_Pos (2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CLOCKSEL (Bit 2)

◆ EMAC_MCFG_RESETMIIMGMT_Msk

#define EMAC_MCFG_RESETMIIMGMT_Msk (0x8000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RESETMIIMGMT (Bitfield-Mask: 0x01)

◆ EMAC_MCFG_RESETMIIMGMT_Pos

#define EMAC_MCFG_RESETMIIMGMT_Pos (15UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RESETMIIMGMT (Bit 15)

◆ EMAC_MCFG_SCANINC_Msk

#define EMAC_MCFG_SCANINC_Msk (0x1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

SCANINC (Bitfield-Mask: 0x01)

◆ EMAC_MCFG_SCANINC_Pos

#define EMAC_MCFG_SCANINC_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

SCANINC (Bit 0)

◆ EMAC_MCFG_SUPPPREAMBLE_Msk

#define EMAC_MCFG_SUPPPREAMBLE_Msk (0x2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

SUPPPREAMBLE (Bitfield-Mask: 0x01)

◆ EMAC_MCFG_SUPPPREAMBLE_Pos

#define EMAC_MCFG_SUPPPREAMBLE_Pos (1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

SUPPPREAMBLE (Bit 1)

◆ EMAC_MCMD_READ_Msk

#define EMAC_MCMD_READ_Msk (0x1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

READ (Bitfield-Mask: 0x01)

◆ EMAC_MCMD_READ_Pos

#define EMAC_MCMD_READ_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

READ (Bit 0)

◆ EMAC_MCMD_SCAN_Msk

#define EMAC_MCMD_SCAN_Msk (0x2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

SCAN (Bitfield-Mask: 0x01)

◆ EMAC_MCMD_SCAN_Pos

#define EMAC_MCMD_SCAN_Pos (1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

SCAN (Bit 1)

◆ EMAC_MIND_BUSY_Msk

#define EMAC_MIND_BUSY_Msk (0x1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

BUSY (Bitfield-Mask: 0x01)

◆ EMAC_MIND_BUSY_Pos

#define EMAC_MIND_BUSY_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

BUSY (Bit 0)

◆ EMAC_MIND_MIILINKFAIL_Msk

#define EMAC_MIND_MIILINKFAIL_Msk (0x8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

MIILINKFAIL (Bitfield-Mask: 0x01)

◆ EMAC_MIND_MIILINKFAIL_Pos

#define EMAC_MIND_MIILINKFAIL_Pos (3UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

MIILINKFAIL (Bit 3)

◆ EMAC_MIND_NOTVALID_Msk

#define EMAC_MIND_NOTVALID_Msk (0x4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

NOTVALID (Bitfield-Mask: 0x01)

◆ EMAC_MIND_NOTVALID_Pos

#define EMAC_MIND_NOTVALID_Pos (2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

NOTVALID (Bit 2)

◆ EMAC_MIND_SCANNING_Msk

#define EMAC_MIND_SCANNING_Msk (0x2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

SCANNING (Bitfield-Mask: 0x01)

◆ EMAC_MIND_SCANNING_Pos

#define EMAC_MIND_SCANNING_Pos (1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

SCANNING (Bit 1)

◆ EMAC_MRDD_READDATA_Msk

#define EMAC_MRDD_READDATA_Msk (0xffffUL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

READDATA (Bitfield-Mask: 0xffff)

◆ EMAC_MRDD_READDATA_Pos

#define EMAC_MRDD_READDATA_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

READDATA (Bit 0)

◆ EMAC_MWTD_WRITEDATA_Msk

#define EMAC_MWTD_WRITEDATA_Msk (0xffffUL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

WRITEDATA (Bitfield-Mask: 0xffff)

◆ EMAC_MWTD_WRITEDATA_Pos

#define EMAC_MWTD_WRITEDATA_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

WRITEDATA (Bit 0)

◆ EMAC_POWERDOWN_PD_Msk

#define EMAC_POWERDOWN_PD_Msk (0x80000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PD (Bitfield-Mask: 0x01)

◆ EMAC_POWERDOWN_PD_Pos

#define EMAC_POWERDOWN_PD_Pos (31UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PD (Bit 31)

◆ EMAC_RSV_BROADCAST_Msk

#define EMAC_RSV_BROADCAST_Msk (0x2000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

BROADCAST (Bitfield-Mask: 0x01)

◆ EMAC_RSV_BROADCAST_Pos

#define EMAC_RSV_BROADCAST_Pos (25UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

BROADCAST (Bit 25)

◆ EMAC_RSV_CESEEN_Msk

#define EMAC_RSV_CESEEN_Msk (0x40000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CESEEN (Bitfield-Mask: 0x01)

◆ EMAC_RSV_CESEEN_Pos

#define EMAC_RSV_CESEEN_Pos (18UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CESEEN (Bit 18)

◆ EMAC_RSV_CONTROLFRAME_Msk

#define EMAC_RSV_CONTROLFRAME_Msk (0x8000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CONTROLFRAME (Bitfield-Mask: 0x01)

◆ EMAC_RSV_CONTROLFRAME_Pos

#define EMAC_RSV_CONTROLFRAME_Pos (27UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CONTROLFRAME (Bit 27)

◆ EMAC_RSV_CRCERR_Msk

#define EMAC_RSV_CRCERR_Msk (0x100000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CRCERR (Bitfield-Mask: 0x01)

◆ EMAC_RSV_CRCERR_Pos

#define EMAC_RSV_CRCERR_Pos (20UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CRCERR (Bit 20)

◆ EMAC_RSV_DRIBBLENIBBLE_Msk

#define EMAC_RSV_DRIBBLENIBBLE_Msk (0x4000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DRIBBLENIBBLE (Bitfield-Mask: 0x01)

◆ EMAC_RSV_DRIBBLENIBBLE_Pos

#define EMAC_RSV_DRIBBLENIBBLE_Pos (26UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DRIBBLENIBBLE (Bit 26)

◆ EMAC_RSV_LCERR_Msk

#define EMAC_RSV_LCERR_Msk (0x200000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

LCERR (Bitfield-Mask: 0x01)

◆ EMAC_RSV_LCERR_Pos

#define EMAC_RSV_LCERR_Pos (21UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

LCERR (Bit 21)

◆ EMAC_RSV_LOR_Msk

#define EMAC_RSV_LOR_Msk (0x400000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

LOR (Bitfield-Mask: 0x01)

◆ EMAC_RSV_LOR_Pos

#define EMAC_RSV_LOR_Pos (22UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

LOR (Bit 22)

◆ EMAC_RSV_MULTICAST_Msk

#define EMAC_RSV_MULTICAST_Msk (0x1000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

MULTICAST (Bitfield-Mask: 0x01)

◆ EMAC_RSV_MULTICAST_Pos

#define EMAC_RSV_MULTICAST_Pos (24UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

MULTICAST (Bit 24)

◆ EMAC_RSV_PAUSE_Msk

#define EMAC_RSV_PAUSE_Msk (0x10000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PAUSE (Bitfield-Mask: 0x01)

◆ EMAC_RSV_PAUSE_Pos

#define EMAC_RSV_PAUSE_Pos (28UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PAUSE (Bit 28)

◆ EMAC_RSV_PPI_Msk

#define EMAC_RSV_PPI_Msk (0x10000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PPI (Bitfield-Mask: 0x01)

◆ EMAC_RSV_PPI_Pos

#define EMAC_RSV_PPI_Pos (16UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PPI (Bit 16)

◆ EMAC_RSV_RBC_Msk

#define EMAC_RSV_RBC_Msk (0xffffUL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RBC (Bitfield-Mask: 0xffff)

◆ EMAC_RSV_RBC_Pos

#define EMAC_RSV_RBC_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RBC (Bit 0)

◆ EMAC_RSV_RCV_Msk

#define EMAC_RSV_RCV_Msk (0x80000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RCV (Bitfield-Mask: 0x01)

◆ EMAC_RSV_RCV_Pos

#define EMAC_RSV_RCV_Pos (19UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RCV (Bit 19)

◆ EMAC_RSV_ROK_Msk

#define EMAC_RSV_ROK_Msk (0x800000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

ROK (Bitfield-Mask: 0x01)

◆ EMAC_RSV_ROK_Pos

#define EMAC_RSV_ROK_Pos (23UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

ROK (Bit 23)

◆ EMAC_RSV_RXDVSEEN_Msk

#define EMAC_RSV_RXDVSEEN_Msk (0x20000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RXDVSEEN (Bitfield-Mask: 0x01)

◆ EMAC_RSV_RXDVSEEN_Pos

#define EMAC_RSV_RXDVSEEN_Pos (17UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RXDVSEEN (Bit 17)

◆ EMAC_RSV_UO_Msk

#define EMAC_RSV_UO_Msk (0x20000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

UO (Bitfield-Mask: 0x01)

◆ EMAC_RSV_UO_Pos

#define EMAC_RSV_UO_Pos (29UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

UO (Bit 29)

◆ EMAC_RSV_VLAN_Msk

#define EMAC_RSV_VLAN_Msk (0x40000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

VLAN (Bitfield-Mask: 0x01)

◆ EMAC_RSV_VLAN_Pos

#define EMAC_RSV_VLAN_Pos (30UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

VLAN (Bit 30)

◆ EMAC_RXCONSUMEINDEX_RXCONSUMEIX_Msk

#define EMAC_RXCONSUMEINDEX_RXCONSUMEIX_Msk (0xffffUL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RXCONSUMEIX (Bitfield-Mask: 0xffff)

◆ EMAC_RXCONSUMEINDEX_RXCONSUMEIX_Pos

#define EMAC_RXCONSUMEINDEX_RXCONSUMEIX_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RXCONSUMEIX (Bit 0)

◆ EMAC_RXDESCRIPTOR_RXDESCRIPTOR_Msk

#define EMAC_RXDESCRIPTOR_RXDESCRIPTOR_Msk (0xfffffffcUL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RXDESCRIPTOR (Bitfield-Mask: 0x3fffffff)

◆ EMAC_RXDESCRIPTOR_RXDESCRIPTOR_Pos

#define EMAC_RXDESCRIPTOR_RXDESCRIPTOR_Pos (2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RXDESCRIPTOR (Bit 2)

◆ EMAC_RXDESCRIPTORNUMBER_RXDESCRIPTORN_Msk

#define EMAC_RXDESCRIPTORNUMBER_RXDESCRIPTORN_Msk (0xffffUL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RXDESCRIPTORN (Bitfield-Mask: 0xffff)

◆ EMAC_RXDESCRIPTORNUMBER_RXDESCRIPTORN_Pos

#define EMAC_RXDESCRIPTORNUMBER_RXDESCRIPTORN_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RXDESCRIPTORN (Bit 0)

◆ EMAC_RXFILTERCTRL_ABE_Msk

#define EMAC_RXFILTERCTRL_ABE_Msk (0x2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

ABE (Bitfield-Mask: 0x01)

◆ EMAC_RXFILTERCTRL_ABE_Pos

#define EMAC_RXFILTERCTRL_ABE_Pos (1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

ABE (Bit 1)

◆ EMAC_RXFILTERCTRL_AME_Msk

#define EMAC_RXFILTERCTRL_AME_Msk (0x4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

AME (Bitfield-Mask: 0x01)

◆ EMAC_RXFILTERCTRL_AME_Pos

#define EMAC_RXFILTERCTRL_AME_Pos (2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

AME (Bit 2)

◆ EMAC_RXFILTERCTRL_AMHE_Msk

#define EMAC_RXFILTERCTRL_AMHE_Msk (0x10UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

AMHE (Bitfield-Mask: 0x01)

◆ EMAC_RXFILTERCTRL_AMHE_Pos

#define EMAC_RXFILTERCTRL_AMHE_Pos (4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

AMHE (Bit 4)

◆ EMAC_RXFILTERCTRL_APE_Msk

#define EMAC_RXFILTERCTRL_APE_Msk (0x20UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

APE (Bitfield-Mask: 0x01)

◆ EMAC_RXFILTERCTRL_APE_Pos

#define EMAC_RXFILTERCTRL_APE_Pos (5UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

APE (Bit 5)

◆ EMAC_RXFILTERCTRL_AUE_Msk

#define EMAC_RXFILTERCTRL_AUE_Msk (0x1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

AUE (Bitfield-Mask: 0x01)

◆ EMAC_RXFILTERCTRL_AUE_Pos

#define EMAC_RXFILTERCTRL_AUE_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

AUE (Bit 0)

◆ EMAC_RXFILTERCTRL_AUHE_Msk

#define EMAC_RXFILTERCTRL_AUHE_Msk (0x8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

AUHE (Bitfield-Mask: 0x01)

◆ EMAC_RXFILTERCTRL_AUHE_Pos

#define EMAC_RXFILTERCTRL_AUHE_Pos (3UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

AUHE (Bit 3)

◆ EMAC_RXFILTERCTRL_MPEW_Msk

#define EMAC_RXFILTERCTRL_MPEW_Msk (0x1000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

MPEW (Bitfield-Mask: 0x01)

◆ EMAC_RXFILTERCTRL_MPEW_Pos

#define EMAC_RXFILTERCTRL_MPEW_Pos (12UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

MPEW (Bit 12)

◆ EMAC_RXFILTERCTRL_RFEW_Msk

#define EMAC_RXFILTERCTRL_RFEW_Msk (0x2000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RFEW (Bitfield-Mask: 0x01)

◆ EMAC_RXFILTERCTRL_RFEW_Pos

#define EMAC_RXFILTERCTRL_RFEW_Pos (13UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RFEW (Bit 13)

◆ EMAC_RXFILTERWOLCLEAR_ABWCLR_Msk

#define EMAC_RXFILTERWOLCLEAR_ABWCLR_Msk (0x2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

ABWCLR (Bitfield-Mask: 0x01)

◆ EMAC_RXFILTERWOLCLEAR_ABWCLR_Pos

#define EMAC_RXFILTERWOLCLEAR_ABWCLR_Pos (1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

ABWCLR (Bit 1)

◆ EMAC_RXFILTERWOLCLEAR_AMHWCLR_Msk

#define EMAC_RXFILTERWOLCLEAR_AMHWCLR_Msk (0x10UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

AMHWCLR (Bitfield-Mask: 0x01)

◆ EMAC_RXFILTERWOLCLEAR_AMHWCLR_Pos

#define EMAC_RXFILTERWOLCLEAR_AMHWCLR_Pos (4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

AMHWCLR (Bit 4)

◆ EMAC_RXFILTERWOLCLEAR_AMWCLR_Msk

#define EMAC_RXFILTERWOLCLEAR_AMWCLR_Msk (0x4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

AMWCLR (Bitfield-Mask: 0x01)

◆ EMAC_RXFILTERWOLCLEAR_AMWCLR_Pos

#define EMAC_RXFILTERWOLCLEAR_AMWCLR_Pos (2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

AMWCLR (Bit 2)

◆ EMAC_RXFILTERWOLCLEAR_APWCLR_Msk

#define EMAC_RXFILTERWOLCLEAR_APWCLR_Msk (0x20UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

APWCLR (Bitfield-Mask: 0x01)

◆ EMAC_RXFILTERWOLCLEAR_APWCLR_Pos

#define EMAC_RXFILTERWOLCLEAR_APWCLR_Pos (5UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

APWCLR (Bit 5)

◆ EMAC_RXFILTERWOLCLEAR_AUHWCLR_Msk

#define EMAC_RXFILTERWOLCLEAR_AUHWCLR_Msk (0x8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

AUHWCLR (Bitfield-Mask: 0x01)

◆ EMAC_RXFILTERWOLCLEAR_AUHWCLR_Pos

#define EMAC_RXFILTERWOLCLEAR_AUHWCLR_Pos (3UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

AUHWCLR (Bit 3)

◆ EMAC_RXFILTERWOLCLEAR_AUWCLR_Msk

#define EMAC_RXFILTERWOLCLEAR_AUWCLR_Msk (0x1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

AUWCLR (Bitfield-Mask: 0x01)

◆ EMAC_RXFILTERWOLCLEAR_AUWCLR_Pos

#define EMAC_RXFILTERWOLCLEAR_AUWCLR_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

AUWCLR (Bit 0)

◆ EMAC_RXFILTERWOLCLEAR_MPWCLR_Msk

#define EMAC_RXFILTERWOLCLEAR_MPWCLR_Msk (0x100UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

MPWCLR (Bitfield-Mask: 0x01)

◆ EMAC_RXFILTERWOLCLEAR_MPWCLR_Pos

#define EMAC_RXFILTERWOLCLEAR_MPWCLR_Pos (8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

MPWCLR (Bit 8)

◆ EMAC_RXFILTERWOLCLEAR_RFWCLR_Msk

#define EMAC_RXFILTERWOLCLEAR_RFWCLR_Msk (0x80UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RFWCLR (Bitfield-Mask: 0x01)

◆ EMAC_RXFILTERWOLCLEAR_RFWCLR_Pos

#define EMAC_RXFILTERWOLCLEAR_RFWCLR_Pos (7UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RFWCLR (Bit 7)

◆ EMAC_RXFILTERWOLSTATUS_ABW_Msk

#define EMAC_RXFILTERWOLSTATUS_ABW_Msk (0x2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

ABW (Bitfield-Mask: 0x01)

◆ EMAC_RXFILTERWOLSTATUS_ABW_Pos

#define EMAC_RXFILTERWOLSTATUS_ABW_Pos (1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

ABW (Bit 1)

◆ EMAC_RXFILTERWOLSTATUS_AMHW_Msk

#define EMAC_RXFILTERWOLSTATUS_AMHW_Msk (0x10UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

AMHW (Bitfield-Mask: 0x01)

◆ EMAC_RXFILTERWOLSTATUS_AMHW_Pos

#define EMAC_RXFILTERWOLSTATUS_AMHW_Pos (4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

AMHW (Bit 4)

◆ EMAC_RXFILTERWOLSTATUS_AMW_Msk

#define EMAC_RXFILTERWOLSTATUS_AMW_Msk (0x4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

AMW (Bitfield-Mask: 0x01)

◆ EMAC_RXFILTERWOLSTATUS_AMW_Pos

#define EMAC_RXFILTERWOLSTATUS_AMW_Pos (2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

AMW (Bit 2)

◆ EMAC_RXFILTERWOLSTATUS_APW_Msk

#define EMAC_RXFILTERWOLSTATUS_APW_Msk (0x20UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

APW (Bitfield-Mask: 0x01)

◆ EMAC_RXFILTERWOLSTATUS_APW_Pos

#define EMAC_RXFILTERWOLSTATUS_APW_Pos (5UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

APW (Bit 5)

◆ EMAC_RXFILTERWOLSTATUS_AUHW_Msk

#define EMAC_RXFILTERWOLSTATUS_AUHW_Msk (0x8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

AUHW (Bitfield-Mask: 0x01)

◆ EMAC_RXFILTERWOLSTATUS_AUHW_Pos

#define EMAC_RXFILTERWOLSTATUS_AUHW_Pos (3UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

AUHW (Bit 3)

◆ EMAC_RXFILTERWOLSTATUS_AUW_Msk

#define EMAC_RXFILTERWOLSTATUS_AUW_Msk (0x1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

AUW (Bitfield-Mask: 0x01)

◆ EMAC_RXFILTERWOLSTATUS_AUW_Pos

#define EMAC_RXFILTERWOLSTATUS_AUW_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

AUW (Bit 0)

◆ EMAC_RXFILTERWOLSTATUS_MPW_Msk

#define EMAC_RXFILTERWOLSTATUS_MPW_Msk (0x100UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

MPW (Bitfield-Mask: 0x01)

◆ EMAC_RXFILTERWOLSTATUS_MPW_Pos

#define EMAC_RXFILTERWOLSTATUS_MPW_Pos (8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

MPW (Bit 8)

◆ EMAC_RXFILTERWOLSTATUS_RFW_Msk

#define EMAC_RXFILTERWOLSTATUS_RFW_Msk (0x80UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RFW (Bitfield-Mask: 0x01)

◆ EMAC_RXFILTERWOLSTATUS_RFW_Pos

#define EMAC_RXFILTERWOLSTATUS_RFW_Pos (7UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RFW (Bit 7)

◆ EMAC_RXPRODUCEINDEX_RXPRODUCEIX_Msk

#define EMAC_RXPRODUCEINDEX_RXPRODUCEIX_Msk (0xffffUL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RXPRODUCEIX (Bitfield-Mask: 0xffff)

◆ EMAC_RXPRODUCEINDEX_RXPRODUCEIX_Pos

#define EMAC_RXPRODUCEINDEX_RXPRODUCEIX_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RXPRODUCEIX (Bit 0)

◆ EMAC_RXSTATUS_RXSTATUS_Msk

#define EMAC_RXSTATUS_RXSTATUS_Msk (0xfffffff8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RXSTATUS (Bitfield-Mask: 0x1fffffff)

◆ EMAC_RXSTATUS_RXSTATUS_Pos

#define EMAC_RXSTATUS_RXSTATUS_Pos (3UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RXSTATUS (Bit 3)

◆ EMAC_SA0_SADDR1_Msk

#define EMAC_SA0_SADDR1_Msk (0xff00UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

SADDR1 (Bitfield-Mask: 0xff)

◆ EMAC_SA0_SADDR1_Pos

#define EMAC_SA0_SADDR1_Pos (8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

SADDR1 (Bit 8)

◆ EMAC_SA0_SADDR2_Msk

#define EMAC_SA0_SADDR2_Msk (0xffUL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

SADDR2 (Bitfield-Mask: 0xff)

◆ EMAC_SA0_SADDR2_Pos

#define EMAC_SA0_SADDR2_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

SADDR2 (Bit 0)

◆ EMAC_SA1_SADDR3_Msk

#define EMAC_SA1_SADDR3_Msk (0xff00UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

SADDR3 (Bitfield-Mask: 0xff)

◆ EMAC_SA1_SADDR3_Pos

#define EMAC_SA1_SADDR3_Pos (8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

SADDR3 (Bit 8)

◆ EMAC_SA1_SADDR4_Msk

#define EMAC_SA1_SADDR4_Msk (0xffUL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

SADDR4 (Bitfield-Mask: 0xff)

◆ EMAC_SA1_SADDR4_Pos

#define EMAC_SA1_SADDR4_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

SADDR4 (Bit 0)

◆ EMAC_SA2_SADDR5_Msk

#define EMAC_SA2_SADDR5_Msk (0xff00UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

SADDR5 (Bitfield-Mask: 0xff)

◆ EMAC_SA2_SADDR5_Pos

#define EMAC_SA2_SADDR5_Pos (8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

SADDR5 (Bit 8)

◆ EMAC_SA2_SADDR6_Msk

#define EMAC_SA2_SADDR6_Msk (0xffUL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

SADDR6 (Bitfield-Mask: 0xff)

◆ EMAC_SA2_SADDR6_Pos

#define EMAC_SA2_SADDR6_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

SADDR6 (Bit 0)

◆ EMAC_STATUS_RXSTATUS_Msk

#define EMAC_STATUS_RXSTATUS_Msk (0x1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RXSTATUS (Bitfield-Mask: 0x01)

◆ EMAC_STATUS_RXSTATUS_Pos

#define EMAC_STATUS_RXSTATUS_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RXSTATUS (Bit 0)

◆ EMAC_STATUS_TXSTATUS_Msk

#define EMAC_STATUS_TXSTATUS_Msk (0x2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TXSTATUS (Bitfield-Mask: 0x01)

◆ EMAC_STATUS_TXSTATUS_Pos

#define EMAC_STATUS_TXSTATUS_Pos (1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TXSTATUS (Bit 1)

◆ EMAC_SUPP_SPEED_Msk

#define EMAC_SUPP_SPEED_Msk (0x100UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

SPEED (Bitfield-Mask: 0x01)

◆ EMAC_SUPP_SPEED_Pos

#define EMAC_SUPP_SPEED_Pos (8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

SPEED (Bit 8)

◆ EMAC_TEST_SCPQ_Msk

#define EMAC_TEST_SCPQ_Msk (0x1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

SCPQ (Bitfield-Mask: 0x01)

◆ EMAC_TEST_SCPQ_Pos

#define EMAC_TEST_SCPQ_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

SCPQ (Bit 0)

◆ EMAC_TEST_TESTBP_Msk

#define EMAC_TEST_TESTBP_Msk (0x4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TESTBP (Bitfield-Mask: 0x01)

◆ EMAC_TEST_TESTBP_Pos

#define EMAC_TEST_TESTBP_Pos (2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TESTBP (Bit 2)

◆ EMAC_TEST_TESTPAUSE_Msk

#define EMAC_TEST_TESTPAUSE_Msk (0x2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TESTPAUSE (Bitfield-Mask: 0x01)

◆ EMAC_TEST_TESTPAUSE_Pos

#define EMAC_TEST_TESTPAUSE_Pos (1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TESTPAUSE (Bit 1)

◆ EMAC_TSV0_BACKPRESSURE_Msk

#define EMAC_TSV0_BACKPRESSURE_Msk (0x40000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

BACKPRESSURE (Bitfield-Mask: 0x01)

◆ EMAC_TSV0_BACKPRESSURE_Pos

#define EMAC_TSV0_BACKPRESSURE_Pos (30UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

BACKPRESSURE (Bit 30)

◆ EMAC_TSV0_BROADCAST_Msk

#define EMAC_TSV0_BROADCAST_Msk (0x20UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

BROADCAST (Bitfield-Mask: 0x01)

◆ EMAC_TSV0_BROADCAST_Pos

#define EMAC_TSV0_BROADCAST_Pos (5UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

BROADCAST (Bit 5)

◆ EMAC_TSV0_CONTROLFRAME_Msk

#define EMAC_TSV0_CONTROLFRAME_Msk (0x10000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CONTROLFRAME (Bitfield-Mask: 0x01)

◆ EMAC_TSV0_CONTROLFRAME_Pos

#define EMAC_TSV0_CONTROLFRAME_Pos (28UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CONTROLFRAME (Bit 28)

◆ EMAC_TSV0_CRCERR_Msk

#define EMAC_TSV0_CRCERR_Msk (0x1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CRCERR (Bitfield-Mask: 0x01)

◆ EMAC_TSV0_CRCERR_Pos

#define EMAC_TSV0_CRCERR_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CRCERR (Bit 0)

◆ EMAC_TSV0_DONE_Msk

#define EMAC_TSV0_DONE_Msk (0x8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DONE (Bitfield-Mask: 0x01)

◆ EMAC_TSV0_DONE_Pos

#define EMAC_TSV0_DONE_Pos (3UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DONE (Bit 3)

◆ EMAC_TSV0_EXCOL_Msk

#define EMAC_TSV0_EXCOL_Msk (0x100UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EXCOL (Bitfield-Mask: 0x01)

◆ EMAC_TSV0_EXCOL_Pos

#define EMAC_TSV0_EXCOL_Pos (8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EXCOL (Bit 8)

◆ EMAC_TSV0_EXDF_Msk

#define EMAC_TSV0_EXDF_Msk (0x80UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EXDF (Bitfield-Mask: 0x01)

◆ EMAC_TSV0_EXDF_Pos

#define EMAC_TSV0_EXDF_Pos (7UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EXDF (Bit 7)

◆ EMAC_TSV0_GIANT_Msk

#define EMAC_TSV0_GIANT_Msk (0x400UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

GIANT (Bitfield-Mask: 0x01)

◆ EMAC_TSV0_GIANT_Pos

#define EMAC_TSV0_GIANT_Pos (10UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

GIANT (Bit 10)

◆ EMAC_TSV0_LCE_Msk

#define EMAC_TSV0_LCE_Msk (0x2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

LCE (Bitfield-Mask: 0x01)

◆ EMAC_TSV0_LCE_Pos

#define EMAC_TSV0_LCE_Pos (1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

LCE (Bit 1)

◆ EMAC_TSV0_LCOL_Msk

#define EMAC_TSV0_LCOL_Msk (0x200UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

LCOL (Bitfield-Mask: 0x01)

◆ EMAC_TSV0_LCOL_Pos

#define EMAC_TSV0_LCOL_Pos (9UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

LCOL (Bit 9)

◆ EMAC_TSV0_LOR_Msk

#define EMAC_TSV0_LOR_Msk (0x4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

LOR (Bitfield-Mask: 0x01)

◆ EMAC_TSV0_LOR_Pos

#define EMAC_TSV0_LOR_Pos (2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

LOR (Bit 2)

◆ EMAC_TSV0_MULTICAST_Msk

#define EMAC_TSV0_MULTICAST_Msk (0x10UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

MULTICAST (Bitfield-Mask: 0x01)

◆ EMAC_TSV0_MULTICAST_Pos

#define EMAC_TSV0_MULTICAST_Pos (4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

MULTICAST (Bit 4)

◆ EMAC_TSV0_PACKETDEFER_Msk

#define EMAC_TSV0_PACKETDEFER_Msk (0x40UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PACKETDEFER (Bitfield-Mask: 0x01)

◆ EMAC_TSV0_PACKETDEFER_Pos

#define EMAC_TSV0_PACKETDEFER_Pos (6UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PACKETDEFER (Bit 6)

◆ EMAC_TSV0_PAUSE_Msk

#define EMAC_TSV0_PAUSE_Msk (0x20000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PAUSE (Bitfield-Mask: 0x01)

◆ EMAC_TSV0_PAUSE_Pos

#define EMAC_TSV0_PAUSE_Pos (29UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PAUSE (Bit 29)

◆ EMAC_TSV0_TOTALBYTES_Msk

#define EMAC_TSV0_TOTALBYTES_Msk (0xffff000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TOTALBYTES (Bitfield-Mask: 0xffff)

◆ EMAC_TSV0_TOTALBYTES_Pos

#define EMAC_TSV0_TOTALBYTES_Pos (12UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TOTALBYTES (Bit 12)

◆ EMAC_TSV0_UNDERRUN_Msk

#define EMAC_TSV0_UNDERRUN_Msk (0x800UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

UNDERRUN (Bitfield-Mask: 0x01)

◆ EMAC_TSV0_UNDERRUN_Pos

#define EMAC_TSV0_UNDERRUN_Pos (11UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

UNDERRUN (Bit 11)

◆ EMAC_TSV0_VLAN_Msk

#define EMAC_TSV0_VLAN_Msk (0x80000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

VLAN (Bitfield-Mask: 0x01)

◆ EMAC_TSV0_VLAN_Pos

#define EMAC_TSV0_VLAN_Pos (31UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

VLAN (Bit 31)

◆ EMAC_TSV1_TBC_Msk

#define EMAC_TSV1_TBC_Msk (0xffffUL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TBC (Bitfield-Mask: 0xffff)

◆ EMAC_TSV1_TBC_Pos

#define EMAC_TSV1_TBC_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TBC (Bit 0)

◆ EMAC_TSV1_TCC_Msk

#define EMAC_TSV1_TCC_Msk (0xf0000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TCC (Bitfield-Mask: 0x0f)

◆ EMAC_TSV1_TCC_Pos

#define EMAC_TSV1_TCC_Pos (16UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TCC (Bit 16)

◆ EMAC_TXCONSUMEINDEX_TXCI_Msk

#define EMAC_TXCONSUMEINDEX_TXCI_Msk (0xffffUL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TXCI (Bitfield-Mask: 0xffff)

◆ EMAC_TXCONSUMEINDEX_TXCI_Pos

#define EMAC_TXCONSUMEINDEX_TXCI_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TXCI (Bit 0)

◆ EMAC_TXDESCRIPTOR_TXD_Msk

#define EMAC_TXDESCRIPTOR_TXD_Msk (0xfffffffcUL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TXD (Bitfield-Mask: 0x3fffffff)

◆ EMAC_TXDESCRIPTOR_TXD_Pos

#define EMAC_TXDESCRIPTOR_TXD_Pos (2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TXD (Bit 2)

◆ EMAC_TXDESCRIPTORNUMBER_TXDN_Msk

#define EMAC_TXDESCRIPTORNUMBER_TXDN_Msk (0xffffUL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TXDN (Bitfield-Mask: 0xffff)

◆ EMAC_TXDESCRIPTORNUMBER_TXDN_Pos

#define EMAC_TXDESCRIPTORNUMBER_TXDN_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TXDN (Bit 0)

◆ EMAC_TXPRODUCEINDEX_TXPI_Msk

#define EMAC_TXPRODUCEINDEX_TXPI_Msk (0xffffUL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TXPI (Bitfield-Mask: 0xffff)

◆ EMAC_TXPRODUCEINDEX_TXPI_Pos

#define EMAC_TXPRODUCEINDEX_TXPI_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TXPI (Bit 0)

◆ EMAC_TXSTATUS_TXSTAT_Msk

#define EMAC_TXSTATUS_TXSTAT_Msk (0xfffffffcUL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TXSTAT (Bitfield-Mask: 0x3fffffff)

◆ EMAC_TXSTATUS_TXSTAT_Pos

#define EMAC_TXSTATUS_TXSTAT_Pos (2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TXSTAT (Bit 2)

◆ GPDMA_CONFIG0_A_Msk

#define GPDMA_CONFIG0_A_Msk (0x20000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

A (Bitfield-Mask: 0x01)

◆ GPDMA_CONFIG0_A_Pos

#define GPDMA_CONFIG0_A_Pos (17UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

A (Bit 17)

◆ GPDMA_CONFIG0_DESTPERIPHERAL_Msk

#define GPDMA_CONFIG0_DESTPERIPHERAL_Msk (0x7c0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DESTPERIPHERAL (Bitfield-Mask: 0x1f)

◆ GPDMA_CONFIG0_DESTPERIPHERAL_Pos

#define GPDMA_CONFIG0_DESTPERIPHERAL_Pos (6UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DESTPERIPHERAL (Bit 6)

◆ GPDMA_CONFIG0_E_Msk

#define GPDMA_CONFIG0_E_Msk (0x1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

E (Bitfield-Mask: 0x01)

◆ GPDMA_CONFIG0_E_Pos

#define GPDMA_CONFIG0_E_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

E (Bit 0)

◆ GPDMA_CONFIG0_H_Msk

#define GPDMA_CONFIG0_H_Msk (0x40000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

H (Bitfield-Mask: 0x01)

◆ GPDMA_CONFIG0_H_Pos

#define GPDMA_CONFIG0_H_Pos (18UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

H (Bit 18)

◆ GPDMA_CONFIG0_IE_Msk

#define GPDMA_CONFIG0_IE_Msk (0x4000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

IE (Bitfield-Mask: 0x01)

◆ GPDMA_CONFIG0_IE_Pos

#define GPDMA_CONFIG0_IE_Pos (14UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

IE (Bit 14)

◆ GPDMA_CONFIG0_ITC_Msk

#define GPDMA_CONFIG0_ITC_Msk (0x8000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

ITC (Bitfield-Mask: 0x01)

◆ GPDMA_CONFIG0_ITC_Pos

#define GPDMA_CONFIG0_ITC_Pos (15UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

ITC (Bit 15)

◆ GPDMA_CONFIG0_L_Msk

#define GPDMA_CONFIG0_L_Msk (0x10000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

L (Bitfield-Mask: 0x01)

◆ GPDMA_CONFIG0_L_Pos

#define GPDMA_CONFIG0_L_Pos (16UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

L (Bit 16)

◆ GPDMA_CONFIG0_SRCPERIPHERAL_Msk

#define GPDMA_CONFIG0_SRCPERIPHERAL_Msk (0x3eUL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

SRCPERIPHERAL (Bitfield-Mask: 0x1f)

◆ GPDMA_CONFIG0_SRCPERIPHERAL_Pos

#define GPDMA_CONFIG0_SRCPERIPHERAL_Pos (1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

SRCPERIPHERAL (Bit 1)

◆ GPDMA_CONFIG0_TRANSFERTYPE_Msk

#define GPDMA_CONFIG0_TRANSFERTYPE_Msk (0x3800UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TRANSFERTYPE (Bitfield-Mask: 0x07)

◆ GPDMA_CONFIG0_TRANSFERTYPE_Pos

#define GPDMA_CONFIG0_TRANSFERTYPE_Pos (11UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TRANSFERTYPE (Bit 11)

◆ GPDMA_CONFIG1_A_Msk

#define GPDMA_CONFIG1_A_Msk (0x20000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

A (Bitfield-Mask: 0x01)

◆ GPDMA_CONFIG1_A_Pos

#define GPDMA_CONFIG1_A_Pos (17UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

A (Bit 17)

◆ GPDMA_CONFIG1_DESTPERIPHERAL_Msk

#define GPDMA_CONFIG1_DESTPERIPHERAL_Msk (0x7c0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DESTPERIPHERAL (Bitfield-Mask: 0x1f)

◆ GPDMA_CONFIG1_DESTPERIPHERAL_Pos

#define GPDMA_CONFIG1_DESTPERIPHERAL_Pos (6UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DESTPERIPHERAL (Bit 6)

◆ GPDMA_CONFIG1_E_Msk

#define GPDMA_CONFIG1_E_Msk (0x1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

E (Bitfield-Mask: 0x01)

◆ GPDMA_CONFIG1_E_Pos

#define GPDMA_CONFIG1_E_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

E (Bit 0)

◆ GPDMA_CONFIG1_H_Msk

#define GPDMA_CONFIG1_H_Msk (0x40000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

H (Bitfield-Mask: 0x01)

◆ GPDMA_CONFIG1_H_Pos

#define GPDMA_CONFIG1_H_Pos (18UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

H (Bit 18)

◆ GPDMA_CONFIG1_IE_Msk

#define GPDMA_CONFIG1_IE_Msk (0x4000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

IE (Bitfield-Mask: 0x01)

◆ GPDMA_CONFIG1_IE_Pos

#define GPDMA_CONFIG1_IE_Pos (14UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

IE (Bit 14)

◆ GPDMA_CONFIG1_ITC_Msk

#define GPDMA_CONFIG1_ITC_Msk (0x8000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

ITC (Bitfield-Mask: 0x01)

◆ GPDMA_CONFIG1_ITC_Pos

#define GPDMA_CONFIG1_ITC_Pos (15UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

ITC (Bit 15)

◆ GPDMA_CONFIG1_L_Msk

#define GPDMA_CONFIG1_L_Msk (0x10000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

L (Bitfield-Mask: 0x01)

◆ GPDMA_CONFIG1_L_Pos

#define GPDMA_CONFIG1_L_Pos (16UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

L (Bit 16)

◆ GPDMA_CONFIG1_SRCPERIPHERAL_Msk

#define GPDMA_CONFIG1_SRCPERIPHERAL_Msk (0x3eUL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

SRCPERIPHERAL (Bitfield-Mask: 0x1f)

◆ GPDMA_CONFIG1_SRCPERIPHERAL_Pos

#define GPDMA_CONFIG1_SRCPERIPHERAL_Pos (1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

SRCPERIPHERAL (Bit 1)

◆ GPDMA_CONFIG1_TRANSFERTYPE_Msk

#define GPDMA_CONFIG1_TRANSFERTYPE_Msk (0x3800UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TRANSFERTYPE (Bitfield-Mask: 0x07)

◆ GPDMA_CONFIG1_TRANSFERTYPE_Pos

#define GPDMA_CONFIG1_TRANSFERTYPE_Pos (11UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TRANSFERTYPE (Bit 11)

◆ GPDMA_CONFIG2_A_Msk

#define GPDMA_CONFIG2_A_Msk (0x20000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

A (Bitfield-Mask: 0x01)

◆ GPDMA_CONFIG2_A_Pos

#define GPDMA_CONFIG2_A_Pos (17UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

A (Bit 17)

◆ GPDMA_CONFIG2_DESTPERIPHERAL_Msk

#define GPDMA_CONFIG2_DESTPERIPHERAL_Msk (0x7c0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DESTPERIPHERAL (Bitfield-Mask: 0x1f)

◆ GPDMA_CONFIG2_DESTPERIPHERAL_Pos

#define GPDMA_CONFIG2_DESTPERIPHERAL_Pos (6UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DESTPERIPHERAL (Bit 6)

◆ GPDMA_CONFIG2_E_Msk

#define GPDMA_CONFIG2_E_Msk (0x1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

E (Bitfield-Mask: 0x01)

◆ GPDMA_CONFIG2_E_Pos

#define GPDMA_CONFIG2_E_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

E (Bit 0)

◆ GPDMA_CONFIG2_H_Msk

#define GPDMA_CONFIG2_H_Msk (0x40000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

H (Bitfield-Mask: 0x01)

◆ GPDMA_CONFIG2_H_Pos

#define GPDMA_CONFIG2_H_Pos (18UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

H (Bit 18)

◆ GPDMA_CONFIG2_IE_Msk

#define GPDMA_CONFIG2_IE_Msk (0x4000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

IE (Bitfield-Mask: 0x01)

◆ GPDMA_CONFIG2_IE_Pos

#define GPDMA_CONFIG2_IE_Pos (14UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

IE (Bit 14)

◆ GPDMA_CONFIG2_ITC_Msk

#define GPDMA_CONFIG2_ITC_Msk (0x8000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

ITC (Bitfield-Mask: 0x01)

◆ GPDMA_CONFIG2_ITC_Pos

#define GPDMA_CONFIG2_ITC_Pos (15UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

ITC (Bit 15)

◆ GPDMA_CONFIG2_L_Msk

#define GPDMA_CONFIG2_L_Msk (0x10000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

L (Bitfield-Mask: 0x01)

◆ GPDMA_CONFIG2_L_Pos

#define GPDMA_CONFIG2_L_Pos (16UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

L (Bit 16)

◆ GPDMA_CONFIG2_SRCPERIPHERAL_Msk

#define GPDMA_CONFIG2_SRCPERIPHERAL_Msk (0x3eUL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

SRCPERIPHERAL (Bitfield-Mask: 0x1f)

◆ GPDMA_CONFIG2_SRCPERIPHERAL_Pos

#define GPDMA_CONFIG2_SRCPERIPHERAL_Pos (1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

SRCPERIPHERAL (Bit 1)

◆ GPDMA_CONFIG2_TRANSFERTYPE_Msk

#define GPDMA_CONFIG2_TRANSFERTYPE_Msk (0x3800UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TRANSFERTYPE (Bitfield-Mask: 0x07)

◆ GPDMA_CONFIG2_TRANSFERTYPE_Pos

#define GPDMA_CONFIG2_TRANSFERTYPE_Pos (11UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TRANSFERTYPE (Bit 11)

◆ GPDMA_CONFIG3_A_Msk

#define GPDMA_CONFIG3_A_Msk (0x20000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

A (Bitfield-Mask: 0x01)

◆ GPDMA_CONFIG3_A_Pos

#define GPDMA_CONFIG3_A_Pos (17UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

A (Bit 17)

◆ GPDMA_CONFIG3_DESTPERIPHERAL_Msk

#define GPDMA_CONFIG3_DESTPERIPHERAL_Msk (0x7c0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DESTPERIPHERAL (Bitfield-Mask: 0x1f)

◆ GPDMA_CONFIG3_DESTPERIPHERAL_Pos

#define GPDMA_CONFIG3_DESTPERIPHERAL_Pos (6UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DESTPERIPHERAL (Bit 6)

◆ GPDMA_CONFIG3_E_Msk

#define GPDMA_CONFIG3_E_Msk (0x1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

E (Bitfield-Mask: 0x01)

◆ GPDMA_CONFIG3_E_Pos

#define GPDMA_CONFIG3_E_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

E (Bit 0)

◆ GPDMA_CONFIG3_H_Msk

#define GPDMA_CONFIG3_H_Msk (0x40000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

H (Bitfield-Mask: 0x01)

◆ GPDMA_CONFIG3_H_Pos

#define GPDMA_CONFIG3_H_Pos (18UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

H (Bit 18)

◆ GPDMA_CONFIG3_IE_Msk

#define GPDMA_CONFIG3_IE_Msk (0x4000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

IE (Bitfield-Mask: 0x01)

◆ GPDMA_CONFIG3_IE_Pos

#define GPDMA_CONFIG3_IE_Pos (14UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

IE (Bit 14)

◆ GPDMA_CONFIG3_ITC_Msk

#define GPDMA_CONFIG3_ITC_Msk (0x8000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

ITC (Bitfield-Mask: 0x01)

◆ GPDMA_CONFIG3_ITC_Pos

#define GPDMA_CONFIG3_ITC_Pos (15UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

ITC (Bit 15)

◆ GPDMA_CONFIG3_L_Msk

#define GPDMA_CONFIG3_L_Msk (0x10000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

L (Bitfield-Mask: 0x01)

◆ GPDMA_CONFIG3_L_Pos

#define GPDMA_CONFIG3_L_Pos (16UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

L (Bit 16)

◆ GPDMA_CONFIG3_SRCPERIPHERAL_Msk

#define GPDMA_CONFIG3_SRCPERIPHERAL_Msk (0x3eUL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

SRCPERIPHERAL (Bitfield-Mask: 0x1f)

◆ GPDMA_CONFIG3_SRCPERIPHERAL_Pos

#define GPDMA_CONFIG3_SRCPERIPHERAL_Pos (1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

SRCPERIPHERAL (Bit 1)

◆ GPDMA_CONFIG3_TRANSFERTYPE_Msk

#define GPDMA_CONFIG3_TRANSFERTYPE_Msk (0x3800UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TRANSFERTYPE (Bitfield-Mask: 0x07)

◆ GPDMA_CONFIG3_TRANSFERTYPE_Pos

#define GPDMA_CONFIG3_TRANSFERTYPE_Pos (11UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TRANSFERTYPE (Bit 11)

◆ GPDMA_CONFIG4_A_Msk

#define GPDMA_CONFIG4_A_Msk (0x20000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

A (Bitfield-Mask: 0x01)

◆ GPDMA_CONFIG4_A_Pos

#define GPDMA_CONFIG4_A_Pos (17UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

A (Bit 17)

◆ GPDMA_CONFIG4_DESTPERIPHERAL_Msk

#define GPDMA_CONFIG4_DESTPERIPHERAL_Msk (0x7c0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DESTPERIPHERAL (Bitfield-Mask: 0x1f)

◆ GPDMA_CONFIG4_DESTPERIPHERAL_Pos

#define GPDMA_CONFIG4_DESTPERIPHERAL_Pos (6UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DESTPERIPHERAL (Bit 6)

◆ GPDMA_CONFIG4_E_Msk

#define GPDMA_CONFIG4_E_Msk (0x1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

E (Bitfield-Mask: 0x01)

◆ GPDMA_CONFIG4_E_Pos

#define GPDMA_CONFIG4_E_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

E (Bit 0)

◆ GPDMA_CONFIG4_H_Msk

#define GPDMA_CONFIG4_H_Msk (0x40000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

H (Bitfield-Mask: 0x01)

◆ GPDMA_CONFIG4_H_Pos

#define GPDMA_CONFIG4_H_Pos (18UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

H (Bit 18)

◆ GPDMA_CONFIG4_IE_Msk

#define GPDMA_CONFIG4_IE_Msk (0x4000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

IE (Bitfield-Mask: 0x01)

◆ GPDMA_CONFIG4_IE_Pos

#define GPDMA_CONFIG4_IE_Pos (14UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

IE (Bit 14)

◆ GPDMA_CONFIG4_ITC_Msk

#define GPDMA_CONFIG4_ITC_Msk (0x8000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

ITC (Bitfield-Mask: 0x01)

◆ GPDMA_CONFIG4_ITC_Pos

#define GPDMA_CONFIG4_ITC_Pos (15UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

ITC (Bit 15)

◆ GPDMA_CONFIG4_L_Msk

#define GPDMA_CONFIG4_L_Msk (0x10000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

L (Bitfield-Mask: 0x01)

◆ GPDMA_CONFIG4_L_Pos

#define GPDMA_CONFIG4_L_Pos (16UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

L (Bit 16)

◆ GPDMA_CONFIG4_SRCPERIPHERAL_Msk

#define GPDMA_CONFIG4_SRCPERIPHERAL_Msk (0x3eUL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

SRCPERIPHERAL (Bitfield-Mask: 0x1f)

◆ GPDMA_CONFIG4_SRCPERIPHERAL_Pos

#define GPDMA_CONFIG4_SRCPERIPHERAL_Pos (1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

SRCPERIPHERAL (Bit 1)

◆ GPDMA_CONFIG4_TRANSFERTYPE_Msk

#define GPDMA_CONFIG4_TRANSFERTYPE_Msk (0x3800UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TRANSFERTYPE (Bitfield-Mask: 0x07)

◆ GPDMA_CONFIG4_TRANSFERTYPE_Pos

#define GPDMA_CONFIG4_TRANSFERTYPE_Pos (11UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TRANSFERTYPE (Bit 11)

◆ GPDMA_CONFIG5_A_Msk

#define GPDMA_CONFIG5_A_Msk (0x20000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

A (Bitfield-Mask: 0x01)

◆ GPDMA_CONFIG5_A_Pos

#define GPDMA_CONFIG5_A_Pos (17UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

A (Bit 17)

◆ GPDMA_CONFIG5_DESTPERIPHERAL_Msk

#define GPDMA_CONFIG5_DESTPERIPHERAL_Msk (0x7c0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DESTPERIPHERAL (Bitfield-Mask: 0x1f)

◆ GPDMA_CONFIG5_DESTPERIPHERAL_Pos

#define GPDMA_CONFIG5_DESTPERIPHERAL_Pos (6UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DESTPERIPHERAL (Bit 6)

◆ GPDMA_CONFIG5_E_Msk

#define GPDMA_CONFIG5_E_Msk (0x1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

E (Bitfield-Mask: 0x01)

◆ GPDMA_CONFIG5_E_Pos

#define GPDMA_CONFIG5_E_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

E (Bit 0)

◆ GPDMA_CONFIG5_H_Msk

#define GPDMA_CONFIG5_H_Msk (0x40000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

H (Bitfield-Mask: 0x01)

◆ GPDMA_CONFIG5_H_Pos

#define GPDMA_CONFIG5_H_Pos (18UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

H (Bit 18)

◆ GPDMA_CONFIG5_IE_Msk

#define GPDMA_CONFIG5_IE_Msk (0x4000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

IE (Bitfield-Mask: 0x01)

◆ GPDMA_CONFIG5_IE_Pos

#define GPDMA_CONFIG5_IE_Pos (14UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

IE (Bit 14)

◆ GPDMA_CONFIG5_ITC_Msk

#define GPDMA_CONFIG5_ITC_Msk (0x8000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

ITC (Bitfield-Mask: 0x01)

◆ GPDMA_CONFIG5_ITC_Pos

#define GPDMA_CONFIG5_ITC_Pos (15UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

ITC (Bit 15)

◆ GPDMA_CONFIG5_L_Msk

#define GPDMA_CONFIG5_L_Msk (0x10000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

L (Bitfield-Mask: 0x01)

◆ GPDMA_CONFIG5_L_Pos

#define GPDMA_CONFIG5_L_Pos (16UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

L (Bit 16)

◆ GPDMA_CONFIG5_SRCPERIPHERAL_Msk

#define GPDMA_CONFIG5_SRCPERIPHERAL_Msk (0x3eUL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

SRCPERIPHERAL (Bitfield-Mask: 0x1f)

◆ GPDMA_CONFIG5_SRCPERIPHERAL_Pos

#define GPDMA_CONFIG5_SRCPERIPHERAL_Pos (1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

SRCPERIPHERAL (Bit 1)

◆ GPDMA_CONFIG5_TRANSFERTYPE_Msk

#define GPDMA_CONFIG5_TRANSFERTYPE_Msk (0x3800UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TRANSFERTYPE (Bitfield-Mask: 0x07)

◆ GPDMA_CONFIG5_TRANSFERTYPE_Pos

#define GPDMA_CONFIG5_TRANSFERTYPE_Pos (11UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TRANSFERTYPE (Bit 11)

◆ GPDMA_CONFIG6_A_Msk

#define GPDMA_CONFIG6_A_Msk (0x20000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

A (Bitfield-Mask: 0x01)

◆ GPDMA_CONFIG6_A_Pos

#define GPDMA_CONFIG6_A_Pos (17UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

A (Bit 17)

◆ GPDMA_CONFIG6_DESTPERIPHERAL_Msk

#define GPDMA_CONFIG6_DESTPERIPHERAL_Msk (0x7c0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DESTPERIPHERAL (Bitfield-Mask: 0x1f)

◆ GPDMA_CONFIG6_DESTPERIPHERAL_Pos

#define GPDMA_CONFIG6_DESTPERIPHERAL_Pos (6UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DESTPERIPHERAL (Bit 6)

◆ GPDMA_CONFIG6_E_Msk

#define GPDMA_CONFIG6_E_Msk (0x1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

E (Bitfield-Mask: 0x01)

◆ GPDMA_CONFIG6_E_Pos

#define GPDMA_CONFIG6_E_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

E (Bit 0)

◆ GPDMA_CONFIG6_H_Msk

#define GPDMA_CONFIG6_H_Msk (0x40000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

H (Bitfield-Mask: 0x01)

◆ GPDMA_CONFIG6_H_Pos

#define GPDMA_CONFIG6_H_Pos (18UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

H (Bit 18)

◆ GPDMA_CONFIG6_IE_Msk

#define GPDMA_CONFIG6_IE_Msk (0x4000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

IE (Bitfield-Mask: 0x01)

◆ GPDMA_CONFIG6_IE_Pos

#define GPDMA_CONFIG6_IE_Pos (14UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

IE (Bit 14)

◆ GPDMA_CONFIG6_ITC_Msk

#define GPDMA_CONFIG6_ITC_Msk (0x8000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

ITC (Bitfield-Mask: 0x01)

◆ GPDMA_CONFIG6_ITC_Pos

#define GPDMA_CONFIG6_ITC_Pos (15UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

ITC (Bit 15)

◆ GPDMA_CONFIG6_L_Msk

#define GPDMA_CONFIG6_L_Msk (0x10000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

L (Bitfield-Mask: 0x01)

◆ GPDMA_CONFIG6_L_Pos

#define GPDMA_CONFIG6_L_Pos (16UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

L (Bit 16)

◆ GPDMA_CONFIG6_SRCPERIPHERAL_Msk

#define GPDMA_CONFIG6_SRCPERIPHERAL_Msk (0x3eUL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

SRCPERIPHERAL (Bitfield-Mask: 0x1f)

◆ GPDMA_CONFIG6_SRCPERIPHERAL_Pos

#define GPDMA_CONFIG6_SRCPERIPHERAL_Pos (1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

SRCPERIPHERAL (Bit 1)

◆ GPDMA_CONFIG6_TRANSFERTYPE_Msk

#define GPDMA_CONFIG6_TRANSFERTYPE_Msk (0x3800UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TRANSFERTYPE (Bitfield-Mask: 0x07)

◆ GPDMA_CONFIG6_TRANSFERTYPE_Pos

#define GPDMA_CONFIG6_TRANSFERTYPE_Pos (11UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TRANSFERTYPE (Bit 11)

◆ GPDMA_CONFIG7_A_Msk

#define GPDMA_CONFIG7_A_Msk (0x20000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

A (Bitfield-Mask: 0x01)

◆ GPDMA_CONFIG7_A_Pos

#define GPDMA_CONFIG7_A_Pos (17UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

A (Bit 17)

◆ GPDMA_CONFIG7_DESTPERIPHERAL_Msk

#define GPDMA_CONFIG7_DESTPERIPHERAL_Msk (0x7c0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DESTPERIPHERAL (Bitfield-Mask: 0x1f)

◆ GPDMA_CONFIG7_DESTPERIPHERAL_Pos

#define GPDMA_CONFIG7_DESTPERIPHERAL_Pos (6UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DESTPERIPHERAL (Bit 6)

◆ GPDMA_CONFIG7_E_Msk

#define GPDMA_CONFIG7_E_Msk (0x1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

E (Bitfield-Mask: 0x01)

◆ GPDMA_CONFIG7_E_Pos

#define GPDMA_CONFIG7_E_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

E (Bit 0)

◆ GPDMA_CONFIG7_H_Msk

#define GPDMA_CONFIG7_H_Msk (0x40000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

H (Bitfield-Mask: 0x01)

◆ GPDMA_CONFIG7_H_Pos

#define GPDMA_CONFIG7_H_Pos (18UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

H (Bit 18)

◆ GPDMA_CONFIG7_IE_Msk

#define GPDMA_CONFIG7_IE_Msk (0x4000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

IE (Bitfield-Mask: 0x01)

◆ GPDMA_CONFIG7_IE_Pos

#define GPDMA_CONFIG7_IE_Pos (14UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

IE (Bit 14)

◆ GPDMA_CONFIG7_ITC_Msk

#define GPDMA_CONFIG7_ITC_Msk (0x8000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

ITC (Bitfield-Mask: 0x01)

◆ GPDMA_CONFIG7_ITC_Pos

#define GPDMA_CONFIG7_ITC_Pos (15UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

ITC (Bit 15)

◆ GPDMA_CONFIG7_L_Msk

#define GPDMA_CONFIG7_L_Msk (0x10000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

L (Bitfield-Mask: 0x01)

◆ GPDMA_CONFIG7_L_Pos

#define GPDMA_CONFIG7_L_Pos (16UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

L (Bit 16)

◆ GPDMA_CONFIG7_SRCPERIPHERAL_Msk

#define GPDMA_CONFIG7_SRCPERIPHERAL_Msk (0x3eUL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

SRCPERIPHERAL (Bitfield-Mask: 0x1f)

◆ GPDMA_CONFIG7_SRCPERIPHERAL_Pos

#define GPDMA_CONFIG7_SRCPERIPHERAL_Pos (1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

SRCPERIPHERAL (Bit 1)

◆ GPDMA_CONFIG7_TRANSFERTYPE_Msk

#define GPDMA_CONFIG7_TRANSFERTYPE_Msk (0x3800UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TRANSFERTYPE (Bitfield-Mask: 0x07)

◆ GPDMA_CONFIG7_TRANSFERTYPE_Pos

#define GPDMA_CONFIG7_TRANSFERTYPE_Pos (11UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TRANSFERTYPE (Bit 11)

◆ GPDMA_CONFIG_E_Msk

#define GPDMA_CONFIG_E_Msk (0x1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

E (Bitfield-Mask: 0x01)

◆ GPDMA_CONFIG_E_Pos

#define GPDMA_CONFIG_E_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

E (Bit 0)

◆ GPDMA_CONFIG_M_Msk

#define GPDMA_CONFIG_M_Msk (0x2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

M (Bitfield-Mask: 0x01)

◆ GPDMA_CONFIG_M_Pos

#define GPDMA_CONFIG_M_Pos (1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

M (Bit 1)

◆ GPDMA_CONTROL0_DBSIZE_Msk

#define GPDMA_CONTROL0_DBSIZE_Msk (0x38000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DBSIZE (Bitfield-Mask: 0x07)

◆ GPDMA_CONTROL0_DBSIZE_Pos

#define GPDMA_CONTROL0_DBSIZE_Pos (15UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DBSIZE (Bit 15)

◆ GPDMA_CONTROL0_DI_Msk

#define GPDMA_CONTROL0_DI_Msk (0x8000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DI (Bitfield-Mask: 0x01)

◆ GPDMA_CONTROL0_DI_Pos

#define GPDMA_CONTROL0_DI_Pos (27UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DI (Bit 27)

◆ GPDMA_CONTROL0_DWIDTH_Msk

#define GPDMA_CONTROL0_DWIDTH_Msk (0xe00000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DWIDTH (Bitfield-Mask: 0x07)

◆ GPDMA_CONTROL0_DWIDTH_Pos

#define GPDMA_CONTROL0_DWIDTH_Pos (21UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DWIDTH (Bit 21)

◆ GPDMA_CONTROL0_I_Msk

#define GPDMA_CONTROL0_I_Msk (0x80000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

I (Bitfield-Mask: 0x01)

◆ GPDMA_CONTROL0_I_Pos

#define GPDMA_CONTROL0_I_Pos (31UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

I (Bit 31)

◆ GPDMA_CONTROL0_PROT1_Msk

#define GPDMA_CONTROL0_PROT1_Msk (0x10000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PROT1 (Bitfield-Mask: 0x01)

◆ GPDMA_CONTROL0_PROT1_Pos

#define GPDMA_CONTROL0_PROT1_Pos (28UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PROT1 (Bit 28)

◆ GPDMA_CONTROL0_PROT2_Msk

#define GPDMA_CONTROL0_PROT2_Msk (0x20000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PROT2 (Bitfield-Mask: 0x01)

◆ GPDMA_CONTROL0_PROT2_Pos

#define GPDMA_CONTROL0_PROT2_Pos (29UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PROT2 (Bit 29)

◆ GPDMA_CONTROL0_PROT3_Msk

#define GPDMA_CONTROL0_PROT3_Msk (0x40000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PROT3 (Bitfield-Mask: 0x01)

◆ GPDMA_CONTROL0_PROT3_Pos

#define GPDMA_CONTROL0_PROT3_Pos (30UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PROT3 (Bit 30)

◆ GPDMA_CONTROL0_SBSIZE_Msk

#define GPDMA_CONTROL0_SBSIZE_Msk (0x7000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

SBSIZE (Bitfield-Mask: 0x07)

◆ GPDMA_CONTROL0_SBSIZE_Pos

#define GPDMA_CONTROL0_SBSIZE_Pos (12UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

SBSIZE (Bit 12)

◆ GPDMA_CONTROL0_SI_Msk

#define GPDMA_CONTROL0_SI_Msk (0x4000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

SI (Bitfield-Mask: 0x01)

◆ GPDMA_CONTROL0_SI_Pos

#define GPDMA_CONTROL0_SI_Pos (26UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

SI (Bit 26)

◆ GPDMA_CONTROL0_SWIDTH_Msk

#define GPDMA_CONTROL0_SWIDTH_Msk (0x1c0000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

SWIDTH (Bitfield-Mask: 0x07)

◆ GPDMA_CONTROL0_SWIDTH_Pos

#define GPDMA_CONTROL0_SWIDTH_Pos (18UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

SWIDTH (Bit 18)

◆ GPDMA_CONTROL0_TRANSFERSIZE_Msk

#define GPDMA_CONTROL0_TRANSFERSIZE_Msk (0xfffUL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TRANSFERSIZE (Bitfield-Mask: 0xfff)

◆ GPDMA_CONTROL0_TRANSFERSIZE_Pos

#define GPDMA_CONTROL0_TRANSFERSIZE_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TRANSFERSIZE (Bit 0)

◆ GPDMA_CONTROL1_DBSIZE_Msk

#define GPDMA_CONTROL1_DBSIZE_Msk (0x38000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DBSIZE (Bitfield-Mask: 0x07)

◆ GPDMA_CONTROL1_DBSIZE_Pos

#define GPDMA_CONTROL1_DBSIZE_Pos (15UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DBSIZE (Bit 15)

◆ GPDMA_CONTROL1_DI_Msk

#define GPDMA_CONTROL1_DI_Msk (0x8000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DI (Bitfield-Mask: 0x01)

◆ GPDMA_CONTROL1_DI_Pos

#define GPDMA_CONTROL1_DI_Pos (27UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DI (Bit 27)

◆ GPDMA_CONTROL1_DWIDTH_Msk

#define GPDMA_CONTROL1_DWIDTH_Msk (0xe00000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DWIDTH (Bitfield-Mask: 0x07)

◆ GPDMA_CONTROL1_DWIDTH_Pos

#define GPDMA_CONTROL1_DWIDTH_Pos (21UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DWIDTH (Bit 21)

◆ GPDMA_CONTROL1_I_Msk

#define GPDMA_CONTROL1_I_Msk (0x80000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

I (Bitfield-Mask: 0x01)

◆ GPDMA_CONTROL1_I_Pos

#define GPDMA_CONTROL1_I_Pos (31UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

I (Bit 31)

◆ GPDMA_CONTROL1_PROT1_Msk

#define GPDMA_CONTROL1_PROT1_Msk (0x10000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PROT1 (Bitfield-Mask: 0x01)

◆ GPDMA_CONTROL1_PROT1_Pos

#define GPDMA_CONTROL1_PROT1_Pos (28UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PROT1 (Bit 28)

◆ GPDMA_CONTROL1_PROT2_Msk

#define GPDMA_CONTROL1_PROT2_Msk (0x20000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PROT2 (Bitfield-Mask: 0x01)

◆ GPDMA_CONTROL1_PROT2_Pos

#define GPDMA_CONTROL1_PROT2_Pos (29UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PROT2 (Bit 29)

◆ GPDMA_CONTROL1_PROT3_Msk

#define GPDMA_CONTROL1_PROT3_Msk (0x40000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PROT3 (Bitfield-Mask: 0x01)

◆ GPDMA_CONTROL1_PROT3_Pos

#define GPDMA_CONTROL1_PROT3_Pos (30UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PROT3 (Bit 30)

◆ GPDMA_CONTROL1_SBSIZE_Msk

#define GPDMA_CONTROL1_SBSIZE_Msk (0x7000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

SBSIZE (Bitfield-Mask: 0x07)

◆ GPDMA_CONTROL1_SBSIZE_Pos

#define GPDMA_CONTROL1_SBSIZE_Pos (12UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

SBSIZE (Bit 12)

◆ GPDMA_CONTROL1_SI_Msk

#define GPDMA_CONTROL1_SI_Msk (0x4000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

SI (Bitfield-Mask: 0x01)

◆ GPDMA_CONTROL1_SI_Pos

#define GPDMA_CONTROL1_SI_Pos (26UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

SI (Bit 26)

◆ GPDMA_CONTROL1_SWIDTH_Msk

#define GPDMA_CONTROL1_SWIDTH_Msk (0x1c0000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

SWIDTH (Bitfield-Mask: 0x07)

◆ GPDMA_CONTROL1_SWIDTH_Pos

#define GPDMA_CONTROL1_SWIDTH_Pos (18UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

SWIDTH (Bit 18)

◆ GPDMA_CONTROL1_TRANSFERSIZE_Msk

#define GPDMA_CONTROL1_TRANSFERSIZE_Msk (0xfffUL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TRANSFERSIZE (Bitfield-Mask: 0xfff)

◆ GPDMA_CONTROL1_TRANSFERSIZE_Pos

#define GPDMA_CONTROL1_TRANSFERSIZE_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TRANSFERSIZE (Bit 0)

◆ GPDMA_CONTROL2_DBSIZE_Msk

#define GPDMA_CONTROL2_DBSIZE_Msk (0x38000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DBSIZE (Bitfield-Mask: 0x07)

◆ GPDMA_CONTROL2_DBSIZE_Pos

#define GPDMA_CONTROL2_DBSIZE_Pos (15UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DBSIZE (Bit 15)

◆ GPDMA_CONTROL2_DI_Msk

#define GPDMA_CONTROL2_DI_Msk (0x8000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DI (Bitfield-Mask: 0x01)

◆ GPDMA_CONTROL2_DI_Pos

#define GPDMA_CONTROL2_DI_Pos (27UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DI (Bit 27)

◆ GPDMA_CONTROL2_DWIDTH_Msk

#define GPDMA_CONTROL2_DWIDTH_Msk (0xe00000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DWIDTH (Bitfield-Mask: 0x07)

◆ GPDMA_CONTROL2_DWIDTH_Pos

#define GPDMA_CONTROL2_DWIDTH_Pos (21UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DWIDTH (Bit 21)

◆ GPDMA_CONTROL2_I_Msk

#define GPDMA_CONTROL2_I_Msk (0x80000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

I (Bitfield-Mask: 0x01)

◆ GPDMA_CONTROL2_I_Pos

#define GPDMA_CONTROL2_I_Pos (31UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

I (Bit 31)

◆ GPDMA_CONTROL2_PROT1_Msk

#define GPDMA_CONTROL2_PROT1_Msk (0x10000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PROT1 (Bitfield-Mask: 0x01)

◆ GPDMA_CONTROL2_PROT1_Pos

#define GPDMA_CONTROL2_PROT1_Pos (28UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PROT1 (Bit 28)

◆ GPDMA_CONTROL2_PROT2_Msk

#define GPDMA_CONTROL2_PROT2_Msk (0x20000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PROT2 (Bitfield-Mask: 0x01)

◆ GPDMA_CONTROL2_PROT2_Pos

#define GPDMA_CONTROL2_PROT2_Pos (29UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PROT2 (Bit 29)

◆ GPDMA_CONTROL2_PROT3_Msk

#define GPDMA_CONTROL2_PROT3_Msk (0x40000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PROT3 (Bitfield-Mask: 0x01)

◆ GPDMA_CONTROL2_PROT3_Pos

#define GPDMA_CONTROL2_PROT3_Pos (30UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PROT3 (Bit 30)

◆ GPDMA_CONTROL2_SBSIZE_Msk

#define GPDMA_CONTROL2_SBSIZE_Msk (0x7000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

SBSIZE (Bitfield-Mask: 0x07)

◆ GPDMA_CONTROL2_SBSIZE_Pos

#define GPDMA_CONTROL2_SBSIZE_Pos (12UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

SBSIZE (Bit 12)

◆ GPDMA_CONTROL2_SI_Msk

#define GPDMA_CONTROL2_SI_Msk (0x4000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

SI (Bitfield-Mask: 0x01)

◆ GPDMA_CONTROL2_SI_Pos

#define GPDMA_CONTROL2_SI_Pos (26UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

SI (Bit 26)

◆ GPDMA_CONTROL2_SWIDTH_Msk

#define GPDMA_CONTROL2_SWIDTH_Msk (0x1c0000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

SWIDTH (Bitfield-Mask: 0x07)

◆ GPDMA_CONTROL2_SWIDTH_Pos

#define GPDMA_CONTROL2_SWIDTH_Pos (18UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

SWIDTH (Bit 18)

◆ GPDMA_CONTROL2_TRANSFERSIZE_Msk

#define GPDMA_CONTROL2_TRANSFERSIZE_Msk (0xfffUL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TRANSFERSIZE (Bitfield-Mask: 0xfff)

◆ GPDMA_CONTROL2_TRANSFERSIZE_Pos

#define GPDMA_CONTROL2_TRANSFERSIZE_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TRANSFERSIZE (Bit 0)

◆ GPDMA_CONTROL3_DBSIZE_Msk

#define GPDMA_CONTROL3_DBSIZE_Msk (0x38000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DBSIZE (Bitfield-Mask: 0x07)

◆ GPDMA_CONTROL3_DBSIZE_Pos

#define GPDMA_CONTROL3_DBSIZE_Pos (15UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DBSIZE (Bit 15)

◆ GPDMA_CONTROL3_DI_Msk

#define GPDMA_CONTROL3_DI_Msk (0x8000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DI (Bitfield-Mask: 0x01)

◆ GPDMA_CONTROL3_DI_Pos

#define GPDMA_CONTROL3_DI_Pos (27UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DI (Bit 27)

◆ GPDMA_CONTROL3_DWIDTH_Msk

#define GPDMA_CONTROL3_DWIDTH_Msk (0xe00000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DWIDTH (Bitfield-Mask: 0x07)

◆ GPDMA_CONTROL3_DWIDTH_Pos

#define GPDMA_CONTROL3_DWIDTH_Pos (21UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DWIDTH (Bit 21)

◆ GPDMA_CONTROL3_I_Msk

#define GPDMA_CONTROL3_I_Msk (0x80000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

I (Bitfield-Mask: 0x01)

◆ GPDMA_CONTROL3_I_Pos

#define GPDMA_CONTROL3_I_Pos (31UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

I (Bit 31)

◆ GPDMA_CONTROL3_PROT1_Msk

#define GPDMA_CONTROL3_PROT1_Msk (0x10000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PROT1 (Bitfield-Mask: 0x01)

◆ GPDMA_CONTROL3_PROT1_Pos

#define GPDMA_CONTROL3_PROT1_Pos (28UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PROT1 (Bit 28)

◆ GPDMA_CONTROL3_PROT2_Msk

#define GPDMA_CONTROL3_PROT2_Msk (0x20000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PROT2 (Bitfield-Mask: 0x01)

◆ GPDMA_CONTROL3_PROT2_Pos

#define GPDMA_CONTROL3_PROT2_Pos (29UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PROT2 (Bit 29)

◆ GPDMA_CONTROL3_PROT3_Msk

#define GPDMA_CONTROL3_PROT3_Msk (0x40000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PROT3 (Bitfield-Mask: 0x01)

◆ GPDMA_CONTROL3_PROT3_Pos

#define GPDMA_CONTROL3_PROT3_Pos (30UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PROT3 (Bit 30)

◆ GPDMA_CONTROL3_SBSIZE_Msk

#define GPDMA_CONTROL3_SBSIZE_Msk (0x7000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

SBSIZE (Bitfield-Mask: 0x07)

◆ GPDMA_CONTROL3_SBSIZE_Pos

#define GPDMA_CONTROL3_SBSIZE_Pos (12UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

SBSIZE (Bit 12)

◆ GPDMA_CONTROL3_SI_Msk

#define GPDMA_CONTROL3_SI_Msk (0x4000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

SI (Bitfield-Mask: 0x01)

◆ GPDMA_CONTROL3_SI_Pos

#define GPDMA_CONTROL3_SI_Pos (26UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

SI (Bit 26)

◆ GPDMA_CONTROL3_SWIDTH_Msk

#define GPDMA_CONTROL3_SWIDTH_Msk (0x1c0000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

SWIDTH (Bitfield-Mask: 0x07)

◆ GPDMA_CONTROL3_SWIDTH_Pos

#define GPDMA_CONTROL3_SWIDTH_Pos (18UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

SWIDTH (Bit 18)

◆ GPDMA_CONTROL3_TRANSFERSIZE_Msk

#define GPDMA_CONTROL3_TRANSFERSIZE_Msk (0xfffUL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TRANSFERSIZE (Bitfield-Mask: 0xfff)

◆ GPDMA_CONTROL3_TRANSFERSIZE_Pos

#define GPDMA_CONTROL3_TRANSFERSIZE_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TRANSFERSIZE (Bit 0)

◆ GPDMA_CONTROL4_DBSIZE_Msk

#define GPDMA_CONTROL4_DBSIZE_Msk (0x38000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DBSIZE (Bitfield-Mask: 0x07)

◆ GPDMA_CONTROL4_DBSIZE_Pos

#define GPDMA_CONTROL4_DBSIZE_Pos (15UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DBSIZE (Bit 15)

◆ GPDMA_CONTROL4_DI_Msk

#define GPDMA_CONTROL4_DI_Msk (0x8000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DI (Bitfield-Mask: 0x01)

◆ GPDMA_CONTROL4_DI_Pos

#define GPDMA_CONTROL4_DI_Pos (27UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DI (Bit 27)

◆ GPDMA_CONTROL4_DWIDTH_Msk

#define GPDMA_CONTROL4_DWIDTH_Msk (0xe00000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DWIDTH (Bitfield-Mask: 0x07)

◆ GPDMA_CONTROL4_DWIDTH_Pos

#define GPDMA_CONTROL4_DWIDTH_Pos (21UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DWIDTH (Bit 21)

◆ GPDMA_CONTROL4_I_Msk

#define GPDMA_CONTROL4_I_Msk (0x80000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

I (Bitfield-Mask: 0x01)

◆ GPDMA_CONTROL4_I_Pos

#define GPDMA_CONTROL4_I_Pos (31UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

I (Bit 31)

◆ GPDMA_CONTROL4_PROT1_Msk

#define GPDMA_CONTROL4_PROT1_Msk (0x10000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PROT1 (Bitfield-Mask: 0x01)

◆ GPDMA_CONTROL4_PROT1_Pos

#define GPDMA_CONTROL4_PROT1_Pos (28UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PROT1 (Bit 28)

◆ GPDMA_CONTROL4_PROT2_Msk

#define GPDMA_CONTROL4_PROT2_Msk (0x20000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PROT2 (Bitfield-Mask: 0x01)

◆ GPDMA_CONTROL4_PROT2_Pos

#define GPDMA_CONTROL4_PROT2_Pos (29UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PROT2 (Bit 29)

◆ GPDMA_CONTROL4_PROT3_Msk

#define GPDMA_CONTROL4_PROT3_Msk (0x40000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PROT3 (Bitfield-Mask: 0x01)

◆ GPDMA_CONTROL4_PROT3_Pos

#define GPDMA_CONTROL4_PROT3_Pos (30UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PROT3 (Bit 30)

◆ GPDMA_CONTROL4_SBSIZE_Msk

#define GPDMA_CONTROL4_SBSIZE_Msk (0x7000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

SBSIZE (Bitfield-Mask: 0x07)

◆ GPDMA_CONTROL4_SBSIZE_Pos

#define GPDMA_CONTROL4_SBSIZE_Pos (12UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

SBSIZE (Bit 12)

◆ GPDMA_CONTROL4_SI_Msk

#define GPDMA_CONTROL4_SI_Msk (0x4000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

SI (Bitfield-Mask: 0x01)

◆ GPDMA_CONTROL4_SI_Pos

#define GPDMA_CONTROL4_SI_Pos (26UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

SI (Bit 26)

◆ GPDMA_CONTROL4_SWIDTH_Msk

#define GPDMA_CONTROL4_SWIDTH_Msk (0x1c0000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

SWIDTH (Bitfield-Mask: 0x07)

◆ GPDMA_CONTROL4_SWIDTH_Pos

#define GPDMA_CONTROL4_SWIDTH_Pos (18UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

SWIDTH (Bit 18)

◆ GPDMA_CONTROL4_TRANSFERSIZE_Msk

#define GPDMA_CONTROL4_TRANSFERSIZE_Msk (0xfffUL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TRANSFERSIZE (Bitfield-Mask: 0xfff)

◆ GPDMA_CONTROL4_TRANSFERSIZE_Pos

#define GPDMA_CONTROL4_TRANSFERSIZE_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TRANSFERSIZE (Bit 0)

◆ GPDMA_CONTROL5_DBSIZE_Msk

#define GPDMA_CONTROL5_DBSIZE_Msk (0x38000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DBSIZE (Bitfield-Mask: 0x07)

◆ GPDMA_CONTROL5_DBSIZE_Pos

#define GPDMA_CONTROL5_DBSIZE_Pos (15UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DBSIZE (Bit 15)

◆ GPDMA_CONTROL5_DI_Msk

#define GPDMA_CONTROL5_DI_Msk (0x8000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DI (Bitfield-Mask: 0x01)

◆ GPDMA_CONTROL5_DI_Pos

#define GPDMA_CONTROL5_DI_Pos (27UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DI (Bit 27)

◆ GPDMA_CONTROL5_DWIDTH_Msk

#define GPDMA_CONTROL5_DWIDTH_Msk (0xe00000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DWIDTH (Bitfield-Mask: 0x07)

◆ GPDMA_CONTROL5_DWIDTH_Pos

#define GPDMA_CONTROL5_DWIDTH_Pos (21UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DWIDTH (Bit 21)

◆ GPDMA_CONTROL5_I_Msk

#define GPDMA_CONTROL5_I_Msk (0x80000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

I (Bitfield-Mask: 0x01)

◆ GPDMA_CONTROL5_I_Pos

#define GPDMA_CONTROL5_I_Pos (31UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

I (Bit 31)

◆ GPDMA_CONTROL5_PROT1_Msk

#define GPDMA_CONTROL5_PROT1_Msk (0x10000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PROT1 (Bitfield-Mask: 0x01)

◆ GPDMA_CONTROL5_PROT1_Pos

#define GPDMA_CONTROL5_PROT1_Pos (28UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PROT1 (Bit 28)

◆ GPDMA_CONTROL5_PROT2_Msk

#define GPDMA_CONTROL5_PROT2_Msk (0x20000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PROT2 (Bitfield-Mask: 0x01)

◆ GPDMA_CONTROL5_PROT2_Pos

#define GPDMA_CONTROL5_PROT2_Pos (29UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PROT2 (Bit 29)

◆ GPDMA_CONTROL5_PROT3_Msk

#define GPDMA_CONTROL5_PROT3_Msk (0x40000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PROT3 (Bitfield-Mask: 0x01)

◆ GPDMA_CONTROL5_PROT3_Pos

#define GPDMA_CONTROL5_PROT3_Pos (30UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PROT3 (Bit 30)

◆ GPDMA_CONTROL5_SBSIZE_Msk

#define GPDMA_CONTROL5_SBSIZE_Msk (0x7000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

SBSIZE (Bitfield-Mask: 0x07)

◆ GPDMA_CONTROL5_SBSIZE_Pos

#define GPDMA_CONTROL5_SBSIZE_Pos (12UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

SBSIZE (Bit 12)

◆ GPDMA_CONTROL5_SI_Msk

#define GPDMA_CONTROL5_SI_Msk (0x4000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

SI (Bitfield-Mask: 0x01)

◆ GPDMA_CONTROL5_SI_Pos

#define GPDMA_CONTROL5_SI_Pos (26UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

SI (Bit 26)

◆ GPDMA_CONTROL5_SWIDTH_Msk

#define GPDMA_CONTROL5_SWIDTH_Msk (0x1c0000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

SWIDTH (Bitfield-Mask: 0x07)

◆ GPDMA_CONTROL5_SWIDTH_Pos

#define GPDMA_CONTROL5_SWIDTH_Pos (18UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

SWIDTH (Bit 18)

◆ GPDMA_CONTROL5_TRANSFERSIZE_Msk

#define GPDMA_CONTROL5_TRANSFERSIZE_Msk (0xfffUL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TRANSFERSIZE (Bitfield-Mask: 0xfff)

◆ GPDMA_CONTROL5_TRANSFERSIZE_Pos

#define GPDMA_CONTROL5_TRANSFERSIZE_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TRANSFERSIZE (Bit 0)

◆ GPDMA_CONTROL6_DBSIZE_Msk

#define GPDMA_CONTROL6_DBSIZE_Msk (0x38000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DBSIZE (Bitfield-Mask: 0x07)

◆ GPDMA_CONTROL6_DBSIZE_Pos

#define GPDMA_CONTROL6_DBSIZE_Pos (15UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DBSIZE (Bit 15)

◆ GPDMA_CONTROL6_DI_Msk

#define GPDMA_CONTROL6_DI_Msk (0x8000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DI (Bitfield-Mask: 0x01)

◆ GPDMA_CONTROL6_DI_Pos

#define GPDMA_CONTROL6_DI_Pos (27UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DI (Bit 27)

◆ GPDMA_CONTROL6_DWIDTH_Msk

#define GPDMA_CONTROL6_DWIDTH_Msk (0xe00000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DWIDTH (Bitfield-Mask: 0x07)

◆ GPDMA_CONTROL6_DWIDTH_Pos

#define GPDMA_CONTROL6_DWIDTH_Pos (21UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DWIDTH (Bit 21)

◆ GPDMA_CONTROL6_I_Msk

#define GPDMA_CONTROL6_I_Msk (0x80000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

I (Bitfield-Mask: 0x01)

◆ GPDMA_CONTROL6_I_Pos

#define GPDMA_CONTROL6_I_Pos (31UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

I (Bit 31)

◆ GPDMA_CONTROL6_PROT1_Msk

#define GPDMA_CONTROL6_PROT1_Msk (0x10000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PROT1 (Bitfield-Mask: 0x01)

◆ GPDMA_CONTROL6_PROT1_Pos

#define GPDMA_CONTROL6_PROT1_Pos (28UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PROT1 (Bit 28)

◆ GPDMA_CONTROL6_PROT2_Msk

#define GPDMA_CONTROL6_PROT2_Msk (0x20000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PROT2 (Bitfield-Mask: 0x01)

◆ GPDMA_CONTROL6_PROT2_Pos

#define GPDMA_CONTROL6_PROT2_Pos (29UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PROT2 (Bit 29)

◆ GPDMA_CONTROL6_PROT3_Msk

#define GPDMA_CONTROL6_PROT3_Msk (0x40000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PROT3 (Bitfield-Mask: 0x01)

◆ GPDMA_CONTROL6_PROT3_Pos

#define GPDMA_CONTROL6_PROT3_Pos (30UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PROT3 (Bit 30)

◆ GPDMA_CONTROL6_SBSIZE_Msk

#define GPDMA_CONTROL6_SBSIZE_Msk (0x7000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

SBSIZE (Bitfield-Mask: 0x07)

◆ GPDMA_CONTROL6_SBSIZE_Pos

#define GPDMA_CONTROL6_SBSIZE_Pos (12UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

SBSIZE (Bit 12)

◆ GPDMA_CONTROL6_SI_Msk

#define GPDMA_CONTROL6_SI_Msk (0x4000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

SI (Bitfield-Mask: 0x01)

◆ GPDMA_CONTROL6_SI_Pos

#define GPDMA_CONTROL6_SI_Pos (26UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

SI (Bit 26)

◆ GPDMA_CONTROL6_SWIDTH_Msk

#define GPDMA_CONTROL6_SWIDTH_Msk (0x1c0000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

SWIDTH (Bitfield-Mask: 0x07)

◆ GPDMA_CONTROL6_SWIDTH_Pos

#define GPDMA_CONTROL6_SWIDTH_Pos (18UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

SWIDTH (Bit 18)

◆ GPDMA_CONTROL6_TRANSFERSIZE_Msk

#define GPDMA_CONTROL6_TRANSFERSIZE_Msk (0xfffUL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TRANSFERSIZE (Bitfield-Mask: 0xfff)

◆ GPDMA_CONTROL6_TRANSFERSIZE_Pos

#define GPDMA_CONTROL6_TRANSFERSIZE_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TRANSFERSIZE (Bit 0)

◆ GPDMA_CONTROL7_DBSIZE_Msk

#define GPDMA_CONTROL7_DBSIZE_Msk (0x38000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DBSIZE (Bitfield-Mask: 0x07)

◆ GPDMA_CONTROL7_DBSIZE_Pos

#define GPDMA_CONTROL7_DBSIZE_Pos (15UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DBSIZE (Bit 15)

◆ GPDMA_CONTROL7_DI_Msk

#define GPDMA_CONTROL7_DI_Msk (0x8000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DI (Bitfield-Mask: 0x01)

◆ GPDMA_CONTROL7_DI_Pos

#define GPDMA_CONTROL7_DI_Pos (27UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DI (Bit 27)

◆ GPDMA_CONTROL7_DWIDTH_Msk

#define GPDMA_CONTROL7_DWIDTH_Msk (0xe00000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DWIDTH (Bitfield-Mask: 0x07)

◆ GPDMA_CONTROL7_DWIDTH_Pos

#define GPDMA_CONTROL7_DWIDTH_Pos (21UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DWIDTH (Bit 21)

◆ GPDMA_CONTROL7_I_Msk

#define GPDMA_CONTROL7_I_Msk (0x80000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

I (Bitfield-Mask: 0x01)

◆ GPDMA_CONTROL7_I_Pos

#define GPDMA_CONTROL7_I_Pos (31UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

I (Bit 31)

◆ GPDMA_CONTROL7_PROT1_Msk

#define GPDMA_CONTROL7_PROT1_Msk (0x10000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PROT1 (Bitfield-Mask: 0x01)

◆ GPDMA_CONTROL7_PROT1_Pos

#define GPDMA_CONTROL7_PROT1_Pos (28UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PROT1 (Bit 28)

◆ GPDMA_CONTROL7_PROT2_Msk

#define GPDMA_CONTROL7_PROT2_Msk (0x20000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PROT2 (Bitfield-Mask: 0x01)

◆ GPDMA_CONTROL7_PROT2_Pos

#define GPDMA_CONTROL7_PROT2_Pos (29UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PROT2 (Bit 29)

◆ GPDMA_CONTROL7_PROT3_Msk

#define GPDMA_CONTROL7_PROT3_Msk (0x40000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PROT3 (Bitfield-Mask: 0x01)

◆ GPDMA_CONTROL7_PROT3_Pos

#define GPDMA_CONTROL7_PROT3_Pos (30UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PROT3 (Bit 30)

◆ GPDMA_CONTROL7_SBSIZE_Msk

#define GPDMA_CONTROL7_SBSIZE_Msk (0x7000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

SBSIZE (Bitfield-Mask: 0x07)

◆ GPDMA_CONTROL7_SBSIZE_Pos

#define GPDMA_CONTROL7_SBSIZE_Pos (12UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

SBSIZE (Bit 12)

◆ GPDMA_CONTROL7_SI_Msk

#define GPDMA_CONTROL7_SI_Msk (0x4000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

SI (Bitfield-Mask: 0x01)

◆ GPDMA_CONTROL7_SI_Pos

#define GPDMA_CONTROL7_SI_Pos (26UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

SI (Bit 26)

◆ GPDMA_CONTROL7_SWIDTH_Msk

#define GPDMA_CONTROL7_SWIDTH_Msk (0x1c0000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

SWIDTH (Bitfield-Mask: 0x07)

◆ GPDMA_CONTROL7_SWIDTH_Pos

#define GPDMA_CONTROL7_SWIDTH_Pos (18UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

SWIDTH (Bit 18)

◆ GPDMA_CONTROL7_TRANSFERSIZE_Msk

#define GPDMA_CONTROL7_TRANSFERSIZE_Msk (0xfffUL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TRANSFERSIZE (Bitfield-Mask: 0xfff)

◆ GPDMA_CONTROL7_TRANSFERSIZE_Pos

#define GPDMA_CONTROL7_TRANSFERSIZE_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TRANSFERSIZE (Bit 0)

◆ GPDMA_DESTADDR0_DESTADDR_Msk

#define GPDMA_DESTADDR0_DESTADDR_Msk (0xffffffffUL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DESTADDR (Bitfield-Mask: 0xffffffff)

◆ GPDMA_DESTADDR0_DESTADDR_Pos

#define GPDMA_DESTADDR0_DESTADDR_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DESTADDR (Bit 0)

◆ GPDMA_DESTADDR1_DESTADDR_Msk

#define GPDMA_DESTADDR1_DESTADDR_Msk (0xffffffffUL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DESTADDR (Bitfield-Mask: 0xffffffff)

◆ GPDMA_DESTADDR1_DESTADDR_Pos

#define GPDMA_DESTADDR1_DESTADDR_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DESTADDR (Bit 0)

◆ GPDMA_DESTADDR2_DESTADDR_Msk

#define GPDMA_DESTADDR2_DESTADDR_Msk (0xffffffffUL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DESTADDR (Bitfield-Mask: 0xffffffff)

◆ GPDMA_DESTADDR2_DESTADDR_Pos

#define GPDMA_DESTADDR2_DESTADDR_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DESTADDR (Bit 0)

◆ GPDMA_DESTADDR3_DESTADDR_Msk

#define GPDMA_DESTADDR3_DESTADDR_Msk (0xffffffffUL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DESTADDR (Bitfield-Mask: 0xffffffff)

◆ GPDMA_DESTADDR3_DESTADDR_Pos

#define GPDMA_DESTADDR3_DESTADDR_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DESTADDR (Bit 0)

◆ GPDMA_DESTADDR4_DESTADDR_Msk

#define GPDMA_DESTADDR4_DESTADDR_Msk (0xffffffffUL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DESTADDR (Bitfield-Mask: 0xffffffff)

◆ GPDMA_DESTADDR4_DESTADDR_Pos

#define GPDMA_DESTADDR4_DESTADDR_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DESTADDR (Bit 0)

◆ GPDMA_DESTADDR5_DESTADDR_Msk

#define GPDMA_DESTADDR5_DESTADDR_Msk (0xffffffffUL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DESTADDR (Bitfield-Mask: 0xffffffff)

◆ GPDMA_DESTADDR5_DESTADDR_Pos

#define GPDMA_DESTADDR5_DESTADDR_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DESTADDR (Bit 0)

◆ GPDMA_DESTADDR6_DESTADDR_Msk

#define GPDMA_DESTADDR6_DESTADDR_Msk (0xffffffffUL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DESTADDR (Bitfield-Mask: 0xffffffff)

◆ GPDMA_DESTADDR6_DESTADDR_Pos

#define GPDMA_DESTADDR6_DESTADDR_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DESTADDR (Bit 0)

◆ GPDMA_DESTADDR7_DESTADDR_Msk

#define GPDMA_DESTADDR7_DESTADDR_Msk (0xffffffffUL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DESTADDR (Bitfield-Mask: 0xffffffff)

◆ GPDMA_DESTADDR7_DESTADDR_Pos

#define GPDMA_DESTADDR7_DESTADDR_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DESTADDR (Bit 0)

◆ GPDMA_ENBLDCHNS_ENABLEDCHANNELS0_Msk

#define GPDMA_ENBLDCHNS_ENABLEDCHANNELS0_Msk (0x1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

ENABLEDCHANNELS0 (Bitfield-Mask: 0x01)

◆ GPDMA_ENBLDCHNS_ENABLEDCHANNELS0_Pos

#define GPDMA_ENBLDCHNS_ENABLEDCHANNELS0_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

ENABLEDCHANNELS0 (Bit 0)

◆ GPDMA_ENBLDCHNS_ENABLEDCHANNELS1_Msk

#define GPDMA_ENBLDCHNS_ENABLEDCHANNELS1_Msk (0x2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

ENABLEDCHANNELS1 (Bitfield-Mask: 0x01)

◆ GPDMA_ENBLDCHNS_ENABLEDCHANNELS1_Pos

#define GPDMA_ENBLDCHNS_ENABLEDCHANNELS1_Pos (1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

ENABLEDCHANNELS1 (Bit 1)

◆ GPDMA_ENBLDCHNS_ENABLEDCHANNELS2_Msk

#define GPDMA_ENBLDCHNS_ENABLEDCHANNELS2_Msk (0x4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

ENABLEDCHANNELS2 (Bitfield-Mask: 0x01)

◆ GPDMA_ENBLDCHNS_ENABLEDCHANNELS2_Pos

#define GPDMA_ENBLDCHNS_ENABLEDCHANNELS2_Pos (2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

ENABLEDCHANNELS2 (Bit 2)

◆ GPDMA_ENBLDCHNS_ENABLEDCHANNELS3_Msk

#define GPDMA_ENBLDCHNS_ENABLEDCHANNELS3_Msk (0x8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

ENABLEDCHANNELS3 (Bitfield-Mask: 0x01)

◆ GPDMA_ENBLDCHNS_ENABLEDCHANNELS3_Pos

#define GPDMA_ENBLDCHNS_ENABLEDCHANNELS3_Pos (3UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

ENABLEDCHANNELS3 (Bit 3)

◆ GPDMA_ENBLDCHNS_ENABLEDCHANNELS4_Msk

#define GPDMA_ENBLDCHNS_ENABLEDCHANNELS4_Msk (0x10UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

ENABLEDCHANNELS4 (Bitfield-Mask: 0x01)

◆ GPDMA_ENBLDCHNS_ENABLEDCHANNELS4_Pos

#define GPDMA_ENBLDCHNS_ENABLEDCHANNELS4_Pos (4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

ENABLEDCHANNELS4 (Bit 4)

◆ GPDMA_ENBLDCHNS_ENABLEDCHANNELS5_Msk

#define GPDMA_ENBLDCHNS_ENABLEDCHANNELS5_Msk (0x20UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

ENABLEDCHANNELS5 (Bitfield-Mask: 0x01)

◆ GPDMA_ENBLDCHNS_ENABLEDCHANNELS5_Pos

#define GPDMA_ENBLDCHNS_ENABLEDCHANNELS5_Pos (5UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

ENABLEDCHANNELS5 (Bit 5)

◆ GPDMA_ENBLDCHNS_ENABLEDCHANNELS6_Msk

#define GPDMA_ENBLDCHNS_ENABLEDCHANNELS6_Msk (0x40UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

ENABLEDCHANNELS6 (Bitfield-Mask: 0x01)

◆ GPDMA_ENBLDCHNS_ENABLEDCHANNELS6_Pos

#define GPDMA_ENBLDCHNS_ENABLEDCHANNELS6_Pos (6UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

ENABLEDCHANNELS6 (Bit 6)

◆ GPDMA_ENBLDCHNS_ENABLEDCHANNELS7_Msk

#define GPDMA_ENBLDCHNS_ENABLEDCHANNELS7_Msk (0x80UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

ENABLEDCHANNELS7 (Bitfield-Mask: 0x01)

◆ GPDMA_ENBLDCHNS_ENABLEDCHANNELS7_Pos

#define GPDMA_ENBLDCHNS_ENABLEDCHANNELS7_Pos (7UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

ENABLEDCHANNELS7 (Bit 7)

◆ GPDMA_INTERRCLR_INTERRCLR0_Msk

#define GPDMA_INTERRCLR_INTERRCLR0_Msk (0x1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

INTERRCLR0 (Bitfield-Mask: 0x01)

◆ GPDMA_INTERRCLR_INTERRCLR0_Pos

#define GPDMA_INTERRCLR_INTERRCLR0_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

INTERRCLR0 (Bit 0)

◆ GPDMA_INTERRCLR_INTERRCLR1_Msk

#define GPDMA_INTERRCLR_INTERRCLR1_Msk (0x2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

INTERRCLR1 (Bitfield-Mask: 0x01)

◆ GPDMA_INTERRCLR_INTERRCLR1_Pos

#define GPDMA_INTERRCLR_INTERRCLR1_Pos (1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

INTERRCLR1 (Bit 1)

◆ GPDMA_INTERRCLR_INTERRCLR2_Msk

#define GPDMA_INTERRCLR_INTERRCLR2_Msk (0x4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

INTERRCLR2 (Bitfield-Mask: 0x01)

◆ GPDMA_INTERRCLR_INTERRCLR2_Pos

#define GPDMA_INTERRCLR_INTERRCLR2_Pos (2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

INTERRCLR2 (Bit 2)

◆ GPDMA_INTERRCLR_INTERRCLR3_Msk

#define GPDMA_INTERRCLR_INTERRCLR3_Msk (0x8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

INTERRCLR3 (Bitfield-Mask: 0x01)

◆ GPDMA_INTERRCLR_INTERRCLR3_Pos

#define GPDMA_INTERRCLR_INTERRCLR3_Pos (3UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

INTERRCLR3 (Bit 3)

◆ GPDMA_INTERRCLR_INTERRCLR4_Msk

#define GPDMA_INTERRCLR_INTERRCLR4_Msk (0x10UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

INTERRCLR4 (Bitfield-Mask: 0x01)

◆ GPDMA_INTERRCLR_INTERRCLR4_Pos

#define GPDMA_INTERRCLR_INTERRCLR4_Pos (4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

INTERRCLR4 (Bit 4)

◆ GPDMA_INTERRCLR_INTERRCLR5_Msk

#define GPDMA_INTERRCLR_INTERRCLR5_Msk (0x20UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

INTERRCLR5 (Bitfield-Mask: 0x01)

◆ GPDMA_INTERRCLR_INTERRCLR5_Pos

#define GPDMA_INTERRCLR_INTERRCLR5_Pos (5UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

INTERRCLR5 (Bit 5)

◆ GPDMA_INTERRCLR_INTERRCLR6_Msk

#define GPDMA_INTERRCLR_INTERRCLR6_Msk (0x40UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

INTERRCLR6 (Bitfield-Mask: 0x01)

◆ GPDMA_INTERRCLR_INTERRCLR6_Pos

#define GPDMA_INTERRCLR_INTERRCLR6_Pos (6UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

INTERRCLR6 (Bit 6)

◆ GPDMA_INTERRCLR_INTERRCLR7_Msk

#define GPDMA_INTERRCLR_INTERRCLR7_Msk (0x80UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

INTERRCLR7 (Bitfield-Mask: 0x01)

◆ GPDMA_INTERRCLR_INTERRCLR7_Pos

#define GPDMA_INTERRCLR_INTERRCLR7_Pos (7UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

INTERRCLR7 (Bit 7)

◆ GPDMA_INTERRSTAT_INTERRSTAT0_Msk

#define GPDMA_INTERRSTAT_INTERRSTAT0_Msk (0x1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

INTERRSTAT0 (Bitfield-Mask: 0x01)

◆ GPDMA_INTERRSTAT_INTERRSTAT0_Pos

#define GPDMA_INTERRSTAT_INTERRSTAT0_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

INTERRSTAT0 (Bit 0)

◆ GPDMA_INTERRSTAT_INTERRSTAT1_Msk

#define GPDMA_INTERRSTAT_INTERRSTAT1_Msk (0x2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

INTERRSTAT1 (Bitfield-Mask: 0x01)

◆ GPDMA_INTERRSTAT_INTERRSTAT1_Pos

#define GPDMA_INTERRSTAT_INTERRSTAT1_Pos (1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

INTERRSTAT1 (Bit 1)

◆ GPDMA_INTERRSTAT_INTERRSTAT2_Msk

#define GPDMA_INTERRSTAT_INTERRSTAT2_Msk (0x4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

INTERRSTAT2 (Bitfield-Mask: 0x01)

◆ GPDMA_INTERRSTAT_INTERRSTAT2_Pos

#define GPDMA_INTERRSTAT_INTERRSTAT2_Pos (2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

INTERRSTAT2 (Bit 2)

◆ GPDMA_INTERRSTAT_INTERRSTAT3_Msk

#define GPDMA_INTERRSTAT_INTERRSTAT3_Msk (0x8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

INTERRSTAT3 (Bitfield-Mask: 0x01)

◆ GPDMA_INTERRSTAT_INTERRSTAT3_Pos

#define GPDMA_INTERRSTAT_INTERRSTAT3_Pos (3UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

INTERRSTAT3 (Bit 3)

◆ GPDMA_INTERRSTAT_INTERRSTAT4_Msk

#define GPDMA_INTERRSTAT_INTERRSTAT4_Msk (0x10UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

INTERRSTAT4 (Bitfield-Mask: 0x01)

◆ GPDMA_INTERRSTAT_INTERRSTAT4_Pos

#define GPDMA_INTERRSTAT_INTERRSTAT4_Pos (4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

INTERRSTAT4 (Bit 4)

◆ GPDMA_INTERRSTAT_INTERRSTAT5_Msk

#define GPDMA_INTERRSTAT_INTERRSTAT5_Msk (0x20UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

INTERRSTAT5 (Bitfield-Mask: 0x01)

◆ GPDMA_INTERRSTAT_INTERRSTAT5_Pos

#define GPDMA_INTERRSTAT_INTERRSTAT5_Pos (5UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

INTERRSTAT5 (Bit 5)

◆ GPDMA_INTERRSTAT_INTERRSTAT6_Msk

#define GPDMA_INTERRSTAT_INTERRSTAT6_Msk (0x40UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

INTERRSTAT6 (Bitfield-Mask: 0x01)

◆ GPDMA_INTERRSTAT_INTERRSTAT6_Pos

#define GPDMA_INTERRSTAT_INTERRSTAT6_Pos (6UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

INTERRSTAT6 (Bit 6)

◆ GPDMA_INTERRSTAT_INTERRSTAT7_Msk

#define GPDMA_INTERRSTAT_INTERRSTAT7_Msk (0x80UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

INTERRSTAT7 (Bitfield-Mask: 0x01)

◆ GPDMA_INTERRSTAT_INTERRSTAT7_Pos

#define GPDMA_INTERRSTAT_INTERRSTAT7_Pos (7UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

INTERRSTAT7 (Bit 7)

◆ GPDMA_INTSTAT_INTSTAT0_Msk

#define GPDMA_INTSTAT_INTSTAT0_Msk (0x1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

INTSTAT0 (Bitfield-Mask: 0x01)

◆ GPDMA_INTSTAT_INTSTAT0_Pos

#define GPDMA_INTSTAT_INTSTAT0_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

INTSTAT0 (Bit 0)

◆ GPDMA_INTSTAT_INTSTAT1_Msk

#define GPDMA_INTSTAT_INTSTAT1_Msk (0x2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

INTSTAT1 (Bitfield-Mask: 0x01)

◆ GPDMA_INTSTAT_INTSTAT1_Pos

#define GPDMA_INTSTAT_INTSTAT1_Pos (1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

INTSTAT1 (Bit 1)

◆ GPDMA_INTSTAT_INTSTAT2_Msk

#define GPDMA_INTSTAT_INTSTAT2_Msk (0x4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

INTSTAT2 (Bitfield-Mask: 0x01)

◆ GPDMA_INTSTAT_INTSTAT2_Pos

#define GPDMA_INTSTAT_INTSTAT2_Pos (2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

INTSTAT2 (Bit 2)

◆ GPDMA_INTSTAT_INTSTAT3_Msk

#define GPDMA_INTSTAT_INTSTAT3_Msk (0x8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

INTSTAT3 (Bitfield-Mask: 0x01)

◆ GPDMA_INTSTAT_INTSTAT3_Pos

#define GPDMA_INTSTAT_INTSTAT3_Pos (3UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

INTSTAT3 (Bit 3)

◆ GPDMA_INTSTAT_INTSTAT4_Msk

#define GPDMA_INTSTAT_INTSTAT4_Msk (0x10UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

INTSTAT4 (Bitfield-Mask: 0x01)

◆ GPDMA_INTSTAT_INTSTAT4_Pos

#define GPDMA_INTSTAT_INTSTAT4_Pos (4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

INTSTAT4 (Bit 4)

◆ GPDMA_INTSTAT_INTSTAT5_Msk

#define GPDMA_INTSTAT_INTSTAT5_Msk (0x20UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

INTSTAT5 (Bitfield-Mask: 0x01)

◆ GPDMA_INTSTAT_INTSTAT5_Pos

#define GPDMA_INTSTAT_INTSTAT5_Pos (5UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

INTSTAT5 (Bit 5)

◆ GPDMA_INTSTAT_INTSTAT6_Msk

#define GPDMA_INTSTAT_INTSTAT6_Msk (0x40UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

INTSTAT6 (Bitfield-Mask: 0x01)

◆ GPDMA_INTSTAT_INTSTAT6_Pos

#define GPDMA_INTSTAT_INTSTAT6_Pos (6UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

INTSTAT6 (Bit 6)

◆ GPDMA_INTSTAT_INTSTAT7_Msk

#define GPDMA_INTSTAT_INTSTAT7_Msk (0x80UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

INTSTAT7 (Bitfield-Mask: 0x01)

◆ GPDMA_INTSTAT_INTSTAT7_Pos

#define GPDMA_INTSTAT_INTSTAT7_Pos (7UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

INTSTAT7 (Bit 7)

◆ GPDMA_INTTCCLEAR_INTTCCLEAR0_Msk

#define GPDMA_INTTCCLEAR_INTTCCLEAR0_Msk (0x1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

INTTCCLEAR0 (Bitfield-Mask: 0x01)

◆ GPDMA_INTTCCLEAR_INTTCCLEAR0_Pos

#define GPDMA_INTTCCLEAR_INTTCCLEAR0_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

INTTCCLEAR0 (Bit 0)

◆ GPDMA_INTTCCLEAR_INTTCCLEAR1_Msk

#define GPDMA_INTTCCLEAR_INTTCCLEAR1_Msk (0x2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

INTTCCLEAR1 (Bitfield-Mask: 0x01)

◆ GPDMA_INTTCCLEAR_INTTCCLEAR1_Pos

#define GPDMA_INTTCCLEAR_INTTCCLEAR1_Pos (1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

INTTCCLEAR1 (Bit 1)

◆ GPDMA_INTTCCLEAR_INTTCCLEAR2_Msk

#define GPDMA_INTTCCLEAR_INTTCCLEAR2_Msk (0x4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

INTTCCLEAR2 (Bitfield-Mask: 0x01)

◆ GPDMA_INTTCCLEAR_INTTCCLEAR2_Pos

#define GPDMA_INTTCCLEAR_INTTCCLEAR2_Pos (2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

INTTCCLEAR2 (Bit 2)

◆ GPDMA_INTTCCLEAR_INTTCCLEAR3_Msk

#define GPDMA_INTTCCLEAR_INTTCCLEAR3_Msk (0x8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

INTTCCLEAR3 (Bitfield-Mask: 0x01)

◆ GPDMA_INTTCCLEAR_INTTCCLEAR3_Pos

#define GPDMA_INTTCCLEAR_INTTCCLEAR3_Pos (3UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

INTTCCLEAR3 (Bit 3)

◆ GPDMA_INTTCCLEAR_INTTCCLEAR4_Msk

#define GPDMA_INTTCCLEAR_INTTCCLEAR4_Msk (0x10UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

INTTCCLEAR4 (Bitfield-Mask: 0x01)

◆ GPDMA_INTTCCLEAR_INTTCCLEAR4_Pos

#define GPDMA_INTTCCLEAR_INTTCCLEAR4_Pos (4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

INTTCCLEAR4 (Bit 4)

◆ GPDMA_INTTCCLEAR_INTTCCLEAR5_Msk

#define GPDMA_INTTCCLEAR_INTTCCLEAR5_Msk (0x20UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

INTTCCLEAR5 (Bitfield-Mask: 0x01)

◆ GPDMA_INTTCCLEAR_INTTCCLEAR5_Pos

#define GPDMA_INTTCCLEAR_INTTCCLEAR5_Pos (5UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

INTTCCLEAR5 (Bit 5)

◆ GPDMA_INTTCCLEAR_INTTCCLEAR6_Msk

#define GPDMA_INTTCCLEAR_INTTCCLEAR6_Msk (0x40UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

INTTCCLEAR6 (Bitfield-Mask: 0x01)

◆ GPDMA_INTTCCLEAR_INTTCCLEAR6_Pos

#define GPDMA_INTTCCLEAR_INTTCCLEAR6_Pos (6UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

INTTCCLEAR6 (Bit 6)

◆ GPDMA_INTTCCLEAR_INTTCCLEAR7_Msk

#define GPDMA_INTTCCLEAR_INTTCCLEAR7_Msk (0x80UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

INTTCCLEAR7 (Bitfield-Mask: 0x01)

◆ GPDMA_INTTCCLEAR_INTTCCLEAR7_Pos

#define GPDMA_INTTCCLEAR_INTTCCLEAR7_Pos (7UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

INTTCCLEAR7 (Bit 7)

◆ GPDMA_INTTCSTAT_INTTCSTAT0_Msk

#define GPDMA_INTTCSTAT_INTTCSTAT0_Msk (0x1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

INTTCSTAT0 (Bitfield-Mask: 0x01)

◆ GPDMA_INTTCSTAT_INTTCSTAT0_Pos

#define GPDMA_INTTCSTAT_INTTCSTAT0_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

INTTCSTAT0 (Bit 0)

◆ GPDMA_INTTCSTAT_INTTCSTAT1_Msk

#define GPDMA_INTTCSTAT_INTTCSTAT1_Msk (0x2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

INTTCSTAT1 (Bitfield-Mask: 0x01)

◆ GPDMA_INTTCSTAT_INTTCSTAT1_Pos

#define GPDMA_INTTCSTAT_INTTCSTAT1_Pos (1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

INTTCSTAT1 (Bit 1)

◆ GPDMA_INTTCSTAT_INTTCSTAT2_Msk

#define GPDMA_INTTCSTAT_INTTCSTAT2_Msk (0x4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

INTTCSTAT2 (Bitfield-Mask: 0x01)

◆ GPDMA_INTTCSTAT_INTTCSTAT2_Pos

#define GPDMA_INTTCSTAT_INTTCSTAT2_Pos (2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

INTTCSTAT2 (Bit 2)

◆ GPDMA_INTTCSTAT_INTTCSTAT3_Msk

#define GPDMA_INTTCSTAT_INTTCSTAT3_Msk (0x8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

INTTCSTAT3 (Bitfield-Mask: 0x01)

◆ GPDMA_INTTCSTAT_INTTCSTAT3_Pos

#define GPDMA_INTTCSTAT_INTTCSTAT3_Pos (3UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

INTTCSTAT3 (Bit 3)

◆ GPDMA_INTTCSTAT_INTTCSTAT4_Msk

#define GPDMA_INTTCSTAT_INTTCSTAT4_Msk (0x10UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

INTTCSTAT4 (Bitfield-Mask: 0x01)

◆ GPDMA_INTTCSTAT_INTTCSTAT4_Pos

#define GPDMA_INTTCSTAT_INTTCSTAT4_Pos (4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

INTTCSTAT4 (Bit 4)

◆ GPDMA_INTTCSTAT_INTTCSTAT5_Msk

#define GPDMA_INTTCSTAT_INTTCSTAT5_Msk (0x20UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

INTTCSTAT5 (Bitfield-Mask: 0x01)

◆ GPDMA_INTTCSTAT_INTTCSTAT5_Pos

#define GPDMA_INTTCSTAT_INTTCSTAT5_Pos (5UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

INTTCSTAT5 (Bit 5)

◆ GPDMA_INTTCSTAT_INTTCSTAT6_Msk

#define GPDMA_INTTCSTAT_INTTCSTAT6_Msk (0x40UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

INTTCSTAT6 (Bitfield-Mask: 0x01)

◆ GPDMA_INTTCSTAT_INTTCSTAT6_Pos

#define GPDMA_INTTCSTAT_INTTCSTAT6_Pos (6UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

INTTCSTAT6 (Bit 6)

◆ GPDMA_INTTCSTAT_INTTCSTAT7_Msk

#define GPDMA_INTTCSTAT_INTTCSTAT7_Msk (0x80UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

INTTCSTAT7 (Bitfield-Mask: 0x01)

◆ GPDMA_INTTCSTAT_INTTCSTAT7_Pos

#define GPDMA_INTTCSTAT_INTTCSTAT7_Pos (7UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

INTTCSTAT7 (Bit 7)

◆ GPDMA_LLI0_LLI_Msk

#define GPDMA_LLI0_LLI_Msk (0xfffffffcUL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

LLI (Bitfield-Mask: 0x3fffffff)

◆ GPDMA_LLI0_LLI_Pos

#define GPDMA_LLI0_LLI_Pos (2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

LLI (Bit 2)

◆ GPDMA_LLI1_LLI_Msk

#define GPDMA_LLI1_LLI_Msk (0xfffffffcUL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

LLI (Bitfield-Mask: 0x3fffffff)

◆ GPDMA_LLI1_LLI_Pos

#define GPDMA_LLI1_LLI_Pos (2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

LLI (Bit 2)

◆ GPDMA_LLI2_LLI_Msk

#define GPDMA_LLI2_LLI_Msk (0xfffffffcUL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

LLI (Bitfield-Mask: 0x3fffffff)

◆ GPDMA_LLI2_LLI_Pos

#define GPDMA_LLI2_LLI_Pos (2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

LLI (Bit 2)

◆ GPDMA_LLI3_LLI_Msk

#define GPDMA_LLI3_LLI_Msk (0xfffffffcUL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

LLI (Bitfield-Mask: 0x3fffffff)

◆ GPDMA_LLI3_LLI_Pos

#define GPDMA_LLI3_LLI_Pos (2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

LLI (Bit 2)

◆ GPDMA_LLI4_LLI_Msk

#define GPDMA_LLI4_LLI_Msk (0xfffffffcUL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

LLI (Bitfield-Mask: 0x3fffffff)

◆ GPDMA_LLI4_LLI_Pos

#define GPDMA_LLI4_LLI_Pos (2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

LLI (Bit 2)

◆ GPDMA_LLI5_LLI_Msk

#define GPDMA_LLI5_LLI_Msk (0xfffffffcUL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

LLI (Bitfield-Mask: 0x3fffffff)

◆ GPDMA_LLI5_LLI_Pos

#define GPDMA_LLI5_LLI_Pos (2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

LLI (Bit 2)

◆ GPDMA_LLI6_LLI_Msk

#define GPDMA_LLI6_LLI_Msk (0xfffffffcUL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

LLI (Bitfield-Mask: 0x3fffffff)

◆ GPDMA_LLI6_LLI_Pos

#define GPDMA_LLI6_LLI_Pos (2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

LLI (Bit 2)

◆ GPDMA_LLI7_LLI_Msk

#define GPDMA_LLI7_LLI_Msk (0xfffffffcUL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

LLI (Bitfield-Mask: 0x3fffffff)

◆ GPDMA_LLI7_LLI_Pos

#define GPDMA_LLI7_LLI_Pos (2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

LLI (Bit 2)

◆ GPDMA_RAWINTERRSTAT_RAWINTERRSTAT0_Msk

#define GPDMA_RAWINTERRSTAT_RAWINTERRSTAT0_Msk (0x1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RAWINTERRSTAT0 (Bitfield-Mask: 0x01)

◆ GPDMA_RAWINTERRSTAT_RAWINTERRSTAT0_Pos

#define GPDMA_RAWINTERRSTAT_RAWINTERRSTAT0_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RAWINTERRSTAT0 (Bit 0)

◆ GPDMA_RAWINTERRSTAT_RAWINTERRSTAT1_Msk

#define GPDMA_RAWINTERRSTAT_RAWINTERRSTAT1_Msk (0x2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RAWINTERRSTAT1 (Bitfield-Mask: 0x01)

◆ GPDMA_RAWINTERRSTAT_RAWINTERRSTAT1_Pos

#define GPDMA_RAWINTERRSTAT_RAWINTERRSTAT1_Pos (1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RAWINTERRSTAT1 (Bit 1)

◆ GPDMA_RAWINTERRSTAT_RAWINTERRSTAT2_Msk

#define GPDMA_RAWINTERRSTAT_RAWINTERRSTAT2_Msk (0x4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RAWINTERRSTAT2 (Bitfield-Mask: 0x01)

◆ GPDMA_RAWINTERRSTAT_RAWINTERRSTAT2_Pos

#define GPDMA_RAWINTERRSTAT_RAWINTERRSTAT2_Pos (2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RAWINTERRSTAT2 (Bit 2)

◆ GPDMA_RAWINTERRSTAT_RAWINTERRSTAT3_Msk

#define GPDMA_RAWINTERRSTAT_RAWINTERRSTAT3_Msk (0x8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RAWINTERRSTAT3 (Bitfield-Mask: 0x01)

◆ GPDMA_RAWINTERRSTAT_RAWINTERRSTAT3_Pos

#define GPDMA_RAWINTERRSTAT_RAWINTERRSTAT3_Pos (3UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RAWINTERRSTAT3 (Bit 3)

◆ GPDMA_RAWINTERRSTAT_RAWINTERRSTAT4_Msk

#define GPDMA_RAWINTERRSTAT_RAWINTERRSTAT4_Msk (0x10UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RAWINTERRSTAT4 (Bitfield-Mask: 0x01)

◆ GPDMA_RAWINTERRSTAT_RAWINTERRSTAT4_Pos

#define GPDMA_RAWINTERRSTAT_RAWINTERRSTAT4_Pos (4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RAWINTERRSTAT4 (Bit 4)

◆ GPDMA_RAWINTERRSTAT_RAWINTERRSTAT5_Msk

#define GPDMA_RAWINTERRSTAT_RAWINTERRSTAT5_Msk (0x20UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RAWINTERRSTAT5 (Bitfield-Mask: 0x01)

◆ GPDMA_RAWINTERRSTAT_RAWINTERRSTAT5_Pos

#define GPDMA_RAWINTERRSTAT_RAWINTERRSTAT5_Pos (5UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RAWINTERRSTAT5 (Bit 5)

◆ GPDMA_RAWINTERRSTAT_RAWINTERRSTAT6_Msk

#define GPDMA_RAWINTERRSTAT_RAWINTERRSTAT6_Msk (0x40UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RAWINTERRSTAT6 (Bitfield-Mask: 0x01)

◆ GPDMA_RAWINTERRSTAT_RAWINTERRSTAT6_Pos

#define GPDMA_RAWINTERRSTAT_RAWINTERRSTAT6_Pos (6UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RAWINTERRSTAT6 (Bit 6)

◆ GPDMA_RAWINTERRSTAT_RAWINTERRSTAT7_Msk

#define GPDMA_RAWINTERRSTAT_RAWINTERRSTAT7_Msk (0x80UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RAWINTERRSTAT7 (Bitfield-Mask: 0x01)

◆ GPDMA_RAWINTERRSTAT_RAWINTERRSTAT7_Pos

#define GPDMA_RAWINTERRSTAT_RAWINTERRSTAT7_Pos (7UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RAWINTERRSTAT7 (Bit 7)

◆ GPDMA_RAWINTTCSTAT_RAWINTTCSTAT0_Msk

#define GPDMA_RAWINTTCSTAT_RAWINTTCSTAT0_Msk (0x1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RAWINTTCSTAT0 (Bitfield-Mask: 0x01)

◆ GPDMA_RAWINTTCSTAT_RAWINTTCSTAT0_Pos

#define GPDMA_RAWINTTCSTAT_RAWINTTCSTAT0_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RAWINTTCSTAT0 (Bit 0)

◆ GPDMA_RAWINTTCSTAT_RAWINTTCSTAT1_Msk

#define GPDMA_RAWINTTCSTAT_RAWINTTCSTAT1_Msk (0x2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RAWINTTCSTAT1 (Bitfield-Mask: 0x01)

◆ GPDMA_RAWINTTCSTAT_RAWINTTCSTAT1_Pos

#define GPDMA_RAWINTTCSTAT_RAWINTTCSTAT1_Pos (1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RAWINTTCSTAT1 (Bit 1)

◆ GPDMA_RAWINTTCSTAT_RAWINTTCSTAT2_Msk

#define GPDMA_RAWINTTCSTAT_RAWINTTCSTAT2_Msk (0x4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RAWINTTCSTAT2 (Bitfield-Mask: 0x01)

◆ GPDMA_RAWINTTCSTAT_RAWINTTCSTAT2_Pos

#define GPDMA_RAWINTTCSTAT_RAWINTTCSTAT2_Pos (2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RAWINTTCSTAT2 (Bit 2)

◆ GPDMA_RAWINTTCSTAT_RAWINTTCSTAT3_Msk

#define GPDMA_RAWINTTCSTAT_RAWINTTCSTAT3_Msk (0x8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RAWINTTCSTAT3 (Bitfield-Mask: 0x01)

◆ GPDMA_RAWINTTCSTAT_RAWINTTCSTAT3_Pos

#define GPDMA_RAWINTTCSTAT_RAWINTTCSTAT3_Pos (3UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RAWINTTCSTAT3 (Bit 3)

◆ GPDMA_RAWINTTCSTAT_RAWINTTCSTAT4_Msk

#define GPDMA_RAWINTTCSTAT_RAWINTTCSTAT4_Msk (0x10UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RAWINTTCSTAT4 (Bitfield-Mask: 0x01)

◆ GPDMA_RAWINTTCSTAT_RAWINTTCSTAT4_Pos

#define GPDMA_RAWINTTCSTAT_RAWINTTCSTAT4_Pos (4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RAWINTTCSTAT4 (Bit 4)

◆ GPDMA_RAWINTTCSTAT_RAWINTTCSTAT5_Msk

#define GPDMA_RAWINTTCSTAT_RAWINTTCSTAT5_Msk (0x20UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RAWINTTCSTAT5 (Bitfield-Mask: 0x01)

◆ GPDMA_RAWINTTCSTAT_RAWINTTCSTAT5_Pos

#define GPDMA_RAWINTTCSTAT_RAWINTTCSTAT5_Pos (5UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RAWINTTCSTAT5 (Bit 5)

◆ GPDMA_RAWINTTCSTAT_RAWINTTCSTAT6_Msk

#define GPDMA_RAWINTTCSTAT_RAWINTTCSTAT6_Msk (0x40UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RAWINTTCSTAT6 (Bitfield-Mask: 0x01)

◆ GPDMA_RAWINTTCSTAT_RAWINTTCSTAT6_Pos

#define GPDMA_RAWINTTCSTAT_RAWINTTCSTAT6_Pos (6UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RAWINTTCSTAT6 (Bit 6)

◆ GPDMA_RAWINTTCSTAT_RAWINTTCSTAT7_Msk

#define GPDMA_RAWINTTCSTAT_RAWINTTCSTAT7_Msk (0x80UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RAWINTTCSTAT7 (Bitfield-Mask: 0x01)

◆ GPDMA_RAWINTTCSTAT_RAWINTTCSTAT7_Pos

#define GPDMA_RAWINTTCSTAT_RAWINTTCSTAT7_Pos (7UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RAWINTTCSTAT7 (Bit 7)

◆ GPDMA_SOFTBREQ_SOFTBREQ0_Msk

#define GPDMA_SOFTBREQ_SOFTBREQ0_Msk (0x1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

SOFTBREQ0 (Bitfield-Mask: 0x01)

◆ GPDMA_SOFTBREQ_SOFTBREQ0_Pos

#define GPDMA_SOFTBREQ_SOFTBREQ0_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

SOFTBREQ0 (Bit 0)

◆ GPDMA_SOFTBREQ_SOFTBREQ10_Msk

#define GPDMA_SOFTBREQ_SOFTBREQ10_Msk (0x400UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

SOFTBREQ10 (Bitfield-Mask: 0x01)

◆ GPDMA_SOFTBREQ_SOFTBREQ10_Pos

#define GPDMA_SOFTBREQ_SOFTBREQ10_Pos (10UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

SOFTBREQ10 (Bit 10)

◆ GPDMA_SOFTBREQ_SOFTBREQ11_Msk

#define GPDMA_SOFTBREQ_SOFTBREQ11_Msk (0x800UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

SOFTBREQ11 (Bitfield-Mask: 0x01)

◆ GPDMA_SOFTBREQ_SOFTBREQ11_Pos

#define GPDMA_SOFTBREQ_SOFTBREQ11_Pos (11UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

SOFTBREQ11 (Bit 11)

◆ GPDMA_SOFTBREQ_SOFTBREQ12_Msk

#define GPDMA_SOFTBREQ_SOFTBREQ12_Msk (0x1000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

SOFTBREQ12 (Bitfield-Mask: 0x01)

◆ GPDMA_SOFTBREQ_SOFTBREQ12_Pos

#define GPDMA_SOFTBREQ_SOFTBREQ12_Pos (12UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

SOFTBREQ12 (Bit 12)

◆ GPDMA_SOFTBREQ_SOFTBREQ13_Msk

#define GPDMA_SOFTBREQ_SOFTBREQ13_Msk (0x2000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

SOFTBREQ13 (Bitfield-Mask: 0x01)

◆ GPDMA_SOFTBREQ_SOFTBREQ13_Pos

#define GPDMA_SOFTBREQ_SOFTBREQ13_Pos (13UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

SOFTBREQ13 (Bit 13)

◆ GPDMA_SOFTBREQ_SOFTBREQ14_Msk

#define GPDMA_SOFTBREQ_SOFTBREQ14_Msk (0x4000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

SOFTBREQ14 (Bitfield-Mask: 0x01)

◆ GPDMA_SOFTBREQ_SOFTBREQ14_Pos

#define GPDMA_SOFTBREQ_SOFTBREQ14_Pos (14UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

SOFTBREQ14 (Bit 14)

◆ GPDMA_SOFTBREQ_SOFTBREQ15_Msk

#define GPDMA_SOFTBREQ_SOFTBREQ15_Msk (0x8000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

SOFTBREQ15 (Bitfield-Mask: 0x01)

◆ GPDMA_SOFTBREQ_SOFTBREQ15_Pos

#define GPDMA_SOFTBREQ_SOFTBREQ15_Pos (15UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

SOFTBREQ15 (Bit 15)

◆ GPDMA_SOFTBREQ_SOFTBREQ1_Msk

#define GPDMA_SOFTBREQ_SOFTBREQ1_Msk (0x2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

SOFTBREQ1 (Bitfield-Mask: 0x01)

◆ GPDMA_SOFTBREQ_SOFTBREQ1_Pos

#define GPDMA_SOFTBREQ_SOFTBREQ1_Pos (1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

SOFTBREQ1 (Bit 1)

◆ GPDMA_SOFTBREQ_SOFTBREQ2_Msk

#define GPDMA_SOFTBREQ_SOFTBREQ2_Msk (0x4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

SOFTBREQ2 (Bitfield-Mask: 0x01)

◆ GPDMA_SOFTBREQ_SOFTBREQ2_Pos

#define GPDMA_SOFTBREQ_SOFTBREQ2_Pos (2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

SOFTBREQ2 (Bit 2)

◆ GPDMA_SOFTBREQ_SOFTBREQ3_Msk

#define GPDMA_SOFTBREQ_SOFTBREQ3_Msk (0x8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

SOFTBREQ3 (Bitfield-Mask: 0x01)

◆ GPDMA_SOFTBREQ_SOFTBREQ3_Pos

#define GPDMA_SOFTBREQ_SOFTBREQ3_Pos (3UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

SOFTBREQ3 (Bit 3)

◆ GPDMA_SOFTBREQ_SOFTBREQ4_Msk

#define GPDMA_SOFTBREQ_SOFTBREQ4_Msk (0x10UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

SOFTBREQ4 (Bitfield-Mask: 0x01)

◆ GPDMA_SOFTBREQ_SOFTBREQ4_Pos

#define GPDMA_SOFTBREQ_SOFTBREQ4_Pos (4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

SOFTBREQ4 (Bit 4)

◆ GPDMA_SOFTBREQ_SOFTBREQ5_Msk

#define GPDMA_SOFTBREQ_SOFTBREQ5_Msk (0x20UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

SOFTBREQ5 (Bitfield-Mask: 0x01)

◆ GPDMA_SOFTBREQ_SOFTBREQ5_Pos

#define GPDMA_SOFTBREQ_SOFTBREQ5_Pos (5UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

SOFTBREQ5 (Bit 5)

◆ GPDMA_SOFTBREQ_SOFTBREQ6_Msk

#define GPDMA_SOFTBREQ_SOFTBREQ6_Msk (0x40UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

SOFTBREQ6 (Bitfield-Mask: 0x01)

◆ GPDMA_SOFTBREQ_SOFTBREQ6_Pos

#define GPDMA_SOFTBREQ_SOFTBREQ6_Pos (6UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

SOFTBREQ6 (Bit 6)

◆ GPDMA_SOFTBREQ_SOFTBREQ7_Msk

#define GPDMA_SOFTBREQ_SOFTBREQ7_Msk (0x80UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

SOFTBREQ7 (Bitfield-Mask: 0x01)

◆ GPDMA_SOFTBREQ_SOFTBREQ7_Pos

#define GPDMA_SOFTBREQ_SOFTBREQ7_Pos (7UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

SOFTBREQ7 (Bit 7)

◆ GPDMA_SOFTBREQ_SOFTBREQ8_Msk

#define GPDMA_SOFTBREQ_SOFTBREQ8_Msk (0x100UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

SOFTBREQ8 (Bitfield-Mask: 0x01)

◆ GPDMA_SOFTBREQ_SOFTBREQ8_Pos

#define GPDMA_SOFTBREQ_SOFTBREQ8_Pos (8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

SOFTBREQ8 (Bit 8)

◆ GPDMA_SOFTBREQ_SOFTBREQ9_Msk

#define GPDMA_SOFTBREQ_SOFTBREQ9_Msk (0x200UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

SOFTBREQ9 (Bitfield-Mask: 0x01)

◆ GPDMA_SOFTBREQ_SOFTBREQ9_Pos

#define GPDMA_SOFTBREQ_SOFTBREQ9_Pos (9UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

SOFTBREQ9 (Bit 9)

◆ GPDMA_SOFTLBREQ_SOFTLBREQ0_Msk

#define GPDMA_SOFTLBREQ_SOFTLBREQ0_Msk (0x1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

SOFTLBREQ0 (Bitfield-Mask: 0x01)

◆ GPDMA_SOFTLBREQ_SOFTLBREQ0_Pos

#define GPDMA_SOFTLBREQ_SOFTLBREQ0_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

SOFTLBREQ0 (Bit 0)

◆ GPDMA_SOFTLBREQ_SOFTLBREQ10_Msk

#define GPDMA_SOFTLBREQ_SOFTLBREQ10_Msk (0x400UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

SOFTLBREQ10 (Bitfield-Mask: 0x01)

◆ GPDMA_SOFTLBREQ_SOFTLBREQ10_Pos

#define GPDMA_SOFTLBREQ_SOFTLBREQ10_Pos (10UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

SOFTLBREQ10 (Bit 10)

◆ GPDMA_SOFTLBREQ_SOFTLBREQ11_Msk

#define GPDMA_SOFTLBREQ_SOFTLBREQ11_Msk (0x800UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

SOFTLBREQ11 (Bitfield-Mask: 0x01)

◆ GPDMA_SOFTLBREQ_SOFTLBREQ11_Pos

#define GPDMA_SOFTLBREQ_SOFTLBREQ11_Pos (11UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

SOFTLBREQ11 (Bit 11)

◆ GPDMA_SOFTLBREQ_SOFTLBREQ12_Msk

#define GPDMA_SOFTLBREQ_SOFTLBREQ12_Msk (0x1000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

SOFTLBREQ12 (Bitfield-Mask: 0x01)

◆ GPDMA_SOFTLBREQ_SOFTLBREQ12_Pos

#define GPDMA_SOFTLBREQ_SOFTLBREQ12_Pos (12UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

SOFTLBREQ12 (Bit 12)

◆ GPDMA_SOFTLBREQ_SOFTLBREQ13_Msk

#define GPDMA_SOFTLBREQ_SOFTLBREQ13_Msk (0x2000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

SOFTLBREQ13 (Bitfield-Mask: 0x01)

◆ GPDMA_SOFTLBREQ_SOFTLBREQ13_Pos

#define GPDMA_SOFTLBREQ_SOFTLBREQ13_Pos (13UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

SOFTLBREQ13 (Bit 13)

◆ GPDMA_SOFTLBREQ_SOFTLBREQ14_Msk

#define GPDMA_SOFTLBREQ_SOFTLBREQ14_Msk (0x4000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

SOFTLBREQ14 (Bitfield-Mask: 0x01)

◆ GPDMA_SOFTLBREQ_SOFTLBREQ14_Pos

#define GPDMA_SOFTLBREQ_SOFTLBREQ14_Pos (14UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

SOFTLBREQ14 (Bit 14)

◆ GPDMA_SOFTLBREQ_SOFTLBREQ15_Msk

#define GPDMA_SOFTLBREQ_SOFTLBREQ15_Msk (0x8000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

SOFTLBREQ15 (Bitfield-Mask: 0x01)

◆ GPDMA_SOFTLBREQ_SOFTLBREQ15_Pos

#define GPDMA_SOFTLBREQ_SOFTLBREQ15_Pos (15UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

SOFTLBREQ15 (Bit 15)

◆ GPDMA_SOFTLBREQ_SOFTLBREQ1_Msk

#define GPDMA_SOFTLBREQ_SOFTLBREQ1_Msk (0x2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

SOFTLBREQ1 (Bitfield-Mask: 0x01)

◆ GPDMA_SOFTLBREQ_SOFTLBREQ1_Pos

#define GPDMA_SOFTLBREQ_SOFTLBREQ1_Pos (1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

SOFTLBREQ1 (Bit 1)

◆ GPDMA_SOFTLBREQ_SOFTLBREQ2_Msk

#define GPDMA_SOFTLBREQ_SOFTLBREQ2_Msk (0x4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

SOFTLBREQ2 (Bitfield-Mask: 0x01)

◆ GPDMA_SOFTLBREQ_SOFTLBREQ2_Pos

#define GPDMA_SOFTLBREQ_SOFTLBREQ2_Pos (2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

SOFTLBREQ2 (Bit 2)

◆ GPDMA_SOFTLBREQ_SOFTLBREQ3_Msk

#define GPDMA_SOFTLBREQ_SOFTLBREQ3_Msk (0x8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

SOFTLBREQ3 (Bitfield-Mask: 0x01)

◆ GPDMA_SOFTLBREQ_SOFTLBREQ3_Pos

#define GPDMA_SOFTLBREQ_SOFTLBREQ3_Pos (3UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

SOFTLBREQ3 (Bit 3)

◆ GPDMA_SOFTLBREQ_SOFTLBREQ4_Msk

#define GPDMA_SOFTLBREQ_SOFTLBREQ4_Msk (0x10UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

SOFTLBREQ4 (Bitfield-Mask: 0x01)

◆ GPDMA_SOFTLBREQ_SOFTLBREQ4_Pos

#define GPDMA_SOFTLBREQ_SOFTLBREQ4_Pos (4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

SOFTLBREQ4 (Bit 4)

◆ GPDMA_SOFTLBREQ_SOFTLBREQ5_Msk

#define GPDMA_SOFTLBREQ_SOFTLBREQ5_Msk (0x20UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

SOFTLBREQ5 (Bitfield-Mask: 0x01)

◆ GPDMA_SOFTLBREQ_SOFTLBREQ5_Pos

#define GPDMA_SOFTLBREQ_SOFTLBREQ5_Pos (5UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

SOFTLBREQ5 (Bit 5)

◆ GPDMA_SOFTLBREQ_SOFTLBREQ6_Msk

#define GPDMA_SOFTLBREQ_SOFTLBREQ6_Msk (0x40UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

SOFTLBREQ6 (Bitfield-Mask: 0x01)

◆ GPDMA_SOFTLBREQ_SOFTLBREQ6_Pos

#define GPDMA_SOFTLBREQ_SOFTLBREQ6_Pos (6UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

SOFTLBREQ6 (Bit 6)

◆ GPDMA_SOFTLBREQ_SOFTLBREQ7_Msk

#define GPDMA_SOFTLBREQ_SOFTLBREQ7_Msk (0x80UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

SOFTLBREQ7 (Bitfield-Mask: 0x01)

◆ GPDMA_SOFTLBREQ_SOFTLBREQ7_Pos

#define GPDMA_SOFTLBREQ_SOFTLBREQ7_Pos (7UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

SOFTLBREQ7 (Bit 7)

◆ GPDMA_SOFTLBREQ_SOFTLBREQ8_Msk

#define GPDMA_SOFTLBREQ_SOFTLBREQ8_Msk (0x100UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

SOFTLBREQ8 (Bitfield-Mask: 0x01)

◆ GPDMA_SOFTLBREQ_SOFTLBREQ8_Pos

#define GPDMA_SOFTLBREQ_SOFTLBREQ8_Pos (8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

SOFTLBREQ8 (Bit 8)

◆ GPDMA_SOFTLBREQ_SOFTLBREQ9_Msk

#define GPDMA_SOFTLBREQ_SOFTLBREQ9_Msk (0x200UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

SOFTLBREQ9 (Bitfield-Mask: 0x01)

◆ GPDMA_SOFTLBREQ_SOFTLBREQ9_Pos

#define GPDMA_SOFTLBREQ_SOFTLBREQ9_Pos (9UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

SOFTLBREQ9 (Bit 9)

◆ GPDMA_SOFTLSREQ_SOFTLSREQ0_Msk

#define GPDMA_SOFTLSREQ_SOFTLSREQ0_Msk (0x1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

SOFTLSREQ0 (Bitfield-Mask: 0x01)

◆ GPDMA_SOFTLSREQ_SOFTLSREQ0_Pos

#define GPDMA_SOFTLSREQ_SOFTLSREQ0_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

SOFTLSREQ0 (Bit 0)

◆ GPDMA_SOFTLSREQ_SOFTLSREQ10_Msk

#define GPDMA_SOFTLSREQ_SOFTLSREQ10_Msk (0x400UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

SOFTLSREQ10 (Bitfield-Mask: 0x01)

◆ GPDMA_SOFTLSREQ_SOFTLSREQ10_Pos

#define GPDMA_SOFTLSREQ_SOFTLSREQ10_Pos (10UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

SOFTLSREQ10 (Bit 10)

◆ GPDMA_SOFTLSREQ_SOFTLSREQ11_Msk

#define GPDMA_SOFTLSREQ_SOFTLSREQ11_Msk (0x800UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

SOFTLSREQ11 (Bitfield-Mask: 0x01)

◆ GPDMA_SOFTLSREQ_SOFTLSREQ11_Pos

#define GPDMA_SOFTLSREQ_SOFTLSREQ11_Pos (11UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

SOFTLSREQ11 (Bit 11)

◆ GPDMA_SOFTLSREQ_SOFTLSREQ12_Msk

#define GPDMA_SOFTLSREQ_SOFTLSREQ12_Msk (0x1000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

SOFTLSREQ12 (Bitfield-Mask: 0x01)

◆ GPDMA_SOFTLSREQ_SOFTLSREQ12_Pos

#define GPDMA_SOFTLSREQ_SOFTLSREQ12_Pos (12UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

SOFTLSREQ12 (Bit 12)

◆ GPDMA_SOFTLSREQ_SOFTLSREQ13_Msk

#define GPDMA_SOFTLSREQ_SOFTLSREQ13_Msk (0x2000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

SOFTLSREQ13 (Bitfield-Mask: 0x01)

◆ GPDMA_SOFTLSREQ_SOFTLSREQ13_Pos

#define GPDMA_SOFTLSREQ_SOFTLSREQ13_Pos (13UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

SOFTLSREQ13 (Bit 13)

◆ GPDMA_SOFTLSREQ_SOFTLSREQ14_Msk

#define GPDMA_SOFTLSREQ_SOFTLSREQ14_Msk (0x4000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

SOFTLSREQ14 (Bitfield-Mask: 0x01)

◆ GPDMA_SOFTLSREQ_SOFTLSREQ14_Pos

#define GPDMA_SOFTLSREQ_SOFTLSREQ14_Pos (14UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

SOFTLSREQ14 (Bit 14)

◆ GPDMA_SOFTLSREQ_SOFTLSREQ15_Msk

#define GPDMA_SOFTLSREQ_SOFTLSREQ15_Msk (0x8000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

SOFTLSREQ15 (Bitfield-Mask: 0x01)

◆ GPDMA_SOFTLSREQ_SOFTLSREQ15_Pos

#define GPDMA_SOFTLSREQ_SOFTLSREQ15_Pos (15UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

SOFTLSREQ15 (Bit 15)

◆ GPDMA_SOFTLSREQ_SOFTLSREQ1_Msk

#define GPDMA_SOFTLSREQ_SOFTLSREQ1_Msk (0x2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

SOFTLSREQ1 (Bitfield-Mask: 0x01)

◆ GPDMA_SOFTLSREQ_SOFTLSREQ1_Pos

#define GPDMA_SOFTLSREQ_SOFTLSREQ1_Pos (1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

SOFTLSREQ1 (Bit 1)

◆ GPDMA_SOFTLSREQ_SOFTLSREQ2_Msk

#define GPDMA_SOFTLSREQ_SOFTLSREQ2_Msk (0x4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

SOFTLSREQ2 (Bitfield-Mask: 0x01)

◆ GPDMA_SOFTLSREQ_SOFTLSREQ2_Pos

#define GPDMA_SOFTLSREQ_SOFTLSREQ2_Pos (2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

SOFTLSREQ2 (Bit 2)

◆ GPDMA_SOFTLSREQ_SOFTLSREQ3_Msk

#define GPDMA_SOFTLSREQ_SOFTLSREQ3_Msk (0x8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

SOFTLSREQ3 (Bitfield-Mask: 0x01)

◆ GPDMA_SOFTLSREQ_SOFTLSREQ3_Pos

#define GPDMA_SOFTLSREQ_SOFTLSREQ3_Pos (3UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

SOFTLSREQ3 (Bit 3)

◆ GPDMA_SOFTLSREQ_SOFTLSREQ4_Msk

#define GPDMA_SOFTLSREQ_SOFTLSREQ4_Msk (0x10UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

SOFTLSREQ4 (Bitfield-Mask: 0x01)

◆ GPDMA_SOFTLSREQ_SOFTLSREQ4_Pos

#define GPDMA_SOFTLSREQ_SOFTLSREQ4_Pos (4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

SOFTLSREQ4 (Bit 4)

◆ GPDMA_SOFTLSREQ_SOFTLSREQ5_Msk

#define GPDMA_SOFTLSREQ_SOFTLSREQ5_Msk (0x20UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

SOFTLSREQ5 (Bitfield-Mask: 0x01)

◆ GPDMA_SOFTLSREQ_SOFTLSREQ5_Pos

#define GPDMA_SOFTLSREQ_SOFTLSREQ5_Pos (5UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

SOFTLSREQ5 (Bit 5)

◆ GPDMA_SOFTLSREQ_SOFTLSREQ6_Msk

#define GPDMA_SOFTLSREQ_SOFTLSREQ6_Msk (0x40UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

SOFTLSREQ6 (Bitfield-Mask: 0x01)

◆ GPDMA_SOFTLSREQ_SOFTLSREQ6_Pos

#define GPDMA_SOFTLSREQ_SOFTLSREQ6_Pos (6UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

SOFTLSREQ6 (Bit 6)

◆ GPDMA_SOFTLSREQ_SOFTLSREQ7_Msk

#define GPDMA_SOFTLSREQ_SOFTLSREQ7_Msk (0x80UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

SOFTLSREQ7 (Bitfield-Mask: 0x01)

◆ GPDMA_SOFTLSREQ_SOFTLSREQ7_Pos

#define GPDMA_SOFTLSREQ_SOFTLSREQ7_Pos (7UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

SOFTLSREQ7 (Bit 7)

◆ GPDMA_SOFTLSREQ_SOFTLSREQ8_Msk

#define GPDMA_SOFTLSREQ_SOFTLSREQ8_Msk (0x100UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

SOFTLSREQ8 (Bitfield-Mask: 0x01)

◆ GPDMA_SOFTLSREQ_SOFTLSREQ8_Pos

#define GPDMA_SOFTLSREQ_SOFTLSREQ8_Pos (8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

SOFTLSREQ8 (Bit 8)

◆ GPDMA_SOFTLSREQ_SOFTLSREQ9_Msk

#define GPDMA_SOFTLSREQ_SOFTLSREQ9_Msk (0x200UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

SOFTLSREQ9 (Bitfield-Mask: 0x01)

◆ GPDMA_SOFTLSREQ_SOFTLSREQ9_Pos

#define GPDMA_SOFTLSREQ_SOFTLSREQ9_Pos (9UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

SOFTLSREQ9 (Bit 9)

◆ GPDMA_SOFTSREQ_SOFTSREQ0_Msk

#define GPDMA_SOFTSREQ_SOFTSREQ0_Msk (0x1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

SOFTSREQ0 (Bitfield-Mask: 0x01)

◆ GPDMA_SOFTSREQ_SOFTSREQ0_Pos

#define GPDMA_SOFTSREQ_SOFTSREQ0_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

SOFTSREQ0 (Bit 0)

◆ GPDMA_SOFTSREQ_SOFTSREQ10_Msk

#define GPDMA_SOFTSREQ_SOFTSREQ10_Msk (0x400UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

SOFTSREQ10 (Bitfield-Mask: 0x01)

◆ GPDMA_SOFTSREQ_SOFTSREQ10_Pos

#define GPDMA_SOFTSREQ_SOFTSREQ10_Pos (10UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

SOFTSREQ10 (Bit 10)

◆ GPDMA_SOFTSREQ_SOFTSREQ11_Msk

#define GPDMA_SOFTSREQ_SOFTSREQ11_Msk (0x800UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

SOFTSREQ11 (Bitfield-Mask: 0x01)

◆ GPDMA_SOFTSREQ_SOFTSREQ11_Pos

#define GPDMA_SOFTSREQ_SOFTSREQ11_Pos (11UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

SOFTSREQ11 (Bit 11)

◆ GPDMA_SOFTSREQ_SOFTSREQ12_Msk

#define GPDMA_SOFTSREQ_SOFTSREQ12_Msk (0x1000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

SOFTSREQ12 (Bitfield-Mask: 0x01)

◆ GPDMA_SOFTSREQ_SOFTSREQ12_Pos

#define GPDMA_SOFTSREQ_SOFTSREQ12_Pos (12UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

SOFTSREQ12 (Bit 12)

◆ GPDMA_SOFTSREQ_SOFTSREQ13_Msk

#define GPDMA_SOFTSREQ_SOFTSREQ13_Msk (0x2000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

SOFTSREQ13 (Bitfield-Mask: 0x01)

◆ GPDMA_SOFTSREQ_SOFTSREQ13_Pos

#define GPDMA_SOFTSREQ_SOFTSREQ13_Pos (13UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

SOFTSREQ13 (Bit 13)

◆ GPDMA_SOFTSREQ_SOFTSREQ14_Msk

#define GPDMA_SOFTSREQ_SOFTSREQ14_Msk (0x4000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

SOFTSREQ14 (Bitfield-Mask: 0x01)

◆ GPDMA_SOFTSREQ_SOFTSREQ14_Pos

#define GPDMA_SOFTSREQ_SOFTSREQ14_Pos (14UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

SOFTSREQ14 (Bit 14)

◆ GPDMA_SOFTSREQ_SOFTSREQ15_Msk

#define GPDMA_SOFTSREQ_SOFTSREQ15_Msk (0x8000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

SOFTSREQ15 (Bitfield-Mask: 0x01)

◆ GPDMA_SOFTSREQ_SOFTSREQ15_Pos

#define GPDMA_SOFTSREQ_SOFTSREQ15_Pos (15UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

SOFTSREQ15 (Bit 15)

◆ GPDMA_SOFTSREQ_SOFTSREQ1_Msk

#define GPDMA_SOFTSREQ_SOFTSREQ1_Msk (0x2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

SOFTSREQ1 (Bitfield-Mask: 0x01)

◆ GPDMA_SOFTSREQ_SOFTSREQ1_Pos

#define GPDMA_SOFTSREQ_SOFTSREQ1_Pos (1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

SOFTSREQ1 (Bit 1)

◆ GPDMA_SOFTSREQ_SOFTSREQ2_Msk

#define GPDMA_SOFTSREQ_SOFTSREQ2_Msk (0x4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

SOFTSREQ2 (Bitfield-Mask: 0x01)

◆ GPDMA_SOFTSREQ_SOFTSREQ2_Pos

#define GPDMA_SOFTSREQ_SOFTSREQ2_Pos (2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

SOFTSREQ2 (Bit 2)

◆ GPDMA_SOFTSREQ_SOFTSREQ3_Msk

#define GPDMA_SOFTSREQ_SOFTSREQ3_Msk (0x8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

SOFTSREQ3 (Bitfield-Mask: 0x01)

◆ GPDMA_SOFTSREQ_SOFTSREQ3_Pos

#define GPDMA_SOFTSREQ_SOFTSREQ3_Pos (3UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

SOFTSREQ3 (Bit 3)

◆ GPDMA_SOFTSREQ_SOFTSREQ4_Msk

#define GPDMA_SOFTSREQ_SOFTSREQ4_Msk (0x10UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

SOFTSREQ4 (Bitfield-Mask: 0x01)

◆ GPDMA_SOFTSREQ_SOFTSREQ4_Pos

#define GPDMA_SOFTSREQ_SOFTSREQ4_Pos (4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

SOFTSREQ4 (Bit 4)

◆ GPDMA_SOFTSREQ_SOFTSREQ5_Msk

#define GPDMA_SOFTSREQ_SOFTSREQ5_Msk (0x20UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

SOFTSREQ5 (Bitfield-Mask: 0x01)

◆ GPDMA_SOFTSREQ_SOFTSREQ5_Pos

#define GPDMA_SOFTSREQ_SOFTSREQ5_Pos (5UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

SOFTSREQ5 (Bit 5)

◆ GPDMA_SOFTSREQ_SOFTSREQ6_Msk

#define GPDMA_SOFTSREQ_SOFTSREQ6_Msk (0x40UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

SOFTSREQ6 (Bitfield-Mask: 0x01)

◆ GPDMA_SOFTSREQ_SOFTSREQ6_Pos

#define GPDMA_SOFTSREQ_SOFTSREQ6_Pos (6UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

SOFTSREQ6 (Bit 6)

◆ GPDMA_SOFTSREQ_SOFTSREQ7_Msk

#define GPDMA_SOFTSREQ_SOFTSREQ7_Msk (0x80UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

SOFTSREQ7 (Bitfield-Mask: 0x01)

◆ GPDMA_SOFTSREQ_SOFTSREQ7_Pos

#define GPDMA_SOFTSREQ_SOFTSREQ7_Pos (7UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

SOFTSREQ7 (Bit 7)

◆ GPDMA_SOFTSREQ_SOFTSREQ8_Msk

#define GPDMA_SOFTSREQ_SOFTSREQ8_Msk (0x100UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

SOFTSREQ8 (Bitfield-Mask: 0x01)

◆ GPDMA_SOFTSREQ_SOFTSREQ8_Pos

#define GPDMA_SOFTSREQ_SOFTSREQ8_Pos (8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

SOFTSREQ8 (Bit 8)

◆ GPDMA_SOFTSREQ_SOFTSREQ9_Msk

#define GPDMA_SOFTSREQ_SOFTSREQ9_Msk (0x200UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

SOFTSREQ9 (Bitfield-Mask: 0x01)

◆ GPDMA_SOFTSREQ_SOFTSREQ9_Pos

#define GPDMA_SOFTSREQ_SOFTSREQ9_Pos (9UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

SOFTSREQ9 (Bit 9)

◆ GPDMA_SRCADDR0_SRCADDR_Msk

#define GPDMA_SRCADDR0_SRCADDR_Msk (0xffffffffUL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

SRCADDR (Bitfield-Mask: 0xffffffff)

◆ GPDMA_SRCADDR0_SRCADDR_Pos

#define GPDMA_SRCADDR0_SRCADDR_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

SRCADDR (Bit 0)

◆ GPDMA_SRCADDR1_SRCADDR_Msk

#define GPDMA_SRCADDR1_SRCADDR_Msk (0xffffffffUL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

SRCADDR (Bitfield-Mask: 0xffffffff)

◆ GPDMA_SRCADDR1_SRCADDR_Pos

#define GPDMA_SRCADDR1_SRCADDR_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

SRCADDR (Bit 0)

◆ GPDMA_SRCADDR2_SRCADDR_Msk

#define GPDMA_SRCADDR2_SRCADDR_Msk (0xffffffffUL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

SRCADDR (Bitfield-Mask: 0xffffffff)

◆ GPDMA_SRCADDR2_SRCADDR_Pos

#define GPDMA_SRCADDR2_SRCADDR_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

SRCADDR (Bit 0)

◆ GPDMA_SRCADDR3_SRCADDR_Msk

#define GPDMA_SRCADDR3_SRCADDR_Msk (0xffffffffUL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

SRCADDR (Bitfield-Mask: 0xffffffff)

◆ GPDMA_SRCADDR3_SRCADDR_Pos

#define GPDMA_SRCADDR3_SRCADDR_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

SRCADDR (Bit 0)

◆ GPDMA_SRCADDR4_SRCADDR_Msk

#define GPDMA_SRCADDR4_SRCADDR_Msk (0xffffffffUL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

SRCADDR (Bitfield-Mask: 0xffffffff)

◆ GPDMA_SRCADDR4_SRCADDR_Pos

#define GPDMA_SRCADDR4_SRCADDR_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

SRCADDR (Bit 0)

◆ GPDMA_SRCADDR5_SRCADDR_Msk

#define GPDMA_SRCADDR5_SRCADDR_Msk (0xffffffffUL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

SRCADDR (Bitfield-Mask: 0xffffffff)

◆ GPDMA_SRCADDR5_SRCADDR_Pos

#define GPDMA_SRCADDR5_SRCADDR_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

SRCADDR (Bit 0)

◆ GPDMA_SRCADDR6_SRCADDR_Msk

#define GPDMA_SRCADDR6_SRCADDR_Msk (0xffffffffUL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

SRCADDR (Bitfield-Mask: 0xffffffff)

◆ GPDMA_SRCADDR6_SRCADDR_Pos

#define GPDMA_SRCADDR6_SRCADDR_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

SRCADDR (Bit 0)

◆ GPDMA_SRCADDR7_SRCADDR_Msk

#define GPDMA_SRCADDR7_SRCADDR_Msk (0xffffffffUL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

SRCADDR (Bitfield-Mask: 0xffffffff)

◆ GPDMA_SRCADDR7_SRCADDR_Pos

#define GPDMA_SRCADDR7_SRCADDR_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

SRCADDR (Bit 0)

◆ GPDMA_SYNC_DMACSYNC0_Msk

#define GPDMA_SYNC_DMACSYNC0_Msk (0x1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DMACSYNC0 (Bitfield-Mask: 0x01)

◆ GPDMA_SYNC_DMACSYNC0_Pos

#define GPDMA_SYNC_DMACSYNC0_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DMACSYNC0 (Bit 0)

◆ GPDMA_SYNC_DMACSYNC10_Msk

#define GPDMA_SYNC_DMACSYNC10_Msk (0x400UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DMACSYNC10 (Bitfield-Mask: 0x01)

◆ GPDMA_SYNC_DMACSYNC10_Pos

#define GPDMA_SYNC_DMACSYNC10_Pos (10UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DMACSYNC10 (Bit 10)

◆ GPDMA_SYNC_DMACSYNC11_Msk

#define GPDMA_SYNC_DMACSYNC11_Msk (0x800UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DMACSYNC11 (Bitfield-Mask: 0x01)

◆ GPDMA_SYNC_DMACSYNC11_Pos

#define GPDMA_SYNC_DMACSYNC11_Pos (11UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DMACSYNC11 (Bit 11)

◆ GPDMA_SYNC_DMACSYNC12_Msk

#define GPDMA_SYNC_DMACSYNC12_Msk (0x1000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DMACSYNC12 (Bitfield-Mask: 0x01)

◆ GPDMA_SYNC_DMACSYNC12_Pos

#define GPDMA_SYNC_DMACSYNC12_Pos (12UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DMACSYNC12 (Bit 12)

◆ GPDMA_SYNC_DMACSYNC13_Msk

#define GPDMA_SYNC_DMACSYNC13_Msk (0x2000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DMACSYNC13 (Bitfield-Mask: 0x01)

◆ GPDMA_SYNC_DMACSYNC13_Pos

#define GPDMA_SYNC_DMACSYNC13_Pos (13UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DMACSYNC13 (Bit 13)

◆ GPDMA_SYNC_DMACSYNC14_Msk

#define GPDMA_SYNC_DMACSYNC14_Msk (0x4000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DMACSYNC14 (Bitfield-Mask: 0x01)

◆ GPDMA_SYNC_DMACSYNC14_Pos

#define GPDMA_SYNC_DMACSYNC14_Pos (14UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DMACSYNC14 (Bit 14)

◆ GPDMA_SYNC_DMACSYNC15_Msk

#define GPDMA_SYNC_DMACSYNC15_Msk (0x8000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DMACSYNC15 (Bitfield-Mask: 0x01)

◆ GPDMA_SYNC_DMACSYNC15_Pos

#define GPDMA_SYNC_DMACSYNC15_Pos (15UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DMACSYNC15 (Bit 15)

◆ GPDMA_SYNC_DMACSYNC1_Msk

#define GPDMA_SYNC_DMACSYNC1_Msk (0x2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DMACSYNC1 (Bitfield-Mask: 0x01)

◆ GPDMA_SYNC_DMACSYNC1_Pos

#define GPDMA_SYNC_DMACSYNC1_Pos (1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DMACSYNC1 (Bit 1)

◆ GPDMA_SYNC_DMACSYNC2_Msk

#define GPDMA_SYNC_DMACSYNC2_Msk (0x4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DMACSYNC2 (Bitfield-Mask: 0x01)

◆ GPDMA_SYNC_DMACSYNC2_Pos

#define GPDMA_SYNC_DMACSYNC2_Pos (2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DMACSYNC2 (Bit 2)

◆ GPDMA_SYNC_DMACSYNC3_Msk

#define GPDMA_SYNC_DMACSYNC3_Msk (0x8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DMACSYNC3 (Bitfield-Mask: 0x01)

◆ GPDMA_SYNC_DMACSYNC3_Pos

#define GPDMA_SYNC_DMACSYNC3_Pos (3UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DMACSYNC3 (Bit 3)

◆ GPDMA_SYNC_DMACSYNC4_Msk

#define GPDMA_SYNC_DMACSYNC4_Msk (0x10UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DMACSYNC4 (Bitfield-Mask: 0x01)

◆ GPDMA_SYNC_DMACSYNC4_Pos

#define GPDMA_SYNC_DMACSYNC4_Pos (4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DMACSYNC4 (Bit 4)

◆ GPDMA_SYNC_DMACSYNC5_Msk

#define GPDMA_SYNC_DMACSYNC5_Msk (0x20UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DMACSYNC5 (Bitfield-Mask: 0x01)

◆ GPDMA_SYNC_DMACSYNC5_Pos

#define GPDMA_SYNC_DMACSYNC5_Pos (5UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DMACSYNC5 (Bit 5)

◆ GPDMA_SYNC_DMACSYNC6_Msk

#define GPDMA_SYNC_DMACSYNC6_Msk (0x40UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DMACSYNC6 (Bitfield-Mask: 0x01)

◆ GPDMA_SYNC_DMACSYNC6_Pos

#define GPDMA_SYNC_DMACSYNC6_Pos (6UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DMACSYNC6 (Bit 6)

◆ GPDMA_SYNC_DMACSYNC7_Msk

#define GPDMA_SYNC_DMACSYNC7_Msk (0x80UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DMACSYNC7 (Bitfield-Mask: 0x01)

◆ GPDMA_SYNC_DMACSYNC7_Pos

#define GPDMA_SYNC_DMACSYNC7_Pos (7UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DMACSYNC7 (Bit 7)

◆ GPDMA_SYNC_DMACSYNC8_Msk

#define GPDMA_SYNC_DMACSYNC8_Msk (0x100UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DMACSYNC8 (Bitfield-Mask: 0x01)

◆ GPDMA_SYNC_DMACSYNC8_Pos

#define GPDMA_SYNC_DMACSYNC8_Pos (8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DMACSYNC8 (Bit 8)

◆ GPDMA_SYNC_DMACSYNC9_Msk

#define GPDMA_SYNC_DMACSYNC9_Msk (0x200UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DMACSYNC9 (Bitfield-Mask: 0x01)

◆ GPDMA_SYNC_DMACSYNC9_Pos

#define GPDMA_SYNC_DMACSYNC9_Pos (9UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DMACSYNC9 (Bit 9)

◆ GPIO_CLR0_PINCLR0_Msk

#define GPIO_CLR0_PINCLR0_Msk (0x1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINCLR0 (Bitfield-Mask: 0x01)

◆ GPIO_CLR0_PINCLR0_Pos

#define GPIO_CLR0_PINCLR0_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINCLR0 (Bit 0)

◆ GPIO_CLR0_PINCLR10_Msk

#define GPIO_CLR0_PINCLR10_Msk (0x400UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINCLR10 (Bitfield-Mask: 0x01)

◆ GPIO_CLR0_PINCLR10_Pos

#define GPIO_CLR0_PINCLR10_Pos (10UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINCLR10 (Bit 10)

◆ GPIO_CLR0_PINCLR11_Msk

#define GPIO_CLR0_PINCLR11_Msk (0x800UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINCLR11 (Bitfield-Mask: 0x01)

◆ GPIO_CLR0_PINCLR11_Pos

#define GPIO_CLR0_PINCLR11_Pos (11UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINCLR11 (Bit 11)

◆ GPIO_CLR0_PINCLR12_Msk

#define GPIO_CLR0_PINCLR12_Msk (0x1000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINCLR12 (Bitfield-Mask: 0x01)

◆ GPIO_CLR0_PINCLR12_Pos

#define GPIO_CLR0_PINCLR12_Pos (12UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINCLR12 (Bit 12)

◆ GPIO_CLR0_PINCLR13_Msk

#define GPIO_CLR0_PINCLR13_Msk (0x2000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINCLR13 (Bitfield-Mask: 0x01)

◆ GPIO_CLR0_PINCLR13_Pos

#define GPIO_CLR0_PINCLR13_Pos (13UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINCLR13 (Bit 13)

◆ GPIO_CLR0_PINCLR14_Msk

#define GPIO_CLR0_PINCLR14_Msk (0x4000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINCLR14 (Bitfield-Mask: 0x01)

◆ GPIO_CLR0_PINCLR14_Pos

#define GPIO_CLR0_PINCLR14_Pos (14UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINCLR14 (Bit 14)

◆ GPIO_CLR0_PINCLR15_Msk

#define GPIO_CLR0_PINCLR15_Msk (0x8000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINCLR15 (Bitfield-Mask: 0x01)

◆ GPIO_CLR0_PINCLR15_Pos

#define GPIO_CLR0_PINCLR15_Pos (15UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINCLR15 (Bit 15)

◆ GPIO_CLR0_PINCLR16_Msk

#define GPIO_CLR0_PINCLR16_Msk (0x10000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINCLR16 (Bitfield-Mask: 0x01)

◆ GPIO_CLR0_PINCLR16_Pos

#define GPIO_CLR0_PINCLR16_Pos (16UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINCLR16 (Bit 16)

◆ GPIO_CLR0_PINCLR17_Msk

#define GPIO_CLR0_PINCLR17_Msk (0x20000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINCLR17 (Bitfield-Mask: 0x01)

◆ GPIO_CLR0_PINCLR17_Pos

#define GPIO_CLR0_PINCLR17_Pos (17UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINCLR17 (Bit 17)

◆ GPIO_CLR0_PINCLR18_Msk

#define GPIO_CLR0_PINCLR18_Msk (0x40000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINCLR18 (Bitfield-Mask: 0x01)

◆ GPIO_CLR0_PINCLR18_Pos

#define GPIO_CLR0_PINCLR18_Pos (18UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINCLR18 (Bit 18)

◆ GPIO_CLR0_PINCLR19_Msk

#define GPIO_CLR0_PINCLR19_Msk (0x80000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINCLR19 (Bitfield-Mask: 0x01)

◆ GPIO_CLR0_PINCLR19_Pos

#define GPIO_CLR0_PINCLR19_Pos (19UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINCLR19 (Bit 19)

◆ GPIO_CLR0_PINCLR1_Msk

#define GPIO_CLR0_PINCLR1_Msk (0x2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINCLR1 (Bitfield-Mask: 0x01)

◆ GPIO_CLR0_PINCLR1_Pos

#define GPIO_CLR0_PINCLR1_Pos (1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINCLR1 (Bit 1)

◆ GPIO_CLR0_PINCLR20_Msk

#define GPIO_CLR0_PINCLR20_Msk (0x100000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINCLR20 (Bitfield-Mask: 0x01)

◆ GPIO_CLR0_PINCLR20_Pos

#define GPIO_CLR0_PINCLR20_Pos (20UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINCLR20 (Bit 20)

◆ GPIO_CLR0_PINCLR21_Msk

#define GPIO_CLR0_PINCLR21_Msk (0x200000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINCLR21 (Bitfield-Mask: 0x01)

◆ GPIO_CLR0_PINCLR21_Pos

#define GPIO_CLR0_PINCLR21_Pos (21UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINCLR21 (Bit 21)

◆ GPIO_CLR0_PINCLR22_Msk

#define GPIO_CLR0_PINCLR22_Msk (0x400000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINCLR22 (Bitfield-Mask: 0x01)

◆ GPIO_CLR0_PINCLR22_Pos

#define GPIO_CLR0_PINCLR22_Pos (22UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINCLR22 (Bit 22)

◆ GPIO_CLR0_PINCLR23_Msk

#define GPIO_CLR0_PINCLR23_Msk (0x800000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINCLR23 (Bitfield-Mask: 0x01)

◆ GPIO_CLR0_PINCLR23_Pos

#define GPIO_CLR0_PINCLR23_Pos (23UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINCLR23 (Bit 23)

◆ GPIO_CLR0_PINCLR24_Msk

#define GPIO_CLR0_PINCLR24_Msk (0x1000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINCLR24 (Bitfield-Mask: 0x01)

◆ GPIO_CLR0_PINCLR24_Pos

#define GPIO_CLR0_PINCLR24_Pos (24UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINCLR24 (Bit 24)

◆ GPIO_CLR0_PINCLR25_Msk

#define GPIO_CLR0_PINCLR25_Msk (0x2000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINCLR25 (Bitfield-Mask: 0x01)

◆ GPIO_CLR0_PINCLR25_Pos

#define GPIO_CLR0_PINCLR25_Pos (25UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINCLR25 (Bit 25)

◆ GPIO_CLR0_PINCLR26_Msk

#define GPIO_CLR0_PINCLR26_Msk (0x4000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINCLR26 (Bitfield-Mask: 0x01)

◆ GPIO_CLR0_PINCLR26_Pos

#define GPIO_CLR0_PINCLR26_Pos (26UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINCLR26 (Bit 26)

◆ GPIO_CLR0_PINCLR27_Msk

#define GPIO_CLR0_PINCLR27_Msk (0x8000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINCLR27 (Bitfield-Mask: 0x01)

◆ GPIO_CLR0_PINCLR27_Pos

#define GPIO_CLR0_PINCLR27_Pos (27UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINCLR27 (Bit 27)

◆ GPIO_CLR0_PINCLR28_Msk

#define GPIO_CLR0_PINCLR28_Msk (0x10000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINCLR28 (Bitfield-Mask: 0x01)

◆ GPIO_CLR0_PINCLR28_Pos

#define GPIO_CLR0_PINCLR28_Pos (28UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINCLR28 (Bit 28)

◆ GPIO_CLR0_PINCLR29_Msk

#define GPIO_CLR0_PINCLR29_Msk (0x20000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINCLR29 (Bitfield-Mask: 0x01)

◆ GPIO_CLR0_PINCLR29_Pos

#define GPIO_CLR0_PINCLR29_Pos (29UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINCLR29 (Bit 29)

◆ GPIO_CLR0_PINCLR2_Msk

#define GPIO_CLR0_PINCLR2_Msk (0x4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINCLR2 (Bitfield-Mask: 0x01)

◆ GPIO_CLR0_PINCLR2_Pos

#define GPIO_CLR0_PINCLR2_Pos (2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINCLR2 (Bit 2)

◆ GPIO_CLR0_PINCLR30_Msk

#define GPIO_CLR0_PINCLR30_Msk (0x40000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINCLR30 (Bitfield-Mask: 0x01)

◆ GPIO_CLR0_PINCLR30_Pos

#define GPIO_CLR0_PINCLR30_Pos (30UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINCLR30 (Bit 30)

◆ GPIO_CLR0_PINCLR31_Msk

#define GPIO_CLR0_PINCLR31_Msk (0x80000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINCLR31 (Bitfield-Mask: 0x01)

◆ GPIO_CLR0_PINCLR31_Pos

#define GPIO_CLR0_PINCLR31_Pos (31UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINCLR31 (Bit 31)

◆ GPIO_CLR0_PINCLR3_Msk

#define GPIO_CLR0_PINCLR3_Msk (0x8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINCLR3 (Bitfield-Mask: 0x01)

◆ GPIO_CLR0_PINCLR3_Pos

#define GPIO_CLR0_PINCLR3_Pos (3UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINCLR3 (Bit 3)

◆ GPIO_CLR0_PINCLR4_Msk

#define GPIO_CLR0_PINCLR4_Msk (0x10UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINCLR4 (Bitfield-Mask: 0x01)

◆ GPIO_CLR0_PINCLR4_Pos

#define GPIO_CLR0_PINCLR4_Pos (4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINCLR4 (Bit 4)

◆ GPIO_CLR0_PINCLR5_Msk

#define GPIO_CLR0_PINCLR5_Msk (0x20UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINCLR5 (Bitfield-Mask: 0x01)

◆ GPIO_CLR0_PINCLR5_Pos

#define GPIO_CLR0_PINCLR5_Pos (5UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINCLR5 (Bit 5)

◆ GPIO_CLR0_PINCLR6_Msk

#define GPIO_CLR0_PINCLR6_Msk (0x40UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINCLR6 (Bitfield-Mask: 0x01)

◆ GPIO_CLR0_PINCLR6_Pos

#define GPIO_CLR0_PINCLR6_Pos (6UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINCLR6 (Bit 6)

◆ GPIO_CLR0_PINCLR7_Msk

#define GPIO_CLR0_PINCLR7_Msk (0x80UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINCLR7 (Bitfield-Mask: 0x01)

◆ GPIO_CLR0_PINCLR7_Pos

#define GPIO_CLR0_PINCLR7_Pos (7UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINCLR7 (Bit 7)

◆ GPIO_CLR0_PINCLR8_Msk

#define GPIO_CLR0_PINCLR8_Msk (0x100UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINCLR8 (Bitfield-Mask: 0x01)

◆ GPIO_CLR0_PINCLR8_Pos

#define GPIO_CLR0_PINCLR8_Pos (8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINCLR8 (Bit 8)

◆ GPIO_CLR0_PINCLR9_Msk

#define GPIO_CLR0_PINCLR9_Msk (0x200UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINCLR9 (Bitfield-Mask: 0x01)

◆ GPIO_CLR0_PINCLR9_Pos

#define GPIO_CLR0_PINCLR9_Pos (9UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINCLR9 (Bit 9)

◆ GPIO_CLR1_PINCLR0_Msk

#define GPIO_CLR1_PINCLR0_Msk (0x1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINCLR0 (Bitfield-Mask: 0x01)

◆ GPIO_CLR1_PINCLR0_Pos

#define GPIO_CLR1_PINCLR0_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINCLR0 (Bit 0)

◆ GPIO_CLR1_PINCLR10_Msk

#define GPIO_CLR1_PINCLR10_Msk (0x400UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINCLR10 (Bitfield-Mask: 0x01)

◆ GPIO_CLR1_PINCLR10_Pos

#define GPIO_CLR1_PINCLR10_Pos (10UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINCLR10 (Bit 10)

◆ GPIO_CLR1_PINCLR11_Msk

#define GPIO_CLR1_PINCLR11_Msk (0x800UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINCLR11 (Bitfield-Mask: 0x01)

◆ GPIO_CLR1_PINCLR11_Pos

#define GPIO_CLR1_PINCLR11_Pos (11UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINCLR11 (Bit 11)

◆ GPIO_CLR1_PINCLR12_Msk

#define GPIO_CLR1_PINCLR12_Msk (0x1000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINCLR12 (Bitfield-Mask: 0x01)

◆ GPIO_CLR1_PINCLR12_Pos

#define GPIO_CLR1_PINCLR12_Pos (12UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINCLR12 (Bit 12)

◆ GPIO_CLR1_PINCLR13_Msk

#define GPIO_CLR1_PINCLR13_Msk (0x2000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINCLR13 (Bitfield-Mask: 0x01)

◆ GPIO_CLR1_PINCLR13_Pos

#define GPIO_CLR1_PINCLR13_Pos (13UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINCLR13 (Bit 13)

◆ GPIO_CLR1_PINCLR14_Msk

#define GPIO_CLR1_PINCLR14_Msk (0x4000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINCLR14 (Bitfield-Mask: 0x01)

◆ GPIO_CLR1_PINCLR14_Pos

#define GPIO_CLR1_PINCLR14_Pos (14UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINCLR14 (Bit 14)

◆ GPIO_CLR1_PINCLR15_Msk

#define GPIO_CLR1_PINCLR15_Msk (0x8000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINCLR15 (Bitfield-Mask: 0x01)

◆ GPIO_CLR1_PINCLR15_Pos

#define GPIO_CLR1_PINCLR15_Pos (15UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINCLR15 (Bit 15)

◆ GPIO_CLR1_PINCLR16_Msk

#define GPIO_CLR1_PINCLR16_Msk (0x10000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINCLR16 (Bitfield-Mask: 0x01)

◆ GPIO_CLR1_PINCLR16_Pos

#define GPIO_CLR1_PINCLR16_Pos (16UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINCLR16 (Bit 16)

◆ GPIO_CLR1_PINCLR17_Msk

#define GPIO_CLR1_PINCLR17_Msk (0x20000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINCLR17 (Bitfield-Mask: 0x01)

◆ GPIO_CLR1_PINCLR17_Pos

#define GPIO_CLR1_PINCLR17_Pos (17UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINCLR17 (Bit 17)

◆ GPIO_CLR1_PINCLR18_Msk

#define GPIO_CLR1_PINCLR18_Msk (0x40000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINCLR18 (Bitfield-Mask: 0x01)

◆ GPIO_CLR1_PINCLR18_Pos

#define GPIO_CLR1_PINCLR18_Pos (18UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINCLR18 (Bit 18)

◆ GPIO_CLR1_PINCLR19_Msk

#define GPIO_CLR1_PINCLR19_Msk (0x80000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINCLR19 (Bitfield-Mask: 0x01)

◆ GPIO_CLR1_PINCLR19_Pos

#define GPIO_CLR1_PINCLR19_Pos (19UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINCLR19 (Bit 19)

◆ GPIO_CLR1_PINCLR1_Msk

#define GPIO_CLR1_PINCLR1_Msk (0x2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINCLR1 (Bitfield-Mask: 0x01)

◆ GPIO_CLR1_PINCLR1_Pos

#define GPIO_CLR1_PINCLR1_Pos (1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINCLR1 (Bit 1)

◆ GPIO_CLR1_PINCLR20_Msk

#define GPIO_CLR1_PINCLR20_Msk (0x100000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINCLR20 (Bitfield-Mask: 0x01)

◆ GPIO_CLR1_PINCLR20_Pos

#define GPIO_CLR1_PINCLR20_Pos (20UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINCLR20 (Bit 20)

◆ GPIO_CLR1_PINCLR21_Msk

#define GPIO_CLR1_PINCLR21_Msk (0x200000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINCLR21 (Bitfield-Mask: 0x01)

◆ GPIO_CLR1_PINCLR21_Pos

#define GPIO_CLR1_PINCLR21_Pos (21UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINCLR21 (Bit 21)

◆ GPIO_CLR1_PINCLR22_Msk

#define GPIO_CLR1_PINCLR22_Msk (0x400000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINCLR22 (Bitfield-Mask: 0x01)

◆ GPIO_CLR1_PINCLR22_Pos

#define GPIO_CLR1_PINCLR22_Pos (22UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINCLR22 (Bit 22)

◆ GPIO_CLR1_PINCLR23_Msk

#define GPIO_CLR1_PINCLR23_Msk (0x800000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINCLR23 (Bitfield-Mask: 0x01)

◆ GPIO_CLR1_PINCLR23_Pos

#define GPIO_CLR1_PINCLR23_Pos (23UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINCLR23 (Bit 23)

◆ GPIO_CLR1_PINCLR24_Msk

#define GPIO_CLR1_PINCLR24_Msk (0x1000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINCLR24 (Bitfield-Mask: 0x01)

◆ GPIO_CLR1_PINCLR24_Pos

#define GPIO_CLR1_PINCLR24_Pos (24UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINCLR24 (Bit 24)

◆ GPIO_CLR1_PINCLR25_Msk

#define GPIO_CLR1_PINCLR25_Msk (0x2000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINCLR25 (Bitfield-Mask: 0x01)

◆ GPIO_CLR1_PINCLR25_Pos

#define GPIO_CLR1_PINCLR25_Pos (25UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINCLR25 (Bit 25)

◆ GPIO_CLR1_PINCLR26_Msk

#define GPIO_CLR1_PINCLR26_Msk (0x4000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINCLR26 (Bitfield-Mask: 0x01)

◆ GPIO_CLR1_PINCLR26_Pos

#define GPIO_CLR1_PINCLR26_Pos (26UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINCLR26 (Bit 26)

◆ GPIO_CLR1_PINCLR27_Msk

#define GPIO_CLR1_PINCLR27_Msk (0x8000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINCLR27 (Bitfield-Mask: 0x01)

◆ GPIO_CLR1_PINCLR27_Pos

#define GPIO_CLR1_PINCLR27_Pos (27UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINCLR27 (Bit 27)

◆ GPIO_CLR1_PINCLR28_Msk

#define GPIO_CLR1_PINCLR28_Msk (0x10000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINCLR28 (Bitfield-Mask: 0x01)

◆ GPIO_CLR1_PINCLR28_Pos

#define GPIO_CLR1_PINCLR28_Pos (28UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINCLR28 (Bit 28)

◆ GPIO_CLR1_PINCLR29_Msk

#define GPIO_CLR1_PINCLR29_Msk (0x20000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINCLR29 (Bitfield-Mask: 0x01)

◆ GPIO_CLR1_PINCLR29_Pos

#define GPIO_CLR1_PINCLR29_Pos (29UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINCLR29 (Bit 29)

◆ GPIO_CLR1_PINCLR2_Msk

#define GPIO_CLR1_PINCLR2_Msk (0x4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINCLR2 (Bitfield-Mask: 0x01)

◆ GPIO_CLR1_PINCLR2_Pos

#define GPIO_CLR1_PINCLR2_Pos (2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINCLR2 (Bit 2)

◆ GPIO_CLR1_PINCLR30_Msk

#define GPIO_CLR1_PINCLR30_Msk (0x40000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINCLR30 (Bitfield-Mask: 0x01)

◆ GPIO_CLR1_PINCLR30_Pos

#define GPIO_CLR1_PINCLR30_Pos (30UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINCLR30 (Bit 30)

◆ GPIO_CLR1_PINCLR31_Msk

#define GPIO_CLR1_PINCLR31_Msk (0x80000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINCLR31 (Bitfield-Mask: 0x01)

◆ GPIO_CLR1_PINCLR31_Pos

#define GPIO_CLR1_PINCLR31_Pos (31UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINCLR31 (Bit 31)

◆ GPIO_CLR1_PINCLR3_Msk

#define GPIO_CLR1_PINCLR3_Msk (0x8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINCLR3 (Bitfield-Mask: 0x01)

◆ GPIO_CLR1_PINCLR3_Pos

#define GPIO_CLR1_PINCLR3_Pos (3UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINCLR3 (Bit 3)

◆ GPIO_CLR1_PINCLR4_Msk

#define GPIO_CLR1_PINCLR4_Msk (0x10UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINCLR4 (Bitfield-Mask: 0x01)

◆ GPIO_CLR1_PINCLR4_Pos

#define GPIO_CLR1_PINCLR4_Pos (4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINCLR4 (Bit 4)

◆ GPIO_CLR1_PINCLR5_Msk

#define GPIO_CLR1_PINCLR5_Msk (0x20UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINCLR5 (Bitfield-Mask: 0x01)

◆ GPIO_CLR1_PINCLR5_Pos

#define GPIO_CLR1_PINCLR5_Pos (5UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINCLR5 (Bit 5)

◆ GPIO_CLR1_PINCLR6_Msk

#define GPIO_CLR1_PINCLR6_Msk (0x40UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINCLR6 (Bitfield-Mask: 0x01)

◆ GPIO_CLR1_PINCLR6_Pos

#define GPIO_CLR1_PINCLR6_Pos (6UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINCLR6 (Bit 6)

◆ GPIO_CLR1_PINCLR7_Msk

#define GPIO_CLR1_PINCLR7_Msk (0x80UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINCLR7 (Bitfield-Mask: 0x01)

◆ GPIO_CLR1_PINCLR7_Pos

#define GPIO_CLR1_PINCLR7_Pos (7UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINCLR7 (Bit 7)

◆ GPIO_CLR1_PINCLR8_Msk

#define GPIO_CLR1_PINCLR8_Msk (0x100UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINCLR8 (Bitfield-Mask: 0x01)

◆ GPIO_CLR1_PINCLR8_Pos

#define GPIO_CLR1_PINCLR8_Pos (8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINCLR8 (Bit 8)

◆ GPIO_CLR1_PINCLR9_Msk

#define GPIO_CLR1_PINCLR9_Msk (0x200UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINCLR9 (Bitfield-Mask: 0x01)

◆ GPIO_CLR1_PINCLR9_Pos

#define GPIO_CLR1_PINCLR9_Pos (9UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINCLR9 (Bit 9)

◆ GPIO_CLR2_PINCLR0_Msk

#define GPIO_CLR2_PINCLR0_Msk (0x1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINCLR0 (Bitfield-Mask: 0x01)

◆ GPIO_CLR2_PINCLR0_Pos

#define GPIO_CLR2_PINCLR0_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINCLR0 (Bit 0)

◆ GPIO_CLR2_PINCLR10_Msk

#define GPIO_CLR2_PINCLR10_Msk (0x400UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINCLR10 (Bitfield-Mask: 0x01)

◆ GPIO_CLR2_PINCLR10_Pos

#define GPIO_CLR2_PINCLR10_Pos (10UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINCLR10 (Bit 10)

◆ GPIO_CLR2_PINCLR11_Msk

#define GPIO_CLR2_PINCLR11_Msk (0x800UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINCLR11 (Bitfield-Mask: 0x01)

◆ GPIO_CLR2_PINCLR11_Pos

#define GPIO_CLR2_PINCLR11_Pos (11UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINCLR11 (Bit 11)

◆ GPIO_CLR2_PINCLR12_Msk

#define GPIO_CLR2_PINCLR12_Msk (0x1000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINCLR12 (Bitfield-Mask: 0x01)

◆ GPIO_CLR2_PINCLR12_Pos

#define GPIO_CLR2_PINCLR12_Pos (12UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINCLR12 (Bit 12)

◆ GPIO_CLR2_PINCLR13_Msk

#define GPIO_CLR2_PINCLR13_Msk (0x2000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINCLR13 (Bitfield-Mask: 0x01)

◆ GPIO_CLR2_PINCLR13_Pos

#define GPIO_CLR2_PINCLR13_Pos (13UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINCLR13 (Bit 13)

◆ GPIO_CLR2_PINCLR14_Msk

#define GPIO_CLR2_PINCLR14_Msk (0x4000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINCLR14 (Bitfield-Mask: 0x01)

◆ GPIO_CLR2_PINCLR14_Pos

#define GPIO_CLR2_PINCLR14_Pos (14UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINCLR14 (Bit 14)

◆ GPIO_CLR2_PINCLR15_Msk

#define GPIO_CLR2_PINCLR15_Msk (0x8000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINCLR15 (Bitfield-Mask: 0x01)

◆ GPIO_CLR2_PINCLR15_Pos

#define GPIO_CLR2_PINCLR15_Pos (15UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINCLR15 (Bit 15)

◆ GPIO_CLR2_PINCLR16_Msk

#define GPIO_CLR2_PINCLR16_Msk (0x10000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINCLR16 (Bitfield-Mask: 0x01)

◆ GPIO_CLR2_PINCLR16_Pos

#define GPIO_CLR2_PINCLR16_Pos (16UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINCLR16 (Bit 16)

◆ GPIO_CLR2_PINCLR17_Msk

#define GPIO_CLR2_PINCLR17_Msk (0x20000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINCLR17 (Bitfield-Mask: 0x01)

◆ GPIO_CLR2_PINCLR17_Pos

#define GPIO_CLR2_PINCLR17_Pos (17UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINCLR17 (Bit 17)

◆ GPIO_CLR2_PINCLR18_Msk

#define GPIO_CLR2_PINCLR18_Msk (0x40000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINCLR18 (Bitfield-Mask: 0x01)

◆ GPIO_CLR2_PINCLR18_Pos

#define GPIO_CLR2_PINCLR18_Pos (18UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINCLR18 (Bit 18)

◆ GPIO_CLR2_PINCLR19_Msk

#define GPIO_CLR2_PINCLR19_Msk (0x80000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINCLR19 (Bitfield-Mask: 0x01)

◆ GPIO_CLR2_PINCLR19_Pos

#define GPIO_CLR2_PINCLR19_Pos (19UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINCLR19 (Bit 19)

◆ GPIO_CLR2_PINCLR1_Msk

#define GPIO_CLR2_PINCLR1_Msk (0x2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINCLR1 (Bitfield-Mask: 0x01)

◆ GPIO_CLR2_PINCLR1_Pos

#define GPIO_CLR2_PINCLR1_Pos (1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINCLR1 (Bit 1)

◆ GPIO_CLR2_PINCLR20_Msk

#define GPIO_CLR2_PINCLR20_Msk (0x100000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINCLR20 (Bitfield-Mask: 0x01)

◆ GPIO_CLR2_PINCLR20_Pos

#define GPIO_CLR2_PINCLR20_Pos (20UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINCLR20 (Bit 20)

◆ GPIO_CLR2_PINCLR21_Msk

#define GPIO_CLR2_PINCLR21_Msk (0x200000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINCLR21 (Bitfield-Mask: 0x01)

◆ GPIO_CLR2_PINCLR21_Pos

#define GPIO_CLR2_PINCLR21_Pos (21UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINCLR21 (Bit 21)

◆ GPIO_CLR2_PINCLR22_Msk

#define GPIO_CLR2_PINCLR22_Msk (0x400000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINCLR22 (Bitfield-Mask: 0x01)

◆ GPIO_CLR2_PINCLR22_Pos

#define GPIO_CLR2_PINCLR22_Pos (22UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINCLR22 (Bit 22)

◆ GPIO_CLR2_PINCLR23_Msk

#define GPIO_CLR2_PINCLR23_Msk (0x800000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINCLR23 (Bitfield-Mask: 0x01)

◆ GPIO_CLR2_PINCLR23_Pos

#define GPIO_CLR2_PINCLR23_Pos (23UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINCLR23 (Bit 23)

◆ GPIO_CLR2_PINCLR24_Msk

#define GPIO_CLR2_PINCLR24_Msk (0x1000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINCLR24 (Bitfield-Mask: 0x01)

◆ GPIO_CLR2_PINCLR24_Pos

#define GPIO_CLR2_PINCLR24_Pos (24UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINCLR24 (Bit 24)

◆ GPIO_CLR2_PINCLR25_Msk

#define GPIO_CLR2_PINCLR25_Msk (0x2000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINCLR25 (Bitfield-Mask: 0x01)

◆ GPIO_CLR2_PINCLR25_Pos

#define GPIO_CLR2_PINCLR25_Pos (25UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINCLR25 (Bit 25)

◆ GPIO_CLR2_PINCLR26_Msk

#define GPIO_CLR2_PINCLR26_Msk (0x4000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINCLR26 (Bitfield-Mask: 0x01)

◆ GPIO_CLR2_PINCLR26_Pos

#define GPIO_CLR2_PINCLR26_Pos (26UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINCLR26 (Bit 26)

◆ GPIO_CLR2_PINCLR27_Msk

#define GPIO_CLR2_PINCLR27_Msk (0x8000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINCLR27 (Bitfield-Mask: 0x01)

◆ GPIO_CLR2_PINCLR27_Pos

#define GPIO_CLR2_PINCLR27_Pos (27UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINCLR27 (Bit 27)

◆ GPIO_CLR2_PINCLR28_Msk

#define GPIO_CLR2_PINCLR28_Msk (0x10000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINCLR28 (Bitfield-Mask: 0x01)

◆ GPIO_CLR2_PINCLR28_Pos

#define GPIO_CLR2_PINCLR28_Pos (28UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINCLR28 (Bit 28)

◆ GPIO_CLR2_PINCLR29_Msk

#define GPIO_CLR2_PINCLR29_Msk (0x20000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINCLR29 (Bitfield-Mask: 0x01)

◆ GPIO_CLR2_PINCLR29_Pos

#define GPIO_CLR2_PINCLR29_Pos (29UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINCLR29 (Bit 29)

◆ GPIO_CLR2_PINCLR2_Msk

#define GPIO_CLR2_PINCLR2_Msk (0x4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINCLR2 (Bitfield-Mask: 0x01)

◆ GPIO_CLR2_PINCLR2_Pos

#define GPIO_CLR2_PINCLR2_Pos (2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINCLR2 (Bit 2)

◆ GPIO_CLR2_PINCLR30_Msk

#define GPIO_CLR2_PINCLR30_Msk (0x40000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINCLR30 (Bitfield-Mask: 0x01)

◆ GPIO_CLR2_PINCLR30_Pos

#define GPIO_CLR2_PINCLR30_Pos (30UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINCLR30 (Bit 30)

◆ GPIO_CLR2_PINCLR31_Msk

#define GPIO_CLR2_PINCLR31_Msk (0x80000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINCLR31 (Bitfield-Mask: 0x01)

◆ GPIO_CLR2_PINCLR31_Pos

#define GPIO_CLR2_PINCLR31_Pos (31UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINCLR31 (Bit 31)

◆ GPIO_CLR2_PINCLR3_Msk

#define GPIO_CLR2_PINCLR3_Msk (0x8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINCLR3 (Bitfield-Mask: 0x01)

◆ GPIO_CLR2_PINCLR3_Pos

#define GPIO_CLR2_PINCLR3_Pos (3UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINCLR3 (Bit 3)

◆ GPIO_CLR2_PINCLR4_Msk

#define GPIO_CLR2_PINCLR4_Msk (0x10UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINCLR4 (Bitfield-Mask: 0x01)

◆ GPIO_CLR2_PINCLR4_Pos

#define GPIO_CLR2_PINCLR4_Pos (4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINCLR4 (Bit 4)

◆ GPIO_CLR2_PINCLR5_Msk

#define GPIO_CLR2_PINCLR5_Msk (0x20UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINCLR5 (Bitfield-Mask: 0x01)

◆ GPIO_CLR2_PINCLR5_Pos

#define GPIO_CLR2_PINCLR5_Pos (5UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINCLR5 (Bit 5)

◆ GPIO_CLR2_PINCLR6_Msk

#define GPIO_CLR2_PINCLR6_Msk (0x40UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINCLR6 (Bitfield-Mask: 0x01)

◆ GPIO_CLR2_PINCLR6_Pos

#define GPIO_CLR2_PINCLR6_Pos (6UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINCLR6 (Bit 6)

◆ GPIO_CLR2_PINCLR7_Msk

#define GPIO_CLR2_PINCLR7_Msk (0x80UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINCLR7 (Bitfield-Mask: 0x01)

◆ GPIO_CLR2_PINCLR7_Pos

#define GPIO_CLR2_PINCLR7_Pos (7UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINCLR7 (Bit 7)

◆ GPIO_CLR2_PINCLR8_Msk

#define GPIO_CLR2_PINCLR8_Msk (0x100UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINCLR8 (Bitfield-Mask: 0x01)

◆ GPIO_CLR2_PINCLR8_Pos

#define GPIO_CLR2_PINCLR8_Pos (8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINCLR8 (Bit 8)

◆ GPIO_CLR2_PINCLR9_Msk

#define GPIO_CLR2_PINCLR9_Msk (0x200UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINCLR9 (Bitfield-Mask: 0x01)

◆ GPIO_CLR2_PINCLR9_Pos

#define GPIO_CLR2_PINCLR9_Pos (9UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINCLR9 (Bit 9)

◆ GPIO_CLR3_PINCLR0_Msk

#define GPIO_CLR3_PINCLR0_Msk (0x1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINCLR0 (Bitfield-Mask: 0x01)

◆ GPIO_CLR3_PINCLR0_Pos

#define GPIO_CLR3_PINCLR0_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINCLR0 (Bit 0)

◆ GPIO_CLR3_PINCLR10_Msk

#define GPIO_CLR3_PINCLR10_Msk (0x400UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINCLR10 (Bitfield-Mask: 0x01)

◆ GPIO_CLR3_PINCLR10_Pos

#define GPIO_CLR3_PINCLR10_Pos (10UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINCLR10 (Bit 10)

◆ GPIO_CLR3_PINCLR11_Msk

#define GPIO_CLR3_PINCLR11_Msk (0x800UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINCLR11 (Bitfield-Mask: 0x01)

◆ GPIO_CLR3_PINCLR11_Pos

#define GPIO_CLR3_PINCLR11_Pos (11UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINCLR11 (Bit 11)

◆ GPIO_CLR3_PINCLR12_Msk

#define GPIO_CLR3_PINCLR12_Msk (0x1000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINCLR12 (Bitfield-Mask: 0x01)

◆ GPIO_CLR3_PINCLR12_Pos

#define GPIO_CLR3_PINCLR12_Pos (12UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINCLR12 (Bit 12)

◆ GPIO_CLR3_PINCLR13_Msk

#define GPIO_CLR3_PINCLR13_Msk (0x2000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINCLR13 (Bitfield-Mask: 0x01)

◆ GPIO_CLR3_PINCLR13_Pos

#define GPIO_CLR3_PINCLR13_Pos (13UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINCLR13 (Bit 13)

◆ GPIO_CLR3_PINCLR14_Msk

#define GPIO_CLR3_PINCLR14_Msk (0x4000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINCLR14 (Bitfield-Mask: 0x01)

◆ GPIO_CLR3_PINCLR14_Pos

#define GPIO_CLR3_PINCLR14_Pos (14UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINCLR14 (Bit 14)

◆ GPIO_CLR3_PINCLR15_Msk

#define GPIO_CLR3_PINCLR15_Msk (0x8000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINCLR15 (Bitfield-Mask: 0x01)

◆ GPIO_CLR3_PINCLR15_Pos

#define GPIO_CLR3_PINCLR15_Pos (15UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINCLR15 (Bit 15)

◆ GPIO_CLR3_PINCLR16_Msk

#define GPIO_CLR3_PINCLR16_Msk (0x10000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINCLR16 (Bitfield-Mask: 0x01)

◆ GPIO_CLR3_PINCLR16_Pos

#define GPIO_CLR3_PINCLR16_Pos (16UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINCLR16 (Bit 16)

◆ GPIO_CLR3_PINCLR17_Msk

#define GPIO_CLR3_PINCLR17_Msk (0x20000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINCLR17 (Bitfield-Mask: 0x01)

◆ GPIO_CLR3_PINCLR17_Pos

#define GPIO_CLR3_PINCLR17_Pos (17UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINCLR17 (Bit 17)

◆ GPIO_CLR3_PINCLR18_Msk

#define GPIO_CLR3_PINCLR18_Msk (0x40000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINCLR18 (Bitfield-Mask: 0x01)

◆ GPIO_CLR3_PINCLR18_Pos

#define GPIO_CLR3_PINCLR18_Pos (18UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINCLR18 (Bit 18)

◆ GPIO_CLR3_PINCLR19_Msk

#define GPIO_CLR3_PINCLR19_Msk (0x80000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINCLR19 (Bitfield-Mask: 0x01)

◆ GPIO_CLR3_PINCLR19_Pos

#define GPIO_CLR3_PINCLR19_Pos (19UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINCLR19 (Bit 19)

◆ GPIO_CLR3_PINCLR1_Msk

#define GPIO_CLR3_PINCLR1_Msk (0x2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINCLR1 (Bitfield-Mask: 0x01)

◆ GPIO_CLR3_PINCLR1_Pos

#define GPIO_CLR3_PINCLR1_Pos (1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINCLR1 (Bit 1)

◆ GPIO_CLR3_PINCLR20_Msk

#define GPIO_CLR3_PINCLR20_Msk (0x100000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINCLR20 (Bitfield-Mask: 0x01)

◆ GPIO_CLR3_PINCLR20_Pos

#define GPIO_CLR3_PINCLR20_Pos (20UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINCLR20 (Bit 20)

◆ GPIO_CLR3_PINCLR21_Msk

#define GPIO_CLR3_PINCLR21_Msk (0x200000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINCLR21 (Bitfield-Mask: 0x01)

◆ GPIO_CLR3_PINCLR21_Pos

#define GPIO_CLR3_PINCLR21_Pos (21UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINCLR21 (Bit 21)

◆ GPIO_CLR3_PINCLR22_Msk

#define GPIO_CLR3_PINCLR22_Msk (0x400000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINCLR22 (Bitfield-Mask: 0x01)

◆ GPIO_CLR3_PINCLR22_Pos

#define GPIO_CLR3_PINCLR22_Pos (22UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINCLR22 (Bit 22)

◆ GPIO_CLR3_PINCLR23_Msk

#define GPIO_CLR3_PINCLR23_Msk (0x800000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINCLR23 (Bitfield-Mask: 0x01)

◆ GPIO_CLR3_PINCLR23_Pos

#define GPIO_CLR3_PINCLR23_Pos (23UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINCLR23 (Bit 23)

◆ GPIO_CLR3_PINCLR24_Msk

#define GPIO_CLR3_PINCLR24_Msk (0x1000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINCLR24 (Bitfield-Mask: 0x01)

◆ GPIO_CLR3_PINCLR24_Pos

#define GPIO_CLR3_PINCLR24_Pos (24UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINCLR24 (Bit 24)

◆ GPIO_CLR3_PINCLR25_Msk

#define GPIO_CLR3_PINCLR25_Msk (0x2000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINCLR25 (Bitfield-Mask: 0x01)

◆ GPIO_CLR3_PINCLR25_Pos

#define GPIO_CLR3_PINCLR25_Pos (25UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINCLR25 (Bit 25)

◆ GPIO_CLR3_PINCLR26_Msk

#define GPIO_CLR3_PINCLR26_Msk (0x4000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINCLR26 (Bitfield-Mask: 0x01)

◆ GPIO_CLR3_PINCLR26_Pos

#define GPIO_CLR3_PINCLR26_Pos (26UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINCLR26 (Bit 26)

◆ GPIO_CLR3_PINCLR27_Msk

#define GPIO_CLR3_PINCLR27_Msk (0x8000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINCLR27 (Bitfield-Mask: 0x01)

◆ GPIO_CLR3_PINCLR27_Pos

#define GPIO_CLR3_PINCLR27_Pos (27UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINCLR27 (Bit 27)

◆ GPIO_CLR3_PINCLR28_Msk

#define GPIO_CLR3_PINCLR28_Msk (0x10000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINCLR28 (Bitfield-Mask: 0x01)

◆ GPIO_CLR3_PINCLR28_Pos

#define GPIO_CLR3_PINCLR28_Pos (28UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINCLR28 (Bit 28)

◆ GPIO_CLR3_PINCLR29_Msk

#define GPIO_CLR3_PINCLR29_Msk (0x20000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINCLR29 (Bitfield-Mask: 0x01)

◆ GPIO_CLR3_PINCLR29_Pos

#define GPIO_CLR3_PINCLR29_Pos (29UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINCLR29 (Bit 29)

◆ GPIO_CLR3_PINCLR2_Msk

#define GPIO_CLR3_PINCLR2_Msk (0x4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINCLR2 (Bitfield-Mask: 0x01)

◆ GPIO_CLR3_PINCLR2_Pos

#define GPIO_CLR3_PINCLR2_Pos (2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINCLR2 (Bit 2)

◆ GPIO_CLR3_PINCLR30_Msk

#define GPIO_CLR3_PINCLR30_Msk (0x40000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINCLR30 (Bitfield-Mask: 0x01)

◆ GPIO_CLR3_PINCLR30_Pos

#define GPIO_CLR3_PINCLR30_Pos (30UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINCLR30 (Bit 30)

◆ GPIO_CLR3_PINCLR31_Msk

#define GPIO_CLR3_PINCLR31_Msk (0x80000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINCLR31 (Bitfield-Mask: 0x01)

◆ GPIO_CLR3_PINCLR31_Pos

#define GPIO_CLR3_PINCLR31_Pos (31UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINCLR31 (Bit 31)

◆ GPIO_CLR3_PINCLR3_Msk

#define GPIO_CLR3_PINCLR3_Msk (0x8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINCLR3 (Bitfield-Mask: 0x01)

◆ GPIO_CLR3_PINCLR3_Pos

#define GPIO_CLR3_PINCLR3_Pos (3UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINCLR3 (Bit 3)

◆ GPIO_CLR3_PINCLR4_Msk

#define GPIO_CLR3_PINCLR4_Msk (0x10UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINCLR4 (Bitfield-Mask: 0x01)

◆ GPIO_CLR3_PINCLR4_Pos

#define GPIO_CLR3_PINCLR4_Pos (4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINCLR4 (Bit 4)

◆ GPIO_CLR3_PINCLR5_Msk

#define GPIO_CLR3_PINCLR5_Msk (0x20UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINCLR5 (Bitfield-Mask: 0x01)

◆ GPIO_CLR3_PINCLR5_Pos

#define GPIO_CLR3_PINCLR5_Pos (5UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINCLR5 (Bit 5)

◆ GPIO_CLR3_PINCLR6_Msk

#define GPIO_CLR3_PINCLR6_Msk (0x40UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINCLR6 (Bitfield-Mask: 0x01)

◆ GPIO_CLR3_PINCLR6_Pos

#define GPIO_CLR3_PINCLR6_Pos (6UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINCLR6 (Bit 6)

◆ GPIO_CLR3_PINCLR7_Msk

#define GPIO_CLR3_PINCLR7_Msk (0x80UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINCLR7 (Bitfield-Mask: 0x01)

◆ GPIO_CLR3_PINCLR7_Pos

#define GPIO_CLR3_PINCLR7_Pos (7UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINCLR7 (Bit 7)

◆ GPIO_CLR3_PINCLR8_Msk

#define GPIO_CLR3_PINCLR8_Msk (0x100UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINCLR8 (Bitfield-Mask: 0x01)

◆ GPIO_CLR3_PINCLR8_Pos

#define GPIO_CLR3_PINCLR8_Pos (8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINCLR8 (Bit 8)

◆ GPIO_CLR3_PINCLR9_Msk

#define GPIO_CLR3_PINCLR9_Msk (0x200UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINCLR9 (Bitfield-Mask: 0x01)

◆ GPIO_CLR3_PINCLR9_Pos

#define GPIO_CLR3_PINCLR9_Pos (9UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINCLR9 (Bit 9)

◆ GPIO_CLR4_PINCLR0_Msk

#define GPIO_CLR4_PINCLR0_Msk (0x1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINCLR0 (Bitfield-Mask: 0x01)

◆ GPIO_CLR4_PINCLR0_Pos

#define GPIO_CLR4_PINCLR0_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINCLR0 (Bit 0)

◆ GPIO_CLR4_PINCLR10_Msk

#define GPIO_CLR4_PINCLR10_Msk (0x400UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINCLR10 (Bitfield-Mask: 0x01)

◆ GPIO_CLR4_PINCLR10_Pos

#define GPIO_CLR4_PINCLR10_Pos (10UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINCLR10 (Bit 10)

◆ GPIO_CLR4_PINCLR11_Msk

#define GPIO_CLR4_PINCLR11_Msk (0x800UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINCLR11 (Bitfield-Mask: 0x01)

◆ GPIO_CLR4_PINCLR11_Pos

#define GPIO_CLR4_PINCLR11_Pos (11UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINCLR11 (Bit 11)

◆ GPIO_CLR4_PINCLR12_Msk

#define GPIO_CLR4_PINCLR12_Msk (0x1000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINCLR12 (Bitfield-Mask: 0x01)

◆ GPIO_CLR4_PINCLR12_Pos

#define GPIO_CLR4_PINCLR12_Pos (12UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINCLR12 (Bit 12)

◆ GPIO_CLR4_PINCLR13_Msk

#define GPIO_CLR4_PINCLR13_Msk (0x2000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINCLR13 (Bitfield-Mask: 0x01)

◆ GPIO_CLR4_PINCLR13_Pos

#define GPIO_CLR4_PINCLR13_Pos (13UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINCLR13 (Bit 13)

◆ GPIO_CLR4_PINCLR14_Msk

#define GPIO_CLR4_PINCLR14_Msk (0x4000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINCLR14 (Bitfield-Mask: 0x01)

◆ GPIO_CLR4_PINCLR14_Pos

#define GPIO_CLR4_PINCLR14_Pos (14UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINCLR14 (Bit 14)

◆ GPIO_CLR4_PINCLR15_Msk

#define GPIO_CLR4_PINCLR15_Msk (0x8000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINCLR15 (Bitfield-Mask: 0x01)

◆ GPIO_CLR4_PINCLR15_Pos

#define GPIO_CLR4_PINCLR15_Pos (15UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINCLR15 (Bit 15)

◆ GPIO_CLR4_PINCLR16_Msk

#define GPIO_CLR4_PINCLR16_Msk (0x10000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINCLR16 (Bitfield-Mask: 0x01)

◆ GPIO_CLR4_PINCLR16_Pos

#define GPIO_CLR4_PINCLR16_Pos (16UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINCLR16 (Bit 16)

◆ GPIO_CLR4_PINCLR17_Msk

#define GPIO_CLR4_PINCLR17_Msk (0x20000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINCLR17 (Bitfield-Mask: 0x01)

◆ GPIO_CLR4_PINCLR17_Pos

#define GPIO_CLR4_PINCLR17_Pos (17UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINCLR17 (Bit 17)

◆ GPIO_CLR4_PINCLR18_Msk

#define GPIO_CLR4_PINCLR18_Msk (0x40000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINCLR18 (Bitfield-Mask: 0x01)

◆ GPIO_CLR4_PINCLR18_Pos

#define GPIO_CLR4_PINCLR18_Pos (18UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINCLR18 (Bit 18)

◆ GPIO_CLR4_PINCLR19_Msk

#define GPIO_CLR4_PINCLR19_Msk (0x80000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINCLR19 (Bitfield-Mask: 0x01)

◆ GPIO_CLR4_PINCLR19_Pos

#define GPIO_CLR4_PINCLR19_Pos (19UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINCLR19 (Bit 19)

◆ GPIO_CLR4_PINCLR1_Msk

#define GPIO_CLR4_PINCLR1_Msk (0x2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINCLR1 (Bitfield-Mask: 0x01)

◆ GPIO_CLR4_PINCLR1_Pos

#define GPIO_CLR4_PINCLR1_Pos (1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINCLR1 (Bit 1)

◆ GPIO_CLR4_PINCLR20_Msk

#define GPIO_CLR4_PINCLR20_Msk (0x100000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINCLR20 (Bitfield-Mask: 0x01)

◆ GPIO_CLR4_PINCLR20_Pos

#define GPIO_CLR4_PINCLR20_Pos (20UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINCLR20 (Bit 20)

◆ GPIO_CLR4_PINCLR21_Msk

#define GPIO_CLR4_PINCLR21_Msk (0x200000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINCLR21 (Bitfield-Mask: 0x01)

◆ GPIO_CLR4_PINCLR21_Pos

#define GPIO_CLR4_PINCLR21_Pos (21UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINCLR21 (Bit 21)

◆ GPIO_CLR4_PINCLR22_Msk

#define GPIO_CLR4_PINCLR22_Msk (0x400000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINCLR22 (Bitfield-Mask: 0x01)

◆ GPIO_CLR4_PINCLR22_Pos

#define GPIO_CLR4_PINCLR22_Pos (22UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINCLR22 (Bit 22)

◆ GPIO_CLR4_PINCLR23_Msk

#define GPIO_CLR4_PINCLR23_Msk (0x800000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINCLR23 (Bitfield-Mask: 0x01)

◆ GPIO_CLR4_PINCLR23_Pos

#define GPIO_CLR4_PINCLR23_Pos (23UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINCLR23 (Bit 23)

◆ GPIO_CLR4_PINCLR24_Msk

#define GPIO_CLR4_PINCLR24_Msk (0x1000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINCLR24 (Bitfield-Mask: 0x01)

◆ GPIO_CLR4_PINCLR24_Pos

#define GPIO_CLR4_PINCLR24_Pos (24UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINCLR24 (Bit 24)

◆ GPIO_CLR4_PINCLR25_Msk

#define GPIO_CLR4_PINCLR25_Msk (0x2000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINCLR25 (Bitfield-Mask: 0x01)

◆ GPIO_CLR4_PINCLR25_Pos

#define GPIO_CLR4_PINCLR25_Pos (25UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINCLR25 (Bit 25)

◆ GPIO_CLR4_PINCLR26_Msk

#define GPIO_CLR4_PINCLR26_Msk (0x4000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINCLR26 (Bitfield-Mask: 0x01)

◆ GPIO_CLR4_PINCLR26_Pos

#define GPIO_CLR4_PINCLR26_Pos (26UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINCLR26 (Bit 26)

◆ GPIO_CLR4_PINCLR27_Msk

#define GPIO_CLR4_PINCLR27_Msk (0x8000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINCLR27 (Bitfield-Mask: 0x01)

◆ GPIO_CLR4_PINCLR27_Pos

#define GPIO_CLR4_PINCLR27_Pos (27UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINCLR27 (Bit 27)

◆ GPIO_CLR4_PINCLR28_Msk

#define GPIO_CLR4_PINCLR28_Msk (0x10000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINCLR28 (Bitfield-Mask: 0x01)

◆ GPIO_CLR4_PINCLR28_Pos

#define GPIO_CLR4_PINCLR28_Pos (28UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINCLR28 (Bit 28)

◆ GPIO_CLR4_PINCLR29_Msk

#define GPIO_CLR4_PINCLR29_Msk (0x20000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINCLR29 (Bitfield-Mask: 0x01)

◆ GPIO_CLR4_PINCLR29_Pos

#define GPIO_CLR4_PINCLR29_Pos (29UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINCLR29 (Bit 29)

◆ GPIO_CLR4_PINCLR2_Msk

#define GPIO_CLR4_PINCLR2_Msk (0x4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINCLR2 (Bitfield-Mask: 0x01)

◆ GPIO_CLR4_PINCLR2_Pos

#define GPIO_CLR4_PINCLR2_Pos (2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINCLR2 (Bit 2)

◆ GPIO_CLR4_PINCLR30_Msk

#define GPIO_CLR4_PINCLR30_Msk (0x40000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINCLR30 (Bitfield-Mask: 0x01)

◆ GPIO_CLR4_PINCLR30_Pos

#define GPIO_CLR4_PINCLR30_Pos (30UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINCLR30 (Bit 30)

◆ GPIO_CLR4_PINCLR31_Msk

#define GPIO_CLR4_PINCLR31_Msk (0x80000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINCLR31 (Bitfield-Mask: 0x01)

◆ GPIO_CLR4_PINCLR31_Pos

#define GPIO_CLR4_PINCLR31_Pos (31UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINCLR31 (Bit 31)

◆ GPIO_CLR4_PINCLR3_Msk

#define GPIO_CLR4_PINCLR3_Msk (0x8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINCLR3 (Bitfield-Mask: 0x01)

◆ GPIO_CLR4_PINCLR3_Pos

#define GPIO_CLR4_PINCLR3_Pos (3UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINCLR3 (Bit 3)

◆ GPIO_CLR4_PINCLR4_Msk

#define GPIO_CLR4_PINCLR4_Msk (0x10UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINCLR4 (Bitfield-Mask: 0x01)

◆ GPIO_CLR4_PINCLR4_Pos

#define GPIO_CLR4_PINCLR4_Pos (4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINCLR4 (Bit 4)

◆ GPIO_CLR4_PINCLR5_Msk

#define GPIO_CLR4_PINCLR5_Msk (0x20UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINCLR5 (Bitfield-Mask: 0x01)

◆ GPIO_CLR4_PINCLR5_Pos

#define GPIO_CLR4_PINCLR5_Pos (5UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINCLR5 (Bit 5)

◆ GPIO_CLR4_PINCLR6_Msk

#define GPIO_CLR4_PINCLR6_Msk (0x40UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINCLR6 (Bitfield-Mask: 0x01)

◆ GPIO_CLR4_PINCLR6_Pos

#define GPIO_CLR4_PINCLR6_Pos (6UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINCLR6 (Bit 6)

◆ GPIO_CLR4_PINCLR7_Msk

#define GPIO_CLR4_PINCLR7_Msk (0x80UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINCLR7 (Bitfield-Mask: 0x01)

◆ GPIO_CLR4_PINCLR7_Pos

#define GPIO_CLR4_PINCLR7_Pos (7UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINCLR7 (Bit 7)

◆ GPIO_CLR4_PINCLR8_Msk

#define GPIO_CLR4_PINCLR8_Msk (0x100UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINCLR8 (Bitfield-Mask: 0x01)

◆ GPIO_CLR4_PINCLR8_Pos

#define GPIO_CLR4_PINCLR8_Pos (8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINCLR8 (Bit 8)

◆ GPIO_CLR4_PINCLR9_Msk

#define GPIO_CLR4_PINCLR9_Msk (0x200UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINCLR9 (Bitfield-Mask: 0x01)

◆ GPIO_CLR4_PINCLR9_Pos

#define GPIO_CLR4_PINCLR9_Pos (9UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINCLR9 (Bit 9)

◆ GPIO_DIR0_PINDIR0_Msk

#define GPIO_DIR0_PINDIR0_Msk (0x1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINDIR0 (Bitfield-Mask: 0x01)

◆ GPIO_DIR0_PINDIR0_Pos

#define GPIO_DIR0_PINDIR0_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINDIR0 (Bit 0)

◆ GPIO_DIR0_PINDIR10_Msk

#define GPIO_DIR0_PINDIR10_Msk (0x400UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINDIR10 (Bitfield-Mask: 0x01)

◆ GPIO_DIR0_PINDIR10_Pos

#define GPIO_DIR0_PINDIR10_Pos (10UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINDIR10 (Bit 10)

◆ GPIO_DIR0_PINDIR11_Msk

#define GPIO_DIR0_PINDIR11_Msk (0x800UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINDIR11 (Bitfield-Mask: 0x01)

◆ GPIO_DIR0_PINDIR11_Pos

#define GPIO_DIR0_PINDIR11_Pos (11UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINDIR11 (Bit 11)

◆ GPIO_DIR0_PINDIR12_Msk

#define GPIO_DIR0_PINDIR12_Msk (0x1000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINDIR12 (Bitfield-Mask: 0x01)

◆ GPIO_DIR0_PINDIR12_Pos

#define GPIO_DIR0_PINDIR12_Pos (12UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINDIR12 (Bit 12)

◆ GPIO_DIR0_PINDIR13_Msk

#define GPIO_DIR0_PINDIR13_Msk (0x2000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINDIR13 (Bitfield-Mask: 0x01)

◆ GPIO_DIR0_PINDIR13_Pos

#define GPIO_DIR0_PINDIR13_Pos (13UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINDIR13 (Bit 13)

◆ GPIO_DIR0_PINDIR14_Msk

#define GPIO_DIR0_PINDIR14_Msk (0x4000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINDIR14 (Bitfield-Mask: 0x01)

◆ GPIO_DIR0_PINDIR14_Pos

#define GPIO_DIR0_PINDIR14_Pos (14UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINDIR14 (Bit 14)

◆ GPIO_DIR0_PINDIR15_Msk

#define GPIO_DIR0_PINDIR15_Msk (0x8000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINDIR15 (Bitfield-Mask: 0x01)

◆ GPIO_DIR0_PINDIR15_Pos

#define GPIO_DIR0_PINDIR15_Pos (15UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINDIR15 (Bit 15)

◆ GPIO_DIR0_PINDIR16_Msk

#define GPIO_DIR0_PINDIR16_Msk (0x10000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINDIR16 (Bitfield-Mask: 0x01)

◆ GPIO_DIR0_PINDIR16_Pos

#define GPIO_DIR0_PINDIR16_Pos (16UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINDIR16 (Bit 16)

◆ GPIO_DIR0_PINDIR17_Msk

#define GPIO_DIR0_PINDIR17_Msk (0x20000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINDIR17 (Bitfield-Mask: 0x01)

◆ GPIO_DIR0_PINDIR17_Pos

#define GPIO_DIR0_PINDIR17_Pos (17UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINDIR17 (Bit 17)

◆ GPIO_DIR0_PINDIR18_Msk

#define GPIO_DIR0_PINDIR18_Msk (0x40000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINDIR18 (Bitfield-Mask: 0x01)

◆ GPIO_DIR0_PINDIR18_Pos

#define GPIO_DIR0_PINDIR18_Pos (18UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINDIR18 (Bit 18)

◆ GPIO_DIR0_PINDIR19_Msk

#define GPIO_DIR0_PINDIR19_Msk (0x80000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINDIR19 (Bitfield-Mask: 0x01)

◆ GPIO_DIR0_PINDIR19_Pos

#define GPIO_DIR0_PINDIR19_Pos (19UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINDIR19 (Bit 19)

◆ GPIO_DIR0_PINDIR1_Msk

#define GPIO_DIR0_PINDIR1_Msk (0x2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINDIR1 (Bitfield-Mask: 0x01)

◆ GPIO_DIR0_PINDIR1_Pos

#define GPIO_DIR0_PINDIR1_Pos (1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINDIR1 (Bit 1)

◆ GPIO_DIR0_PINDIR20_Msk

#define GPIO_DIR0_PINDIR20_Msk (0x100000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINDIR20 (Bitfield-Mask: 0x01)

◆ GPIO_DIR0_PINDIR20_Pos

#define GPIO_DIR0_PINDIR20_Pos (20UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINDIR20 (Bit 20)

◆ GPIO_DIR0_PINDIR21_Msk

#define GPIO_DIR0_PINDIR21_Msk (0x200000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINDIR21 (Bitfield-Mask: 0x01)

◆ GPIO_DIR0_PINDIR21_Pos

#define GPIO_DIR0_PINDIR21_Pos (21UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINDIR21 (Bit 21)

◆ GPIO_DIR0_PINDIR22_Msk

#define GPIO_DIR0_PINDIR22_Msk (0x400000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINDIR22 (Bitfield-Mask: 0x01)

◆ GPIO_DIR0_PINDIR22_Pos

#define GPIO_DIR0_PINDIR22_Pos (22UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINDIR22 (Bit 22)

◆ GPIO_DIR0_PINDIR23_Msk

#define GPIO_DIR0_PINDIR23_Msk (0x800000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINDIR23 (Bitfield-Mask: 0x01)

◆ GPIO_DIR0_PINDIR23_Pos

#define GPIO_DIR0_PINDIR23_Pos (23UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINDIR23 (Bit 23)

◆ GPIO_DIR0_PINDIR24_Msk

#define GPIO_DIR0_PINDIR24_Msk (0x1000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINDIR24 (Bitfield-Mask: 0x01)

◆ GPIO_DIR0_PINDIR24_Pos

#define GPIO_DIR0_PINDIR24_Pos (24UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINDIR24 (Bit 24)

◆ GPIO_DIR0_PINDIR25_Msk

#define GPIO_DIR0_PINDIR25_Msk (0x2000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINDIR25 (Bitfield-Mask: 0x01)

◆ GPIO_DIR0_PINDIR25_Pos

#define GPIO_DIR0_PINDIR25_Pos (25UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINDIR25 (Bit 25)

◆ GPIO_DIR0_PINDIR26_Msk

#define GPIO_DIR0_PINDIR26_Msk (0x4000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINDIR26 (Bitfield-Mask: 0x01)

◆ GPIO_DIR0_PINDIR26_Pos

#define GPIO_DIR0_PINDIR26_Pos (26UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINDIR26 (Bit 26)

◆ GPIO_DIR0_PINDIR27_Msk

#define GPIO_DIR0_PINDIR27_Msk (0x8000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINDIR27 (Bitfield-Mask: 0x01)

◆ GPIO_DIR0_PINDIR27_Pos

#define GPIO_DIR0_PINDIR27_Pos (27UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINDIR27 (Bit 27)

◆ GPIO_DIR0_PINDIR28_Msk

#define GPIO_DIR0_PINDIR28_Msk (0x10000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINDIR28 (Bitfield-Mask: 0x01)

◆ GPIO_DIR0_PINDIR28_Pos

#define GPIO_DIR0_PINDIR28_Pos (28UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINDIR28 (Bit 28)

◆ GPIO_DIR0_PINDIR29_Msk

#define GPIO_DIR0_PINDIR29_Msk (0x20000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINDIR29 (Bitfield-Mask: 0x01)

◆ GPIO_DIR0_PINDIR29_Pos

#define GPIO_DIR0_PINDIR29_Pos (29UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINDIR29 (Bit 29)

◆ GPIO_DIR0_PINDIR2_Msk

#define GPIO_DIR0_PINDIR2_Msk (0x4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINDIR2 (Bitfield-Mask: 0x01)

◆ GPIO_DIR0_PINDIR2_Pos

#define GPIO_DIR0_PINDIR2_Pos (2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINDIR2 (Bit 2)

◆ GPIO_DIR0_PINDIR30_Msk

#define GPIO_DIR0_PINDIR30_Msk (0x40000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINDIR30 (Bitfield-Mask: 0x01)

◆ GPIO_DIR0_PINDIR30_Pos

#define GPIO_DIR0_PINDIR30_Pos (30UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINDIR30 (Bit 30)

◆ GPIO_DIR0_PINDIR31_Msk

#define GPIO_DIR0_PINDIR31_Msk (0x80000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINDIR31 (Bitfield-Mask: 0x01)

◆ GPIO_DIR0_PINDIR31_Pos

#define GPIO_DIR0_PINDIR31_Pos (31UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINDIR31 (Bit 31)

◆ GPIO_DIR0_PINDIR3_Msk

#define GPIO_DIR0_PINDIR3_Msk (0x8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINDIR3 (Bitfield-Mask: 0x01)

◆ GPIO_DIR0_PINDIR3_Pos

#define GPIO_DIR0_PINDIR3_Pos (3UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINDIR3 (Bit 3)

◆ GPIO_DIR0_PINDIR4_Msk

#define GPIO_DIR0_PINDIR4_Msk (0x10UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINDIR4 (Bitfield-Mask: 0x01)

◆ GPIO_DIR0_PINDIR4_Pos

#define GPIO_DIR0_PINDIR4_Pos (4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINDIR4 (Bit 4)

◆ GPIO_DIR0_PINDIR5_Msk

#define GPIO_DIR0_PINDIR5_Msk (0x20UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINDIR5 (Bitfield-Mask: 0x01)

◆ GPIO_DIR0_PINDIR5_Pos

#define GPIO_DIR0_PINDIR5_Pos (5UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINDIR5 (Bit 5)

◆ GPIO_DIR0_PINDIR6_Msk

#define GPIO_DIR0_PINDIR6_Msk (0x40UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINDIR6 (Bitfield-Mask: 0x01)

◆ GPIO_DIR0_PINDIR6_Pos

#define GPIO_DIR0_PINDIR6_Pos (6UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINDIR6 (Bit 6)

◆ GPIO_DIR0_PINDIR7_Msk

#define GPIO_DIR0_PINDIR7_Msk (0x80UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINDIR7 (Bitfield-Mask: 0x01)

◆ GPIO_DIR0_PINDIR7_Pos

#define GPIO_DIR0_PINDIR7_Pos (7UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINDIR7 (Bit 7)

◆ GPIO_DIR0_PINDIR8_Msk

#define GPIO_DIR0_PINDIR8_Msk (0x100UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINDIR8 (Bitfield-Mask: 0x01)

◆ GPIO_DIR0_PINDIR8_Pos

#define GPIO_DIR0_PINDIR8_Pos (8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINDIR8 (Bit 8)

◆ GPIO_DIR0_PINDIR9_Msk

#define GPIO_DIR0_PINDIR9_Msk (0x200UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINDIR9 (Bitfield-Mask: 0x01)

◆ GPIO_DIR0_PINDIR9_Pos

#define GPIO_DIR0_PINDIR9_Pos (9UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINDIR9 (Bit 9)

◆ GPIO_DIR1_PINDIR0_Msk

#define GPIO_DIR1_PINDIR0_Msk (0x1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINDIR0 (Bitfield-Mask: 0x01)

◆ GPIO_DIR1_PINDIR0_Pos

#define GPIO_DIR1_PINDIR0_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINDIR0 (Bit 0)

◆ GPIO_DIR1_PINDIR10_Msk

#define GPIO_DIR1_PINDIR10_Msk (0x400UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINDIR10 (Bitfield-Mask: 0x01)

◆ GPIO_DIR1_PINDIR10_Pos

#define GPIO_DIR1_PINDIR10_Pos (10UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINDIR10 (Bit 10)

◆ GPIO_DIR1_PINDIR11_Msk

#define GPIO_DIR1_PINDIR11_Msk (0x800UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINDIR11 (Bitfield-Mask: 0x01)

◆ GPIO_DIR1_PINDIR11_Pos

#define GPIO_DIR1_PINDIR11_Pos (11UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINDIR11 (Bit 11)

◆ GPIO_DIR1_PINDIR12_Msk

#define GPIO_DIR1_PINDIR12_Msk (0x1000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINDIR12 (Bitfield-Mask: 0x01)

◆ GPIO_DIR1_PINDIR12_Pos

#define GPIO_DIR1_PINDIR12_Pos (12UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINDIR12 (Bit 12)

◆ GPIO_DIR1_PINDIR13_Msk

#define GPIO_DIR1_PINDIR13_Msk (0x2000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINDIR13 (Bitfield-Mask: 0x01)

◆ GPIO_DIR1_PINDIR13_Pos

#define GPIO_DIR1_PINDIR13_Pos (13UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINDIR13 (Bit 13)

◆ GPIO_DIR1_PINDIR14_Msk

#define GPIO_DIR1_PINDIR14_Msk (0x4000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINDIR14 (Bitfield-Mask: 0x01)

◆ GPIO_DIR1_PINDIR14_Pos

#define GPIO_DIR1_PINDIR14_Pos (14UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINDIR14 (Bit 14)

◆ GPIO_DIR1_PINDIR15_Msk

#define GPIO_DIR1_PINDIR15_Msk (0x8000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINDIR15 (Bitfield-Mask: 0x01)

◆ GPIO_DIR1_PINDIR15_Pos

#define GPIO_DIR1_PINDIR15_Pos (15UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINDIR15 (Bit 15)

◆ GPIO_DIR1_PINDIR16_Msk

#define GPIO_DIR1_PINDIR16_Msk (0x10000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINDIR16 (Bitfield-Mask: 0x01)

◆ GPIO_DIR1_PINDIR16_Pos

#define GPIO_DIR1_PINDIR16_Pos (16UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINDIR16 (Bit 16)

◆ GPIO_DIR1_PINDIR17_Msk

#define GPIO_DIR1_PINDIR17_Msk (0x20000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINDIR17 (Bitfield-Mask: 0x01)

◆ GPIO_DIR1_PINDIR17_Pos

#define GPIO_DIR1_PINDIR17_Pos (17UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINDIR17 (Bit 17)

◆ GPIO_DIR1_PINDIR18_Msk

#define GPIO_DIR1_PINDIR18_Msk (0x40000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINDIR18 (Bitfield-Mask: 0x01)

◆ GPIO_DIR1_PINDIR18_Pos

#define GPIO_DIR1_PINDIR18_Pos (18UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINDIR18 (Bit 18)

◆ GPIO_DIR1_PINDIR19_Msk

#define GPIO_DIR1_PINDIR19_Msk (0x80000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINDIR19 (Bitfield-Mask: 0x01)

◆ GPIO_DIR1_PINDIR19_Pos

#define GPIO_DIR1_PINDIR19_Pos (19UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINDIR19 (Bit 19)

◆ GPIO_DIR1_PINDIR1_Msk

#define GPIO_DIR1_PINDIR1_Msk (0x2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINDIR1 (Bitfield-Mask: 0x01)

◆ GPIO_DIR1_PINDIR1_Pos

#define GPIO_DIR1_PINDIR1_Pos (1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINDIR1 (Bit 1)

◆ GPIO_DIR1_PINDIR20_Msk

#define GPIO_DIR1_PINDIR20_Msk (0x100000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINDIR20 (Bitfield-Mask: 0x01)

◆ GPIO_DIR1_PINDIR20_Pos

#define GPIO_DIR1_PINDIR20_Pos (20UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINDIR20 (Bit 20)

◆ GPIO_DIR1_PINDIR21_Msk

#define GPIO_DIR1_PINDIR21_Msk (0x200000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINDIR21 (Bitfield-Mask: 0x01)

◆ GPIO_DIR1_PINDIR21_Pos

#define GPIO_DIR1_PINDIR21_Pos (21UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINDIR21 (Bit 21)

◆ GPIO_DIR1_PINDIR22_Msk

#define GPIO_DIR1_PINDIR22_Msk (0x400000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINDIR22 (Bitfield-Mask: 0x01)

◆ GPIO_DIR1_PINDIR22_Pos

#define GPIO_DIR1_PINDIR22_Pos (22UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINDIR22 (Bit 22)

◆ GPIO_DIR1_PINDIR23_Msk

#define GPIO_DIR1_PINDIR23_Msk (0x800000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINDIR23 (Bitfield-Mask: 0x01)

◆ GPIO_DIR1_PINDIR23_Pos

#define GPIO_DIR1_PINDIR23_Pos (23UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINDIR23 (Bit 23)

◆ GPIO_DIR1_PINDIR24_Msk

#define GPIO_DIR1_PINDIR24_Msk (0x1000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINDIR24 (Bitfield-Mask: 0x01)

◆ GPIO_DIR1_PINDIR24_Pos

#define GPIO_DIR1_PINDIR24_Pos (24UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINDIR24 (Bit 24)

◆ GPIO_DIR1_PINDIR25_Msk

#define GPIO_DIR1_PINDIR25_Msk (0x2000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINDIR25 (Bitfield-Mask: 0x01)

◆ GPIO_DIR1_PINDIR25_Pos

#define GPIO_DIR1_PINDIR25_Pos (25UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINDIR25 (Bit 25)

◆ GPIO_DIR1_PINDIR26_Msk

#define GPIO_DIR1_PINDIR26_Msk (0x4000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINDIR26 (Bitfield-Mask: 0x01)

◆ GPIO_DIR1_PINDIR26_Pos

#define GPIO_DIR1_PINDIR26_Pos (26UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINDIR26 (Bit 26)

◆ GPIO_DIR1_PINDIR27_Msk

#define GPIO_DIR1_PINDIR27_Msk (0x8000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINDIR27 (Bitfield-Mask: 0x01)

◆ GPIO_DIR1_PINDIR27_Pos

#define GPIO_DIR1_PINDIR27_Pos (27UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINDIR27 (Bit 27)

◆ GPIO_DIR1_PINDIR28_Msk

#define GPIO_DIR1_PINDIR28_Msk (0x10000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINDIR28 (Bitfield-Mask: 0x01)

◆ GPIO_DIR1_PINDIR28_Pos

#define GPIO_DIR1_PINDIR28_Pos (28UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINDIR28 (Bit 28)

◆ GPIO_DIR1_PINDIR29_Msk

#define GPIO_DIR1_PINDIR29_Msk (0x20000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINDIR29 (Bitfield-Mask: 0x01)

◆ GPIO_DIR1_PINDIR29_Pos

#define GPIO_DIR1_PINDIR29_Pos (29UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINDIR29 (Bit 29)

◆ GPIO_DIR1_PINDIR2_Msk

#define GPIO_DIR1_PINDIR2_Msk (0x4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINDIR2 (Bitfield-Mask: 0x01)

◆ GPIO_DIR1_PINDIR2_Pos

#define GPIO_DIR1_PINDIR2_Pos (2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINDIR2 (Bit 2)

◆ GPIO_DIR1_PINDIR30_Msk

#define GPIO_DIR1_PINDIR30_Msk (0x40000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINDIR30 (Bitfield-Mask: 0x01)

◆ GPIO_DIR1_PINDIR30_Pos

#define GPIO_DIR1_PINDIR30_Pos (30UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINDIR30 (Bit 30)

◆ GPIO_DIR1_PINDIR31_Msk

#define GPIO_DIR1_PINDIR31_Msk (0x80000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINDIR31 (Bitfield-Mask: 0x01)

◆ GPIO_DIR1_PINDIR31_Pos

#define GPIO_DIR1_PINDIR31_Pos (31UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINDIR31 (Bit 31)

◆ GPIO_DIR1_PINDIR3_Msk

#define GPIO_DIR1_PINDIR3_Msk (0x8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINDIR3 (Bitfield-Mask: 0x01)

◆ GPIO_DIR1_PINDIR3_Pos

#define GPIO_DIR1_PINDIR3_Pos (3UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINDIR3 (Bit 3)

◆ GPIO_DIR1_PINDIR4_Msk

#define GPIO_DIR1_PINDIR4_Msk (0x10UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINDIR4 (Bitfield-Mask: 0x01)

◆ GPIO_DIR1_PINDIR4_Pos

#define GPIO_DIR1_PINDIR4_Pos (4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINDIR4 (Bit 4)

◆ GPIO_DIR1_PINDIR5_Msk

#define GPIO_DIR1_PINDIR5_Msk (0x20UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINDIR5 (Bitfield-Mask: 0x01)

◆ GPIO_DIR1_PINDIR5_Pos

#define GPIO_DIR1_PINDIR5_Pos (5UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINDIR5 (Bit 5)

◆ GPIO_DIR1_PINDIR6_Msk

#define GPIO_DIR1_PINDIR6_Msk (0x40UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINDIR6 (Bitfield-Mask: 0x01)

◆ GPIO_DIR1_PINDIR6_Pos

#define GPIO_DIR1_PINDIR6_Pos (6UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINDIR6 (Bit 6)

◆ GPIO_DIR1_PINDIR7_Msk

#define GPIO_DIR1_PINDIR7_Msk (0x80UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINDIR7 (Bitfield-Mask: 0x01)

◆ GPIO_DIR1_PINDIR7_Pos

#define GPIO_DIR1_PINDIR7_Pos (7UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINDIR7 (Bit 7)

◆ GPIO_DIR1_PINDIR8_Msk

#define GPIO_DIR1_PINDIR8_Msk (0x100UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINDIR8 (Bitfield-Mask: 0x01)

◆ GPIO_DIR1_PINDIR8_Pos

#define GPIO_DIR1_PINDIR8_Pos (8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINDIR8 (Bit 8)

◆ GPIO_DIR1_PINDIR9_Msk

#define GPIO_DIR1_PINDIR9_Msk (0x200UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINDIR9 (Bitfield-Mask: 0x01)

◆ GPIO_DIR1_PINDIR9_Pos

#define GPIO_DIR1_PINDIR9_Pos (9UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINDIR9 (Bit 9)

◆ GPIO_DIR2_PINDIR0_Msk

#define GPIO_DIR2_PINDIR0_Msk (0x1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINDIR0 (Bitfield-Mask: 0x01)

◆ GPIO_DIR2_PINDIR0_Pos

#define GPIO_DIR2_PINDIR0_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINDIR0 (Bit 0)

◆ GPIO_DIR2_PINDIR10_Msk

#define GPIO_DIR2_PINDIR10_Msk (0x400UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINDIR10 (Bitfield-Mask: 0x01)

◆ GPIO_DIR2_PINDIR10_Pos

#define GPIO_DIR2_PINDIR10_Pos (10UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINDIR10 (Bit 10)

◆ GPIO_DIR2_PINDIR11_Msk

#define GPIO_DIR2_PINDIR11_Msk (0x800UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINDIR11 (Bitfield-Mask: 0x01)

◆ GPIO_DIR2_PINDIR11_Pos

#define GPIO_DIR2_PINDIR11_Pos (11UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINDIR11 (Bit 11)

◆ GPIO_DIR2_PINDIR12_Msk

#define GPIO_DIR2_PINDIR12_Msk (0x1000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINDIR12 (Bitfield-Mask: 0x01)

◆ GPIO_DIR2_PINDIR12_Pos

#define GPIO_DIR2_PINDIR12_Pos (12UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINDIR12 (Bit 12)

◆ GPIO_DIR2_PINDIR13_Msk

#define GPIO_DIR2_PINDIR13_Msk (0x2000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINDIR13 (Bitfield-Mask: 0x01)

◆ GPIO_DIR2_PINDIR13_Pos

#define GPIO_DIR2_PINDIR13_Pos (13UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINDIR13 (Bit 13)

◆ GPIO_DIR2_PINDIR14_Msk

#define GPIO_DIR2_PINDIR14_Msk (0x4000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINDIR14 (Bitfield-Mask: 0x01)

◆ GPIO_DIR2_PINDIR14_Pos

#define GPIO_DIR2_PINDIR14_Pos (14UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINDIR14 (Bit 14)

◆ GPIO_DIR2_PINDIR15_Msk

#define GPIO_DIR2_PINDIR15_Msk (0x8000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINDIR15 (Bitfield-Mask: 0x01)

◆ GPIO_DIR2_PINDIR15_Pos

#define GPIO_DIR2_PINDIR15_Pos (15UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINDIR15 (Bit 15)

◆ GPIO_DIR2_PINDIR16_Msk

#define GPIO_DIR2_PINDIR16_Msk (0x10000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINDIR16 (Bitfield-Mask: 0x01)

◆ GPIO_DIR2_PINDIR16_Pos

#define GPIO_DIR2_PINDIR16_Pos (16UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINDIR16 (Bit 16)

◆ GPIO_DIR2_PINDIR17_Msk

#define GPIO_DIR2_PINDIR17_Msk (0x20000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINDIR17 (Bitfield-Mask: 0x01)

◆ GPIO_DIR2_PINDIR17_Pos

#define GPIO_DIR2_PINDIR17_Pos (17UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINDIR17 (Bit 17)

◆ GPIO_DIR2_PINDIR18_Msk

#define GPIO_DIR2_PINDIR18_Msk (0x40000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINDIR18 (Bitfield-Mask: 0x01)

◆ GPIO_DIR2_PINDIR18_Pos

#define GPIO_DIR2_PINDIR18_Pos (18UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINDIR18 (Bit 18)

◆ GPIO_DIR2_PINDIR19_Msk

#define GPIO_DIR2_PINDIR19_Msk (0x80000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINDIR19 (Bitfield-Mask: 0x01)

◆ GPIO_DIR2_PINDIR19_Pos

#define GPIO_DIR2_PINDIR19_Pos (19UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINDIR19 (Bit 19)

◆ GPIO_DIR2_PINDIR1_Msk

#define GPIO_DIR2_PINDIR1_Msk (0x2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINDIR1 (Bitfield-Mask: 0x01)

◆ GPIO_DIR2_PINDIR1_Pos

#define GPIO_DIR2_PINDIR1_Pos (1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINDIR1 (Bit 1)

◆ GPIO_DIR2_PINDIR20_Msk

#define GPIO_DIR2_PINDIR20_Msk (0x100000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINDIR20 (Bitfield-Mask: 0x01)

◆ GPIO_DIR2_PINDIR20_Pos

#define GPIO_DIR2_PINDIR20_Pos (20UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINDIR20 (Bit 20)

◆ GPIO_DIR2_PINDIR21_Msk

#define GPIO_DIR2_PINDIR21_Msk (0x200000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINDIR21 (Bitfield-Mask: 0x01)

◆ GPIO_DIR2_PINDIR21_Pos

#define GPIO_DIR2_PINDIR21_Pos (21UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINDIR21 (Bit 21)

◆ GPIO_DIR2_PINDIR22_Msk

#define GPIO_DIR2_PINDIR22_Msk (0x400000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINDIR22 (Bitfield-Mask: 0x01)

◆ GPIO_DIR2_PINDIR22_Pos

#define GPIO_DIR2_PINDIR22_Pos (22UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINDIR22 (Bit 22)

◆ GPIO_DIR2_PINDIR23_Msk

#define GPIO_DIR2_PINDIR23_Msk (0x800000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINDIR23 (Bitfield-Mask: 0x01)

◆ GPIO_DIR2_PINDIR23_Pos

#define GPIO_DIR2_PINDIR23_Pos (23UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINDIR23 (Bit 23)

◆ GPIO_DIR2_PINDIR24_Msk

#define GPIO_DIR2_PINDIR24_Msk (0x1000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINDIR24 (Bitfield-Mask: 0x01)

◆ GPIO_DIR2_PINDIR24_Pos

#define GPIO_DIR2_PINDIR24_Pos (24UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINDIR24 (Bit 24)

◆ GPIO_DIR2_PINDIR25_Msk

#define GPIO_DIR2_PINDIR25_Msk (0x2000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINDIR25 (Bitfield-Mask: 0x01)

◆ GPIO_DIR2_PINDIR25_Pos

#define GPIO_DIR2_PINDIR25_Pos (25UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINDIR25 (Bit 25)

◆ GPIO_DIR2_PINDIR26_Msk

#define GPIO_DIR2_PINDIR26_Msk (0x4000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINDIR26 (Bitfield-Mask: 0x01)

◆ GPIO_DIR2_PINDIR26_Pos

#define GPIO_DIR2_PINDIR26_Pos (26UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINDIR26 (Bit 26)

◆ GPIO_DIR2_PINDIR27_Msk

#define GPIO_DIR2_PINDIR27_Msk (0x8000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINDIR27 (Bitfield-Mask: 0x01)

◆ GPIO_DIR2_PINDIR27_Pos

#define GPIO_DIR2_PINDIR27_Pos (27UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINDIR27 (Bit 27)

◆ GPIO_DIR2_PINDIR28_Msk

#define GPIO_DIR2_PINDIR28_Msk (0x10000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINDIR28 (Bitfield-Mask: 0x01)

◆ GPIO_DIR2_PINDIR28_Pos

#define GPIO_DIR2_PINDIR28_Pos (28UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINDIR28 (Bit 28)

◆ GPIO_DIR2_PINDIR29_Msk

#define GPIO_DIR2_PINDIR29_Msk (0x20000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINDIR29 (Bitfield-Mask: 0x01)

◆ GPIO_DIR2_PINDIR29_Pos

#define GPIO_DIR2_PINDIR29_Pos (29UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINDIR29 (Bit 29)

◆ GPIO_DIR2_PINDIR2_Msk

#define GPIO_DIR2_PINDIR2_Msk (0x4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINDIR2 (Bitfield-Mask: 0x01)

◆ GPIO_DIR2_PINDIR2_Pos

#define GPIO_DIR2_PINDIR2_Pos (2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINDIR2 (Bit 2)

◆ GPIO_DIR2_PINDIR30_Msk

#define GPIO_DIR2_PINDIR30_Msk (0x40000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINDIR30 (Bitfield-Mask: 0x01)

◆ GPIO_DIR2_PINDIR30_Pos

#define GPIO_DIR2_PINDIR30_Pos (30UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINDIR30 (Bit 30)

◆ GPIO_DIR2_PINDIR31_Msk

#define GPIO_DIR2_PINDIR31_Msk (0x80000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINDIR31 (Bitfield-Mask: 0x01)

◆ GPIO_DIR2_PINDIR31_Pos

#define GPIO_DIR2_PINDIR31_Pos (31UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINDIR31 (Bit 31)

◆ GPIO_DIR2_PINDIR3_Msk

#define GPIO_DIR2_PINDIR3_Msk (0x8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINDIR3 (Bitfield-Mask: 0x01)

◆ GPIO_DIR2_PINDIR3_Pos

#define GPIO_DIR2_PINDIR3_Pos (3UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINDIR3 (Bit 3)

◆ GPIO_DIR2_PINDIR4_Msk

#define GPIO_DIR2_PINDIR4_Msk (0x10UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINDIR4 (Bitfield-Mask: 0x01)

◆ GPIO_DIR2_PINDIR4_Pos

#define GPIO_DIR2_PINDIR4_Pos (4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINDIR4 (Bit 4)

◆ GPIO_DIR2_PINDIR5_Msk

#define GPIO_DIR2_PINDIR5_Msk (0x20UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINDIR5 (Bitfield-Mask: 0x01)

◆ GPIO_DIR2_PINDIR5_Pos

#define GPIO_DIR2_PINDIR5_Pos (5UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINDIR5 (Bit 5)

◆ GPIO_DIR2_PINDIR6_Msk

#define GPIO_DIR2_PINDIR6_Msk (0x40UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINDIR6 (Bitfield-Mask: 0x01)

◆ GPIO_DIR2_PINDIR6_Pos

#define GPIO_DIR2_PINDIR6_Pos (6UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINDIR6 (Bit 6)

◆ GPIO_DIR2_PINDIR7_Msk

#define GPIO_DIR2_PINDIR7_Msk (0x80UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINDIR7 (Bitfield-Mask: 0x01)

◆ GPIO_DIR2_PINDIR7_Pos

#define GPIO_DIR2_PINDIR7_Pos (7UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINDIR7 (Bit 7)

◆ GPIO_DIR2_PINDIR8_Msk

#define GPIO_DIR2_PINDIR8_Msk (0x100UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINDIR8 (Bitfield-Mask: 0x01)

◆ GPIO_DIR2_PINDIR8_Pos

#define GPIO_DIR2_PINDIR8_Pos (8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINDIR8 (Bit 8)

◆ GPIO_DIR2_PINDIR9_Msk

#define GPIO_DIR2_PINDIR9_Msk (0x200UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINDIR9 (Bitfield-Mask: 0x01)

◆ GPIO_DIR2_PINDIR9_Pos

#define GPIO_DIR2_PINDIR9_Pos (9UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINDIR9 (Bit 9)

◆ GPIO_DIR3_PINDIR0_Msk

#define GPIO_DIR3_PINDIR0_Msk (0x1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINDIR0 (Bitfield-Mask: 0x01)

◆ GPIO_DIR3_PINDIR0_Pos

#define GPIO_DIR3_PINDIR0_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINDIR0 (Bit 0)

◆ GPIO_DIR3_PINDIR10_Msk

#define GPIO_DIR3_PINDIR10_Msk (0x400UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINDIR10 (Bitfield-Mask: 0x01)

◆ GPIO_DIR3_PINDIR10_Pos

#define GPIO_DIR3_PINDIR10_Pos (10UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINDIR10 (Bit 10)

◆ GPIO_DIR3_PINDIR11_Msk

#define GPIO_DIR3_PINDIR11_Msk (0x800UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINDIR11 (Bitfield-Mask: 0x01)

◆ GPIO_DIR3_PINDIR11_Pos

#define GPIO_DIR3_PINDIR11_Pos (11UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINDIR11 (Bit 11)

◆ GPIO_DIR3_PINDIR12_Msk

#define GPIO_DIR3_PINDIR12_Msk (0x1000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINDIR12 (Bitfield-Mask: 0x01)

◆ GPIO_DIR3_PINDIR12_Pos

#define GPIO_DIR3_PINDIR12_Pos (12UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINDIR12 (Bit 12)

◆ GPIO_DIR3_PINDIR13_Msk

#define GPIO_DIR3_PINDIR13_Msk (0x2000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINDIR13 (Bitfield-Mask: 0x01)

◆ GPIO_DIR3_PINDIR13_Pos

#define GPIO_DIR3_PINDIR13_Pos (13UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINDIR13 (Bit 13)

◆ GPIO_DIR3_PINDIR14_Msk

#define GPIO_DIR3_PINDIR14_Msk (0x4000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINDIR14 (Bitfield-Mask: 0x01)

◆ GPIO_DIR3_PINDIR14_Pos

#define GPIO_DIR3_PINDIR14_Pos (14UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINDIR14 (Bit 14)

◆ GPIO_DIR3_PINDIR15_Msk

#define GPIO_DIR3_PINDIR15_Msk (0x8000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINDIR15 (Bitfield-Mask: 0x01)

◆ GPIO_DIR3_PINDIR15_Pos

#define GPIO_DIR3_PINDIR15_Pos (15UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINDIR15 (Bit 15)

◆ GPIO_DIR3_PINDIR16_Msk

#define GPIO_DIR3_PINDIR16_Msk (0x10000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINDIR16 (Bitfield-Mask: 0x01)

◆ GPIO_DIR3_PINDIR16_Pos

#define GPIO_DIR3_PINDIR16_Pos (16UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINDIR16 (Bit 16)

◆ GPIO_DIR3_PINDIR17_Msk

#define GPIO_DIR3_PINDIR17_Msk (0x20000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINDIR17 (Bitfield-Mask: 0x01)

◆ GPIO_DIR3_PINDIR17_Pos

#define GPIO_DIR3_PINDIR17_Pos (17UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINDIR17 (Bit 17)

◆ GPIO_DIR3_PINDIR18_Msk

#define GPIO_DIR3_PINDIR18_Msk (0x40000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINDIR18 (Bitfield-Mask: 0x01)

◆ GPIO_DIR3_PINDIR18_Pos

#define GPIO_DIR3_PINDIR18_Pos (18UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINDIR18 (Bit 18)

◆ GPIO_DIR3_PINDIR19_Msk

#define GPIO_DIR3_PINDIR19_Msk (0x80000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINDIR19 (Bitfield-Mask: 0x01)

◆ GPIO_DIR3_PINDIR19_Pos

#define GPIO_DIR3_PINDIR19_Pos (19UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINDIR19 (Bit 19)

◆ GPIO_DIR3_PINDIR1_Msk

#define GPIO_DIR3_PINDIR1_Msk (0x2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINDIR1 (Bitfield-Mask: 0x01)

◆ GPIO_DIR3_PINDIR1_Pos

#define GPIO_DIR3_PINDIR1_Pos (1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINDIR1 (Bit 1)

◆ GPIO_DIR3_PINDIR20_Msk

#define GPIO_DIR3_PINDIR20_Msk (0x100000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINDIR20 (Bitfield-Mask: 0x01)

◆ GPIO_DIR3_PINDIR20_Pos

#define GPIO_DIR3_PINDIR20_Pos (20UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINDIR20 (Bit 20)

◆ GPIO_DIR3_PINDIR21_Msk

#define GPIO_DIR3_PINDIR21_Msk (0x200000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINDIR21 (Bitfield-Mask: 0x01)

◆ GPIO_DIR3_PINDIR21_Pos

#define GPIO_DIR3_PINDIR21_Pos (21UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINDIR21 (Bit 21)

◆ GPIO_DIR3_PINDIR22_Msk

#define GPIO_DIR3_PINDIR22_Msk (0x400000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINDIR22 (Bitfield-Mask: 0x01)

◆ GPIO_DIR3_PINDIR22_Pos

#define GPIO_DIR3_PINDIR22_Pos (22UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINDIR22 (Bit 22)

◆ GPIO_DIR3_PINDIR23_Msk

#define GPIO_DIR3_PINDIR23_Msk (0x800000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINDIR23 (Bitfield-Mask: 0x01)

◆ GPIO_DIR3_PINDIR23_Pos

#define GPIO_DIR3_PINDIR23_Pos (23UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINDIR23 (Bit 23)

◆ GPIO_DIR3_PINDIR24_Msk

#define GPIO_DIR3_PINDIR24_Msk (0x1000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINDIR24 (Bitfield-Mask: 0x01)

◆ GPIO_DIR3_PINDIR24_Pos

#define GPIO_DIR3_PINDIR24_Pos (24UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINDIR24 (Bit 24)

◆ GPIO_DIR3_PINDIR25_Msk

#define GPIO_DIR3_PINDIR25_Msk (0x2000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINDIR25 (Bitfield-Mask: 0x01)

◆ GPIO_DIR3_PINDIR25_Pos

#define GPIO_DIR3_PINDIR25_Pos (25UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINDIR25 (Bit 25)

◆ GPIO_DIR3_PINDIR26_Msk

#define GPIO_DIR3_PINDIR26_Msk (0x4000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINDIR26 (Bitfield-Mask: 0x01)

◆ GPIO_DIR3_PINDIR26_Pos

#define GPIO_DIR3_PINDIR26_Pos (26UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINDIR26 (Bit 26)

◆ GPIO_DIR3_PINDIR27_Msk

#define GPIO_DIR3_PINDIR27_Msk (0x8000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINDIR27 (Bitfield-Mask: 0x01)

◆ GPIO_DIR3_PINDIR27_Pos

#define GPIO_DIR3_PINDIR27_Pos (27UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINDIR27 (Bit 27)

◆ GPIO_DIR3_PINDIR28_Msk

#define GPIO_DIR3_PINDIR28_Msk (0x10000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINDIR28 (Bitfield-Mask: 0x01)

◆ GPIO_DIR3_PINDIR28_Pos

#define GPIO_DIR3_PINDIR28_Pos (28UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINDIR28 (Bit 28)

◆ GPIO_DIR3_PINDIR29_Msk

#define GPIO_DIR3_PINDIR29_Msk (0x20000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINDIR29 (Bitfield-Mask: 0x01)

◆ GPIO_DIR3_PINDIR29_Pos

#define GPIO_DIR3_PINDIR29_Pos (29UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINDIR29 (Bit 29)

◆ GPIO_DIR3_PINDIR2_Msk

#define GPIO_DIR3_PINDIR2_Msk (0x4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINDIR2 (Bitfield-Mask: 0x01)

◆ GPIO_DIR3_PINDIR2_Pos

#define GPIO_DIR3_PINDIR2_Pos (2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINDIR2 (Bit 2)

◆ GPIO_DIR3_PINDIR30_Msk

#define GPIO_DIR3_PINDIR30_Msk (0x40000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINDIR30 (Bitfield-Mask: 0x01)

◆ GPIO_DIR3_PINDIR30_Pos

#define GPIO_DIR3_PINDIR30_Pos (30UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINDIR30 (Bit 30)

◆ GPIO_DIR3_PINDIR31_Msk

#define GPIO_DIR3_PINDIR31_Msk (0x80000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINDIR31 (Bitfield-Mask: 0x01)

◆ GPIO_DIR3_PINDIR31_Pos

#define GPIO_DIR3_PINDIR31_Pos (31UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINDIR31 (Bit 31)

◆ GPIO_DIR3_PINDIR3_Msk

#define GPIO_DIR3_PINDIR3_Msk (0x8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINDIR3 (Bitfield-Mask: 0x01)

◆ GPIO_DIR3_PINDIR3_Pos

#define GPIO_DIR3_PINDIR3_Pos (3UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINDIR3 (Bit 3)

◆ GPIO_DIR3_PINDIR4_Msk

#define GPIO_DIR3_PINDIR4_Msk (0x10UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINDIR4 (Bitfield-Mask: 0x01)

◆ GPIO_DIR3_PINDIR4_Pos

#define GPIO_DIR3_PINDIR4_Pos (4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINDIR4 (Bit 4)

◆ GPIO_DIR3_PINDIR5_Msk

#define GPIO_DIR3_PINDIR5_Msk (0x20UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINDIR5 (Bitfield-Mask: 0x01)

◆ GPIO_DIR3_PINDIR5_Pos

#define GPIO_DIR3_PINDIR5_Pos (5UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINDIR5 (Bit 5)

◆ GPIO_DIR3_PINDIR6_Msk

#define GPIO_DIR3_PINDIR6_Msk (0x40UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINDIR6 (Bitfield-Mask: 0x01)

◆ GPIO_DIR3_PINDIR6_Pos

#define GPIO_DIR3_PINDIR6_Pos (6UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINDIR6 (Bit 6)

◆ GPIO_DIR3_PINDIR7_Msk

#define GPIO_DIR3_PINDIR7_Msk (0x80UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINDIR7 (Bitfield-Mask: 0x01)

◆ GPIO_DIR3_PINDIR7_Pos

#define GPIO_DIR3_PINDIR7_Pos (7UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINDIR7 (Bit 7)

◆ GPIO_DIR3_PINDIR8_Msk

#define GPIO_DIR3_PINDIR8_Msk (0x100UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINDIR8 (Bitfield-Mask: 0x01)

◆ GPIO_DIR3_PINDIR8_Pos

#define GPIO_DIR3_PINDIR8_Pos (8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINDIR8 (Bit 8)

◆ GPIO_DIR3_PINDIR9_Msk

#define GPIO_DIR3_PINDIR9_Msk (0x200UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINDIR9 (Bitfield-Mask: 0x01)

◆ GPIO_DIR3_PINDIR9_Pos

#define GPIO_DIR3_PINDIR9_Pos (9UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINDIR9 (Bit 9)

◆ GPIO_DIR4_PINDIR0_Msk

#define GPIO_DIR4_PINDIR0_Msk (0x1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINDIR0 (Bitfield-Mask: 0x01)

◆ GPIO_DIR4_PINDIR0_Pos

#define GPIO_DIR4_PINDIR0_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINDIR0 (Bit 0)

◆ GPIO_DIR4_PINDIR10_Msk

#define GPIO_DIR4_PINDIR10_Msk (0x400UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINDIR10 (Bitfield-Mask: 0x01)

◆ GPIO_DIR4_PINDIR10_Pos

#define GPIO_DIR4_PINDIR10_Pos (10UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINDIR10 (Bit 10)

◆ GPIO_DIR4_PINDIR11_Msk

#define GPIO_DIR4_PINDIR11_Msk (0x800UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINDIR11 (Bitfield-Mask: 0x01)

◆ GPIO_DIR4_PINDIR11_Pos

#define GPIO_DIR4_PINDIR11_Pos (11UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINDIR11 (Bit 11)

◆ GPIO_DIR4_PINDIR12_Msk

#define GPIO_DIR4_PINDIR12_Msk (0x1000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINDIR12 (Bitfield-Mask: 0x01)

◆ GPIO_DIR4_PINDIR12_Pos

#define GPIO_DIR4_PINDIR12_Pos (12UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINDIR12 (Bit 12)

◆ GPIO_DIR4_PINDIR13_Msk

#define GPIO_DIR4_PINDIR13_Msk (0x2000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINDIR13 (Bitfield-Mask: 0x01)

◆ GPIO_DIR4_PINDIR13_Pos

#define GPIO_DIR4_PINDIR13_Pos (13UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINDIR13 (Bit 13)

◆ GPIO_DIR4_PINDIR14_Msk

#define GPIO_DIR4_PINDIR14_Msk (0x4000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINDIR14 (Bitfield-Mask: 0x01)

◆ GPIO_DIR4_PINDIR14_Pos

#define GPIO_DIR4_PINDIR14_Pos (14UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINDIR14 (Bit 14)

◆ GPIO_DIR4_PINDIR15_Msk

#define GPIO_DIR4_PINDIR15_Msk (0x8000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINDIR15 (Bitfield-Mask: 0x01)

◆ GPIO_DIR4_PINDIR15_Pos

#define GPIO_DIR4_PINDIR15_Pos (15UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINDIR15 (Bit 15)

◆ GPIO_DIR4_PINDIR16_Msk

#define GPIO_DIR4_PINDIR16_Msk (0x10000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINDIR16 (Bitfield-Mask: 0x01)

◆ GPIO_DIR4_PINDIR16_Pos

#define GPIO_DIR4_PINDIR16_Pos (16UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINDIR16 (Bit 16)

◆ GPIO_DIR4_PINDIR17_Msk

#define GPIO_DIR4_PINDIR17_Msk (0x20000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINDIR17 (Bitfield-Mask: 0x01)

◆ GPIO_DIR4_PINDIR17_Pos

#define GPIO_DIR4_PINDIR17_Pos (17UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINDIR17 (Bit 17)

◆ GPIO_DIR4_PINDIR18_Msk

#define GPIO_DIR4_PINDIR18_Msk (0x40000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINDIR18 (Bitfield-Mask: 0x01)

◆ GPIO_DIR4_PINDIR18_Pos

#define GPIO_DIR4_PINDIR18_Pos (18UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINDIR18 (Bit 18)

◆ GPIO_DIR4_PINDIR19_Msk

#define GPIO_DIR4_PINDIR19_Msk (0x80000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINDIR19 (Bitfield-Mask: 0x01)

◆ GPIO_DIR4_PINDIR19_Pos

#define GPIO_DIR4_PINDIR19_Pos (19UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINDIR19 (Bit 19)

◆ GPIO_DIR4_PINDIR1_Msk

#define GPIO_DIR4_PINDIR1_Msk (0x2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINDIR1 (Bitfield-Mask: 0x01)

◆ GPIO_DIR4_PINDIR1_Pos

#define GPIO_DIR4_PINDIR1_Pos (1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINDIR1 (Bit 1)

◆ GPIO_DIR4_PINDIR20_Msk

#define GPIO_DIR4_PINDIR20_Msk (0x100000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINDIR20 (Bitfield-Mask: 0x01)

◆ GPIO_DIR4_PINDIR20_Pos

#define GPIO_DIR4_PINDIR20_Pos (20UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINDIR20 (Bit 20)

◆ GPIO_DIR4_PINDIR21_Msk

#define GPIO_DIR4_PINDIR21_Msk (0x200000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINDIR21 (Bitfield-Mask: 0x01)

◆ GPIO_DIR4_PINDIR21_Pos

#define GPIO_DIR4_PINDIR21_Pos (21UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINDIR21 (Bit 21)

◆ GPIO_DIR4_PINDIR22_Msk

#define GPIO_DIR4_PINDIR22_Msk (0x400000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINDIR22 (Bitfield-Mask: 0x01)

◆ GPIO_DIR4_PINDIR22_Pos

#define GPIO_DIR4_PINDIR22_Pos (22UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINDIR22 (Bit 22)

◆ GPIO_DIR4_PINDIR23_Msk

#define GPIO_DIR4_PINDIR23_Msk (0x800000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINDIR23 (Bitfield-Mask: 0x01)

◆ GPIO_DIR4_PINDIR23_Pos

#define GPIO_DIR4_PINDIR23_Pos (23UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINDIR23 (Bit 23)

◆ GPIO_DIR4_PINDIR24_Msk

#define GPIO_DIR4_PINDIR24_Msk (0x1000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINDIR24 (Bitfield-Mask: 0x01)

◆ GPIO_DIR4_PINDIR24_Pos

#define GPIO_DIR4_PINDIR24_Pos (24UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINDIR24 (Bit 24)

◆ GPIO_DIR4_PINDIR25_Msk

#define GPIO_DIR4_PINDIR25_Msk (0x2000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINDIR25 (Bitfield-Mask: 0x01)

◆ GPIO_DIR4_PINDIR25_Pos

#define GPIO_DIR4_PINDIR25_Pos (25UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINDIR25 (Bit 25)

◆ GPIO_DIR4_PINDIR26_Msk

#define GPIO_DIR4_PINDIR26_Msk (0x4000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINDIR26 (Bitfield-Mask: 0x01)

◆ GPIO_DIR4_PINDIR26_Pos

#define GPIO_DIR4_PINDIR26_Pos (26UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINDIR26 (Bit 26)

◆ GPIO_DIR4_PINDIR27_Msk

#define GPIO_DIR4_PINDIR27_Msk (0x8000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINDIR27 (Bitfield-Mask: 0x01)

◆ GPIO_DIR4_PINDIR27_Pos

#define GPIO_DIR4_PINDIR27_Pos (27UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINDIR27 (Bit 27)

◆ GPIO_DIR4_PINDIR28_Msk

#define GPIO_DIR4_PINDIR28_Msk (0x10000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINDIR28 (Bitfield-Mask: 0x01)

◆ GPIO_DIR4_PINDIR28_Pos

#define GPIO_DIR4_PINDIR28_Pos (28UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINDIR28 (Bit 28)

◆ GPIO_DIR4_PINDIR29_Msk

#define GPIO_DIR4_PINDIR29_Msk (0x20000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINDIR29 (Bitfield-Mask: 0x01)

◆ GPIO_DIR4_PINDIR29_Pos

#define GPIO_DIR4_PINDIR29_Pos (29UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINDIR29 (Bit 29)

◆ GPIO_DIR4_PINDIR2_Msk

#define GPIO_DIR4_PINDIR2_Msk (0x4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINDIR2 (Bitfield-Mask: 0x01)

◆ GPIO_DIR4_PINDIR2_Pos

#define GPIO_DIR4_PINDIR2_Pos (2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINDIR2 (Bit 2)

◆ GPIO_DIR4_PINDIR30_Msk

#define GPIO_DIR4_PINDIR30_Msk (0x40000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINDIR30 (Bitfield-Mask: 0x01)

◆ GPIO_DIR4_PINDIR30_Pos

#define GPIO_DIR4_PINDIR30_Pos (30UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINDIR30 (Bit 30)

◆ GPIO_DIR4_PINDIR31_Msk

#define GPIO_DIR4_PINDIR31_Msk (0x80000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINDIR31 (Bitfield-Mask: 0x01)

◆ GPIO_DIR4_PINDIR31_Pos

#define GPIO_DIR4_PINDIR31_Pos (31UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINDIR31 (Bit 31)

◆ GPIO_DIR4_PINDIR3_Msk

#define GPIO_DIR4_PINDIR3_Msk (0x8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINDIR3 (Bitfield-Mask: 0x01)

◆ GPIO_DIR4_PINDIR3_Pos

#define GPIO_DIR4_PINDIR3_Pos (3UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINDIR3 (Bit 3)

◆ GPIO_DIR4_PINDIR4_Msk

#define GPIO_DIR4_PINDIR4_Msk (0x10UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINDIR4 (Bitfield-Mask: 0x01)

◆ GPIO_DIR4_PINDIR4_Pos

#define GPIO_DIR4_PINDIR4_Pos (4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINDIR4 (Bit 4)

◆ GPIO_DIR4_PINDIR5_Msk

#define GPIO_DIR4_PINDIR5_Msk (0x20UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINDIR5 (Bitfield-Mask: 0x01)

◆ GPIO_DIR4_PINDIR5_Pos

#define GPIO_DIR4_PINDIR5_Pos (5UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINDIR5 (Bit 5)

◆ GPIO_DIR4_PINDIR6_Msk

#define GPIO_DIR4_PINDIR6_Msk (0x40UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINDIR6 (Bitfield-Mask: 0x01)

◆ GPIO_DIR4_PINDIR6_Pos

#define GPIO_DIR4_PINDIR6_Pos (6UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINDIR6 (Bit 6)

◆ GPIO_DIR4_PINDIR7_Msk

#define GPIO_DIR4_PINDIR7_Msk (0x80UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINDIR7 (Bitfield-Mask: 0x01)

◆ GPIO_DIR4_PINDIR7_Pos

#define GPIO_DIR4_PINDIR7_Pos (7UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINDIR7 (Bit 7)

◆ GPIO_DIR4_PINDIR8_Msk

#define GPIO_DIR4_PINDIR8_Msk (0x100UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINDIR8 (Bitfield-Mask: 0x01)

◆ GPIO_DIR4_PINDIR8_Pos

#define GPIO_DIR4_PINDIR8_Pos (8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINDIR8 (Bit 8)

◆ GPIO_DIR4_PINDIR9_Msk

#define GPIO_DIR4_PINDIR9_Msk (0x200UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINDIR9 (Bitfield-Mask: 0x01)

◆ GPIO_DIR4_PINDIR9_Pos

#define GPIO_DIR4_PINDIR9_Pos (9UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINDIR9 (Bit 9)

◆ GPIO_MASK0_PINMASK0_Msk

#define GPIO_MASK0_PINMASK0_Msk (0x1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINMASK0 (Bitfield-Mask: 0x01)

◆ GPIO_MASK0_PINMASK0_Pos

#define GPIO_MASK0_PINMASK0_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINMASK0 (Bit 0)

◆ GPIO_MASK0_PINMASK10_Msk

#define GPIO_MASK0_PINMASK10_Msk (0x400UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINMASK10 (Bitfield-Mask: 0x01)

◆ GPIO_MASK0_PINMASK10_Pos

#define GPIO_MASK0_PINMASK10_Pos (10UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINMASK10 (Bit 10)

◆ GPIO_MASK0_PINMASK11_Msk

#define GPIO_MASK0_PINMASK11_Msk (0x800UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINMASK11 (Bitfield-Mask: 0x01)

◆ GPIO_MASK0_PINMASK11_Pos

#define GPIO_MASK0_PINMASK11_Pos (11UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINMASK11 (Bit 11)

◆ GPIO_MASK0_PINMASK12_Msk

#define GPIO_MASK0_PINMASK12_Msk (0x1000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINMASK12 (Bitfield-Mask: 0x01)

◆ GPIO_MASK0_PINMASK12_Pos

#define GPIO_MASK0_PINMASK12_Pos (12UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINMASK12 (Bit 12)

◆ GPIO_MASK0_PINMASK13_Msk

#define GPIO_MASK0_PINMASK13_Msk (0x2000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINMASK13 (Bitfield-Mask: 0x01)

◆ GPIO_MASK0_PINMASK13_Pos

#define GPIO_MASK0_PINMASK13_Pos (13UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINMASK13 (Bit 13)

◆ GPIO_MASK0_PINMASK14_Msk

#define GPIO_MASK0_PINMASK14_Msk (0x4000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINMASK14 (Bitfield-Mask: 0x01)

◆ GPIO_MASK0_PINMASK14_Pos

#define GPIO_MASK0_PINMASK14_Pos (14UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINMASK14 (Bit 14)

◆ GPIO_MASK0_PINMASK15_Msk

#define GPIO_MASK0_PINMASK15_Msk (0x8000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINMASK15 (Bitfield-Mask: 0x01)

◆ GPIO_MASK0_PINMASK15_Pos

#define GPIO_MASK0_PINMASK15_Pos (15UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINMASK15 (Bit 15)

◆ GPIO_MASK0_PINMASK16_Msk

#define GPIO_MASK0_PINMASK16_Msk (0x10000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINMASK16 (Bitfield-Mask: 0x01)

◆ GPIO_MASK0_PINMASK16_Pos

#define GPIO_MASK0_PINMASK16_Pos (16UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINMASK16 (Bit 16)

◆ GPIO_MASK0_PINMASK17_Msk

#define GPIO_MASK0_PINMASK17_Msk (0x20000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINMASK17 (Bitfield-Mask: 0x01)

◆ GPIO_MASK0_PINMASK17_Pos

#define GPIO_MASK0_PINMASK17_Pos (17UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINMASK17 (Bit 17)

◆ GPIO_MASK0_PINMASK18_Msk

#define GPIO_MASK0_PINMASK18_Msk (0x40000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINMASK18 (Bitfield-Mask: 0x01)

◆ GPIO_MASK0_PINMASK18_Pos

#define GPIO_MASK0_PINMASK18_Pos (18UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINMASK18 (Bit 18)

◆ GPIO_MASK0_PINMASK19_Msk

#define GPIO_MASK0_PINMASK19_Msk (0x80000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINMASK19 (Bitfield-Mask: 0x01)

◆ GPIO_MASK0_PINMASK19_Pos

#define GPIO_MASK0_PINMASK19_Pos (19UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINMASK19 (Bit 19)

◆ GPIO_MASK0_PINMASK1_Msk

#define GPIO_MASK0_PINMASK1_Msk (0x2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINMASK1 (Bitfield-Mask: 0x01)

◆ GPIO_MASK0_PINMASK1_Pos

#define GPIO_MASK0_PINMASK1_Pos (1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINMASK1 (Bit 1)

◆ GPIO_MASK0_PINMASK20_Msk

#define GPIO_MASK0_PINMASK20_Msk (0x100000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINMASK20 (Bitfield-Mask: 0x01)

◆ GPIO_MASK0_PINMASK20_Pos

#define GPIO_MASK0_PINMASK20_Pos (20UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINMASK20 (Bit 20)

◆ GPIO_MASK0_PINMASK21_Msk

#define GPIO_MASK0_PINMASK21_Msk (0x200000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINMASK21 (Bitfield-Mask: 0x01)

◆ GPIO_MASK0_PINMASK21_Pos

#define GPIO_MASK0_PINMASK21_Pos (21UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINMASK21 (Bit 21)

◆ GPIO_MASK0_PINMASK22_Msk

#define GPIO_MASK0_PINMASK22_Msk (0x400000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINMASK22 (Bitfield-Mask: 0x01)

◆ GPIO_MASK0_PINMASK22_Pos

#define GPIO_MASK0_PINMASK22_Pos (22UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINMASK22 (Bit 22)

◆ GPIO_MASK0_PINMASK23_Msk

#define GPIO_MASK0_PINMASK23_Msk (0x800000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINMASK23 (Bitfield-Mask: 0x01)

◆ GPIO_MASK0_PINMASK23_Pos

#define GPIO_MASK0_PINMASK23_Pos (23UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINMASK23 (Bit 23)

◆ GPIO_MASK0_PINMASK24_Msk

#define GPIO_MASK0_PINMASK24_Msk (0x1000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINMASK24 (Bitfield-Mask: 0x01)

◆ GPIO_MASK0_PINMASK24_Pos

#define GPIO_MASK0_PINMASK24_Pos (24UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINMASK24 (Bit 24)

◆ GPIO_MASK0_PINMASK25_Msk

#define GPIO_MASK0_PINMASK25_Msk (0x2000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINMASK25 (Bitfield-Mask: 0x01)

◆ GPIO_MASK0_PINMASK25_Pos

#define GPIO_MASK0_PINMASK25_Pos (25UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINMASK25 (Bit 25)

◆ GPIO_MASK0_PINMASK26_Msk

#define GPIO_MASK0_PINMASK26_Msk (0x4000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINMASK26 (Bitfield-Mask: 0x01)

◆ GPIO_MASK0_PINMASK26_Pos

#define GPIO_MASK0_PINMASK26_Pos (26UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINMASK26 (Bit 26)

◆ GPIO_MASK0_PINMASK27_Msk

#define GPIO_MASK0_PINMASK27_Msk (0x8000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINMASK27 (Bitfield-Mask: 0x01)

◆ GPIO_MASK0_PINMASK27_Pos

#define GPIO_MASK0_PINMASK27_Pos (27UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINMASK27 (Bit 27)

◆ GPIO_MASK0_PINMASK28_Msk

#define GPIO_MASK0_PINMASK28_Msk (0x10000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINMASK28 (Bitfield-Mask: 0x01)

◆ GPIO_MASK0_PINMASK28_Pos

#define GPIO_MASK0_PINMASK28_Pos (28UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINMASK28 (Bit 28)

◆ GPIO_MASK0_PINMASK29_Msk

#define GPIO_MASK0_PINMASK29_Msk (0x20000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINMASK29 (Bitfield-Mask: 0x01)

◆ GPIO_MASK0_PINMASK29_Pos

#define GPIO_MASK0_PINMASK29_Pos (29UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINMASK29 (Bit 29)

◆ GPIO_MASK0_PINMASK2_Msk

#define GPIO_MASK0_PINMASK2_Msk (0x4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINMASK2 (Bitfield-Mask: 0x01)

◆ GPIO_MASK0_PINMASK2_Pos

#define GPIO_MASK0_PINMASK2_Pos (2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINMASK2 (Bit 2)

◆ GPIO_MASK0_PINMASK30_Msk

#define GPIO_MASK0_PINMASK30_Msk (0x40000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINMASK30 (Bitfield-Mask: 0x01)

◆ GPIO_MASK0_PINMASK30_Pos

#define GPIO_MASK0_PINMASK30_Pos (30UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINMASK30 (Bit 30)

◆ GPIO_MASK0_PINMASK31_Msk

#define GPIO_MASK0_PINMASK31_Msk (0x80000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINMASK31 (Bitfield-Mask: 0x01)

◆ GPIO_MASK0_PINMASK31_Pos

#define GPIO_MASK0_PINMASK31_Pos (31UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINMASK31 (Bit 31)

◆ GPIO_MASK0_PINMASK3_Msk

#define GPIO_MASK0_PINMASK3_Msk (0x8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINMASK3 (Bitfield-Mask: 0x01)

◆ GPIO_MASK0_PINMASK3_Pos

#define GPIO_MASK0_PINMASK3_Pos (3UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINMASK3 (Bit 3)

◆ GPIO_MASK0_PINMASK4_Msk

#define GPIO_MASK0_PINMASK4_Msk (0x10UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINMASK4 (Bitfield-Mask: 0x01)

◆ GPIO_MASK0_PINMASK4_Pos

#define GPIO_MASK0_PINMASK4_Pos (4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINMASK4 (Bit 4)

◆ GPIO_MASK0_PINMASK5_Msk

#define GPIO_MASK0_PINMASK5_Msk (0x20UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINMASK5 (Bitfield-Mask: 0x01)

◆ GPIO_MASK0_PINMASK5_Pos

#define GPIO_MASK0_PINMASK5_Pos (5UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINMASK5 (Bit 5)

◆ GPIO_MASK0_PINMASK6_Msk

#define GPIO_MASK0_PINMASK6_Msk (0x40UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINMASK6 (Bitfield-Mask: 0x01)

◆ GPIO_MASK0_PINMASK6_Pos

#define GPIO_MASK0_PINMASK6_Pos (6UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINMASK6 (Bit 6)

◆ GPIO_MASK0_PINMASK7_Msk

#define GPIO_MASK0_PINMASK7_Msk (0x80UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINMASK7 (Bitfield-Mask: 0x01)

◆ GPIO_MASK0_PINMASK7_Pos

#define GPIO_MASK0_PINMASK7_Pos (7UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINMASK7 (Bit 7)

◆ GPIO_MASK0_PINMASK8_Msk

#define GPIO_MASK0_PINMASK8_Msk (0x100UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINMASK8 (Bitfield-Mask: 0x01)

◆ GPIO_MASK0_PINMASK8_Pos

#define GPIO_MASK0_PINMASK8_Pos (8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINMASK8 (Bit 8)

◆ GPIO_MASK0_PINMASK9_Msk

#define GPIO_MASK0_PINMASK9_Msk (0x200UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINMASK9 (Bitfield-Mask: 0x01)

◆ GPIO_MASK0_PINMASK9_Pos

#define GPIO_MASK0_PINMASK9_Pos (9UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINMASK9 (Bit 9)

◆ GPIO_MASK1_PINMASK0_Msk

#define GPIO_MASK1_PINMASK0_Msk (0x1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINMASK0 (Bitfield-Mask: 0x01)

◆ GPIO_MASK1_PINMASK0_Pos

#define GPIO_MASK1_PINMASK0_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINMASK0 (Bit 0)

◆ GPIO_MASK1_PINMASK10_Msk

#define GPIO_MASK1_PINMASK10_Msk (0x400UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINMASK10 (Bitfield-Mask: 0x01)

◆ GPIO_MASK1_PINMASK10_Pos

#define GPIO_MASK1_PINMASK10_Pos (10UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINMASK10 (Bit 10)

◆ GPIO_MASK1_PINMASK11_Msk

#define GPIO_MASK1_PINMASK11_Msk (0x800UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINMASK11 (Bitfield-Mask: 0x01)

◆ GPIO_MASK1_PINMASK11_Pos

#define GPIO_MASK1_PINMASK11_Pos (11UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINMASK11 (Bit 11)

◆ GPIO_MASK1_PINMASK12_Msk

#define GPIO_MASK1_PINMASK12_Msk (0x1000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINMASK12 (Bitfield-Mask: 0x01)

◆ GPIO_MASK1_PINMASK12_Pos

#define GPIO_MASK1_PINMASK12_Pos (12UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINMASK12 (Bit 12)

◆ GPIO_MASK1_PINMASK13_Msk

#define GPIO_MASK1_PINMASK13_Msk (0x2000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINMASK13 (Bitfield-Mask: 0x01)

◆ GPIO_MASK1_PINMASK13_Pos

#define GPIO_MASK1_PINMASK13_Pos (13UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINMASK13 (Bit 13)

◆ GPIO_MASK1_PINMASK14_Msk

#define GPIO_MASK1_PINMASK14_Msk (0x4000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINMASK14 (Bitfield-Mask: 0x01)

◆ GPIO_MASK1_PINMASK14_Pos

#define GPIO_MASK1_PINMASK14_Pos (14UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINMASK14 (Bit 14)

◆ GPIO_MASK1_PINMASK15_Msk

#define GPIO_MASK1_PINMASK15_Msk (0x8000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINMASK15 (Bitfield-Mask: 0x01)

◆ GPIO_MASK1_PINMASK15_Pos

#define GPIO_MASK1_PINMASK15_Pos (15UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINMASK15 (Bit 15)

◆ GPIO_MASK1_PINMASK16_Msk

#define GPIO_MASK1_PINMASK16_Msk (0x10000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINMASK16 (Bitfield-Mask: 0x01)

◆ GPIO_MASK1_PINMASK16_Pos

#define GPIO_MASK1_PINMASK16_Pos (16UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINMASK16 (Bit 16)

◆ GPIO_MASK1_PINMASK17_Msk

#define GPIO_MASK1_PINMASK17_Msk (0x20000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINMASK17 (Bitfield-Mask: 0x01)

◆ GPIO_MASK1_PINMASK17_Pos

#define GPIO_MASK1_PINMASK17_Pos (17UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINMASK17 (Bit 17)

◆ GPIO_MASK1_PINMASK18_Msk

#define GPIO_MASK1_PINMASK18_Msk (0x40000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINMASK18 (Bitfield-Mask: 0x01)

◆ GPIO_MASK1_PINMASK18_Pos

#define GPIO_MASK1_PINMASK18_Pos (18UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINMASK18 (Bit 18)

◆ GPIO_MASK1_PINMASK19_Msk

#define GPIO_MASK1_PINMASK19_Msk (0x80000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINMASK19 (Bitfield-Mask: 0x01)

◆ GPIO_MASK1_PINMASK19_Pos

#define GPIO_MASK1_PINMASK19_Pos (19UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINMASK19 (Bit 19)

◆ GPIO_MASK1_PINMASK1_Msk

#define GPIO_MASK1_PINMASK1_Msk (0x2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINMASK1 (Bitfield-Mask: 0x01)

◆ GPIO_MASK1_PINMASK1_Pos

#define GPIO_MASK1_PINMASK1_Pos (1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINMASK1 (Bit 1)

◆ GPIO_MASK1_PINMASK20_Msk

#define GPIO_MASK1_PINMASK20_Msk (0x100000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINMASK20 (Bitfield-Mask: 0x01)

◆ GPIO_MASK1_PINMASK20_Pos

#define GPIO_MASK1_PINMASK20_Pos (20UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINMASK20 (Bit 20)

◆ GPIO_MASK1_PINMASK21_Msk

#define GPIO_MASK1_PINMASK21_Msk (0x200000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINMASK21 (Bitfield-Mask: 0x01)

◆ GPIO_MASK1_PINMASK21_Pos

#define GPIO_MASK1_PINMASK21_Pos (21UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINMASK21 (Bit 21)

◆ GPIO_MASK1_PINMASK22_Msk

#define GPIO_MASK1_PINMASK22_Msk (0x400000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINMASK22 (Bitfield-Mask: 0x01)

◆ GPIO_MASK1_PINMASK22_Pos

#define GPIO_MASK1_PINMASK22_Pos (22UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINMASK22 (Bit 22)

◆ GPIO_MASK1_PINMASK23_Msk

#define GPIO_MASK1_PINMASK23_Msk (0x800000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINMASK23 (Bitfield-Mask: 0x01)

◆ GPIO_MASK1_PINMASK23_Pos

#define GPIO_MASK1_PINMASK23_Pos (23UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINMASK23 (Bit 23)

◆ GPIO_MASK1_PINMASK24_Msk

#define GPIO_MASK1_PINMASK24_Msk (0x1000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINMASK24 (Bitfield-Mask: 0x01)

◆ GPIO_MASK1_PINMASK24_Pos

#define GPIO_MASK1_PINMASK24_Pos (24UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINMASK24 (Bit 24)

◆ GPIO_MASK1_PINMASK25_Msk

#define GPIO_MASK1_PINMASK25_Msk (0x2000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINMASK25 (Bitfield-Mask: 0x01)

◆ GPIO_MASK1_PINMASK25_Pos

#define GPIO_MASK1_PINMASK25_Pos (25UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINMASK25 (Bit 25)

◆ GPIO_MASK1_PINMASK26_Msk

#define GPIO_MASK1_PINMASK26_Msk (0x4000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINMASK26 (Bitfield-Mask: 0x01)

◆ GPIO_MASK1_PINMASK26_Pos

#define GPIO_MASK1_PINMASK26_Pos (26UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINMASK26 (Bit 26)

◆ GPIO_MASK1_PINMASK27_Msk

#define GPIO_MASK1_PINMASK27_Msk (0x8000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINMASK27 (Bitfield-Mask: 0x01)

◆ GPIO_MASK1_PINMASK27_Pos

#define GPIO_MASK1_PINMASK27_Pos (27UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINMASK27 (Bit 27)

◆ GPIO_MASK1_PINMASK28_Msk

#define GPIO_MASK1_PINMASK28_Msk (0x10000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINMASK28 (Bitfield-Mask: 0x01)

◆ GPIO_MASK1_PINMASK28_Pos

#define GPIO_MASK1_PINMASK28_Pos (28UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINMASK28 (Bit 28)

◆ GPIO_MASK1_PINMASK29_Msk

#define GPIO_MASK1_PINMASK29_Msk (0x20000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINMASK29 (Bitfield-Mask: 0x01)

◆ GPIO_MASK1_PINMASK29_Pos

#define GPIO_MASK1_PINMASK29_Pos (29UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINMASK29 (Bit 29)

◆ GPIO_MASK1_PINMASK2_Msk

#define GPIO_MASK1_PINMASK2_Msk (0x4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINMASK2 (Bitfield-Mask: 0x01)

◆ GPIO_MASK1_PINMASK2_Pos

#define GPIO_MASK1_PINMASK2_Pos (2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINMASK2 (Bit 2)

◆ GPIO_MASK1_PINMASK30_Msk

#define GPIO_MASK1_PINMASK30_Msk (0x40000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINMASK30 (Bitfield-Mask: 0x01)

◆ GPIO_MASK1_PINMASK30_Pos

#define GPIO_MASK1_PINMASK30_Pos (30UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINMASK30 (Bit 30)

◆ GPIO_MASK1_PINMASK31_Msk

#define GPIO_MASK1_PINMASK31_Msk (0x80000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINMASK31 (Bitfield-Mask: 0x01)

◆ GPIO_MASK1_PINMASK31_Pos

#define GPIO_MASK1_PINMASK31_Pos (31UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINMASK31 (Bit 31)

◆ GPIO_MASK1_PINMASK3_Msk

#define GPIO_MASK1_PINMASK3_Msk (0x8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINMASK3 (Bitfield-Mask: 0x01)

◆ GPIO_MASK1_PINMASK3_Pos

#define GPIO_MASK1_PINMASK3_Pos (3UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINMASK3 (Bit 3)

◆ GPIO_MASK1_PINMASK4_Msk

#define GPIO_MASK1_PINMASK4_Msk (0x10UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINMASK4 (Bitfield-Mask: 0x01)

◆ GPIO_MASK1_PINMASK4_Pos

#define GPIO_MASK1_PINMASK4_Pos (4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINMASK4 (Bit 4)

◆ GPIO_MASK1_PINMASK5_Msk

#define GPIO_MASK1_PINMASK5_Msk (0x20UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINMASK5 (Bitfield-Mask: 0x01)

◆ GPIO_MASK1_PINMASK5_Pos

#define GPIO_MASK1_PINMASK5_Pos (5UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINMASK5 (Bit 5)

◆ GPIO_MASK1_PINMASK6_Msk

#define GPIO_MASK1_PINMASK6_Msk (0x40UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINMASK6 (Bitfield-Mask: 0x01)

◆ GPIO_MASK1_PINMASK6_Pos

#define GPIO_MASK1_PINMASK6_Pos (6UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINMASK6 (Bit 6)

◆ GPIO_MASK1_PINMASK7_Msk

#define GPIO_MASK1_PINMASK7_Msk (0x80UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINMASK7 (Bitfield-Mask: 0x01)

◆ GPIO_MASK1_PINMASK7_Pos

#define GPIO_MASK1_PINMASK7_Pos (7UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINMASK7 (Bit 7)

◆ GPIO_MASK1_PINMASK8_Msk

#define GPIO_MASK1_PINMASK8_Msk (0x100UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINMASK8 (Bitfield-Mask: 0x01)

◆ GPIO_MASK1_PINMASK8_Pos

#define GPIO_MASK1_PINMASK8_Pos (8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINMASK8 (Bit 8)

◆ GPIO_MASK1_PINMASK9_Msk

#define GPIO_MASK1_PINMASK9_Msk (0x200UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINMASK9 (Bitfield-Mask: 0x01)

◆ GPIO_MASK1_PINMASK9_Pos

#define GPIO_MASK1_PINMASK9_Pos (9UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINMASK9 (Bit 9)

◆ GPIO_MASK2_PINMASK0_Msk

#define GPIO_MASK2_PINMASK0_Msk (0x1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINMASK0 (Bitfield-Mask: 0x01)

◆ GPIO_MASK2_PINMASK0_Pos

#define GPIO_MASK2_PINMASK0_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINMASK0 (Bit 0)

◆ GPIO_MASK2_PINMASK10_Msk

#define GPIO_MASK2_PINMASK10_Msk (0x400UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINMASK10 (Bitfield-Mask: 0x01)

◆ GPIO_MASK2_PINMASK10_Pos

#define GPIO_MASK2_PINMASK10_Pos (10UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINMASK10 (Bit 10)

◆ GPIO_MASK2_PINMASK11_Msk

#define GPIO_MASK2_PINMASK11_Msk (0x800UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINMASK11 (Bitfield-Mask: 0x01)

◆ GPIO_MASK2_PINMASK11_Pos

#define GPIO_MASK2_PINMASK11_Pos (11UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINMASK11 (Bit 11)

◆ GPIO_MASK2_PINMASK12_Msk

#define GPIO_MASK2_PINMASK12_Msk (0x1000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINMASK12 (Bitfield-Mask: 0x01)

◆ GPIO_MASK2_PINMASK12_Pos

#define GPIO_MASK2_PINMASK12_Pos (12UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINMASK12 (Bit 12)

◆ GPIO_MASK2_PINMASK13_Msk

#define GPIO_MASK2_PINMASK13_Msk (0x2000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINMASK13 (Bitfield-Mask: 0x01)

◆ GPIO_MASK2_PINMASK13_Pos

#define GPIO_MASK2_PINMASK13_Pos (13UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINMASK13 (Bit 13)

◆ GPIO_MASK2_PINMASK14_Msk

#define GPIO_MASK2_PINMASK14_Msk (0x4000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINMASK14 (Bitfield-Mask: 0x01)

◆ GPIO_MASK2_PINMASK14_Pos

#define GPIO_MASK2_PINMASK14_Pos (14UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINMASK14 (Bit 14)

◆ GPIO_MASK2_PINMASK15_Msk

#define GPIO_MASK2_PINMASK15_Msk (0x8000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINMASK15 (Bitfield-Mask: 0x01)

◆ GPIO_MASK2_PINMASK15_Pos

#define GPIO_MASK2_PINMASK15_Pos (15UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINMASK15 (Bit 15)

◆ GPIO_MASK2_PINMASK16_Msk

#define GPIO_MASK2_PINMASK16_Msk (0x10000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINMASK16 (Bitfield-Mask: 0x01)

◆ GPIO_MASK2_PINMASK16_Pos

#define GPIO_MASK2_PINMASK16_Pos (16UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINMASK16 (Bit 16)

◆ GPIO_MASK2_PINMASK17_Msk

#define GPIO_MASK2_PINMASK17_Msk (0x20000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINMASK17 (Bitfield-Mask: 0x01)

◆ GPIO_MASK2_PINMASK17_Pos

#define GPIO_MASK2_PINMASK17_Pos (17UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINMASK17 (Bit 17)

◆ GPIO_MASK2_PINMASK18_Msk

#define GPIO_MASK2_PINMASK18_Msk (0x40000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINMASK18 (Bitfield-Mask: 0x01)

◆ GPIO_MASK2_PINMASK18_Pos

#define GPIO_MASK2_PINMASK18_Pos (18UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINMASK18 (Bit 18)

◆ GPIO_MASK2_PINMASK19_Msk

#define GPIO_MASK2_PINMASK19_Msk (0x80000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINMASK19 (Bitfield-Mask: 0x01)

◆ GPIO_MASK2_PINMASK19_Pos

#define GPIO_MASK2_PINMASK19_Pos (19UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINMASK19 (Bit 19)

◆ GPIO_MASK2_PINMASK1_Msk

#define GPIO_MASK2_PINMASK1_Msk (0x2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINMASK1 (Bitfield-Mask: 0x01)

◆ GPIO_MASK2_PINMASK1_Pos

#define GPIO_MASK2_PINMASK1_Pos (1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINMASK1 (Bit 1)

◆ GPIO_MASK2_PINMASK20_Msk

#define GPIO_MASK2_PINMASK20_Msk (0x100000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINMASK20 (Bitfield-Mask: 0x01)

◆ GPIO_MASK2_PINMASK20_Pos

#define GPIO_MASK2_PINMASK20_Pos (20UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINMASK20 (Bit 20)

◆ GPIO_MASK2_PINMASK21_Msk

#define GPIO_MASK2_PINMASK21_Msk (0x200000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINMASK21 (Bitfield-Mask: 0x01)

◆ GPIO_MASK2_PINMASK21_Pos

#define GPIO_MASK2_PINMASK21_Pos (21UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINMASK21 (Bit 21)

◆ GPIO_MASK2_PINMASK22_Msk

#define GPIO_MASK2_PINMASK22_Msk (0x400000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINMASK22 (Bitfield-Mask: 0x01)

◆ GPIO_MASK2_PINMASK22_Pos

#define GPIO_MASK2_PINMASK22_Pos (22UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINMASK22 (Bit 22)

◆ GPIO_MASK2_PINMASK23_Msk

#define GPIO_MASK2_PINMASK23_Msk (0x800000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINMASK23 (Bitfield-Mask: 0x01)

◆ GPIO_MASK2_PINMASK23_Pos

#define GPIO_MASK2_PINMASK23_Pos (23UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINMASK23 (Bit 23)

◆ GPIO_MASK2_PINMASK24_Msk

#define GPIO_MASK2_PINMASK24_Msk (0x1000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINMASK24 (Bitfield-Mask: 0x01)

◆ GPIO_MASK2_PINMASK24_Pos

#define GPIO_MASK2_PINMASK24_Pos (24UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINMASK24 (Bit 24)

◆ GPIO_MASK2_PINMASK25_Msk

#define GPIO_MASK2_PINMASK25_Msk (0x2000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINMASK25 (Bitfield-Mask: 0x01)

◆ GPIO_MASK2_PINMASK25_Pos

#define GPIO_MASK2_PINMASK25_Pos (25UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINMASK25 (Bit 25)

◆ GPIO_MASK2_PINMASK26_Msk

#define GPIO_MASK2_PINMASK26_Msk (0x4000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINMASK26 (Bitfield-Mask: 0x01)

◆ GPIO_MASK2_PINMASK26_Pos

#define GPIO_MASK2_PINMASK26_Pos (26UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINMASK26 (Bit 26)

◆ GPIO_MASK2_PINMASK27_Msk

#define GPIO_MASK2_PINMASK27_Msk (0x8000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINMASK27 (Bitfield-Mask: 0x01)

◆ GPIO_MASK2_PINMASK27_Pos

#define GPIO_MASK2_PINMASK27_Pos (27UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINMASK27 (Bit 27)

◆ GPIO_MASK2_PINMASK28_Msk

#define GPIO_MASK2_PINMASK28_Msk (0x10000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINMASK28 (Bitfield-Mask: 0x01)

◆ GPIO_MASK2_PINMASK28_Pos

#define GPIO_MASK2_PINMASK28_Pos (28UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINMASK28 (Bit 28)

◆ GPIO_MASK2_PINMASK29_Msk

#define GPIO_MASK2_PINMASK29_Msk (0x20000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINMASK29 (Bitfield-Mask: 0x01)

◆ GPIO_MASK2_PINMASK29_Pos

#define GPIO_MASK2_PINMASK29_Pos (29UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINMASK29 (Bit 29)

◆ GPIO_MASK2_PINMASK2_Msk

#define GPIO_MASK2_PINMASK2_Msk (0x4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINMASK2 (Bitfield-Mask: 0x01)

◆ GPIO_MASK2_PINMASK2_Pos

#define GPIO_MASK2_PINMASK2_Pos (2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINMASK2 (Bit 2)

◆ GPIO_MASK2_PINMASK30_Msk

#define GPIO_MASK2_PINMASK30_Msk (0x40000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINMASK30 (Bitfield-Mask: 0x01)

◆ GPIO_MASK2_PINMASK30_Pos

#define GPIO_MASK2_PINMASK30_Pos (30UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINMASK30 (Bit 30)

◆ GPIO_MASK2_PINMASK31_Msk

#define GPIO_MASK2_PINMASK31_Msk (0x80000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINMASK31 (Bitfield-Mask: 0x01)

◆ GPIO_MASK2_PINMASK31_Pos

#define GPIO_MASK2_PINMASK31_Pos (31UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINMASK31 (Bit 31)

◆ GPIO_MASK2_PINMASK3_Msk

#define GPIO_MASK2_PINMASK3_Msk (0x8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINMASK3 (Bitfield-Mask: 0x01)

◆ GPIO_MASK2_PINMASK3_Pos

#define GPIO_MASK2_PINMASK3_Pos (3UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINMASK3 (Bit 3)

◆ GPIO_MASK2_PINMASK4_Msk

#define GPIO_MASK2_PINMASK4_Msk (0x10UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINMASK4 (Bitfield-Mask: 0x01)

◆ GPIO_MASK2_PINMASK4_Pos

#define GPIO_MASK2_PINMASK4_Pos (4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINMASK4 (Bit 4)

◆ GPIO_MASK2_PINMASK5_Msk

#define GPIO_MASK2_PINMASK5_Msk (0x20UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINMASK5 (Bitfield-Mask: 0x01)

◆ GPIO_MASK2_PINMASK5_Pos

#define GPIO_MASK2_PINMASK5_Pos (5UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINMASK5 (Bit 5)

◆ GPIO_MASK2_PINMASK6_Msk

#define GPIO_MASK2_PINMASK6_Msk (0x40UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINMASK6 (Bitfield-Mask: 0x01)

◆ GPIO_MASK2_PINMASK6_Pos

#define GPIO_MASK2_PINMASK6_Pos (6UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINMASK6 (Bit 6)

◆ GPIO_MASK2_PINMASK7_Msk

#define GPIO_MASK2_PINMASK7_Msk (0x80UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINMASK7 (Bitfield-Mask: 0x01)

◆ GPIO_MASK2_PINMASK7_Pos

#define GPIO_MASK2_PINMASK7_Pos (7UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINMASK7 (Bit 7)

◆ GPIO_MASK2_PINMASK8_Msk

#define GPIO_MASK2_PINMASK8_Msk (0x100UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINMASK8 (Bitfield-Mask: 0x01)

◆ GPIO_MASK2_PINMASK8_Pos

#define GPIO_MASK2_PINMASK8_Pos (8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINMASK8 (Bit 8)

◆ GPIO_MASK2_PINMASK9_Msk

#define GPIO_MASK2_PINMASK9_Msk (0x200UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINMASK9 (Bitfield-Mask: 0x01)

◆ GPIO_MASK2_PINMASK9_Pos

#define GPIO_MASK2_PINMASK9_Pos (9UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINMASK9 (Bit 9)

◆ GPIO_MASK3_PINMASK0_Msk

#define GPIO_MASK3_PINMASK0_Msk (0x1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINMASK0 (Bitfield-Mask: 0x01)

◆ GPIO_MASK3_PINMASK0_Pos

#define GPIO_MASK3_PINMASK0_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINMASK0 (Bit 0)

◆ GPIO_MASK3_PINMASK10_Msk

#define GPIO_MASK3_PINMASK10_Msk (0x400UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINMASK10 (Bitfield-Mask: 0x01)

◆ GPIO_MASK3_PINMASK10_Pos

#define GPIO_MASK3_PINMASK10_Pos (10UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINMASK10 (Bit 10)

◆ GPIO_MASK3_PINMASK11_Msk

#define GPIO_MASK3_PINMASK11_Msk (0x800UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINMASK11 (Bitfield-Mask: 0x01)

◆ GPIO_MASK3_PINMASK11_Pos

#define GPIO_MASK3_PINMASK11_Pos (11UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINMASK11 (Bit 11)

◆ GPIO_MASK3_PINMASK12_Msk

#define GPIO_MASK3_PINMASK12_Msk (0x1000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINMASK12 (Bitfield-Mask: 0x01)

◆ GPIO_MASK3_PINMASK12_Pos

#define GPIO_MASK3_PINMASK12_Pos (12UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINMASK12 (Bit 12)

◆ GPIO_MASK3_PINMASK13_Msk

#define GPIO_MASK3_PINMASK13_Msk (0x2000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINMASK13 (Bitfield-Mask: 0x01)

◆ GPIO_MASK3_PINMASK13_Pos

#define GPIO_MASK3_PINMASK13_Pos (13UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINMASK13 (Bit 13)

◆ GPIO_MASK3_PINMASK14_Msk

#define GPIO_MASK3_PINMASK14_Msk (0x4000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINMASK14 (Bitfield-Mask: 0x01)

◆ GPIO_MASK3_PINMASK14_Pos

#define GPIO_MASK3_PINMASK14_Pos (14UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINMASK14 (Bit 14)

◆ GPIO_MASK3_PINMASK15_Msk

#define GPIO_MASK3_PINMASK15_Msk (0x8000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINMASK15 (Bitfield-Mask: 0x01)

◆ GPIO_MASK3_PINMASK15_Pos

#define GPIO_MASK3_PINMASK15_Pos (15UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINMASK15 (Bit 15)

◆ GPIO_MASK3_PINMASK16_Msk

#define GPIO_MASK3_PINMASK16_Msk (0x10000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINMASK16 (Bitfield-Mask: 0x01)

◆ GPIO_MASK3_PINMASK16_Pos

#define GPIO_MASK3_PINMASK16_Pos (16UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINMASK16 (Bit 16)

◆ GPIO_MASK3_PINMASK17_Msk

#define GPIO_MASK3_PINMASK17_Msk (0x20000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINMASK17 (Bitfield-Mask: 0x01)

◆ GPIO_MASK3_PINMASK17_Pos

#define GPIO_MASK3_PINMASK17_Pos (17UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINMASK17 (Bit 17)

◆ GPIO_MASK3_PINMASK18_Msk

#define GPIO_MASK3_PINMASK18_Msk (0x40000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINMASK18 (Bitfield-Mask: 0x01)

◆ GPIO_MASK3_PINMASK18_Pos

#define GPIO_MASK3_PINMASK18_Pos (18UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINMASK18 (Bit 18)

◆ GPIO_MASK3_PINMASK19_Msk

#define GPIO_MASK3_PINMASK19_Msk (0x80000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINMASK19 (Bitfield-Mask: 0x01)

◆ GPIO_MASK3_PINMASK19_Pos

#define GPIO_MASK3_PINMASK19_Pos (19UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINMASK19 (Bit 19)

◆ GPIO_MASK3_PINMASK1_Msk

#define GPIO_MASK3_PINMASK1_Msk (0x2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINMASK1 (Bitfield-Mask: 0x01)

◆ GPIO_MASK3_PINMASK1_Pos

#define GPIO_MASK3_PINMASK1_Pos (1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINMASK1 (Bit 1)

◆ GPIO_MASK3_PINMASK20_Msk

#define GPIO_MASK3_PINMASK20_Msk (0x100000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINMASK20 (Bitfield-Mask: 0x01)

◆ GPIO_MASK3_PINMASK20_Pos

#define GPIO_MASK3_PINMASK20_Pos (20UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINMASK20 (Bit 20)

◆ GPIO_MASK3_PINMASK21_Msk

#define GPIO_MASK3_PINMASK21_Msk (0x200000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINMASK21 (Bitfield-Mask: 0x01)

◆ GPIO_MASK3_PINMASK21_Pos

#define GPIO_MASK3_PINMASK21_Pos (21UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINMASK21 (Bit 21)

◆ GPIO_MASK3_PINMASK22_Msk

#define GPIO_MASK3_PINMASK22_Msk (0x400000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINMASK22 (Bitfield-Mask: 0x01)

◆ GPIO_MASK3_PINMASK22_Pos

#define GPIO_MASK3_PINMASK22_Pos (22UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINMASK22 (Bit 22)

◆ GPIO_MASK3_PINMASK23_Msk

#define GPIO_MASK3_PINMASK23_Msk (0x800000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINMASK23 (Bitfield-Mask: 0x01)

◆ GPIO_MASK3_PINMASK23_Pos

#define GPIO_MASK3_PINMASK23_Pos (23UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINMASK23 (Bit 23)

◆ GPIO_MASK3_PINMASK24_Msk

#define GPIO_MASK3_PINMASK24_Msk (0x1000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINMASK24 (Bitfield-Mask: 0x01)

◆ GPIO_MASK3_PINMASK24_Pos

#define GPIO_MASK3_PINMASK24_Pos (24UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINMASK24 (Bit 24)

◆ GPIO_MASK3_PINMASK25_Msk

#define GPIO_MASK3_PINMASK25_Msk (0x2000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINMASK25 (Bitfield-Mask: 0x01)

◆ GPIO_MASK3_PINMASK25_Pos

#define GPIO_MASK3_PINMASK25_Pos (25UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINMASK25 (Bit 25)

◆ GPIO_MASK3_PINMASK26_Msk

#define GPIO_MASK3_PINMASK26_Msk (0x4000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINMASK26 (Bitfield-Mask: 0x01)

◆ GPIO_MASK3_PINMASK26_Pos

#define GPIO_MASK3_PINMASK26_Pos (26UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINMASK26 (Bit 26)

◆ GPIO_MASK3_PINMASK27_Msk

#define GPIO_MASK3_PINMASK27_Msk (0x8000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINMASK27 (Bitfield-Mask: 0x01)

◆ GPIO_MASK3_PINMASK27_Pos

#define GPIO_MASK3_PINMASK27_Pos (27UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINMASK27 (Bit 27)

◆ GPIO_MASK3_PINMASK28_Msk

#define GPIO_MASK3_PINMASK28_Msk (0x10000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINMASK28 (Bitfield-Mask: 0x01)

◆ GPIO_MASK3_PINMASK28_Pos

#define GPIO_MASK3_PINMASK28_Pos (28UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINMASK28 (Bit 28)

◆ GPIO_MASK3_PINMASK29_Msk

#define GPIO_MASK3_PINMASK29_Msk (0x20000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINMASK29 (Bitfield-Mask: 0x01)

◆ GPIO_MASK3_PINMASK29_Pos

#define GPIO_MASK3_PINMASK29_Pos (29UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINMASK29 (Bit 29)

◆ GPIO_MASK3_PINMASK2_Msk

#define GPIO_MASK3_PINMASK2_Msk (0x4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINMASK2 (Bitfield-Mask: 0x01)

◆ GPIO_MASK3_PINMASK2_Pos

#define GPIO_MASK3_PINMASK2_Pos (2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINMASK2 (Bit 2)

◆ GPIO_MASK3_PINMASK30_Msk

#define GPIO_MASK3_PINMASK30_Msk (0x40000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINMASK30 (Bitfield-Mask: 0x01)

◆ GPIO_MASK3_PINMASK30_Pos

#define GPIO_MASK3_PINMASK30_Pos (30UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINMASK30 (Bit 30)

◆ GPIO_MASK3_PINMASK31_Msk

#define GPIO_MASK3_PINMASK31_Msk (0x80000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINMASK31 (Bitfield-Mask: 0x01)

◆ GPIO_MASK3_PINMASK31_Pos

#define GPIO_MASK3_PINMASK31_Pos (31UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINMASK31 (Bit 31)

◆ GPIO_MASK3_PINMASK3_Msk

#define GPIO_MASK3_PINMASK3_Msk (0x8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINMASK3 (Bitfield-Mask: 0x01)

◆ GPIO_MASK3_PINMASK3_Pos

#define GPIO_MASK3_PINMASK3_Pos (3UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINMASK3 (Bit 3)

◆ GPIO_MASK3_PINMASK4_Msk

#define GPIO_MASK3_PINMASK4_Msk (0x10UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINMASK4 (Bitfield-Mask: 0x01)

◆ GPIO_MASK3_PINMASK4_Pos

#define GPIO_MASK3_PINMASK4_Pos (4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINMASK4 (Bit 4)

◆ GPIO_MASK3_PINMASK5_Msk

#define GPIO_MASK3_PINMASK5_Msk (0x20UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINMASK5 (Bitfield-Mask: 0x01)

◆ GPIO_MASK3_PINMASK5_Pos

#define GPIO_MASK3_PINMASK5_Pos (5UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINMASK5 (Bit 5)

◆ GPIO_MASK3_PINMASK6_Msk

#define GPIO_MASK3_PINMASK6_Msk (0x40UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINMASK6 (Bitfield-Mask: 0x01)

◆ GPIO_MASK3_PINMASK6_Pos

#define GPIO_MASK3_PINMASK6_Pos (6UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINMASK6 (Bit 6)

◆ GPIO_MASK3_PINMASK7_Msk

#define GPIO_MASK3_PINMASK7_Msk (0x80UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINMASK7 (Bitfield-Mask: 0x01)

◆ GPIO_MASK3_PINMASK7_Pos

#define GPIO_MASK3_PINMASK7_Pos (7UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINMASK7 (Bit 7)

◆ GPIO_MASK3_PINMASK8_Msk

#define GPIO_MASK3_PINMASK8_Msk (0x100UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINMASK8 (Bitfield-Mask: 0x01)

◆ GPIO_MASK3_PINMASK8_Pos

#define GPIO_MASK3_PINMASK8_Pos (8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINMASK8 (Bit 8)

◆ GPIO_MASK3_PINMASK9_Msk

#define GPIO_MASK3_PINMASK9_Msk (0x200UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINMASK9 (Bitfield-Mask: 0x01)

◆ GPIO_MASK3_PINMASK9_Pos

#define GPIO_MASK3_PINMASK9_Pos (9UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINMASK9 (Bit 9)

◆ GPIO_MASK4_PINMASK0_Msk

#define GPIO_MASK4_PINMASK0_Msk (0x1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINMASK0 (Bitfield-Mask: 0x01)

◆ GPIO_MASK4_PINMASK0_Pos

#define GPIO_MASK4_PINMASK0_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINMASK0 (Bit 0)

◆ GPIO_MASK4_PINMASK10_Msk

#define GPIO_MASK4_PINMASK10_Msk (0x400UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINMASK10 (Bitfield-Mask: 0x01)

◆ GPIO_MASK4_PINMASK10_Pos

#define GPIO_MASK4_PINMASK10_Pos (10UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINMASK10 (Bit 10)

◆ GPIO_MASK4_PINMASK11_Msk

#define GPIO_MASK4_PINMASK11_Msk (0x800UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINMASK11 (Bitfield-Mask: 0x01)

◆ GPIO_MASK4_PINMASK11_Pos

#define GPIO_MASK4_PINMASK11_Pos (11UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINMASK11 (Bit 11)

◆ GPIO_MASK4_PINMASK12_Msk

#define GPIO_MASK4_PINMASK12_Msk (0x1000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINMASK12 (Bitfield-Mask: 0x01)

◆ GPIO_MASK4_PINMASK12_Pos

#define GPIO_MASK4_PINMASK12_Pos (12UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINMASK12 (Bit 12)

◆ GPIO_MASK4_PINMASK13_Msk

#define GPIO_MASK4_PINMASK13_Msk (0x2000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINMASK13 (Bitfield-Mask: 0x01)

◆ GPIO_MASK4_PINMASK13_Pos

#define GPIO_MASK4_PINMASK13_Pos (13UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINMASK13 (Bit 13)

◆ GPIO_MASK4_PINMASK14_Msk

#define GPIO_MASK4_PINMASK14_Msk (0x4000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINMASK14 (Bitfield-Mask: 0x01)

◆ GPIO_MASK4_PINMASK14_Pos

#define GPIO_MASK4_PINMASK14_Pos (14UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINMASK14 (Bit 14)

◆ GPIO_MASK4_PINMASK15_Msk

#define GPIO_MASK4_PINMASK15_Msk (0x8000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINMASK15 (Bitfield-Mask: 0x01)

◆ GPIO_MASK4_PINMASK15_Pos

#define GPIO_MASK4_PINMASK15_Pos (15UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINMASK15 (Bit 15)

◆ GPIO_MASK4_PINMASK16_Msk

#define GPIO_MASK4_PINMASK16_Msk (0x10000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINMASK16 (Bitfield-Mask: 0x01)

◆ GPIO_MASK4_PINMASK16_Pos

#define GPIO_MASK4_PINMASK16_Pos (16UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINMASK16 (Bit 16)

◆ GPIO_MASK4_PINMASK17_Msk

#define GPIO_MASK4_PINMASK17_Msk (0x20000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINMASK17 (Bitfield-Mask: 0x01)

◆ GPIO_MASK4_PINMASK17_Pos

#define GPIO_MASK4_PINMASK17_Pos (17UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINMASK17 (Bit 17)

◆ GPIO_MASK4_PINMASK18_Msk

#define GPIO_MASK4_PINMASK18_Msk (0x40000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINMASK18 (Bitfield-Mask: 0x01)

◆ GPIO_MASK4_PINMASK18_Pos

#define GPIO_MASK4_PINMASK18_Pos (18UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINMASK18 (Bit 18)

◆ GPIO_MASK4_PINMASK19_Msk

#define GPIO_MASK4_PINMASK19_Msk (0x80000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINMASK19 (Bitfield-Mask: 0x01)

◆ GPIO_MASK4_PINMASK19_Pos

#define GPIO_MASK4_PINMASK19_Pos (19UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINMASK19 (Bit 19)

◆ GPIO_MASK4_PINMASK1_Msk

#define GPIO_MASK4_PINMASK1_Msk (0x2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINMASK1 (Bitfield-Mask: 0x01)

◆ GPIO_MASK4_PINMASK1_Pos

#define GPIO_MASK4_PINMASK1_Pos (1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINMASK1 (Bit 1)

◆ GPIO_MASK4_PINMASK20_Msk

#define GPIO_MASK4_PINMASK20_Msk (0x100000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINMASK20 (Bitfield-Mask: 0x01)

◆ GPIO_MASK4_PINMASK20_Pos

#define GPIO_MASK4_PINMASK20_Pos (20UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINMASK20 (Bit 20)

◆ GPIO_MASK4_PINMASK21_Msk

#define GPIO_MASK4_PINMASK21_Msk (0x200000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINMASK21 (Bitfield-Mask: 0x01)

◆ GPIO_MASK4_PINMASK21_Pos

#define GPIO_MASK4_PINMASK21_Pos (21UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINMASK21 (Bit 21)

◆ GPIO_MASK4_PINMASK22_Msk

#define GPIO_MASK4_PINMASK22_Msk (0x400000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINMASK22 (Bitfield-Mask: 0x01)

◆ GPIO_MASK4_PINMASK22_Pos

#define GPIO_MASK4_PINMASK22_Pos (22UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINMASK22 (Bit 22)

◆ GPIO_MASK4_PINMASK23_Msk

#define GPIO_MASK4_PINMASK23_Msk (0x800000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINMASK23 (Bitfield-Mask: 0x01)

◆ GPIO_MASK4_PINMASK23_Pos

#define GPIO_MASK4_PINMASK23_Pos (23UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINMASK23 (Bit 23)

◆ GPIO_MASK4_PINMASK24_Msk

#define GPIO_MASK4_PINMASK24_Msk (0x1000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINMASK24 (Bitfield-Mask: 0x01)

◆ GPIO_MASK4_PINMASK24_Pos

#define GPIO_MASK4_PINMASK24_Pos (24UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINMASK24 (Bit 24)

◆ GPIO_MASK4_PINMASK25_Msk

#define GPIO_MASK4_PINMASK25_Msk (0x2000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINMASK25 (Bitfield-Mask: 0x01)

◆ GPIO_MASK4_PINMASK25_Pos

#define GPIO_MASK4_PINMASK25_Pos (25UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINMASK25 (Bit 25)

◆ GPIO_MASK4_PINMASK26_Msk

#define GPIO_MASK4_PINMASK26_Msk (0x4000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINMASK26 (Bitfield-Mask: 0x01)

◆ GPIO_MASK4_PINMASK26_Pos

#define GPIO_MASK4_PINMASK26_Pos (26UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINMASK26 (Bit 26)

◆ GPIO_MASK4_PINMASK27_Msk

#define GPIO_MASK4_PINMASK27_Msk (0x8000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINMASK27 (Bitfield-Mask: 0x01)

◆ GPIO_MASK4_PINMASK27_Pos

#define GPIO_MASK4_PINMASK27_Pos (27UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINMASK27 (Bit 27)

◆ GPIO_MASK4_PINMASK28_Msk

#define GPIO_MASK4_PINMASK28_Msk (0x10000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINMASK28 (Bitfield-Mask: 0x01)

◆ GPIO_MASK4_PINMASK28_Pos

#define GPIO_MASK4_PINMASK28_Pos (28UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINMASK28 (Bit 28)

◆ GPIO_MASK4_PINMASK29_Msk

#define GPIO_MASK4_PINMASK29_Msk (0x20000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINMASK29 (Bitfield-Mask: 0x01)

◆ GPIO_MASK4_PINMASK29_Pos

#define GPIO_MASK4_PINMASK29_Pos (29UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINMASK29 (Bit 29)

◆ GPIO_MASK4_PINMASK2_Msk

#define GPIO_MASK4_PINMASK2_Msk (0x4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINMASK2 (Bitfield-Mask: 0x01)

◆ GPIO_MASK4_PINMASK2_Pos

#define GPIO_MASK4_PINMASK2_Pos (2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINMASK2 (Bit 2)

◆ GPIO_MASK4_PINMASK30_Msk

#define GPIO_MASK4_PINMASK30_Msk (0x40000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINMASK30 (Bitfield-Mask: 0x01)

◆ GPIO_MASK4_PINMASK30_Pos

#define GPIO_MASK4_PINMASK30_Pos (30UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINMASK30 (Bit 30)

◆ GPIO_MASK4_PINMASK31_Msk

#define GPIO_MASK4_PINMASK31_Msk (0x80000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINMASK31 (Bitfield-Mask: 0x01)

◆ GPIO_MASK4_PINMASK31_Pos

#define GPIO_MASK4_PINMASK31_Pos (31UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINMASK31 (Bit 31)

◆ GPIO_MASK4_PINMASK3_Msk

#define GPIO_MASK4_PINMASK3_Msk (0x8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINMASK3 (Bitfield-Mask: 0x01)

◆ GPIO_MASK4_PINMASK3_Pos

#define GPIO_MASK4_PINMASK3_Pos (3UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINMASK3 (Bit 3)

◆ GPIO_MASK4_PINMASK4_Msk

#define GPIO_MASK4_PINMASK4_Msk (0x10UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINMASK4 (Bitfield-Mask: 0x01)

◆ GPIO_MASK4_PINMASK4_Pos

#define GPIO_MASK4_PINMASK4_Pos (4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINMASK4 (Bit 4)

◆ GPIO_MASK4_PINMASK5_Msk

#define GPIO_MASK4_PINMASK5_Msk (0x20UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINMASK5 (Bitfield-Mask: 0x01)

◆ GPIO_MASK4_PINMASK5_Pos

#define GPIO_MASK4_PINMASK5_Pos (5UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINMASK5 (Bit 5)

◆ GPIO_MASK4_PINMASK6_Msk

#define GPIO_MASK4_PINMASK6_Msk (0x40UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINMASK6 (Bitfield-Mask: 0x01)

◆ GPIO_MASK4_PINMASK6_Pos

#define GPIO_MASK4_PINMASK6_Pos (6UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINMASK6 (Bit 6)

◆ GPIO_MASK4_PINMASK7_Msk

#define GPIO_MASK4_PINMASK7_Msk (0x80UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINMASK7 (Bitfield-Mask: 0x01)

◆ GPIO_MASK4_PINMASK7_Pos

#define GPIO_MASK4_PINMASK7_Pos (7UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINMASK7 (Bit 7)

◆ GPIO_MASK4_PINMASK8_Msk

#define GPIO_MASK4_PINMASK8_Msk (0x100UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINMASK8 (Bitfield-Mask: 0x01)

◆ GPIO_MASK4_PINMASK8_Pos

#define GPIO_MASK4_PINMASK8_Pos (8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINMASK8 (Bit 8)

◆ GPIO_MASK4_PINMASK9_Msk

#define GPIO_MASK4_PINMASK9_Msk (0x200UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINMASK9 (Bitfield-Mask: 0x01)

◆ GPIO_MASK4_PINMASK9_Pos

#define GPIO_MASK4_PINMASK9_Pos (9UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINMASK9 (Bit 9)

◆ GPIO_PIN0_PINVAL0_Msk

#define GPIO_PIN0_PINVAL0_Msk (0x1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINVAL0 (Bitfield-Mask: 0x01)

◆ GPIO_PIN0_PINVAL0_Pos

#define GPIO_PIN0_PINVAL0_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINVAL0 (Bit 0)

◆ GPIO_PIN0_PINVAL10_Msk

#define GPIO_PIN0_PINVAL10_Msk (0x400UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINVAL10 (Bitfield-Mask: 0x01)

◆ GPIO_PIN0_PINVAL10_Pos

#define GPIO_PIN0_PINVAL10_Pos (10UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINVAL10 (Bit 10)

◆ GPIO_PIN0_PINVAL11_Msk

#define GPIO_PIN0_PINVAL11_Msk (0x800UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINVAL11 (Bitfield-Mask: 0x01)

◆ GPIO_PIN0_PINVAL11_Pos

#define GPIO_PIN0_PINVAL11_Pos (11UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINVAL11 (Bit 11)

◆ GPIO_PIN0_PINVAL12_Msk

#define GPIO_PIN0_PINVAL12_Msk (0x1000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINVAL12 (Bitfield-Mask: 0x01)

◆ GPIO_PIN0_PINVAL12_Pos

#define GPIO_PIN0_PINVAL12_Pos (12UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINVAL12 (Bit 12)

◆ GPIO_PIN0_PINVAL13_Msk

#define GPIO_PIN0_PINVAL13_Msk (0x2000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINVAL13 (Bitfield-Mask: 0x01)

◆ GPIO_PIN0_PINVAL13_Pos

#define GPIO_PIN0_PINVAL13_Pos (13UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINVAL13 (Bit 13)

◆ GPIO_PIN0_PINVAL14_Msk

#define GPIO_PIN0_PINVAL14_Msk (0x4000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINVAL14 (Bitfield-Mask: 0x01)

◆ GPIO_PIN0_PINVAL14_Pos

#define GPIO_PIN0_PINVAL14_Pos (14UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINVAL14 (Bit 14)

◆ GPIO_PIN0_PINVAL15_Msk

#define GPIO_PIN0_PINVAL15_Msk (0x8000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINVAL15 (Bitfield-Mask: 0x01)

◆ GPIO_PIN0_PINVAL15_Pos

#define GPIO_PIN0_PINVAL15_Pos (15UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINVAL15 (Bit 15)

◆ GPIO_PIN0_PINVAL16_Msk

#define GPIO_PIN0_PINVAL16_Msk (0x10000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINVAL16 (Bitfield-Mask: 0x01)

◆ GPIO_PIN0_PINVAL16_Pos

#define GPIO_PIN0_PINVAL16_Pos (16UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINVAL16 (Bit 16)

◆ GPIO_PIN0_PINVAL17_Msk

#define GPIO_PIN0_PINVAL17_Msk (0x20000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINVAL17 (Bitfield-Mask: 0x01)

◆ GPIO_PIN0_PINVAL17_Pos

#define GPIO_PIN0_PINVAL17_Pos (17UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINVAL17 (Bit 17)

◆ GPIO_PIN0_PINVAL18_Msk

#define GPIO_PIN0_PINVAL18_Msk (0x40000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINVAL18 (Bitfield-Mask: 0x01)

◆ GPIO_PIN0_PINVAL18_Pos

#define GPIO_PIN0_PINVAL18_Pos (18UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINVAL18 (Bit 18)

◆ GPIO_PIN0_PINVAL19_Msk

#define GPIO_PIN0_PINVAL19_Msk (0x80000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINVAL19 (Bitfield-Mask: 0x01)

◆ GPIO_PIN0_PINVAL19_Pos

#define GPIO_PIN0_PINVAL19_Pos (19UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINVAL19 (Bit 19)

◆ GPIO_PIN0_PINVAL1_Msk

#define GPIO_PIN0_PINVAL1_Msk (0x2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINVAL1 (Bitfield-Mask: 0x01)

◆ GPIO_PIN0_PINVAL1_Pos

#define GPIO_PIN0_PINVAL1_Pos (1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINVAL1 (Bit 1)

◆ GPIO_PIN0_PINVAL20_Msk

#define GPIO_PIN0_PINVAL20_Msk (0x100000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINVAL20 (Bitfield-Mask: 0x01)

◆ GPIO_PIN0_PINVAL20_Pos

#define GPIO_PIN0_PINVAL20_Pos (20UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINVAL20 (Bit 20)

◆ GPIO_PIN0_PINVAL21_Msk

#define GPIO_PIN0_PINVAL21_Msk (0x200000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINVAL21 (Bitfield-Mask: 0x01)

◆ GPIO_PIN0_PINVAL21_Pos

#define GPIO_PIN0_PINVAL21_Pos (21UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINVAL21 (Bit 21)

◆ GPIO_PIN0_PINVAL22_Msk

#define GPIO_PIN0_PINVAL22_Msk (0x400000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINVAL22 (Bitfield-Mask: 0x01)

◆ GPIO_PIN0_PINVAL22_Pos

#define GPIO_PIN0_PINVAL22_Pos (22UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINVAL22 (Bit 22)

◆ GPIO_PIN0_PINVAL23_Msk

#define GPIO_PIN0_PINVAL23_Msk (0x800000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINVAL23 (Bitfield-Mask: 0x01)

◆ GPIO_PIN0_PINVAL23_Pos

#define GPIO_PIN0_PINVAL23_Pos (23UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINVAL23 (Bit 23)

◆ GPIO_PIN0_PINVAL24_Msk

#define GPIO_PIN0_PINVAL24_Msk (0x1000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINVAL24 (Bitfield-Mask: 0x01)

◆ GPIO_PIN0_PINVAL24_Pos

#define GPIO_PIN0_PINVAL24_Pos (24UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINVAL24 (Bit 24)

◆ GPIO_PIN0_PINVAL25_Msk

#define GPIO_PIN0_PINVAL25_Msk (0x2000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINVAL25 (Bitfield-Mask: 0x01)

◆ GPIO_PIN0_PINVAL25_Pos

#define GPIO_PIN0_PINVAL25_Pos (25UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINVAL25 (Bit 25)

◆ GPIO_PIN0_PINVAL26_Msk

#define GPIO_PIN0_PINVAL26_Msk (0x4000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINVAL26 (Bitfield-Mask: 0x01)

◆ GPIO_PIN0_PINVAL26_Pos

#define GPIO_PIN0_PINVAL26_Pos (26UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINVAL26 (Bit 26)

◆ GPIO_PIN0_PINVAL27_Msk

#define GPIO_PIN0_PINVAL27_Msk (0x8000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINVAL27 (Bitfield-Mask: 0x01)

◆ GPIO_PIN0_PINVAL27_Pos

#define GPIO_PIN0_PINVAL27_Pos (27UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINVAL27 (Bit 27)

◆ GPIO_PIN0_PINVAL28_Msk

#define GPIO_PIN0_PINVAL28_Msk (0x10000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINVAL28 (Bitfield-Mask: 0x01)

◆ GPIO_PIN0_PINVAL28_Pos

#define GPIO_PIN0_PINVAL28_Pos (28UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINVAL28 (Bit 28)

◆ GPIO_PIN0_PINVAL29_Msk

#define GPIO_PIN0_PINVAL29_Msk (0x20000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINVAL29 (Bitfield-Mask: 0x01)

◆ GPIO_PIN0_PINVAL29_Pos

#define GPIO_PIN0_PINVAL29_Pos (29UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINVAL29 (Bit 29)

◆ GPIO_PIN0_PINVAL2_Msk

#define GPIO_PIN0_PINVAL2_Msk (0x4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINVAL2 (Bitfield-Mask: 0x01)

◆ GPIO_PIN0_PINVAL2_Pos

#define GPIO_PIN0_PINVAL2_Pos (2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINVAL2 (Bit 2)

◆ GPIO_PIN0_PINVAL30_Msk

#define GPIO_PIN0_PINVAL30_Msk (0x40000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINVAL30 (Bitfield-Mask: 0x01)

◆ GPIO_PIN0_PINVAL30_Pos

#define GPIO_PIN0_PINVAL30_Pos (30UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINVAL30 (Bit 30)

◆ GPIO_PIN0_PINVAL31_Msk

#define GPIO_PIN0_PINVAL31_Msk (0x80000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINVAL31 (Bitfield-Mask: 0x01)

◆ GPIO_PIN0_PINVAL31_Pos

#define GPIO_PIN0_PINVAL31_Pos (31UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINVAL31 (Bit 31)

◆ GPIO_PIN0_PINVAL3_Msk

#define GPIO_PIN0_PINVAL3_Msk (0x8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINVAL3 (Bitfield-Mask: 0x01)

◆ GPIO_PIN0_PINVAL3_Pos

#define GPIO_PIN0_PINVAL3_Pos (3UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINVAL3 (Bit 3)

◆ GPIO_PIN0_PINVAL4_Msk

#define GPIO_PIN0_PINVAL4_Msk (0x10UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINVAL4 (Bitfield-Mask: 0x01)

◆ GPIO_PIN0_PINVAL4_Pos

#define GPIO_PIN0_PINVAL4_Pos (4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINVAL4 (Bit 4)

◆ GPIO_PIN0_PINVAL5_Msk

#define GPIO_PIN0_PINVAL5_Msk (0x20UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINVAL5 (Bitfield-Mask: 0x01)

◆ GPIO_PIN0_PINVAL5_Pos

#define GPIO_PIN0_PINVAL5_Pos (5UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINVAL5 (Bit 5)

◆ GPIO_PIN0_PINVAL6_Msk

#define GPIO_PIN0_PINVAL6_Msk (0x40UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINVAL6 (Bitfield-Mask: 0x01)

◆ GPIO_PIN0_PINVAL6_Pos

#define GPIO_PIN0_PINVAL6_Pos (6UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINVAL6 (Bit 6)

◆ GPIO_PIN0_PINVAL7_Msk

#define GPIO_PIN0_PINVAL7_Msk (0x80UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINVAL7 (Bitfield-Mask: 0x01)

◆ GPIO_PIN0_PINVAL7_Pos

#define GPIO_PIN0_PINVAL7_Pos (7UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINVAL7 (Bit 7)

◆ GPIO_PIN0_PINVAL8_Msk

#define GPIO_PIN0_PINVAL8_Msk (0x100UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINVAL8 (Bitfield-Mask: 0x01)

◆ GPIO_PIN0_PINVAL8_Pos

#define GPIO_PIN0_PINVAL8_Pos (8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINVAL8 (Bit 8)

◆ GPIO_PIN0_PINVAL9_Msk

#define GPIO_PIN0_PINVAL9_Msk (0x200UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINVAL9 (Bitfield-Mask: 0x01)

◆ GPIO_PIN0_PINVAL9_Pos

#define GPIO_PIN0_PINVAL9_Pos (9UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINVAL9 (Bit 9)

◆ GPIO_PIN1_PINVAL0_Msk

#define GPIO_PIN1_PINVAL0_Msk (0x1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINVAL0 (Bitfield-Mask: 0x01)

◆ GPIO_PIN1_PINVAL0_Pos

#define GPIO_PIN1_PINVAL0_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINVAL0 (Bit 0)

◆ GPIO_PIN1_PINVAL10_Msk

#define GPIO_PIN1_PINVAL10_Msk (0x400UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINVAL10 (Bitfield-Mask: 0x01)

◆ GPIO_PIN1_PINVAL10_Pos

#define GPIO_PIN1_PINVAL10_Pos (10UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINVAL10 (Bit 10)

◆ GPIO_PIN1_PINVAL11_Msk

#define GPIO_PIN1_PINVAL11_Msk (0x800UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINVAL11 (Bitfield-Mask: 0x01)

◆ GPIO_PIN1_PINVAL11_Pos

#define GPIO_PIN1_PINVAL11_Pos (11UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINVAL11 (Bit 11)

◆ GPIO_PIN1_PINVAL12_Msk

#define GPIO_PIN1_PINVAL12_Msk (0x1000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINVAL12 (Bitfield-Mask: 0x01)

◆ GPIO_PIN1_PINVAL12_Pos

#define GPIO_PIN1_PINVAL12_Pos (12UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINVAL12 (Bit 12)

◆ GPIO_PIN1_PINVAL13_Msk

#define GPIO_PIN1_PINVAL13_Msk (0x2000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINVAL13 (Bitfield-Mask: 0x01)

◆ GPIO_PIN1_PINVAL13_Pos

#define GPIO_PIN1_PINVAL13_Pos (13UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINVAL13 (Bit 13)

◆ GPIO_PIN1_PINVAL14_Msk

#define GPIO_PIN1_PINVAL14_Msk (0x4000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINVAL14 (Bitfield-Mask: 0x01)

◆ GPIO_PIN1_PINVAL14_Pos

#define GPIO_PIN1_PINVAL14_Pos (14UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINVAL14 (Bit 14)

◆ GPIO_PIN1_PINVAL15_Msk

#define GPIO_PIN1_PINVAL15_Msk (0x8000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINVAL15 (Bitfield-Mask: 0x01)

◆ GPIO_PIN1_PINVAL15_Pos

#define GPIO_PIN1_PINVAL15_Pos (15UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINVAL15 (Bit 15)

◆ GPIO_PIN1_PINVAL16_Msk

#define GPIO_PIN1_PINVAL16_Msk (0x10000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINVAL16 (Bitfield-Mask: 0x01)

◆ GPIO_PIN1_PINVAL16_Pos

#define GPIO_PIN1_PINVAL16_Pos (16UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINVAL16 (Bit 16)

◆ GPIO_PIN1_PINVAL17_Msk

#define GPIO_PIN1_PINVAL17_Msk (0x20000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINVAL17 (Bitfield-Mask: 0x01)

◆ GPIO_PIN1_PINVAL17_Pos

#define GPIO_PIN1_PINVAL17_Pos (17UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINVAL17 (Bit 17)

◆ GPIO_PIN1_PINVAL18_Msk

#define GPIO_PIN1_PINVAL18_Msk (0x40000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINVAL18 (Bitfield-Mask: 0x01)

◆ GPIO_PIN1_PINVAL18_Pos

#define GPIO_PIN1_PINVAL18_Pos (18UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINVAL18 (Bit 18)

◆ GPIO_PIN1_PINVAL19_Msk

#define GPIO_PIN1_PINVAL19_Msk (0x80000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINVAL19 (Bitfield-Mask: 0x01)

◆ GPIO_PIN1_PINVAL19_Pos

#define GPIO_PIN1_PINVAL19_Pos (19UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINVAL19 (Bit 19)

◆ GPIO_PIN1_PINVAL1_Msk

#define GPIO_PIN1_PINVAL1_Msk (0x2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINVAL1 (Bitfield-Mask: 0x01)

◆ GPIO_PIN1_PINVAL1_Pos

#define GPIO_PIN1_PINVAL1_Pos (1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINVAL1 (Bit 1)

◆ GPIO_PIN1_PINVAL20_Msk

#define GPIO_PIN1_PINVAL20_Msk (0x100000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINVAL20 (Bitfield-Mask: 0x01)

◆ GPIO_PIN1_PINVAL20_Pos

#define GPIO_PIN1_PINVAL20_Pos (20UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINVAL20 (Bit 20)

◆ GPIO_PIN1_PINVAL21_Msk

#define GPIO_PIN1_PINVAL21_Msk (0x200000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINVAL21 (Bitfield-Mask: 0x01)

◆ GPIO_PIN1_PINVAL21_Pos

#define GPIO_PIN1_PINVAL21_Pos (21UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINVAL21 (Bit 21)

◆ GPIO_PIN1_PINVAL22_Msk

#define GPIO_PIN1_PINVAL22_Msk (0x400000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINVAL22 (Bitfield-Mask: 0x01)

◆ GPIO_PIN1_PINVAL22_Pos

#define GPIO_PIN1_PINVAL22_Pos (22UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINVAL22 (Bit 22)

◆ GPIO_PIN1_PINVAL23_Msk

#define GPIO_PIN1_PINVAL23_Msk (0x800000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINVAL23 (Bitfield-Mask: 0x01)

◆ GPIO_PIN1_PINVAL23_Pos

#define GPIO_PIN1_PINVAL23_Pos (23UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINVAL23 (Bit 23)

◆ GPIO_PIN1_PINVAL24_Msk

#define GPIO_PIN1_PINVAL24_Msk (0x1000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINVAL24 (Bitfield-Mask: 0x01)

◆ GPIO_PIN1_PINVAL24_Pos

#define GPIO_PIN1_PINVAL24_Pos (24UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINVAL24 (Bit 24)

◆ GPIO_PIN1_PINVAL25_Msk

#define GPIO_PIN1_PINVAL25_Msk (0x2000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINVAL25 (Bitfield-Mask: 0x01)

◆ GPIO_PIN1_PINVAL25_Pos

#define GPIO_PIN1_PINVAL25_Pos (25UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINVAL25 (Bit 25)

◆ GPIO_PIN1_PINVAL26_Msk

#define GPIO_PIN1_PINVAL26_Msk (0x4000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINVAL26 (Bitfield-Mask: 0x01)

◆ GPIO_PIN1_PINVAL26_Pos

#define GPIO_PIN1_PINVAL26_Pos (26UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINVAL26 (Bit 26)

◆ GPIO_PIN1_PINVAL27_Msk

#define GPIO_PIN1_PINVAL27_Msk (0x8000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINVAL27 (Bitfield-Mask: 0x01)

◆ GPIO_PIN1_PINVAL27_Pos

#define GPIO_PIN1_PINVAL27_Pos (27UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINVAL27 (Bit 27)

◆ GPIO_PIN1_PINVAL28_Msk

#define GPIO_PIN1_PINVAL28_Msk (0x10000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINVAL28 (Bitfield-Mask: 0x01)

◆ GPIO_PIN1_PINVAL28_Pos

#define GPIO_PIN1_PINVAL28_Pos (28UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINVAL28 (Bit 28)

◆ GPIO_PIN1_PINVAL29_Msk

#define GPIO_PIN1_PINVAL29_Msk (0x20000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINVAL29 (Bitfield-Mask: 0x01)

◆ GPIO_PIN1_PINVAL29_Pos

#define GPIO_PIN1_PINVAL29_Pos (29UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINVAL29 (Bit 29)

◆ GPIO_PIN1_PINVAL2_Msk

#define GPIO_PIN1_PINVAL2_Msk (0x4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINVAL2 (Bitfield-Mask: 0x01)

◆ GPIO_PIN1_PINVAL2_Pos

#define GPIO_PIN1_PINVAL2_Pos (2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINVAL2 (Bit 2)

◆ GPIO_PIN1_PINVAL30_Msk

#define GPIO_PIN1_PINVAL30_Msk (0x40000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINVAL30 (Bitfield-Mask: 0x01)

◆ GPIO_PIN1_PINVAL30_Pos

#define GPIO_PIN1_PINVAL30_Pos (30UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINVAL30 (Bit 30)

◆ GPIO_PIN1_PINVAL31_Msk

#define GPIO_PIN1_PINVAL31_Msk (0x80000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINVAL31 (Bitfield-Mask: 0x01)

◆ GPIO_PIN1_PINVAL31_Pos

#define GPIO_PIN1_PINVAL31_Pos (31UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINVAL31 (Bit 31)

◆ GPIO_PIN1_PINVAL3_Msk

#define GPIO_PIN1_PINVAL3_Msk (0x8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINVAL3 (Bitfield-Mask: 0x01)

◆ GPIO_PIN1_PINVAL3_Pos

#define GPIO_PIN1_PINVAL3_Pos (3UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINVAL3 (Bit 3)

◆ GPIO_PIN1_PINVAL4_Msk

#define GPIO_PIN1_PINVAL4_Msk (0x10UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINVAL4 (Bitfield-Mask: 0x01)

◆ GPIO_PIN1_PINVAL4_Pos

#define GPIO_PIN1_PINVAL4_Pos (4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINVAL4 (Bit 4)

◆ GPIO_PIN1_PINVAL5_Msk

#define GPIO_PIN1_PINVAL5_Msk (0x20UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINVAL5 (Bitfield-Mask: 0x01)

◆ GPIO_PIN1_PINVAL5_Pos

#define GPIO_PIN1_PINVAL5_Pos (5UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINVAL5 (Bit 5)

◆ GPIO_PIN1_PINVAL6_Msk

#define GPIO_PIN1_PINVAL6_Msk (0x40UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINVAL6 (Bitfield-Mask: 0x01)

◆ GPIO_PIN1_PINVAL6_Pos

#define GPIO_PIN1_PINVAL6_Pos (6UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINVAL6 (Bit 6)

◆ GPIO_PIN1_PINVAL7_Msk

#define GPIO_PIN1_PINVAL7_Msk (0x80UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINVAL7 (Bitfield-Mask: 0x01)

◆ GPIO_PIN1_PINVAL7_Pos

#define GPIO_PIN1_PINVAL7_Pos (7UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINVAL7 (Bit 7)

◆ GPIO_PIN1_PINVAL8_Msk

#define GPIO_PIN1_PINVAL8_Msk (0x100UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINVAL8 (Bitfield-Mask: 0x01)

◆ GPIO_PIN1_PINVAL8_Pos

#define GPIO_PIN1_PINVAL8_Pos (8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINVAL8 (Bit 8)

◆ GPIO_PIN1_PINVAL9_Msk

#define GPIO_PIN1_PINVAL9_Msk (0x200UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINVAL9 (Bitfield-Mask: 0x01)

◆ GPIO_PIN1_PINVAL9_Pos

#define GPIO_PIN1_PINVAL9_Pos (9UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINVAL9 (Bit 9)

◆ GPIO_PIN2_PINVAL0_Msk

#define GPIO_PIN2_PINVAL0_Msk (0x1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINVAL0 (Bitfield-Mask: 0x01)

◆ GPIO_PIN2_PINVAL0_Pos

#define GPIO_PIN2_PINVAL0_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINVAL0 (Bit 0)

◆ GPIO_PIN2_PINVAL10_Msk

#define GPIO_PIN2_PINVAL10_Msk (0x400UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINVAL10 (Bitfield-Mask: 0x01)

◆ GPIO_PIN2_PINVAL10_Pos

#define GPIO_PIN2_PINVAL10_Pos (10UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINVAL10 (Bit 10)

◆ GPIO_PIN2_PINVAL11_Msk

#define GPIO_PIN2_PINVAL11_Msk (0x800UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINVAL11 (Bitfield-Mask: 0x01)

◆ GPIO_PIN2_PINVAL11_Pos

#define GPIO_PIN2_PINVAL11_Pos (11UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINVAL11 (Bit 11)

◆ GPIO_PIN2_PINVAL12_Msk

#define GPIO_PIN2_PINVAL12_Msk (0x1000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINVAL12 (Bitfield-Mask: 0x01)

◆ GPIO_PIN2_PINVAL12_Pos

#define GPIO_PIN2_PINVAL12_Pos (12UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINVAL12 (Bit 12)

◆ GPIO_PIN2_PINVAL13_Msk

#define GPIO_PIN2_PINVAL13_Msk (0x2000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINVAL13 (Bitfield-Mask: 0x01)

◆ GPIO_PIN2_PINVAL13_Pos

#define GPIO_PIN2_PINVAL13_Pos (13UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINVAL13 (Bit 13)

◆ GPIO_PIN2_PINVAL14_Msk

#define GPIO_PIN2_PINVAL14_Msk (0x4000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINVAL14 (Bitfield-Mask: 0x01)

◆ GPIO_PIN2_PINVAL14_Pos

#define GPIO_PIN2_PINVAL14_Pos (14UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINVAL14 (Bit 14)

◆ GPIO_PIN2_PINVAL15_Msk

#define GPIO_PIN2_PINVAL15_Msk (0x8000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINVAL15 (Bitfield-Mask: 0x01)

◆ GPIO_PIN2_PINVAL15_Pos

#define GPIO_PIN2_PINVAL15_Pos (15UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINVAL15 (Bit 15)

◆ GPIO_PIN2_PINVAL16_Msk

#define GPIO_PIN2_PINVAL16_Msk (0x10000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINVAL16 (Bitfield-Mask: 0x01)

◆ GPIO_PIN2_PINVAL16_Pos

#define GPIO_PIN2_PINVAL16_Pos (16UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINVAL16 (Bit 16)

◆ GPIO_PIN2_PINVAL17_Msk

#define GPIO_PIN2_PINVAL17_Msk (0x20000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINVAL17 (Bitfield-Mask: 0x01)

◆ GPIO_PIN2_PINVAL17_Pos

#define GPIO_PIN2_PINVAL17_Pos (17UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINVAL17 (Bit 17)

◆ GPIO_PIN2_PINVAL18_Msk

#define GPIO_PIN2_PINVAL18_Msk (0x40000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINVAL18 (Bitfield-Mask: 0x01)

◆ GPIO_PIN2_PINVAL18_Pos

#define GPIO_PIN2_PINVAL18_Pos (18UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINVAL18 (Bit 18)

◆ GPIO_PIN2_PINVAL19_Msk

#define GPIO_PIN2_PINVAL19_Msk (0x80000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINVAL19 (Bitfield-Mask: 0x01)

◆ GPIO_PIN2_PINVAL19_Pos

#define GPIO_PIN2_PINVAL19_Pos (19UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINVAL19 (Bit 19)

◆ GPIO_PIN2_PINVAL1_Msk

#define GPIO_PIN2_PINVAL1_Msk (0x2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINVAL1 (Bitfield-Mask: 0x01)

◆ GPIO_PIN2_PINVAL1_Pos

#define GPIO_PIN2_PINVAL1_Pos (1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINVAL1 (Bit 1)

◆ GPIO_PIN2_PINVAL20_Msk

#define GPIO_PIN2_PINVAL20_Msk (0x100000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINVAL20 (Bitfield-Mask: 0x01)

◆ GPIO_PIN2_PINVAL20_Pos

#define GPIO_PIN2_PINVAL20_Pos (20UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINVAL20 (Bit 20)

◆ GPIO_PIN2_PINVAL21_Msk

#define GPIO_PIN2_PINVAL21_Msk (0x200000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINVAL21 (Bitfield-Mask: 0x01)

◆ GPIO_PIN2_PINVAL21_Pos

#define GPIO_PIN2_PINVAL21_Pos (21UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINVAL21 (Bit 21)

◆ GPIO_PIN2_PINVAL22_Msk

#define GPIO_PIN2_PINVAL22_Msk (0x400000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINVAL22 (Bitfield-Mask: 0x01)

◆ GPIO_PIN2_PINVAL22_Pos

#define GPIO_PIN2_PINVAL22_Pos (22UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINVAL22 (Bit 22)

◆ GPIO_PIN2_PINVAL23_Msk

#define GPIO_PIN2_PINVAL23_Msk (0x800000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINVAL23 (Bitfield-Mask: 0x01)

◆ GPIO_PIN2_PINVAL23_Pos

#define GPIO_PIN2_PINVAL23_Pos (23UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINVAL23 (Bit 23)

◆ GPIO_PIN2_PINVAL24_Msk

#define GPIO_PIN2_PINVAL24_Msk (0x1000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINVAL24 (Bitfield-Mask: 0x01)

◆ GPIO_PIN2_PINVAL24_Pos

#define GPIO_PIN2_PINVAL24_Pos (24UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINVAL24 (Bit 24)

◆ GPIO_PIN2_PINVAL25_Msk

#define GPIO_PIN2_PINVAL25_Msk (0x2000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINVAL25 (Bitfield-Mask: 0x01)

◆ GPIO_PIN2_PINVAL25_Pos

#define GPIO_PIN2_PINVAL25_Pos (25UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINVAL25 (Bit 25)

◆ GPIO_PIN2_PINVAL26_Msk

#define GPIO_PIN2_PINVAL26_Msk (0x4000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINVAL26 (Bitfield-Mask: 0x01)

◆ GPIO_PIN2_PINVAL26_Pos

#define GPIO_PIN2_PINVAL26_Pos (26UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINVAL26 (Bit 26)

◆ GPIO_PIN2_PINVAL27_Msk

#define GPIO_PIN2_PINVAL27_Msk (0x8000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINVAL27 (Bitfield-Mask: 0x01)

◆ GPIO_PIN2_PINVAL27_Pos

#define GPIO_PIN2_PINVAL27_Pos (27UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINVAL27 (Bit 27)

◆ GPIO_PIN2_PINVAL28_Msk

#define GPIO_PIN2_PINVAL28_Msk (0x10000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINVAL28 (Bitfield-Mask: 0x01)

◆ GPIO_PIN2_PINVAL28_Pos

#define GPIO_PIN2_PINVAL28_Pos (28UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINVAL28 (Bit 28)

◆ GPIO_PIN2_PINVAL29_Msk

#define GPIO_PIN2_PINVAL29_Msk (0x20000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINVAL29 (Bitfield-Mask: 0x01)

◆ GPIO_PIN2_PINVAL29_Pos

#define GPIO_PIN2_PINVAL29_Pos (29UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINVAL29 (Bit 29)

◆ GPIO_PIN2_PINVAL2_Msk

#define GPIO_PIN2_PINVAL2_Msk (0x4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINVAL2 (Bitfield-Mask: 0x01)

◆ GPIO_PIN2_PINVAL2_Pos

#define GPIO_PIN2_PINVAL2_Pos (2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINVAL2 (Bit 2)

◆ GPIO_PIN2_PINVAL30_Msk

#define GPIO_PIN2_PINVAL30_Msk (0x40000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINVAL30 (Bitfield-Mask: 0x01)

◆ GPIO_PIN2_PINVAL30_Pos

#define GPIO_PIN2_PINVAL30_Pos (30UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINVAL30 (Bit 30)

◆ GPIO_PIN2_PINVAL31_Msk

#define GPIO_PIN2_PINVAL31_Msk (0x80000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINVAL31 (Bitfield-Mask: 0x01)

◆ GPIO_PIN2_PINVAL31_Pos

#define GPIO_PIN2_PINVAL31_Pos (31UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINVAL31 (Bit 31)

◆ GPIO_PIN2_PINVAL3_Msk

#define GPIO_PIN2_PINVAL3_Msk (0x8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINVAL3 (Bitfield-Mask: 0x01)

◆ GPIO_PIN2_PINVAL3_Pos

#define GPIO_PIN2_PINVAL3_Pos (3UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINVAL3 (Bit 3)

◆ GPIO_PIN2_PINVAL4_Msk

#define GPIO_PIN2_PINVAL4_Msk (0x10UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINVAL4 (Bitfield-Mask: 0x01)

◆ GPIO_PIN2_PINVAL4_Pos

#define GPIO_PIN2_PINVAL4_Pos (4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINVAL4 (Bit 4)

◆ GPIO_PIN2_PINVAL5_Msk

#define GPIO_PIN2_PINVAL5_Msk (0x20UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINVAL5 (Bitfield-Mask: 0x01)

◆ GPIO_PIN2_PINVAL5_Pos

#define GPIO_PIN2_PINVAL5_Pos (5UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINVAL5 (Bit 5)

◆ GPIO_PIN2_PINVAL6_Msk

#define GPIO_PIN2_PINVAL6_Msk (0x40UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINVAL6 (Bitfield-Mask: 0x01)

◆ GPIO_PIN2_PINVAL6_Pos

#define GPIO_PIN2_PINVAL6_Pos (6UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINVAL6 (Bit 6)

◆ GPIO_PIN2_PINVAL7_Msk

#define GPIO_PIN2_PINVAL7_Msk (0x80UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINVAL7 (Bitfield-Mask: 0x01)

◆ GPIO_PIN2_PINVAL7_Pos

#define GPIO_PIN2_PINVAL7_Pos (7UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINVAL7 (Bit 7)

◆ GPIO_PIN2_PINVAL8_Msk

#define GPIO_PIN2_PINVAL8_Msk (0x100UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINVAL8 (Bitfield-Mask: 0x01)

◆ GPIO_PIN2_PINVAL8_Pos

#define GPIO_PIN2_PINVAL8_Pos (8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINVAL8 (Bit 8)

◆ GPIO_PIN2_PINVAL9_Msk

#define GPIO_PIN2_PINVAL9_Msk (0x200UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINVAL9 (Bitfield-Mask: 0x01)

◆ GPIO_PIN2_PINVAL9_Pos

#define GPIO_PIN2_PINVAL9_Pos (9UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINVAL9 (Bit 9)

◆ GPIO_PIN3_PINVAL0_Msk

#define GPIO_PIN3_PINVAL0_Msk (0x1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINVAL0 (Bitfield-Mask: 0x01)

◆ GPIO_PIN3_PINVAL0_Pos

#define GPIO_PIN3_PINVAL0_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINVAL0 (Bit 0)

◆ GPIO_PIN3_PINVAL10_Msk

#define GPIO_PIN3_PINVAL10_Msk (0x400UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINVAL10 (Bitfield-Mask: 0x01)

◆ GPIO_PIN3_PINVAL10_Pos

#define GPIO_PIN3_PINVAL10_Pos (10UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINVAL10 (Bit 10)

◆ GPIO_PIN3_PINVAL11_Msk

#define GPIO_PIN3_PINVAL11_Msk (0x800UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINVAL11 (Bitfield-Mask: 0x01)

◆ GPIO_PIN3_PINVAL11_Pos

#define GPIO_PIN3_PINVAL11_Pos (11UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINVAL11 (Bit 11)

◆ GPIO_PIN3_PINVAL12_Msk

#define GPIO_PIN3_PINVAL12_Msk (0x1000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINVAL12 (Bitfield-Mask: 0x01)

◆ GPIO_PIN3_PINVAL12_Pos

#define GPIO_PIN3_PINVAL12_Pos (12UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINVAL12 (Bit 12)

◆ GPIO_PIN3_PINVAL13_Msk

#define GPIO_PIN3_PINVAL13_Msk (0x2000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINVAL13 (Bitfield-Mask: 0x01)

◆ GPIO_PIN3_PINVAL13_Pos

#define GPIO_PIN3_PINVAL13_Pos (13UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINVAL13 (Bit 13)

◆ GPIO_PIN3_PINVAL14_Msk

#define GPIO_PIN3_PINVAL14_Msk (0x4000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINVAL14 (Bitfield-Mask: 0x01)

◆ GPIO_PIN3_PINVAL14_Pos

#define GPIO_PIN3_PINVAL14_Pos (14UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINVAL14 (Bit 14)

◆ GPIO_PIN3_PINVAL15_Msk

#define GPIO_PIN3_PINVAL15_Msk (0x8000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINVAL15 (Bitfield-Mask: 0x01)

◆ GPIO_PIN3_PINVAL15_Pos

#define GPIO_PIN3_PINVAL15_Pos (15UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINVAL15 (Bit 15)

◆ GPIO_PIN3_PINVAL16_Msk

#define GPIO_PIN3_PINVAL16_Msk (0x10000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINVAL16 (Bitfield-Mask: 0x01)

◆ GPIO_PIN3_PINVAL16_Pos

#define GPIO_PIN3_PINVAL16_Pos (16UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINVAL16 (Bit 16)

◆ GPIO_PIN3_PINVAL17_Msk

#define GPIO_PIN3_PINVAL17_Msk (0x20000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINVAL17 (Bitfield-Mask: 0x01)

◆ GPIO_PIN3_PINVAL17_Pos

#define GPIO_PIN3_PINVAL17_Pos (17UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINVAL17 (Bit 17)

◆ GPIO_PIN3_PINVAL18_Msk

#define GPIO_PIN3_PINVAL18_Msk (0x40000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINVAL18 (Bitfield-Mask: 0x01)

◆ GPIO_PIN3_PINVAL18_Pos

#define GPIO_PIN3_PINVAL18_Pos (18UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINVAL18 (Bit 18)

◆ GPIO_PIN3_PINVAL19_Msk

#define GPIO_PIN3_PINVAL19_Msk (0x80000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINVAL19 (Bitfield-Mask: 0x01)

◆ GPIO_PIN3_PINVAL19_Pos

#define GPIO_PIN3_PINVAL19_Pos (19UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINVAL19 (Bit 19)

◆ GPIO_PIN3_PINVAL1_Msk

#define GPIO_PIN3_PINVAL1_Msk (0x2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINVAL1 (Bitfield-Mask: 0x01)

◆ GPIO_PIN3_PINVAL1_Pos

#define GPIO_PIN3_PINVAL1_Pos (1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINVAL1 (Bit 1)

◆ GPIO_PIN3_PINVAL20_Msk

#define GPIO_PIN3_PINVAL20_Msk (0x100000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINVAL20 (Bitfield-Mask: 0x01)

◆ GPIO_PIN3_PINVAL20_Pos

#define GPIO_PIN3_PINVAL20_Pos (20UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINVAL20 (Bit 20)

◆ GPIO_PIN3_PINVAL21_Msk

#define GPIO_PIN3_PINVAL21_Msk (0x200000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINVAL21 (Bitfield-Mask: 0x01)

◆ GPIO_PIN3_PINVAL21_Pos

#define GPIO_PIN3_PINVAL21_Pos (21UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINVAL21 (Bit 21)

◆ GPIO_PIN3_PINVAL22_Msk

#define GPIO_PIN3_PINVAL22_Msk (0x400000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINVAL22 (Bitfield-Mask: 0x01)

◆ GPIO_PIN3_PINVAL22_Pos

#define GPIO_PIN3_PINVAL22_Pos (22UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINVAL22 (Bit 22)

◆ GPIO_PIN3_PINVAL23_Msk

#define GPIO_PIN3_PINVAL23_Msk (0x800000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINVAL23 (Bitfield-Mask: 0x01)

◆ GPIO_PIN3_PINVAL23_Pos

#define GPIO_PIN3_PINVAL23_Pos (23UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINVAL23 (Bit 23)

◆ GPIO_PIN3_PINVAL24_Msk

#define GPIO_PIN3_PINVAL24_Msk (0x1000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINVAL24 (Bitfield-Mask: 0x01)

◆ GPIO_PIN3_PINVAL24_Pos

#define GPIO_PIN3_PINVAL24_Pos (24UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINVAL24 (Bit 24)

◆ GPIO_PIN3_PINVAL25_Msk

#define GPIO_PIN3_PINVAL25_Msk (0x2000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINVAL25 (Bitfield-Mask: 0x01)

◆ GPIO_PIN3_PINVAL25_Pos

#define GPIO_PIN3_PINVAL25_Pos (25UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINVAL25 (Bit 25)

◆ GPIO_PIN3_PINVAL26_Msk

#define GPIO_PIN3_PINVAL26_Msk (0x4000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINVAL26 (Bitfield-Mask: 0x01)

◆ GPIO_PIN3_PINVAL26_Pos

#define GPIO_PIN3_PINVAL26_Pos (26UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINVAL26 (Bit 26)

◆ GPIO_PIN3_PINVAL27_Msk

#define GPIO_PIN3_PINVAL27_Msk (0x8000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINVAL27 (Bitfield-Mask: 0x01)

◆ GPIO_PIN3_PINVAL27_Pos

#define GPIO_PIN3_PINVAL27_Pos (27UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINVAL27 (Bit 27)

◆ GPIO_PIN3_PINVAL28_Msk

#define GPIO_PIN3_PINVAL28_Msk (0x10000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINVAL28 (Bitfield-Mask: 0x01)

◆ GPIO_PIN3_PINVAL28_Pos

#define GPIO_PIN3_PINVAL28_Pos (28UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINVAL28 (Bit 28)

◆ GPIO_PIN3_PINVAL29_Msk

#define GPIO_PIN3_PINVAL29_Msk (0x20000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINVAL29 (Bitfield-Mask: 0x01)

◆ GPIO_PIN3_PINVAL29_Pos

#define GPIO_PIN3_PINVAL29_Pos (29UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINVAL29 (Bit 29)

◆ GPIO_PIN3_PINVAL2_Msk

#define GPIO_PIN3_PINVAL2_Msk (0x4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINVAL2 (Bitfield-Mask: 0x01)

◆ GPIO_PIN3_PINVAL2_Pos

#define GPIO_PIN3_PINVAL2_Pos (2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINVAL2 (Bit 2)

◆ GPIO_PIN3_PINVAL30_Msk

#define GPIO_PIN3_PINVAL30_Msk (0x40000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINVAL30 (Bitfield-Mask: 0x01)

◆ GPIO_PIN3_PINVAL30_Pos

#define GPIO_PIN3_PINVAL30_Pos (30UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINVAL30 (Bit 30)

◆ GPIO_PIN3_PINVAL31_Msk

#define GPIO_PIN3_PINVAL31_Msk (0x80000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINVAL31 (Bitfield-Mask: 0x01)

◆ GPIO_PIN3_PINVAL31_Pos

#define GPIO_PIN3_PINVAL31_Pos (31UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINVAL31 (Bit 31)

◆ GPIO_PIN3_PINVAL3_Msk

#define GPIO_PIN3_PINVAL3_Msk (0x8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINVAL3 (Bitfield-Mask: 0x01)

◆ GPIO_PIN3_PINVAL3_Pos

#define GPIO_PIN3_PINVAL3_Pos (3UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINVAL3 (Bit 3)

◆ GPIO_PIN3_PINVAL4_Msk

#define GPIO_PIN3_PINVAL4_Msk (0x10UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINVAL4 (Bitfield-Mask: 0x01)

◆ GPIO_PIN3_PINVAL4_Pos

#define GPIO_PIN3_PINVAL4_Pos (4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINVAL4 (Bit 4)

◆ GPIO_PIN3_PINVAL5_Msk

#define GPIO_PIN3_PINVAL5_Msk (0x20UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINVAL5 (Bitfield-Mask: 0x01)

◆ GPIO_PIN3_PINVAL5_Pos

#define GPIO_PIN3_PINVAL5_Pos (5UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINVAL5 (Bit 5)

◆ GPIO_PIN3_PINVAL6_Msk

#define GPIO_PIN3_PINVAL6_Msk (0x40UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINVAL6 (Bitfield-Mask: 0x01)

◆ GPIO_PIN3_PINVAL6_Pos

#define GPIO_PIN3_PINVAL6_Pos (6UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINVAL6 (Bit 6)

◆ GPIO_PIN3_PINVAL7_Msk

#define GPIO_PIN3_PINVAL7_Msk (0x80UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINVAL7 (Bitfield-Mask: 0x01)

◆ GPIO_PIN3_PINVAL7_Pos

#define GPIO_PIN3_PINVAL7_Pos (7UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINVAL7 (Bit 7)

◆ GPIO_PIN3_PINVAL8_Msk

#define GPIO_PIN3_PINVAL8_Msk (0x100UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINVAL8 (Bitfield-Mask: 0x01)

◆ GPIO_PIN3_PINVAL8_Pos

#define GPIO_PIN3_PINVAL8_Pos (8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINVAL8 (Bit 8)

◆ GPIO_PIN3_PINVAL9_Msk

#define GPIO_PIN3_PINVAL9_Msk (0x200UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINVAL9 (Bitfield-Mask: 0x01)

◆ GPIO_PIN3_PINVAL9_Pos

#define GPIO_PIN3_PINVAL9_Pos (9UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINVAL9 (Bit 9)

◆ GPIO_PIN4_PINVAL0_Msk

#define GPIO_PIN4_PINVAL0_Msk (0x1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINVAL0 (Bitfield-Mask: 0x01)

◆ GPIO_PIN4_PINVAL0_Pos

#define GPIO_PIN4_PINVAL0_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINVAL0 (Bit 0)

◆ GPIO_PIN4_PINVAL10_Msk

#define GPIO_PIN4_PINVAL10_Msk (0x400UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINVAL10 (Bitfield-Mask: 0x01)

◆ GPIO_PIN4_PINVAL10_Pos

#define GPIO_PIN4_PINVAL10_Pos (10UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINVAL10 (Bit 10)

◆ GPIO_PIN4_PINVAL11_Msk

#define GPIO_PIN4_PINVAL11_Msk (0x800UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINVAL11 (Bitfield-Mask: 0x01)

◆ GPIO_PIN4_PINVAL11_Pos

#define GPIO_PIN4_PINVAL11_Pos (11UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINVAL11 (Bit 11)

◆ GPIO_PIN4_PINVAL12_Msk

#define GPIO_PIN4_PINVAL12_Msk (0x1000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINVAL12 (Bitfield-Mask: 0x01)

◆ GPIO_PIN4_PINVAL12_Pos

#define GPIO_PIN4_PINVAL12_Pos (12UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINVAL12 (Bit 12)

◆ GPIO_PIN4_PINVAL13_Msk

#define GPIO_PIN4_PINVAL13_Msk (0x2000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINVAL13 (Bitfield-Mask: 0x01)

◆ GPIO_PIN4_PINVAL13_Pos

#define GPIO_PIN4_PINVAL13_Pos (13UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINVAL13 (Bit 13)

◆ GPIO_PIN4_PINVAL14_Msk

#define GPIO_PIN4_PINVAL14_Msk (0x4000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINVAL14 (Bitfield-Mask: 0x01)

◆ GPIO_PIN4_PINVAL14_Pos

#define GPIO_PIN4_PINVAL14_Pos (14UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINVAL14 (Bit 14)

◆ GPIO_PIN4_PINVAL15_Msk

#define GPIO_PIN4_PINVAL15_Msk (0x8000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINVAL15 (Bitfield-Mask: 0x01)

◆ GPIO_PIN4_PINVAL15_Pos

#define GPIO_PIN4_PINVAL15_Pos (15UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINVAL15 (Bit 15)

◆ GPIO_PIN4_PINVAL16_Msk

#define GPIO_PIN4_PINVAL16_Msk (0x10000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINVAL16 (Bitfield-Mask: 0x01)

◆ GPIO_PIN4_PINVAL16_Pos

#define GPIO_PIN4_PINVAL16_Pos (16UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINVAL16 (Bit 16)

◆ GPIO_PIN4_PINVAL17_Msk

#define GPIO_PIN4_PINVAL17_Msk (0x20000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINVAL17 (Bitfield-Mask: 0x01)

◆ GPIO_PIN4_PINVAL17_Pos

#define GPIO_PIN4_PINVAL17_Pos (17UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINVAL17 (Bit 17)

◆ GPIO_PIN4_PINVAL18_Msk

#define GPIO_PIN4_PINVAL18_Msk (0x40000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINVAL18 (Bitfield-Mask: 0x01)

◆ GPIO_PIN4_PINVAL18_Pos

#define GPIO_PIN4_PINVAL18_Pos (18UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINVAL18 (Bit 18)

◆ GPIO_PIN4_PINVAL19_Msk

#define GPIO_PIN4_PINVAL19_Msk (0x80000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINVAL19 (Bitfield-Mask: 0x01)

◆ GPIO_PIN4_PINVAL19_Pos

#define GPIO_PIN4_PINVAL19_Pos (19UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINVAL19 (Bit 19)

◆ GPIO_PIN4_PINVAL1_Msk

#define GPIO_PIN4_PINVAL1_Msk (0x2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINVAL1 (Bitfield-Mask: 0x01)

◆ GPIO_PIN4_PINVAL1_Pos

#define GPIO_PIN4_PINVAL1_Pos (1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINVAL1 (Bit 1)

◆ GPIO_PIN4_PINVAL20_Msk

#define GPIO_PIN4_PINVAL20_Msk (0x100000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINVAL20 (Bitfield-Mask: 0x01)

◆ GPIO_PIN4_PINVAL20_Pos

#define GPIO_PIN4_PINVAL20_Pos (20UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINVAL20 (Bit 20)

◆ GPIO_PIN4_PINVAL21_Msk

#define GPIO_PIN4_PINVAL21_Msk (0x200000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINVAL21 (Bitfield-Mask: 0x01)

◆ GPIO_PIN4_PINVAL21_Pos

#define GPIO_PIN4_PINVAL21_Pos (21UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINVAL21 (Bit 21)

◆ GPIO_PIN4_PINVAL22_Msk

#define GPIO_PIN4_PINVAL22_Msk (0x400000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINVAL22 (Bitfield-Mask: 0x01)

◆ GPIO_PIN4_PINVAL22_Pos

#define GPIO_PIN4_PINVAL22_Pos (22UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINVAL22 (Bit 22)

◆ GPIO_PIN4_PINVAL23_Msk

#define GPIO_PIN4_PINVAL23_Msk (0x800000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINVAL23 (Bitfield-Mask: 0x01)

◆ GPIO_PIN4_PINVAL23_Pos

#define GPIO_PIN4_PINVAL23_Pos (23UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINVAL23 (Bit 23)

◆ GPIO_PIN4_PINVAL24_Msk

#define GPIO_PIN4_PINVAL24_Msk (0x1000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINVAL24 (Bitfield-Mask: 0x01)

◆ GPIO_PIN4_PINVAL24_Pos

#define GPIO_PIN4_PINVAL24_Pos (24UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINVAL24 (Bit 24)

◆ GPIO_PIN4_PINVAL25_Msk

#define GPIO_PIN4_PINVAL25_Msk (0x2000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINVAL25 (Bitfield-Mask: 0x01)

◆ GPIO_PIN4_PINVAL25_Pos

#define GPIO_PIN4_PINVAL25_Pos (25UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINVAL25 (Bit 25)

◆ GPIO_PIN4_PINVAL26_Msk

#define GPIO_PIN4_PINVAL26_Msk (0x4000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINVAL26 (Bitfield-Mask: 0x01)

◆ GPIO_PIN4_PINVAL26_Pos

#define GPIO_PIN4_PINVAL26_Pos (26UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINVAL26 (Bit 26)

◆ GPIO_PIN4_PINVAL27_Msk

#define GPIO_PIN4_PINVAL27_Msk (0x8000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINVAL27 (Bitfield-Mask: 0x01)

◆ GPIO_PIN4_PINVAL27_Pos

#define GPIO_PIN4_PINVAL27_Pos (27UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINVAL27 (Bit 27)

◆ GPIO_PIN4_PINVAL28_Msk

#define GPIO_PIN4_PINVAL28_Msk (0x10000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINVAL28 (Bitfield-Mask: 0x01)

◆ GPIO_PIN4_PINVAL28_Pos

#define GPIO_PIN4_PINVAL28_Pos (28UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINVAL28 (Bit 28)

◆ GPIO_PIN4_PINVAL29_Msk

#define GPIO_PIN4_PINVAL29_Msk (0x20000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINVAL29 (Bitfield-Mask: 0x01)

◆ GPIO_PIN4_PINVAL29_Pos

#define GPIO_PIN4_PINVAL29_Pos (29UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINVAL29 (Bit 29)

◆ GPIO_PIN4_PINVAL2_Msk

#define GPIO_PIN4_PINVAL2_Msk (0x4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINVAL2 (Bitfield-Mask: 0x01)

◆ GPIO_PIN4_PINVAL2_Pos

#define GPIO_PIN4_PINVAL2_Pos (2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINVAL2 (Bit 2)

◆ GPIO_PIN4_PINVAL30_Msk

#define GPIO_PIN4_PINVAL30_Msk (0x40000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINVAL30 (Bitfield-Mask: 0x01)

◆ GPIO_PIN4_PINVAL30_Pos

#define GPIO_PIN4_PINVAL30_Pos (30UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINVAL30 (Bit 30)

◆ GPIO_PIN4_PINVAL31_Msk

#define GPIO_PIN4_PINVAL31_Msk (0x80000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINVAL31 (Bitfield-Mask: 0x01)

◆ GPIO_PIN4_PINVAL31_Pos

#define GPIO_PIN4_PINVAL31_Pos (31UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINVAL31 (Bit 31)

◆ GPIO_PIN4_PINVAL3_Msk

#define GPIO_PIN4_PINVAL3_Msk (0x8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINVAL3 (Bitfield-Mask: 0x01)

◆ GPIO_PIN4_PINVAL3_Pos

#define GPIO_PIN4_PINVAL3_Pos (3UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINVAL3 (Bit 3)

◆ GPIO_PIN4_PINVAL4_Msk

#define GPIO_PIN4_PINVAL4_Msk (0x10UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINVAL4 (Bitfield-Mask: 0x01)

◆ GPIO_PIN4_PINVAL4_Pos

#define GPIO_PIN4_PINVAL4_Pos (4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINVAL4 (Bit 4)

◆ GPIO_PIN4_PINVAL5_Msk

#define GPIO_PIN4_PINVAL5_Msk (0x20UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINVAL5 (Bitfield-Mask: 0x01)

◆ GPIO_PIN4_PINVAL5_Pos

#define GPIO_PIN4_PINVAL5_Pos (5UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINVAL5 (Bit 5)

◆ GPIO_PIN4_PINVAL6_Msk

#define GPIO_PIN4_PINVAL6_Msk (0x40UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINVAL6 (Bitfield-Mask: 0x01)

◆ GPIO_PIN4_PINVAL6_Pos

#define GPIO_PIN4_PINVAL6_Pos (6UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINVAL6 (Bit 6)

◆ GPIO_PIN4_PINVAL7_Msk

#define GPIO_PIN4_PINVAL7_Msk (0x80UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINVAL7 (Bitfield-Mask: 0x01)

◆ GPIO_PIN4_PINVAL7_Pos

#define GPIO_PIN4_PINVAL7_Pos (7UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINVAL7 (Bit 7)

◆ GPIO_PIN4_PINVAL8_Msk

#define GPIO_PIN4_PINVAL8_Msk (0x100UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINVAL8 (Bitfield-Mask: 0x01)

◆ GPIO_PIN4_PINVAL8_Pos

#define GPIO_PIN4_PINVAL8_Pos (8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINVAL8 (Bit 8)

◆ GPIO_PIN4_PINVAL9_Msk

#define GPIO_PIN4_PINVAL9_Msk (0x200UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINVAL9 (Bitfield-Mask: 0x01)

◆ GPIO_PIN4_PINVAL9_Pos

#define GPIO_PIN4_PINVAL9_Pos (9UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINVAL9 (Bit 9)

◆ GPIO_SET0_PINSET0_Msk

#define GPIO_SET0_PINSET0_Msk (0x1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINSET0 (Bitfield-Mask: 0x01)

◆ GPIO_SET0_PINSET0_Pos

#define GPIO_SET0_PINSET0_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINSET0 (Bit 0)

◆ GPIO_SET0_PINSET10_Msk

#define GPIO_SET0_PINSET10_Msk (0x400UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINSET10 (Bitfield-Mask: 0x01)

◆ GPIO_SET0_PINSET10_Pos

#define GPIO_SET0_PINSET10_Pos (10UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINSET10 (Bit 10)

◆ GPIO_SET0_PINSET11_Msk

#define GPIO_SET0_PINSET11_Msk (0x800UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINSET11 (Bitfield-Mask: 0x01)

◆ GPIO_SET0_PINSET11_Pos

#define GPIO_SET0_PINSET11_Pos (11UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINSET11 (Bit 11)

◆ GPIO_SET0_PINSET12_Msk

#define GPIO_SET0_PINSET12_Msk (0x1000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINSET12 (Bitfield-Mask: 0x01)

◆ GPIO_SET0_PINSET12_Pos

#define GPIO_SET0_PINSET12_Pos (12UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINSET12 (Bit 12)

◆ GPIO_SET0_PINSET13_Msk

#define GPIO_SET0_PINSET13_Msk (0x2000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINSET13 (Bitfield-Mask: 0x01)

◆ GPIO_SET0_PINSET13_Pos

#define GPIO_SET0_PINSET13_Pos (13UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINSET13 (Bit 13)

◆ GPIO_SET0_PINSET14_Msk

#define GPIO_SET0_PINSET14_Msk (0x4000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINSET14 (Bitfield-Mask: 0x01)

◆ GPIO_SET0_PINSET14_Pos

#define GPIO_SET0_PINSET14_Pos (14UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINSET14 (Bit 14)

◆ GPIO_SET0_PINSET15_Msk

#define GPIO_SET0_PINSET15_Msk (0x8000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINSET15 (Bitfield-Mask: 0x01)

◆ GPIO_SET0_PINSET15_Pos

#define GPIO_SET0_PINSET15_Pos (15UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINSET15 (Bit 15)

◆ GPIO_SET0_PINSET16_Msk

#define GPIO_SET0_PINSET16_Msk (0x10000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINSET16 (Bitfield-Mask: 0x01)

◆ GPIO_SET0_PINSET16_Pos

#define GPIO_SET0_PINSET16_Pos (16UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINSET16 (Bit 16)

◆ GPIO_SET0_PINSET17_Msk

#define GPIO_SET0_PINSET17_Msk (0x20000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINSET17 (Bitfield-Mask: 0x01)

◆ GPIO_SET0_PINSET17_Pos

#define GPIO_SET0_PINSET17_Pos (17UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINSET17 (Bit 17)

◆ GPIO_SET0_PINSET18_Msk

#define GPIO_SET0_PINSET18_Msk (0x40000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINSET18 (Bitfield-Mask: 0x01)

◆ GPIO_SET0_PINSET18_Pos

#define GPIO_SET0_PINSET18_Pos (18UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINSET18 (Bit 18)

◆ GPIO_SET0_PINSET19_Msk

#define GPIO_SET0_PINSET19_Msk (0x80000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINSET19 (Bitfield-Mask: 0x01)

◆ GPIO_SET0_PINSET19_Pos

#define GPIO_SET0_PINSET19_Pos (19UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINSET19 (Bit 19)

◆ GPIO_SET0_PINSET1_Msk

#define GPIO_SET0_PINSET1_Msk (0x2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINSET1 (Bitfield-Mask: 0x01)

◆ GPIO_SET0_PINSET1_Pos

#define GPIO_SET0_PINSET1_Pos (1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINSET1 (Bit 1)

◆ GPIO_SET0_PINSET20_Msk

#define GPIO_SET0_PINSET20_Msk (0x100000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINSET20 (Bitfield-Mask: 0x01)

◆ GPIO_SET0_PINSET20_Pos

#define GPIO_SET0_PINSET20_Pos (20UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINSET20 (Bit 20)

◆ GPIO_SET0_PINSET21_Msk

#define GPIO_SET0_PINSET21_Msk (0x200000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINSET21 (Bitfield-Mask: 0x01)

◆ GPIO_SET0_PINSET21_Pos

#define GPIO_SET0_PINSET21_Pos (21UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINSET21 (Bit 21)

◆ GPIO_SET0_PINSET22_Msk

#define GPIO_SET0_PINSET22_Msk (0x400000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINSET22 (Bitfield-Mask: 0x01)

◆ GPIO_SET0_PINSET22_Pos

#define GPIO_SET0_PINSET22_Pos (22UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINSET22 (Bit 22)

◆ GPIO_SET0_PINSET23_Msk

#define GPIO_SET0_PINSET23_Msk (0x800000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINSET23 (Bitfield-Mask: 0x01)

◆ GPIO_SET0_PINSET23_Pos

#define GPIO_SET0_PINSET23_Pos (23UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINSET23 (Bit 23)

◆ GPIO_SET0_PINSET24_Msk

#define GPIO_SET0_PINSET24_Msk (0x1000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINSET24 (Bitfield-Mask: 0x01)

◆ GPIO_SET0_PINSET24_Pos

#define GPIO_SET0_PINSET24_Pos (24UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINSET24 (Bit 24)

◆ GPIO_SET0_PINSET25_Msk

#define GPIO_SET0_PINSET25_Msk (0x2000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINSET25 (Bitfield-Mask: 0x01)

◆ GPIO_SET0_PINSET25_Pos

#define GPIO_SET0_PINSET25_Pos (25UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINSET25 (Bit 25)

◆ GPIO_SET0_PINSET26_Msk

#define GPIO_SET0_PINSET26_Msk (0x4000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINSET26 (Bitfield-Mask: 0x01)

◆ GPIO_SET0_PINSET26_Pos

#define GPIO_SET0_PINSET26_Pos (26UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINSET26 (Bit 26)

◆ GPIO_SET0_PINSET27_Msk

#define GPIO_SET0_PINSET27_Msk (0x8000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINSET27 (Bitfield-Mask: 0x01)

◆ GPIO_SET0_PINSET27_Pos

#define GPIO_SET0_PINSET27_Pos (27UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINSET27 (Bit 27)

◆ GPIO_SET0_PINSET28_Msk

#define GPIO_SET0_PINSET28_Msk (0x10000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINSET28 (Bitfield-Mask: 0x01)

◆ GPIO_SET0_PINSET28_Pos

#define GPIO_SET0_PINSET28_Pos (28UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINSET28 (Bit 28)

◆ GPIO_SET0_PINSET29_Msk

#define GPIO_SET0_PINSET29_Msk (0x20000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINSET29 (Bitfield-Mask: 0x01)

◆ GPIO_SET0_PINSET29_Pos

#define GPIO_SET0_PINSET29_Pos (29UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINSET29 (Bit 29)

◆ GPIO_SET0_PINSET2_Msk

#define GPIO_SET0_PINSET2_Msk (0x4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINSET2 (Bitfield-Mask: 0x01)

◆ GPIO_SET0_PINSET2_Pos

#define GPIO_SET0_PINSET2_Pos (2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINSET2 (Bit 2)

◆ GPIO_SET0_PINSET30_Msk

#define GPIO_SET0_PINSET30_Msk (0x40000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINSET30 (Bitfield-Mask: 0x01)

◆ GPIO_SET0_PINSET30_Pos

#define GPIO_SET0_PINSET30_Pos (30UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINSET30 (Bit 30)

◆ GPIO_SET0_PINSET31_Msk

#define GPIO_SET0_PINSET31_Msk (0x80000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINSET31 (Bitfield-Mask: 0x01)

◆ GPIO_SET0_PINSET31_Pos

#define GPIO_SET0_PINSET31_Pos (31UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINSET31 (Bit 31)

◆ GPIO_SET0_PINSET3_Msk

#define GPIO_SET0_PINSET3_Msk (0x8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINSET3 (Bitfield-Mask: 0x01)

◆ GPIO_SET0_PINSET3_Pos

#define GPIO_SET0_PINSET3_Pos (3UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINSET3 (Bit 3)

◆ GPIO_SET0_PINSET4_Msk

#define GPIO_SET0_PINSET4_Msk (0x10UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINSET4 (Bitfield-Mask: 0x01)

◆ GPIO_SET0_PINSET4_Pos

#define GPIO_SET0_PINSET4_Pos (4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINSET4 (Bit 4)

◆ GPIO_SET0_PINSET5_Msk

#define GPIO_SET0_PINSET5_Msk (0x20UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINSET5 (Bitfield-Mask: 0x01)

◆ GPIO_SET0_PINSET5_Pos

#define GPIO_SET0_PINSET5_Pos (5UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINSET5 (Bit 5)

◆ GPIO_SET0_PINSET6_Msk

#define GPIO_SET0_PINSET6_Msk (0x40UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINSET6 (Bitfield-Mask: 0x01)

◆ GPIO_SET0_PINSET6_Pos

#define GPIO_SET0_PINSET6_Pos (6UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINSET6 (Bit 6)

◆ GPIO_SET0_PINSET7_Msk

#define GPIO_SET0_PINSET7_Msk (0x80UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINSET7 (Bitfield-Mask: 0x01)

◆ GPIO_SET0_PINSET7_Pos

#define GPIO_SET0_PINSET7_Pos (7UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINSET7 (Bit 7)

◆ GPIO_SET0_PINSET8_Msk

#define GPIO_SET0_PINSET8_Msk (0x100UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINSET8 (Bitfield-Mask: 0x01)

◆ GPIO_SET0_PINSET8_Pos

#define GPIO_SET0_PINSET8_Pos (8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINSET8 (Bit 8)

◆ GPIO_SET0_PINSET9_Msk

#define GPIO_SET0_PINSET9_Msk (0x200UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINSET9 (Bitfield-Mask: 0x01)

◆ GPIO_SET0_PINSET9_Pos

#define GPIO_SET0_PINSET9_Pos (9UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINSET9 (Bit 9)

◆ GPIO_SET1_PINSET0_Msk

#define GPIO_SET1_PINSET0_Msk (0x1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINSET0 (Bitfield-Mask: 0x01)

◆ GPIO_SET1_PINSET0_Pos

#define GPIO_SET1_PINSET0_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINSET0 (Bit 0)

◆ GPIO_SET1_PINSET10_Msk

#define GPIO_SET1_PINSET10_Msk (0x400UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINSET10 (Bitfield-Mask: 0x01)

◆ GPIO_SET1_PINSET10_Pos

#define GPIO_SET1_PINSET10_Pos (10UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINSET10 (Bit 10)

◆ GPIO_SET1_PINSET11_Msk

#define GPIO_SET1_PINSET11_Msk (0x800UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINSET11 (Bitfield-Mask: 0x01)

◆ GPIO_SET1_PINSET11_Pos

#define GPIO_SET1_PINSET11_Pos (11UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINSET11 (Bit 11)

◆ GPIO_SET1_PINSET12_Msk

#define GPIO_SET1_PINSET12_Msk (0x1000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINSET12 (Bitfield-Mask: 0x01)

◆ GPIO_SET1_PINSET12_Pos

#define GPIO_SET1_PINSET12_Pos (12UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINSET12 (Bit 12)

◆ GPIO_SET1_PINSET13_Msk

#define GPIO_SET1_PINSET13_Msk (0x2000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINSET13 (Bitfield-Mask: 0x01)

◆ GPIO_SET1_PINSET13_Pos

#define GPIO_SET1_PINSET13_Pos (13UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINSET13 (Bit 13)

◆ GPIO_SET1_PINSET14_Msk

#define GPIO_SET1_PINSET14_Msk (0x4000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINSET14 (Bitfield-Mask: 0x01)

◆ GPIO_SET1_PINSET14_Pos

#define GPIO_SET1_PINSET14_Pos (14UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINSET14 (Bit 14)

◆ GPIO_SET1_PINSET15_Msk

#define GPIO_SET1_PINSET15_Msk (0x8000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINSET15 (Bitfield-Mask: 0x01)

◆ GPIO_SET1_PINSET15_Pos

#define GPIO_SET1_PINSET15_Pos (15UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINSET15 (Bit 15)

◆ GPIO_SET1_PINSET16_Msk

#define GPIO_SET1_PINSET16_Msk (0x10000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINSET16 (Bitfield-Mask: 0x01)

◆ GPIO_SET1_PINSET16_Pos

#define GPIO_SET1_PINSET16_Pos (16UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINSET16 (Bit 16)

◆ GPIO_SET1_PINSET17_Msk

#define GPIO_SET1_PINSET17_Msk (0x20000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINSET17 (Bitfield-Mask: 0x01)

◆ GPIO_SET1_PINSET17_Pos

#define GPIO_SET1_PINSET17_Pos (17UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINSET17 (Bit 17)

◆ GPIO_SET1_PINSET18_Msk

#define GPIO_SET1_PINSET18_Msk (0x40000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINSET18 (Bitfield-Mask: 0x01)

◆ GPIO_SET1_PINSET18_Pos

#define GPIO_SET1_PINSET18_Pos (18UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINSET18 (Bit 18)

◆ GPIO_SET1_PINSET19_Msk

#define GPIO_SET1_PINSET19_Msk (0x80000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINSET19 (Bitfield-Mask: 0x01)

◆ GPIO_SET1_PINSET19_Pos

#define GPIO_SET1_PINSET19_Pos (19UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINSET19 (Bit 19)

◆ GPIO_SET1_PINSET1_Msk

#define GPIO_SET1_PINSET1_Msk (0x2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINSET1 (Bitfield-Mask: 0x01)

◆ GPIO_SET1_PINSET1_Pos

#define GPIO_SET1_PINSET1_Pos (1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINSET1 (Bit 1)

◆ GPIO_SET1_PINSET20_Msk

#define GPIO_SET1_PINSET20_Msk (0x100000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINSET20 (Bitfield-Mask: 0x01)

◆ GPIO_SET1_PINSET20_Pos

#define GPIO_SET1_PINSET20_Pos (20UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINSET20 (Bit 20)

◆ GPIO_SET1_PINSET21_Msk

#define GPIO_SET1_PINSET21_Msk (0x200000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINSET21 (Bitfield-Mask: 0x01)

◆ GPIO_SET1_PINSET21_Pos

#define GPIO_SET1_PINSET21_Pos (21UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINSET21 (Bit 21)

◆ GPIO_SET1_PINSET22_Msk

#define GPIO_SET1_PINSET22_Msk (0x400000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINSET22 (Bitfield-Mask: 0x01)

◆ GPIO_SET1_PINSET22_Pos

#define GPIO_SET1_PINSET22_Pos (22UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINSET22 (Bit 22)

◆ GPIO_SET1_PINSET23_Msk

#define GPIO_SET1_PINSET23_Msk (0x800000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINSET23 (Bitfield-Mask: 0x01)

◆ GPIO_SET1_PINSET23_Pos

#define GPIO_SET1_PINSET23_Pos (23UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINSET23 (Bit 23)

◆ GPIO_SET1_PINSET24_Msk

#define GPIO_SET1_PINSET24_Msk (0x1000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINSET24 (Bitfield-Mask: 0x01)

◆ GPIO_SET1_PINSET24_Pos

#define GPIO_SET1_PINSET24_Pos (24UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINSET24 (Bit 24)

◆ GPIO_SET1_PINSET25_Msk

#define GPIO_SET1_PINSET25_Msk (0x2000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINSET25 (Bitfield-Mask: 0x01)

◆ GPIO_SET1_PINSET25_Pos

#define GPIO_SET1_PINSET25_Pos (25UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINSET25 (Bit 25)

◆ GPIO_SET1_PINSET26_Msk

#define GPIO_SET1_PINSET26_Msk (0x4000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINSET26 (Bitfield-Mask: 0x01)

◆ GPIO_SET1_PINSET26_Pos

#define GPIO_SET1_PINSET26_Pos (26UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINSET26 (Bit 26)

◆ GPIO_SET1_PINSET27_Msk

#define GPIO_SET1_PINSET27_Msk (0x8000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINSET27 (Bitfield-Mask: 0x01)

◆ GPIO_SET1_PINSET27_Pos

#define GPIO_SET1_PINSET27_Pos (27UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINSET27 (Bit 27)

◆ GPIO_SET1_PINSET28_Msk

#define GPIO_SET1_PINSET28_Msk (0x10000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINSET28 (Bitfield-Mask: 0x01)

◆ GPIO_SET1_PINSET28_Pos

#define GPIO_SET1_PINSET28_Pos (28UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINSET28 (Bit 28)

◆ GPIO_SET1_PINSET29_Msk

#define GPIO_SET1_PINSET29_Msk (0x20000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINSET29 (Bitfield-Mask: 0x01)

◆ GPIO_SET1_PINSET29_Pos

#define GPIO_SET1_PINSET29_Pos (29UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINSET29 (Bit 29)

◆ GPIO_SET1_PINSET2_Msk

#define GPIO_SET1_PINSET2_Msk (0x4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINSET2 (Bitfield-Mask: 0x01)

◆ GPIO_SET1_PINSET2_Pos

#define GPIO_SET1_PINSET2_Pos (2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINSET2 (Bit 2)

◆ GPIO_SET1_PINSET30_Msk

#define GPIO_SET1_PINSET30_Msk (0x40000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINSET30 (Bitfield-Mask: 0x01)

◆ GPIO_SET1_PINSET30_Pos

#define GPIO_SET1_PINSET30_Pos (30UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINSET30 (Bit 30)

◆ GPIO_SET1_PINSET31_Msk

#define GPIO_SET1_PINSET31_Msk (0x80000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINSET31 (Bitfield-Mask: 0x01)

◆ GPIO_SET1_PINSET31_Pos

#define GPIO_SET1_PINSET31_Pos (31UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINSET31 (Bit 31)

◆ GPIO_SET1_PINSET3_Msk

#define GPIO_SET1_PINSET3_Msk (0x8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINSET3 (Bitfield-Mask: 0x01)

◆ GPIO_SET1_PINSET3_Pos

#define GPIO_SET1_PINSET3_Pos (3UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINSET3 (Bit 3)

◆ GPIO_SET1_PINSET4_Msk

#define GPIO_SET1_PINSET4_Msk (0x10UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINSET4 (Bitfield-Mask: 0x01)

◆ GPIO_SET1_PINSET4_Pos

#define GPIO_SET1_PINSET4_Pos (4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINSET4 (Bit 4)

◆ GPIO_SET1_PINSET5_Msk

#define GPIO_SET1_PINSET5_Msk (0x20UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINSET5 (Bitfield-Mask: 0x01)

◆ GPIO_SET1_PINSET5_Pos

#define GPIO_SET1_PINSET5_Pos (5UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINSET5 (Bit 5)

◆ GPIO_SET1_PINSET6_Msk

#define GPIO_SET1_PINSET6_Msk (0x40UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINSET6 (Bitfield-Mask: 0x01)

◆ GPIO_SET1_PINSET6_Pos

#define GPIO_SET1_PINSET6_Pos (6UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINSET6 (Bit 6)

◆ GPIO_SET1_PINSET7_Msk

#define GPIO_SET1_PINSET7_Msk (0x80UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINSET7 (Bitfield-Mask: 0x01)

◆ GPIO_SET1_PINSET7_Pos

#define GPIO_SET1_PINSET7_Pos (7UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINSET7 (Bit 7)

◆ GPIO_SET1_PINSET8_Msk

#define GPIO_SET1_PINSET8_Msk (0x100UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINSET8 (Bitfield-Mask: 0x01)

◆ GPIO_SET1_PINSET8_Pos

#define GPIO_SET1_PINSET8_Pos (8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINSET8 (Bit 8)

◆ GPIO_SET1_PINSET9_Msk

#define GPIO_SET1_PINSET9_Msk (0x200UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINSET9 (Bitfield-Mask: 0x01)

◆ GPIO_SET1_PINSET9_Pos

#define GPIO_SET1_PINSET9_Pos (9UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINSET9 (Bit 9)

◆ GPIO_SET2_PINSET0_Msk

#define GPIO_SET2_PINSET0_Msk (0x1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINSET0 (Bitfield-Mask: 0x01)

◆ GPIO_SET2_PINSET0_Pos

#define GPIO_SET2_PINSET0_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINSET0 (Bit 0)

◆ GPIO_SET2_PINSET10_Msk

#define GPIO_SET2_PINSET10_Msk (0x400UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINSET10 (Bitfield-Mask: 0x01)

◆ GPIO_SET2_PINSET10_Pos

#define GPIO_SET2_PINSET10_Pos (10UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINSET10 (Bit 10)

◆ GPIO_SET2_PINSET11_Msk

#define GPIO_SET2_PINSET11_Msk (0x800UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINSET11 (Bitfield-Mask: 0x01)

◆ GPIO_SET2_PINSET11_Pos

#define GPIO_SET2_PINSET11_Pos (11UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINSET11 (Bit 11)

◆ GPIO_SET2_PINSET12_Msk

#define GPIO_SET2_PINSET12_Msk (0x1000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINSET12 (Bitfield-Mask: 0x01)

◆ GPIO_SET2_PINSET12_Pos

#define GPIO_SET2_PINSET12_Pos (12UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINSET12 (Bit 12)

◆ GPIO_SET2_PINSET13_Msk

#define GPIO_SET2_PINSET13_Msk (0x2000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINSET13 (Bitfield-Mask: 0x01)

◆ GPIO_SET2_PINSET13_Pos

#define GPIO_SET2_PINSET13_Pos (13UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINSET13 (Bit 13)

◆ GPIO_SET2_PINSET14_Msk

#define GPIO_SET2_PINSET14_Msk (0x4000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINSET14 (Bitfield-Mask: 0x01)

◆ GPIO_SET2_PINSET14_Pos

#define GPIO_SET2_PINSET14_Pos (14UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINSET14 (Bit 14)

◆ GPIO_SET2_PINSET15_Msk

#define GPIO_SET2_PINSET15_Msk (0x8000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINSET15 (Bitfield-Mask: 0x01)

◆ GPIO_SET2_PINSET15_Pos

#define GPIO_SET2_PINSET15_Pos (15UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINSET15 (Bit 15)

◆ GPIO_SET2_PINSET16_Msk

#define GPIO_SET2_PINSET16_Msk (0x10000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINSET16 (Bitfield-Mask: 0x01)

◆ GPIO_SET2_PINSET16_Pos

#define GPIO_SET2_PINSET16_Pos (16UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINSET16 (Bit 16)

◆ GPIO_SET2_PINSET17_Msk

#define GPIO_SET2_PINSET17_Msk (0x20000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINSET17 (Bitfield-Mask: 0x01)

◆ GPIO_SET2_PINSET17_Pos

#define GPIO_SET2_PINSET17_Pos (17UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINSET17 (Bit 17)

◆ GPIO_SET2_PINSET18_Msk

#define GPIO_SET2_PINSET18_Msk (0x40000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINSET18 (Bitfield-Mask: 0x01)

◆ GPIO_SET2_PINSET18_Pos

#define GPIO_SET2_PINSET18_Pos (18UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINSET18 (Bit 18)

◆ GPIO_SET2_PINSET19_Msk

#define GPIO_SET2_PINSET19_Msk (0x80000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINSET19 (Bitfield-Mask: 0x01)

◆ GPIO_SET2_PINSET19_Pos

#define GPIO_SET2_PINSET19_Pos (19UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINSET19 (Bit 19)

◆ GPIO_SET2_PINSET1_Msk

#define GPIO_SET2_PINSET1_Msk (0x2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINSET1 (Bitfield-Mask: 0x01)

◆ GPIO_SET2_PINSET1_Pos

#define GPIO_SET2_PINSET1_Pos (1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINSET1 (Bit 1)

◆ GPIO_SET2_PINSET20_Msk

#define GPIO_SET2_PINSET20_Msk (0x100000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINSET20 (Bitfield-Mask: 0x01)

◆ GPIO_SET2_PINSET20_Pos

#define GPIO_SET2_PINSET20_Pos (20UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINSET20 (Bit 20)

◆ GPIO_SET2_PINSET21_Msk

#define GPIO_SET2_PINSET21_Msk (0x200000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINSET21 (Bitfield-Mask: 0x01)

◆ GPIO_SET2_PINSET21_Pos

#define GPIO_SET2_PINSET21_Pos (21UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINSET21 (Bit 21)

◆ GPIO_SET2_PINSET22_Msk

#define GPIO_SET2_PINSET22_Msk (0x400000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINSET22 (Bitfield-Mask: 0x01)

◆ GPIO_SET2_PINSET22_Pos

#define GPIO_SET2_PINSET22_Pos (22UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINSET22 (Bit 22)

◆ GPIO_SET2_PINSET23_Msk

#define GPIO_SET2_PINSET23_Msk (0x800000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINSET23 (Bitfield-Mask: 0x01)

◆ GPIO_SET2_PINSET23_Pos

#define GPIO_SET2_PINSET23_Pos (23UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINSET23 (Bit 23)

◆ GPIO_SET2_PINSET24_Msk

#define GPIO_SET2_PINSET24_Msk (0x1000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINSET24 (Bitfield-Mask: 0x01)

◆ GPIO_SET2_PINSET24_Pos

#define GPIO_SET2_PINSET24_Pos (24UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINSET24 (Bit 24)

◆ GPIO_SET2_PINSET25_Msk

#define GPIO_SET2_PINSET25_Msk (0x2000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINSET25 (Bitfield-Mask: 0x01)

◆ GPIO_SET2_PINSET25_Pos

#define GPIO_SET2_PINSET25_Pos (25UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINSET25 (Bit 25)

◆ GPIO_SET2_PINSET26_Msk

#define GPIO_SET2_PINSET26_Msk (0x4000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINSET26 (Bitfield-Mask: 0x01)

◆ GPIO_SET2_PINSET26_Pos

#define GPIO_SET2_PINSET26_Pos (26UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINSET26 (Bit 26)

◆ GPIO_SET2_PINSET27_Msk

#define GPIO_SET2_PINSET27_Msk (0x8000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINSET27 (Bitfield-Mask: 0x01)

◆ GPIO_SET2_PINSET27_Pos

#define GPIO_SET2_PINSET27_Pos (27UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINSET27 (Bit 27)

◆ GPIO_SET2_PINSET28_Msk

#define GPIO_SET2_PINSET28_Msk (0x10000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINSET28 (Bitfield-Mask: 0x01)

◆ GPIO_SET2_PINSET28_Pos

#define GPIO_SET2_PINSET28_Pos (28UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINSET28 (Bit 28)

◆ GPIO_SET2_PINSET29_Msk

#define GPIO_SET2_PINSET29_Msk (0x20000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINSET29 (Bitfield-Mask: 0x01)

◆ GPIO_SET2_PINSET29_Pos

#define GPIO_SET2_PINSET29_Pos (29UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINSET29 (Bit 29)

◆ GPIO_SET2_PINSET2_Msk

#define GPIO_SET2_PINSET2_Msk (0x4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINSET2 (Bitfield-Mask: 0x01)

◆ GPIO_SET2_PINSET2_Pos

#define GPIO_SET2_PINSET2_Pos (2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINSET2 (Bit 2)

◆ GPIO_SET2_PINSET30_Msk

#define GPIO_SET2_PINSET30_Msk (0x40000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINSET30 (Bitfield-Mask: 0x01)

◆ GPIO_SET2_PINSET30_Pos

#define GPIO_SET2_PINSET30_Pos (30UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINSET30 (Bit 30)

◆ GPIO_SET2_PINSET31_Msk

#define GPIO_SET2_PINSET31_Msk (0x80000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINSET31 (Bitfield-Mask: 0x01)

◆ GPIO_SET2_PINSET31_Pos

#define GPIO_SET2_PINSET31_Pos (31UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINSET31 (Bit 31)

◆ GPIO_SET2_PINSET3_Msk

#define GPIO_SET2_PINSET3_Msk (0x8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINSET3 (Bitfield-Mask: 0x01)

◆ GPIO_SET2_PINSET3_Pos

#define GPIO_SET2_PINSET3_Pos (3UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINSET3 (Bit 3)

◆ GPIO_SET2_PINSET4_Msk

#define GPIO_SET2_PINSET4_Msk (0x10UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINSET4 (Bitfield-Mask: 0x01)

◆ GPIO_SET2_PINSET4_Pos

#define GPIO_SET2_PINSET4_Pos (4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINSET4 (Bit 4)

◆ GPIO_SET2_PINSET5_Msk

#define GPIO_SET2_PINSET5_Msk (0x20UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINSET5 (Bitfield-Mask: 0x01)

◆ GPIO_SET2_PINSET5_Pos

#define GPIO_SET2_PINSET5_Pos (5UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINSET5 (Bit 5)

◆ GPIO_SET2_PINSET6_Msk

#define GPIO_SET2_PINSET6_Msk (0x40UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINSET6 (Bitfield-Mask: 0x01)

◆ GPIO_SET2_PINSET6_Pos

#define GPIO_SET2_PINSET6_Pos (6UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINSET6 (Bit 6)

◆ GPIO_SET2_PINSET7_Msk

#define GPIO_SET2_PINSET7_Msk (0x80UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINSET7 (Bitfield-Mask: 0x01)

◆ GPIO_SET2_PINSET7_Pos

#define GPIO_SET2_PINSET7_Pos (7UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINSET7 (Bit 7)

◆ GPIO_SET2_PINSET8_Msk

#define GPIO_SET2_PINSET8_Msk (0x100UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINSET8 (Bitfield-Mask: 0x01)

◆ GPIO_SET2_PINSET8_Pos

#define GPIO_SET2_PINSET8_Pos (8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINSET8 (Bit 8)

◆ GPIO_SET2_PINSET9_Msk

#define GPIO_SET2_PINSET9_Msk (0x200UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINSET9 (Bitfield-Mask: 0x01)

◆ GPIO_SET2_PINSET9_Pos

#define GPIO_SET2_PINSET9_Pos (9UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINSET9 (Bit 9)

◆ GPIO_SET3_PINSET0_Msk

#define GPIO_SET3_PINSET0_Msk (0x1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINSET0 (Bitfield-Mask: 0x01)

◆ GPIO_SET3_PINSET0_Pos

#define GPIO_SET3_PINSET0_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINSET0 (Bit 0)

◆ GPIO_SET3_PINSET10_Msk

#define GPIO_SET3_PINSET10_Msk (0x400UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINSET10 (Bitfield-Mask: 0x01)

◆ GPIO_SET3_PINSET10_Pos

#define GPIO_SET3_PINSET10_Pos (10UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINSET10 (Bit 10)

◆ GPIO_SET3_PINSET11_Msk

#define GPIO_SET3_PINSET11_Msk (0x800UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINSET11 (Bitfield-Mask: 0x01)

◆ GPIO_SET3_PINSET11_Pos

#define GPIO_SET3_PINSET11_Pos (11UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINSET11 (Bit 11)

◆ GPIO_SET3_PINSET12_Msk

#define GPIO_SET3_PINSET12_Msk (0x1000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINSET12 (Bitfield-Mask: 0x01)

◆ GPIO_SET3_PINSET12_Pos

#define GPIO_SET3_PINSET12_Pos (12UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINSET12 (Bit 12)

◆ GPIO_SET3_PINSET13_Msk

#define GPIO_SET3_PINSET13_Msk (0x2000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINSET13 (Bitfield-Mask: 0x01)

◆ GPIO_SET3_PINSET13_Pos

#define GPIO_SET3_PINSET13_Pos (13UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINSET13 (Bit 13)

◆ GPIO_SET3_PINSET14_Msk

#define GPIO_SET3_PINSET14_Msk (0x4000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINSET14 (Bitfield-Mask: 0x01)

◆ GPIO_SET3_PINSET14_Pos

#define GPIO_SET3_PINSET14_Pos (14UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINSET14 (Bit 14)

◆ GPIO_SET3_PINSET15_Msk

#define GPIO_SET3_PINSET15_Msk (0x8000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINSET15 (Bitfield-Mask: 0x01)

◆ GPIO_SET3_PINSET15_Pos

#define GPIO_SET3_PINSET15_Pos (15UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINSET15 (Bit 15)

◆ GPIO_SET3_PINSET16_Msk

#define GPIO_SET3_PINSET16_Msk (0x10000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINSET16 (Bitfield-Mask: 0x01)

◆ GPIO_SET3_PINSET16_Pos

#define GPIO_SET3_PINSET16_Pos (16UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINSET16 (Bit 16)

◆ GPIO_SET3_PINSET17_Msk

#define GPIO_SET3_PINSET17_Msk (0x20000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINSET17 (Bitfield-Mask: 0x01)

◆ GPIO_SET3_PINSET17_Pos

#define GPIO_SET3_PINSET17_Pos (17UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINSET17 (Bit 17)

◆ GPIO_SET3_PINSET18_Msk

#define GPIO_SET3_PINSET18_Msk (0x40000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINSET18 (Bitfield-Mask: 0x01)

◆ GPIO_SET3_PINSET18_Pos

#define GPIO_SET3_PINSET18_Pos (18UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINSET18 (Bit 18)

◆ GPIO_SET3_PINSET19_Msk

#define GPIO_SET3_PINSET19_Msk (0x80000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINSET19 (Bitfield-Mask: 0x01)

◆ GPIO_SET3_PINSET19_Pos

#define GPIO_SET3_PINSET19_Pos (19UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINSET19 (Bit 19)

◆ GPIO_SET3_PINSET1_Msk

#define GPIO_SET3_PINSET1_Msk (0x2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINSET1 (Bitfield-Mask: 0x01)

◆ GPIO_SET3_PINSET1_Pos

#define GPIO_SET3_PINSET1_Pos (1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINSET1 (Bit 1)

◆ GPIO_SET3_PINSET20_Msk

#define GPIO_SET3_PINSET20_Msk (0x100000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINSET20 (Bitfield-Mask: 0x01)

◆ GPIO_SET3_PINSET20_Pos

#define GPIO_SET3_PINSET20_Pos (20UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINSET20 (Bit 20)

◆ GPIO_SET3_PINSET21_Msk

#define GPIO_SET3_PINSET21_Msk (0x200000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINSET21 (Bitfield-Mask: 0x01)

◆ GPIO_SET3_PINSET21_Pos

#define GPIO_SET3_PINSET21_Pos (21UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINSET21 (Bit 21)

◆ GPIO_SET3_PINSET22_Msk

#define GPIO_SET3_PINSET22_Msk (0x400000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINSET22 (Bitfield-Mask: 0x01)

◆ GPIO_SET3_PINSET22_Pos

#define GPIO_SET3_PINSET22_Pos (22UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINSET22 (Bit 22)

◆ GPIO_SET3_PINSET23_Msk

#define GPIO_SET3_PINSET23_Msk (0x800000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINSET23 (Bitfield-Mask: 0x01)

◆ GPIO_SET3_PINSET23_Pos

#define GPIO_SET3_PINSET23_Pos (23UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINSET23 (Bit 23)

◆ GPIO_SET3_PINSET24_Msk

#define GPIO_SET3_PINSET24_Msk (0x1000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINSET24 (Bitfield-Mask: 0x01)

◆ GPIO_SET3_PINSET24_Pos

#define GPIO_SET3_PINSET24_Pos (24UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINSET24 (Bit 24)

◆ GPIO_SET3_PINSET25_Msk

#define GPIO_SET3_PINSET25_Msk (0x2000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINSET25 (Bitfield-Mask: 0x01)

◆ GPIO_SET3_PINSET25_Pos

#define GPIO_SET3_PINSET25_Pos (25UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINSET25 (Bit 25)

◆ GPIO_SET3_PINSET26_Msk

#define GPIO_SET3_PINSET26_Msk (0x4000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINSET26 (Bitfield-Mask: 0x01)

◆ GPIO_SET3_PINSET26_Pos

#define GPIO_SET3_PINSET26_Pos (26UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINSET26 (Bit 26)

◆ GPIO_SET3_PINSET27_Msk

#define GPIO_SET3_PINSET27_Msk (0x8000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINSET27 (Bitfield-Mask: 0x01)

◆ GPIO_SET3_PINSET27_Pos

#define GPIO_SET3_PINSET27_Pos (27UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINSET27 (Bit 27)

◆ GPIO_SET3_PINSET28_Msk

#define GPIO_SET3_PINSET28_Msk (0x10000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINSET28 (Bitfield-Mask: 0x01)

◆ GPIO_SET3_PINSET28_Pos

#define GPIO_SET3_PINSET28_Pos (28UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINSET28 (Bit 28)

◆ GPIO_SET3_PINSET29_Msk

#define GPIO_SET3_PINSET29_Msk (0x20000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINSET29 (Bitfield-Mask: 0x01)

◆ GPIO_SET3_PINSET29_Pos

#define GPIO_SET3_PINSET29_Pos (29UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINSET29 (Bit 29)

◆ GPIO_SET3_PINSET2_Msk

#define GPIO_SET3_PINSET2_Msk (0x4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINSET2 (Bitfield-Mask: 0x01)

◆ GPIO_SET3_PINSET2_Pos

#define GPIO_SET3_PINSET2_Pos (2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINSET2 (Bit 2)

◆ GPIO_SET3_PINSET30_Msk

#define GPIO_SET3_PINSET30_Msk (0x40000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINSET30 (Bitfield-Mask: 0x01)

◆ GPIO_SET3_PINSET30_Pos

#define GPIO_SET3_PINSET30_Pos (30UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINSET30 (Bit 30)

◆ GPIO_SET3_PINSET31_Msk

#define GPIO_SET3_PINSET31_Msk (0x80000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINSET31 (Bitfield-Mask: 0x01)

◆ GPIO_SET3_PINSET31_Pos

#define GPIO_SET3_PINSET31_Pos (31UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINSET31 (Bit 31)

◆ GPIO_SET3_PINSET3_Msk

#define GPIO_SET3_PINSET3_Msk (0x8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINSET3 (Bitfield-Mask: 0x01)

◆ GPIO_SET3_PINSET3_Pos

#define GPIO_SET3_PINSET3_Pos (3UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINSET3 (Bit 3)

◆ GPIO_SET3_PINSET4_Msk

#define GPIO_SET3_PINSET4_Msk (0x10UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINSET4 (Bitfield-Mask: 0x01)

◆ GPIO_SET3_PINSET4_Pos

#define GPIO_SET3_PINSET4_Pos (4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINSET4 (Bit 4)

◆ GPIO_SET3_PINSET5_Msk

#define GPIO_SET3_PINSET5_Msk (0x20UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINSET5 (Bitfield-Mask: 0x01)

◆ GPIO_SET3_PINSET5_Pos

#define GPIO_SET3_PINSET5_Pos (5UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINSET5 (Bit 5)

◆ GPIO_SET3_PINSET6_Msk

#define GPIO_SET3_PINSET6_Msk (0x40UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINSET6 (Bitfield-Mask: 0x01)

◆ GPIO_SET3_PINSET6_Pos

#define GPIO_SET3_PINSET6_Pos (6UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINSET6 (Bit 6)

◆ GPIO_SET3_PINSET7_Msk

#define GPIO_SET3_PINSET7_Msk (0x80UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINSET7 (Bitfield-Mask: 0x01)

◆ GPIO_SET3_PINSET7_Pos

#define GPIO_SET3_PINSET7_Pos (7UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINSET7 (Bit 7)

◆ GPIO_SET3_PINSET8_Msk

#define GPIO_SET3_PINSET8_Msk (0x100UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINSET8 (Bitfield-Mask: 0x01)

◆ GPIO_SET3_PINSET8_Pos

#define GPIO_SET3_PINSET8_Pos (8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINSET8 (Bit 8)

◆ GPIO_SET3_PINSET9_Msk

#define GPIO_SET3_PINSET9_Msk (0x200UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINSET9 (Bitfield-Mask: 0x01)

◆ GPIO_SET3_PINSET9_Pos

#define GPIO_SET3_PINSET9_Pos (9UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINSET9 (Bit 9)

◆ GPIO_SET4_PINSET0_Msk

#define GPIO_SET4_PINSET0_Msk (0x1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINSET0 (Bitfield-Mask: 0x01)

◆ GPIO_SET4_PINSET0_Pos

#define GPIO_SET4_PINSET0_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINSET0 (Bit 0)

◆ GPIO_SET4_PINSET10_Msk

#define GPIO_SET4_PINSET10_Msk (0x400UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINSET10 (Bitfield-Mask: 0x01)

◆ GPIO_SET4_PINSET10_Pos

#define GPIO_SET4_PINSET10_Pos (10UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINSET10 (Bit 10)

◆ GPIO_SET4_PINSET11_Msk

#define GPIO_SET4_PINSET11_Msk (0x800UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINSET11 (Bitfield-Mask: 0x01)

◆ GPIO_SET4_PINSET11_Pos

#define GPIO_SET4_PINSET11_Pos (11UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINSET11 (Bit 11)

◆ GPIO_SET4_PINSET12_Msk

#define GPIO_SET4_PINSET12_Msk (0x1000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINSET12 (Bitfield-Mask: 0x01)

◆ GPIO_SET4_PINSET12_Pos

#define GPIO_SET4_PINSET12_Pos (12UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINSET12 (Bit 12)

◆ GPIO_SET4_PINSET13_Msk

#define GPIO_SET4_PINSET13_Msk (0x2000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINSET13 (Bitfield-Mask: 0x01)

◆ GPIO_SET4_PINSET13_Pos

#define GPIO_SET4_PINSET13_Pos (13UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINSET13 (Bit 13)

◆ GPIO_SET4_PINSET14_Msk

#define GPIO_SET4_PINSET14_Msk (0x4000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINSET14 (Bitfield-Mask: 0x01)

◆ GPIO_SET4_PINSET14_Pos

#define GPIO_SET4_PINSET14_Pos (14UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINSET14 (Bit 14)

◆ GPIO_SET4_PINSET15_Msk

#define GPIO_SET4_PINSET15_Msk (0x8000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINSET15 (Bitfield-Mask: 0x01)

◆ GPIO_SET4_PINSET15_Pos

#define GPIO_SET4_PINSET15_Pos (15UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINSET15 (Bit 15)

◆ GPIO_SET4_PINSET16_Msk

#define GPIO_SET4_PINSET16_Msk (0x10000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINSET16 (Bitfield-Mask: 0x01)

◆ GPIO_SET4_PINSET16_Pos

#define GPIO_SET4_PINSET16_Pos (16UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINSET16 (Bit 16)

◆ GPIO_SET4_PINSET17_Msk

#define GPIO_SET4_PINSET17_Msk (0x20000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINSET17 (Bitfield-Mask: 0x01)

◆ GPIO_SET4_PINSET17_Pos

#define GPIO_SET4_PINSET17_Pos (17UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINSET17 (Bit 17)

◆ GPIO_SET4_PINSET18_Msk

#define GPIO_SET4_PINSET18_Msk (0x40000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINSET18 (Bitfield-Mask: 0x01)

◆ GPIO_SET4_PINSET18_Pos

#define GPIO_SET4_PINSET18_Pos (18UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINSET18 (Bit 18)

◆ GPIO_SET4_PINSET19_Msk

#define GPIO_SET4_PINSET19_Msk (0x80000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINSET19 (Bitfield-Mask: 0x01)

◆ GPIO_SET4_PINSET19_Pos

#define GPIO_SET4_PINSET19_Pos (19UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINSET19 (Bit 19)

◆ GPIO_SET4_PINSET1_Msk

#define GPIO_SET4_PINSET1_Msk (0x2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINSET1 (Bitfield-Mask: 0x01)

◆ GPIO_SET4_PINSET1_Pos

#define GPIO_SET4_PINSET1_Pos (1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINSET1 (Bit 1)

◆ GPIO_SET4_PINSET20_Msk

#define GPIO_SET4_PINSET20_Msk (0x100000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINSET20 (Bitfield-Mask: 0x01)

◆ GPIO_SET4_PINSET20_Pos

#define GPIO_SET4_PINSET20_Pos (20UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINSET20 (Bit 20)

◆ GPIO_SET4_PINSET21_Msk

#define GPIO_SET4_PINSET21_Msk (0x200000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINSET21 (Bitfield-Mask: 0x01)

◆ GPIO_SET4_PINSET21_Pos

#define GPIO_SET4_PINSET21_Pos (21UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINSET21 (Bit 21)

◆ GPIO_SET4_PINSET22_Msk

#define GPIO_SET4_PINSET22_Msk (0x400000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINSET22 (Bitfield-Mask: 0x01)

◆ GPIO_SET4_PINSET22_Pos

#define GPIO_SET4_PINSET22_Pos (22UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINSET22 (Bit 22)

◆ GPIO_SET4_PINSET23_Msk

#define GPIO_SET4_PINSET23_Msk (0x800000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINSET23 (Bitfield-Mask: 0x01)

◆ GPIO_SET4_PINSET23_Pos

#define GPIO_SET4_PINSET23_Pos (23UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINSET23 (Bit 23)

◆ GPIO_SET4_PINSET24_Msk

#define GPIO_SET4_PINSET24_Msk (0x1000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINSET24 (Bitfield-Mask: 0x01)

◆ GPIO_SET4_PINSET24_Pos

#define GPIO_SET4_PINSET24_Pos (24UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINSET24 (Bit 24)

◆ GPIO_SET4_PINSET25_Msk

#define GPIO_SET4_PINSET25_Msk (0x2000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINSET25 (Bitfield-Mask: 0x01)

◆ GPIO_SET4_PINSET25_Pos

#define GPIO_SET4_PINSET25_Pos (25UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINSET25 (Bit 25)

◆ GPIO_SET4_PINSET26_Msk

#define GPIO_SET4_PINSET26_Msk (0x4000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINSET26 (Bitfield-Mask: 0x01)

◆ GPIO_SET4_PINSET26_Pos

#define GPIO_SET4_PINSET26_Pos (26UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINSET26 (Bit 26)

◆ GPIO_SET4_PINSET27_Msk

#define GPIO_SET4_PINSET27_Msk (0x8000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINSET27 (Bitfield-Mask: 0x01)

◆ GPIO_SET4_PINSET27_Pos

#define GPIO_SET4_PINSET27_Pos (27UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINSET27 (Bit 27)

◆ GPIO_SET4_PINSET28_Msk

#define GPIO_SET4_PINSET28_Msk (0x10000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINSET28 (Bitfield-Mask: 0x01)

◆ GPIO_SET4_PINSET28_Pos

#define GPIO_SET4_PINSET28_Pos (28UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINSET28 (Bit 28)

◆ GPIO_SET4_PINSET29_Msk

#define GPIO_SET4_PINSET29_Msk (0x20000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINSET29 (Bitfield-Mask: 0x01)

◆ GPIO_SET4_PINSET29_Pos

#define GPIO_SET4_PINSET29_Pos (29UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINSET29 (Bit 29)

◆ GPIO_SET4_PINSET2_Msk

#define GPIO_SET4_PINSET2_Msk (0x4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINSET2 (Bitfield-Mask: 0x01)

◆ GPIO_SET4_PINSET2_Pos

#define GPIO_SET4_PINSET2_Pos (2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINSET2 (Bit 2)

◆ GPIO_SET4_PINSET30_Msk

#define GPIO_SET4_PINSET30_Msk (0x40000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINSET30 (Bitfield-Mask: 0x01)

◆ GPIO_SET4_PINSET30_Pos

#define GPIO_SET4_PINSET30_Pos (30UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINSET30 (Bit 30)

◆ GPIO_SET4_PINSET31_Msk

#define GPIO_SET4_PINSET31_Msk (0x80000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINSET31 (Bitfield-Mask: 0x01)

◆ GPIO_SET4_PINSET31_Pos

#define GPIO_SET4_PINSET31_Pos (31UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINSET31 (Bit 31)

◆ GPIO_SET4_PINSET3_Msk

#define GPIO_SET4_PINSET3_Msk (0x8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINSET3 (Bitfield-Mask: 0x01)

◆ GPIO_SET4_PINSET3_Pos

#define GPIO_SET4_PINSET3_Pos (3UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINSET3 (Bit 3)

◆ GPIO_SET4_PINSET4_Msk

#define GPIO_SET4_PINSET4_Msk (0x10UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINSET4 (Bitfield-Mask: 0x01)

◆ GPIO_SET4_PINSET4_Pos

#define GPIO_SET4_PINSET4_Pos (4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINSET4 (Bit 4)

◆ GPIO_SET4_PINSET5_Msk

#define GPIO_SET4_PINSET5_Msk (0x20UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINSET5 (Bitfield-Mask: 0x01)

◆ GPIO_SET4_PINSET5_Pos

#define GPIO_SET4_PINSET5_Pos (5UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINSET5 (Bit 5)

◆ GPIO_SET4_PINSET6_Msk

#define GPIO_SET4_PINSET6_Msk (0x40UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINSET6 (Bitfield-Mask: 0x01)

◆ GPIO_SET4_PINSET6_Pos

#define GPIO_SET4_PINSET6_Pos (6UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINSET6 (Bit 6)

◆ GPIO_SET4_PINSET7_Msk

#define GPIO_SET4_PINSET7_Msk (0x80UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINSET7 (Bitfield-Mask: 0x01)

◆ GPIO_SET4_PINSET7_Pos

#define GPIO_SET4_PINSET7_Pos (7UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINSET7 (Bit 7)

◆ GPIO_SET4_PINSET8_Msk

#define GPIO_SET4_PINSET8_Msk (0x100UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINSET8 (Bitfield-Mask: 0x01)

◆ GPIO_SET4_PINSET8_Pos

#define GPIO_SET4_PINSET8_Pos (8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINSET8 (Bit 8)

◆ GPIO_SET4_PINSET9_Msk

#define GPIO_SET4_PINSET9_Msk (0x200UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINSET9 (Bitfield-Mask: 0x01)

◆ GPIO_SET4_PINSET9_Pos

#define GPIO_SET4_PINSET9_Pos (9UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PINSET9 (Bit 9)

◆ GPIOINT_CLR0_P0_0CI_Msk

#define GPIOINT_CLR0_P0_0CI_Msk (0x1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_0CI (Bitfield-Mask: 0x01)

◆ GPIOINT_CLR0_P0_0CI_Pos

#define GPIOINT_CLR0_P0_0CI_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_0CI (Bit 0)

◆ GPIOINT_CLR0_P0_10CI_Msk

#define GPIOINT_CLR0_P0_10CI_Msk (0x400UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_10CI (Bitfield-Mask: 0x01)

◆ GPIOINT_CLR0_P0_10CI_Pos

#define GPIOINT_CLR0_P0_10CI_Pos (10UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_10CI (Bit 10)

◆ GPIOINT_CLR0_P0_11CI_Msk

#define GPIOINT_CLR0_P0_11CI_Msk (0x800UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_11CI (Bitfield-Mask: 0x01)

◆ GPIOINT_CLR0_P0_11CI_Pos

#define GPIOINT_CLR0_P0_11CI_Pos (11UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_11CI (Bit 11)

◆ GPIOINT_CLR0_P0_12CI_Msk

#define GPIOINT_CLR0_P0_12CI_Msk (0x1000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_12CI (Bitfield-Mask: 0x01)

◆ GPIOINT_CLR0_P0_12CI_Pos

#define GPIOINT_CLR0_P0_12CI_Pos (12UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_12CI (Bit 12)

◆ GPIOINT_CLR0_P0_13CI_Msk

#define GPIOINT_CLR0_P0_13CI_Msk (0x2000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_13CI (Bitfield-Mask: 0x01)

◆ GPIOINT_CLR0_P0_13CI_Pos

#define GPIOINT_CLR0_P0_13CI_Pos (13UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_13CI (Bit 13)

◆ GPIOINT_CLR0_P0_14CI_Msk

#define GPIOINT_CLR0_P0_14CI_Msk (0x4000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_14CI (Bitfield-Mask: 0x01)

◆ GPIOINT_CLR0_P0_14CI_Pos

#define GPIOINT_CLR0_P0_14CI_Pos (14UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_14CI (Bit 14)

◆ GPIOINT_CLR0_P0_15CI_Msk

#define GPIOINT_CLR0_P0_15CI_Msk (0x8000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_15CI (Bitfield-Mask: 0x01)

◆ GPIOINT_CLR0_P0_15CI_Pos

#define GPIOINT_CLR0_P0_15CI_Pos (15UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_15CI (Bit 15)

◆ GPIOINT_CLR0_P0_16CI_Msk

#define GPIOINT_CLR0_P0_16CI_Msk (0x10000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_16CI (Bitfield-Mask: 0x01)

◆ GPIOINT_CLR0_P0_16CI_Pos

#define GPIOINT_CLR0_P0_16CI_Pos (16UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_16CI (Bit 16)

◆ GPIOINT_CLR0_P0_17CI_Msk

#define GPIOINT_CLR0_P0_17CI_Msk (0x20000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_17CI (Bitfield-Mask: 0x01)

◆ GPIOINT_CLR0_P0_17CI_Pos

#define GPIOINT_CLR0_P0_17CI_Pos (17UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_17CI (Bit 17)

◆ GPIOINT_CLR0_P0_18CI_Msk

#define GPIOINT_CLR0_P0_18CI_Msk (0x40000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_18CI (Bitfield-Mask: 0x01)

◆ GPIOINT_CLR0_P0_18CI_Pos

#define GPIOINT_CLR0_P0_18CI_Pos (18UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_18CI (Bit 18)

◆ GPIOINT_CLR0_P0_19CI_Msk

#define GPIOINT_CLR0_P0_19CI_Msk (0x80000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_19CI (Bitfield-Mask: 0x01)

◆ GPIOINT_CLR0_P0_19CI_Pos

#define GPIOINT_CLR0_P0_19CI_Pos (19UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_19CI (Bit 19)

◆ GPIOINT_CLR0_P0_1CI_Msk

#define GPIOINT_CLR0_P0_1CI_Msk (0x2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_1CI (Bitfield-Mask: 0x01)

◆ GPIOINT_CLR0_P0_1CI_Pos

#define GPIOINT_CLR0_P0_1CI_Pos (1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_1CI (Bit 1)

◆ GPIOINT_CLR0_P0_20CI_Msk

#define GPIOINT_CLR0_P0_20CI_Msk (0x100000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_20CI (Bitfield-Mask: 0x01)

◆ GPIOINT_CLR0_P0_20CI_Pos

#define GPIOINT_CLR0_P0_20CI_Pos (20UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_20CI (Bit 20)

◆ GPIOINT_CLR0_P0_21CI_Msk

#define GPIOINT_CLR0_P0_21CI_Msk (0x200000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_21CI (Bitfield-Mask: 0x01)

◆ GPIOINT_CLR0_P0_21CI_Pos

#define GPIOINT_CLR0_P0_21CI_Pos (21UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_21CI (Bit 21)

◆ GPIOINT_CLR0_P0_22CI_Msk

#define GPIOINT_CLR0_P0_22CI_Msk (0x400000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_22CI (Bitfield-Mask: 0x01)

◆ GPIOINT_CLR0_P0_22CI_Pos

#define GPIOINT_CLR0_P0_22CI_Pos (22UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_22CI (Bit 22)

◆ GPIOINT_CLR0_P0_23CI_Msk

#define GPIOINT_CLR0_P0_23CI_Msk (0x800000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_23CI (Bitfield-Mask: 0x01)

◆ GPIOINT_CLR0_P0_23CI_Pos

#define GPIOINT_CLR0_P0_23CI_Pos (23UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_23CI (Bit 23)

◆ GPIOINT_CLR0_P0_24CI_Msk

#define GPIOINT_CLR0_P0_24CI_Msk (0x1000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_24CI (Bitfield-Mask: 0x01)

◆ GPIOINT_CLR0_P0_24CI_Pos

#define GPIOINT_CLR0_P0_24CI_Pos (24UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_24CI (Bit 24)

◆ GPIOINT_CLR0_P0_25CI_Msk

#define GPIOINT_CLR0_P0_25CI_Msk (0x2000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_25CI (Bitfield-Mask: 0x01)

◆ GPIOINT_CLR0_P0_25CI_Pos

#define GPIOINT_CLR0_P0_25CI_Pos (25UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_25CI (Bit 25)

◆ GPIOINT_CLR0_P0_26CI_Msk

#define GPIOINT_CLR0_P0_26CI_Msk (0x4000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_26CI (Bitfield-Mask: 0x01)

◆ GPIOINT_CLR0_P0_26CI_Pos

#define GPIOINT_CLR0_P0_26CI_Pos (26UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_26CI (Bit 26)

◆ GPIOINT_CLR0_P0_27CI_Msk

#define GPIOINT_CLR0_P0_27CI_Msk (0x8000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_27CI (Bitfield-Mask: 0x01)

◆ GPIOINT_CLR0_P0_27CI_Pos

#define GPIOINT_CLR0_P0_27CI_Pos (27UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_27CI (Bit 27)

◆ GPIOINT_CLR0_P0_28CI_Msk

#define GPIOINT_CLR0_P0_28CI_Msk (0x10000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_28CI (Bitfield-Mask: 0x01)

◆ GPIOINT_CLR0_P0_28CI_Pos

#define GPIOINT_CLR0_P0_28CI_Pos (28UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_28CI (Bit 28)

◆ GPIOINT_CLR0_P0_29CI_Msk

#define GPIOINT_CLR0_P0_29CI_Msk (0x20000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_29CI (Bitfield-Mask: 0x01)

◆ GPIOINT_CLR0_P0_29CI_Pos

#define GPIOINT_CLR0_P0_29CI_Pos (29UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_29CI (Bit 29)

◆ GPIOINT_CLR0_P0_2CI_Msk

#define GPIOINT_CLR0_P0_2CI_Msk (0x4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_2CI (Bitfield-Mask: 0x01)

◆ GPIOINT_CLR0_P0_2CI_Pos

#define GPIOINT_CLR0_P0_2CI_Pos (2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_2CI (Bit 2)

◆ GPIOINT_CLR0_P0_30CI_Msk

#define GPIOINT_CLR0_P0_30CI_Msk (0x40000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_30CI (Bitfield-Mask: 0x01)

◆ GPIOINT_CLR0_P0_30CI_Pos

#define GPIOINT_CLR0_P0_30CI_Pos (30UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_30CI (Bit 30)

◆ GPIOINT_CLR0_P0_3CI_Msk

#define GPIOINT_CLR0_P0_3CI_Msk (0x8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_3CI (Bitfield-Mask: 0x01)

◆ GPIOINT_CLR0_P0_3CI_Pos

#define GPIOINT_CLR0_P0_3CI_Pos (3UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_3CI (Bit 3)

◆ GPIOINT_CLR0_P0_4CI_Msk

#define GPIOINT_CLR0_P0_4CI_Msk (0x10UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_4CI (Bitfield-Mask: 0x01)

◆ GPIOINT_CLR0_P0_4CI_Pos

#define GPIOINT_CLR0_P0_4CI_Pos (4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_4CI (Bit 4)

◆ GPIOINT_CLR0_P0_5CI_Msk

#define GPIOINT_CLR0_P0_5CI_Msk (0x20UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_5CI (Bitfield-Mask: 0x01)

◆ GPIOINT_CLR0_P0_5CI_Pos

#define GPIOINT_CLR0_P0_5CI_Pos (5UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_5CI (Bit 5)

◆ GPIOINT_CLR0_P0_6CI_Msk

#define GPIOINT_CLR0_P0_6CI_Msk (0x40UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_6CI (Bitfield-Mask: 0x01)

◆ GPIOINT_CLR0_P0_6CI_Pos

#define GPIOINT_CLR0_P0_6CI_Pos (6UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_6CI (Bit 6)

◆ GPIOINT_CLR0_P0_7CI_Msk

#define GPIOINT_CLR0_P0_7CI_Msk (0x80UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_7CI (Bitfield-Mask: 0x01)

◆ GPIOINT_CLR0_P0_7CI_Pos

#define GPIOINT_CLR0_P0_7CI_Pos (7UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_7CI (Bit 7)

◆ GPIOINT_CLR0_P0_8CI_Msk

#define GPIOINT_CLR0_P0_8CI_Msk (0x100UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_8CI (Bitfield-Mask: 0x01)

◆ GPIOINT_CLR0_P0_8CI_Pos

#define GPIOINT_CLR0_P0_8CI_Pos (8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_8CI (Bit 8)

◆ GPIOINT_CLR0_P0_9CI_Msk

#define GPIOINT_CLR0_P0_9CI_Msk (0x200UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_9CI (Bitfield-Mask: 0x01)

◆ GPIOINT_CLR0_P0_9CI_Pos

#define GPIOINT_CLR0_P0_9CI_Pos (9UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_9CI (Bit 9)

◆ GPIOINT_CLR2_P2_0CI_Msk

#define GPIOINT_CLR2_P2_0CI_Msk (0x1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P2_0CI (Bitfield-Mask: 0x01)

◆ GPIOINT_CLR2_P2_0CI_Pos

#define GPIOINT_CLR2_P2_0CI_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P2_0CI (Bit 0)

◆ GPIOINT_CLR2_P2_10CI_Msk

#define GPIOINT_CLR2_P2_10CI_Msk (0x400UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P2_10CI (Bitfield-Mask: 0x01)

◆ GPIOINT_CLR2_P2_10CI_Pos

#define GPIOINT_CLR2_P2_10CI_Pos (10UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P2_10CI (Bit 10)

◆ GPIOINT_CLR2_P2_11CI_Msk

#define GPIOINT_CLR2_P2_11CI_Msk (0x800UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P2_11CI (Bitfield-Mask: 0x01)

◆ GPIOINT_CLR2_P2_11CI_Pos

#define GPIOINT_CLR2_P2_11CI_Pos (11UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P2_11CI (Bit 11)

◆ GPIOINT_CLR2_P2_12CI_Msk

#define GPIOINT_CLR2_P2_12CI_Msk (0x1000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P2_12CI (Bitfield-Mask: 0x01)

◆ GPIOINT_CLR2_P2_12CI_Pos

#define GPIOINT_CLR2_P2_12CI_Pos (12UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P2_12CI (Bit 12)

◆ GPIOINT_CLR2_P2_13CI_Msk

#define GPIOINT_CLR2_P2_13CI_Msk (0x2000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P2_13CI (Bitfield-Mask: 0x01)

◆ GPIOINT_CLR2_P2_13CI_Pos

#define GPIOINT_CLR2_P2_13CI_Pos (13UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P2_13CI (Bit 13)

◆ GPIOINT_CLR2_P2_1CI_Msk

#define GPIOINT_CLR2_P2_1CI_Msk (0x2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P2_1CI (Bitfield-Mask: 0x01)

◆ GPIOINT_CLR2_P2_1CI_Pos

#define GPIOINT_CLR2_P2_1CI_Pos (1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P2_1CI (Bit 1)

◆ GPIOINT_CLR2_P2_2CI_Msk

#define GPIOINT_CLR2_P2_2CI_Msk (0x4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P2_2CI (Bitfield-Mask: 0x01)

◆ GPIOINT_CLR2_P2_2CI_Pos

#define GPIOINT_CLR2_P2_2CI_Pos (2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P2_2CI (Bit 2)

◆ GPIOINT_CLR2_P2_3CI_Msk

#define GPIOINT_CLR2_P2_3CI_Msk (0x8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P2_3CI (Bitfield-Mask: 0x01)

◆ GPIOINT_CLR2_P2_3CI_Pos

#define GPIOINT_CLR2_P2_3CI_Pos (3UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P2_3CI (Bit 3)

◆ GPIOINT_CLR2_P2_4CI_Msk

#define GPIOINT_CLR2_P2_4CI_Msk (0x10UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P2_4CI (Bitfield-Mask: 0x01)

◆ GPIOINT_CLR2_P2_4CI_Pos

#define GPIOINT_CLR2_P2_4CI_Pos (4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P2_4CI (Bit 4)

◆ GPIOINT_CLR2_P2_5CI_Msk

#define GPIOINT_CLR2_P2_5CI_Msk (0x20UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P2_5CI (Bitfield-Mask: 0x01)

◆ GPIOINT_CLR2_P2_5CI_Pos

#define GPIOINT_CLR2_P2_5CI_Pos (5UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P2_5CI (Bit 5)

◆ GPIOINT_CLR2_P2_6CI_Msk

#define GPIOINT_CLR2_P2_6CI_Msk (0x40UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P2_6CI (Bitfield-Mask: 0x01)

◆ GPIOINT_CLR2_P2_6CI_Pos

#define GPIOINT_CLR2_P2_6CI_Pos (6UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P2_6CI (Bit 6)

◆ GPIOINT_CLR2_P2_7CI_Msk

#define GPIOINT_CLR2_P2_7CI_Msk (0x80UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P2_7CI (Bitfield-Mask: 0x01)

◆ GPIOINT_CLR2_P2_7CI_Pos

#define GPIOINT_CLR2_P2_7CI_Pos (7UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P2_7CI (Bit 7)

◆ GPIOINT_CLR2_P2_8CI_Msk

#define GPIOINT_CLR2_P2_8CI_Msk (0x100UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P2_8CI (Bitfield-Mask: 0x01)

◆ GPIOINT_CLR2_P2_8CI_Pos

#define GPIOINT_CLR2_P2_8CI_Pos (8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P2_8CI (Bit 8)

◆ GPIOINT_CLR2_P2_9CI_Msk

#define GPIOINT_CLR2_P2_9CI_Msk (0x200UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P2_9CI (Bitfield-Mask: 0x01)

◆ GPIOINT_CLR2_P2_9CI_Pos

#define GPIOINT_CLR2_P2_9CI_Pos (9UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P2_9CI (Bit 9)

◆ GPIOINT_ENF0_P0_0EF_Msk

#define GPIOINT_ENF0_P0_0EF_Msk (0x1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_0EF (Bitfield-Mask: 0x01)

◆ GPIOINT_ENF0_P0_0EF_Pos

#define GPIOINT_ENF0_P0_0EF_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_0EF (Bit 0)

◆ GPIOINT_ENF0_P0_10EF_Msk

#define GPIOINT_ENF0_P0_10EF_Msk (0x400UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_10EF (Bitfield-Mask: 0x01)

◆ GPIOINT_ENF0_P0_10EF_Pos

#define GPIOINT_ENF0_P0_10EF_Pos (10UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_10EF (Bit 10)

◆ GPIOINT_ENF0_P0_11EF_Msk

#define GPIOINT_ENF0_P0_11EF_Msk (0x800UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_11EF (Bitfield-Mask: 0x01)

◆ GPIOINT_ENF0_P0_11EF_Pos

#define GPIOINT_ENF0_P0_11EF_Pos (11UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_11EF (Bit 11)

◆ GPIOINT_ENF0_P0_12EF_Msk

#define GPIOINT_ENF0_P0_12EF_Msk (0x1000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_12EF (Bitfield-Mask: 0x01)

◆ GPIOINT_ENF0_P0_12EF_Pos

#define GPIOINT_ENF0_P0_12EF_Pos (12UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_12EF (Bit 12)

◆ GPIOINT_ENF0_P0_13EF_Msk

#define GPIOINT_ENF0_P0_13EF_Msk (0x2000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_13EF (Bitfield-Mask: 0x01)

◆ GPIOINT_ENF0_P0_13EF_Pos

#define GPIOINT_ENF0_P0_13EF_Pos (13UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_13EF (Bit 13)

◆ GPIOINT_ENF0_P0_14EF_Msk

#define GPIOINT_ENF0_P0_14EF_Msk (0x4000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_14EF (Bitfield-Mask: 0x01)

◆ GPIOINT_ENF0_P0_14EF_Pos

#define GPIOINT_ENF0_P0_14EF_Pos (14UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_14EF (Bit 14)

◆ GPIOINT_ENF0_P0_15EF_Msk

#define GPIOINT_ENF0_P0_15EF_Msk (0x8000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_15EF (Bitfield-Mask: 0x01)

◆ GPIOINT_ENF0_P0_15EF_Pos

#define GPIOINT_ENF0_P0_15EF_Pos (15UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_15EF (Bit 15)

◆ GPIOINT_ENF0_P0_16EF_Msk

#define GPIOINT_ENF0_P0_16EF_Msk (0x10000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_16EF (Bitfield-Mask: 0x01)

◆ GPIOINT_ENF0_P0_16EF_Pos

#define GPIOINT_ENF0_P0_16EF_Pos (16UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_16EF (Bit 16)

◆ GPIOINT_ENF0_P0_17EF_Msk

#define GPIOINT_ENF0_P0_17EF_Msk (0x20000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_17EF (Bitfield-Mask: 0x01)

◆ GPIOINT_ENF0_P0_17EF_Pos

#define GPIOINT_ENF0_P0_17EF_Pos (17UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_17EF (Bit 17)

◆ GPIOINT_ENF0_P0_18EF_Msk

#define GPIOINT_ENF0_P0_18EF_Msk (0x40000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_18EF (Bitfield-Mask: 0x01)

◆ GPIOINT_ENF0_P0_18EF_Pos

#define GPIOINT_ENF0_P0_18EF_Pos (18UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_18EF (Bit 18)

◆ GPIOINT_ENF0_P0_19EF_Msk

#define GPIOINT_ENF0_P0_19EF_Msk (0x80000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_19EF (Bitfield-Mask: 0x01)

◆ GPIOINT_ENF0_P0_19EF_Pos

#define GPIOINT_ENF0_P0_19EF_Pos (19UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_19EF (Bit 19)

◆ GPIOINT_ENF0_P0_1EF_Msk

#define GPIOINT_ENF0_P0_1EF_Msk (0x2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_1EF (Bitfield-Mask: 0x01)

◆ GPIOINT_ENF0_P0_1EF_Pos

#define GPIOINT_ENF0_P0_1EF_Pos (1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_1EF (Bit 1)

◆ GPIOINT_ENF0_P0_20EF_Msk

#define GPIOINT_ENF0_P0_20EF_Msk (0x100000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_20EF (Bitfield-Mask: 0x01)

◆ GPIOINT_ENF0_P0_20EF_Pos

#define GPIOINT_ENF0_P0_20EF_Pos (20UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_20EF (Bit 20)

◆ GPIOINT_ENF0_P0_21EF_Msk

#define GPIOINT_ENF0_P0_21EF_Msk (0x200000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_21EF (Bitfield-Mask: 0x01)

◆ GPIOINT_ENF0_P0_21EF_Pos

#define GPIOINT_ENF0_P0_21EF_Pos (21UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_21EF (Bit 21)

◆ GPIOINT_ENF0_P0_22EF_Msk

#define GPIOINT_ENF0_P0_22EF_Msk (0x400000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_22EF (Bitfield-Mask: 0x01)

◆ GPIOINT_ENF0_P0_22EF_Pos

#define GPIOINT_ENF0_P0_22EF_Pos (22UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_22EF (Bit 22)

◆ GPIOINT_ENF0_P0_23EF_Msk

#define GPIOINT_ENF0_P0_23EF_Msk (0x800000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_23EF (Bitfield-Mask: 0x01)

◆ GPIOINT_ENF0_P0_23EF_Pos

#define GPIOINT_ENF0_P0_23EF_Pos (23UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_23EF (Bit 23)

◆ GPIOINT_ENF0_P0_24EF_Msk

#define GPIOINT_ENF0_P0_24EF_Msk (0x1000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_24EF (Bitfield-Mask: 0x01)

◆ GPIOINT_ENF0_P0_24EF_Pos

#define GPIOINT_ENF0_P0_24EF_Pos (24UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_24EF (Bit 24)

◆ GPIOINT_ENF0_P0_25EF_Msk

#define GPIOINT_ENF0_P0_25EF_Msk (0x2000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_25EF (Bitfield-Mask: 0x01)

◆ GPIOINT_ENF0_P0_25EF_Pos

#define GPIOINT_ENF0_P0_25EF_Pos (25UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_25EF (Bit 25)

◆ GPIOINT_ENF0_P0_26EF_Msk

#define GPIOINT_ENF0_P0_26EF_Msk (0x4000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_26EF (Bitfield-Mask: 0x01)

◆ GPIOINT_ENF0_P0_26EF_Pos

#define GPIOINT_ENF0_P0_26EF_Pos (26UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_26EF (Bit 26)

◆ GPIOINT_ENF0_P0_27EF_Msk

#define GPIOINT_ENF0_P0_27EF_Msk (0x8000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_27EF (Bitfield-Mask: 0x01)

◆ GPIOINT_ENF0_P0_27EF_Pos

#define GPIOINT_ENF0_P0_27EF_Pos (27UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_27EF (Bit 27)

◆ GPIOINT_ENF0_P0_28EF_Msk

#define GPIOINT_ENF0_P0_28EF_Msk (0x10000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_28EF (Bitfield-Mask: 0x01)

◆ GPIOINT_ENF0_P0_28EF_Pos

#define GPIOINT_ENF0_P0_28EF_Pos (28UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_28EF (Bit 28)

◆ GPIOINT_ENF0_P0_29EF_Msk

#define GPIOINT_ENF0_P0_29EF_Msk (0x20000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_29EF (Bitfield-Mask: 0x01)

◆ GPIOINT_ENF0_P0_29EF_Pos

#define GPIOINT_ENF0_P0_29EF_Pos (29UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_29EF (Bit 29)

◆ GPIOINT_ENF0_P0_2EF_Msk

#define GPIOINT_ENF0_P0_2EF_Msk (0x4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_2EF (Bitfield-Mask: 0x01)

◆ GPIOINT_ENF0_P0_2EF_Pos

#define GPIOINT_ENF0_P0_2EF_Pos (2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_2EF (Bit 2)

◆ GPIOINT_ENF0_P0_30EF_Msk

#define GPIOINT_ENF0_P0_30EF_Msk (0x40000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_30EF (Bitfield-Mask: 0x01)

◆ GPIOINT_ENF0_P0_30EF_Pos

#define GPIOINT_ENF0_P0_30EF_Pos (30UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_30EF (Bit 30)

◆ GPIOINT_ENF0_P0_3EF_Msk

#define GPIOINT_ENF0_P0_3EF_Msk (0x8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_3EF (Bitfield-Mask: 0x01)

◆ GPIOINT_ENF0_P0_3EF_Pos

#define GPIOINT_ENF0_P0_3EF_Pos (3UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_3EF (Bit 3)

◆ GPIOINT_ENF0_P0_4EF_Msk

#define GPIOINT_ENF0_P0_4EF_Msk (0x10UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_4EF (Bitfield-Mask: 0x01)

◆ GPIOINT_ENF0_P0_4EF_Pos

#define GPIOINT_ENF0_P0_4EF_Pos (4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_4EF (Bit 4)

◆ GPIOINT_ENF0_P0_5EF_Msk

#define GPIOINT_ENF0_P0_5EF_Msk (0x20UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_5EF (Bitfield-Mask: 0x01)

◆ GPIOINT_ENF0_P0_5EF_Pos

#define GPIOINT_ENF0_P0_5EF_Pos (5UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_5EF (Bit 5)

◆ GPIOINT_ENF0_P0_6EF_Msk

#define GPIOINT_ENF0_P0_6EF_Msk (0x40UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_6EF (Bitfield-Mask: 0x01)

◆ GPIOINT_ENF0_P0_6EF_Pos

#define GPIOINT_ENF0_P0_6EF_Pos (6UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_6EF (Bit 6)

◆ GPIOINT_ENF0_P0_7EF_Msk

#define GPIOINT_ENF0_P0_7EF_Msk (0x80UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_7EF (Bitfield-Mask: 0x01)

◆ GPIOINT_ENF0_P0_7EF_Pos

#define GPIOINT_ENF0_P0_7EF_Pos (7UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_7EF (Bit 7)

◆ GPIOINT_ENF0_P0_8EF_Msk

#define GPIOINT_ENF0_P0_8EF_Msk (0x100UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_8EF (Bitfield-Mask: 0x01)

◆ GPIOINT_ENF0_P0_8EF_Pos

#define GPIOINT_ENF0_P0_8EF_Pos (8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_8EF (Bit 8)

◆ GPIOINT_ENF0_P0_9EF_Msk

#define GPIOINT_ENF0_P0_9EF_Msk (0x200UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_9EF (Bitfield-Mask: 0x01)

◆ GPIOINT_ENF0_P0_9EF_Pos

#define GPIOINT_ENF0_P0_9EF_Pos (9UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_9EF (Bit 9)

◆ GPIOINT_ENF2_P2_0EF_Msk

#define GPIOINT_ENF2_P2_0EF_Msk (0x1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P2_0EF (Bitfield-Mask: 0x01)

◆ GPIOINT_ENF2_P2_0EF_Pos

#define GPIOINT_ENF2_P2_0EF_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P2_0EF (Bit 0)

◆ GPIOINT_ENF2_P2_10EF_Msk

#define GPIOINT_ENF2_P2_10EF_Msk (0x400UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P2_10EF (Bitfield-Mask: 0x01)

◆ GPIOINT_ENF2_P2_10EF_Pos

#define GPIOINT_ENF2_P2_10EF_Pos (10UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P2_10EF (Bit 10)

◆ GPIOINT_ENF2_P2_11EF_Msk

#define GPIOINT_ENF2_P2_11EF_Msk (0x800UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P2_11EF (Bitfield-Mask: 0x01)

◆ GPIOINT_ENF2_P2_11EF_Pos

#define GPIOINT_ENF2_P2_11EF_Pos (11UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P2_11EF (Bit 11)

◆ GPIOINT_ENF2_P2_12EF_Msk

#define GPIOINT_ENF2_P2_12EF_Msk (0x1000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P2_12EF (Bitfield-Mask: 0x01)

◆ GPIOINT_ENF2_P2_12EF_Pos

#define GPIOINT_ENF2_P2_12EF_Pos (12UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P2_12EF (Bit 12)

◆ GPIOINT_ENF2_P2_13EF_Msk

#define GPIOINT_ENF2_P2_13EF_Msk (0x2000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P2_13EF (Bitfield-Mask: 0x01)

◆ GPIOINT_ENF2_P2_13EF_Pos

#define GPIOINT_ENF2_P2_13EF_Pos (13UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P2_13EF (Bit 13)

◆ GPIOINT_ENF2_P2_1EF_Msk

#define GPIOINT_ENF2_P2_1EF_Msk (0x2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P2_1EF (Bitfield-Mask: 0x01)

◆ GPIOINT_ENF2_P2_1EF_Pos

#define GPIOINT_ENF2_P2_1EF_Pos (1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P2_1EF (Bit 1)

◆ GPIOINT_ENF2_P2_2EF_Msk

#define GPIOINT_ENF2_P2_2EF_Msk (0x4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P2_2EF (Bitfield-Mask: 0x01)

◆ GPIOINT_ENF2_P2_2EF_Pos

#define GPIOINT_ENF2_P2_2EF_Pos (2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P2_2EF (Bit 2)

◆ GPIOINT_ENF2_P2_3EF_Msk

#define GPIOINT_ENF2_P2_3EF_Msk (0x8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P2_3EF (Bitfield-Mask: 0x01)

◆ GPIOINT_ENF2_P2_3EF_Pos

#define GPIOINT_ENF2_P2_3EF_Pos (3UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P2_3EF (Bit 3)

◆ GPIOINT_ENF2_P2_4EF_Msk

#define GPIOINT_ENF2_P2_4EF_Msk (0x10UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P2_4EF (Bitfield-Mask: 0x01)

◆ GPIOINT_ENF2_P2_4EF_Pos

#define GPIOINT_ENF2_P2_4EF_Pos (4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P2_4EF (Bit 4)

◆ GPIOINT_ENF2_P2_5EF_Msk

#define GPIOINT_ENF2_P2_5EF_Msk (0x20UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P2_5EF (Bitfield-Mask: 0x01)

◆ GPIOINT_ENF2_P2_5EF_Pos

#define GPIOINT_ENF2_P2_5EF_Pos (5UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P2_5EF (Bit 5)

◆ GPIOINT_ENF2_P2_6EF_Msk

#define GPIOINT_ENF2_P2_6EF_Msk (0x40UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P2_6EF (Bitfield-Mask: 0x01)

◆ GPIOINT_ENF2_P2_6EF_Pos

#define GPIOINT_ENF2_P2_6EF_Pos (6UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P2_6EF (Bit 6)

◆ GPIOINT_ENF2_P2_7EF_Msk

#define GPIOINT_ENF2_P2_7EF_Msk (0x80UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P2_7EF (Bitfield-Mask: 0x01)

◆ GPIOINT_ENF2_P2_7EF_Pos

#define GPIOINT_ENF2_P2_7EF_Pos (7UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P2_7EF (Bit 7)

◆ GPIOINT_ENF2_P2_8EF_Msk

#define GPIOINT_ENF2_P2_8EF_Msk (0x100UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P2_8EF (Bitfield-Mask: 0x01)

◆ GPIOINT_ENF2_P2_8EF_Pos

#define GPIOINT_ENF2_P2_8EF_Pos (8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P2_8EF (Bit 8)

◆ GPIOINT_ENF2_P2_9EF_Msk

#define GPIOINT_ENF2_P2_9EF_Msk (0x200UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P2_9EF (Bitfield-Mask: 0x01)

◆ GPIOINT_ENF2_P2_9EF_Pos

#define GPIOINT_ENF2_P2_9EF_Pos (9UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P2_9EF (Bit 9)

◆ GPIOINT_ENR0_P0_0ER_Msk

#define GPIOINT_ENR0_P0_0ER_Msk (0x1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_0ER (Bitfield-Mask: 0x01)

◆ GPIOINT_ENR0_P0_0ER_Pos

#define GPIOINT_ENR0_P0_0ER_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_0ER (Bit 0)

◆ GPIOINT_ENR0_P0_10ER_Msk

#define GPIOINT_ENR0_P0_10ER_Msk (0x400UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_10ER (Bitfield-Mask: 0x01)

◆ GPIOINT_ENR0_P0_10ER_Pos

#define GPIOINT_ENR0_P0_10ER_Pos (10UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_10ER (Bit 10)

◆ GPIOINT_ENR0_P0_11ER_Msk

#define GPIOINT_ENR0_P0_11ER_Msk (0x800UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_11ER (Bitfield-Mask: 0x01)

◆ GPIOINT_ENR0_P0_11ER_Pos

#define GPIOINT_ENR0_P0_11ER_Pos (11UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_11ER (Bit 11)

◆ GPIOINT_ENR0_P0_12ER_Msk

#define GPIOINT_ENR0_P0_12ER_Msk (0x1000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_12ER (Bitfield-Mask: 0x01)

◆ GPIOINT_ENR0_P0_12ER_Pos

#define GPIOINT_ENR0_P0_12ER_Pos (12UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_12ER (Bit 12)

◆ GPIOINT_ENR0_P0_13ER_Msk

#define GPIOINT_ENR0_P0_13ER_Msk (0x2000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_13ER (Bitfield-Mask: 0x01)

◆ GPIOINT_ENR0_P0_13ER_Pos

#define GPIOINT_ENR0_P0_13ER_Pos (13UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_13ER (Bit 13)

◆ GPIOINT_ENR0_P0_14ER_Msk

#define GPIOINT_ENR0_P0_14ER_Msk (0x4000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_14ER (Bitfield-Mask: 0x01)

◆ GPIOINT_ENR0_P0_14ER_Pos

#define GPIOINT_ENR0_P0_14ER_Pos (14UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_14ER (Bit 14)

◆ GPIOINT_ENR0_P0_15ER_Msk

#define GPIOINT_ENR0_P0_15ER_Msk (0x8000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_15ER (Bitfield-Mask: 0x01)

◆ GPIOINT_ENR0_P0_15ER_Pos

#define GPIOINT_ENR0_P0_15ER_Pos (15UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_15ER (Bit 15)

◆ GPIOINT_ENR0_P0_16ER_Msk

#define GPIOINT_ENR0_P0_16ER_Msk (0x10000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_16ER (Bitfield-Mask: 0x01)

◆ GPIOINT_ENR0_P0_16ER_Pos

#define GPIOINT_ENR0_P0_16ER_Pos (16UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_16ER (Bit 16)

◆ GPIOINT_ENR0_P0_17ER_Msk

#define GPIOINT_ENR0_P0_17ER_Msk (0x20000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_17ER (Bitfield-Mask: 0x01)

◆ GPIOINT_ENR0_P0_17ER_Pos

#define GPIOINT_ENR0_P0_17ER_Pos (17UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_17ER (Bit 17)

◆ GPIOINT_ENR0_P0_18ER_Msk

#define GPIOINT_ENR0_P0_18ER_Msk (0x40000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_18ER (Bitfield-Mask: 0x01)

◆ GPIOINT_ENR0_P0_18ER_Pos

#define GPIOINT_ENR0_P0_18ER_Pos (18UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_18ER (Bit 18)

◆ GPIOINT_ENR0_P0_19ER_Msk

#define GPIOINT_ENR0_P0_19ER_Msk (0x80000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_19ER (Bitfield-Mask: 0x01)

◆ GPIOINT_ENR0_P0_19ER_Pos

#define GPIOINT_ENR0_P0_19ER_Pos (19UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_19ER (Bit 19)

◆ GPIOINT_ENR0_P0_1ER_Msk

#define GPIOINT_ENR0_P0_1ER_Msk (0x2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_1ER (Bitfield-Mask: 0x01)

◆ GPIOINT_ENR0_P0_1ER_Pos

#define GPIOINT_ENR0_P0_1ER_Pos (1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_1ER (Bit 1)

◆ GPIOINT_ENR0_P0_20ER_Msk

#define GPIOINT_ENR0_P0_20ER_Msk (0x100000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_20ER (Bitfield-Mask: 0x01)

◆ GPIOINT_ENR0_P0_20ER_Pos

#define GPIOINT_ENR0_P0_20ER_Pos (20UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_20ER (Bit 20)

◆ GPIOINT_ENR0_P0_21ER_Msk

#define GPIOINT_ENR0_P0_21ER_Msk (0x200000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_21ER (Bitfield-Mask: 0x01)

◆ GPIOINT_ENR0_P0_21ER_Pos

#define GPIOINT_ENR0_P0_21ER_Pos (21UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_21ER (Bit 21)

◆ GPIOINT_ENR0_P0_22ER_Msk

#define GPIOINT_ENR0_P0_22ER_Msk (0x400000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_22ER (Bitfield-Mask: 0x01)

◆ GPIOINT_ENR0_P0_22ER_Pos

#define GPIOINT_ENR0_P0_22ER_Pos (22UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_22ER (Bit 22)

◆ GPIOINT_ENR0_P0_23ER_Msk

#define GPIOINT_ENR0_P0_23ER_Msk (0x800000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_23ER (Bitfield-Mask: 0x01)

◆ GPIOINT_ENR0_P0_23ER_Pos

#define GPIOINT_ENR0_P0_23ER_Pos (23UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_23ER (Bit 23)

◆ GPIOINT_ENR0_P0_24ER_Msk

#define GPIOINT_ENR0_P0_24ER_Msk (0x1000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_24ER (Bitfield-Mask: 0x01)

◆ GPIOINT_ENR0_P0_24ER_Pos

#define GPIOINT_ENR0_P0_24ER_Pos (24UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_24ER (Bit 24)

◆ GPIOINT_ENR0_P0_25ER_Msk

#define GPIOINT_ENR0_P0_25ER_Msk (0x2000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_25ER (Bitfield-Mask: 0x01)

◆ GPIOINT_ENR0_P0_25ER_Pos

#define GPIOINT_ENR0_P0_25ER_Pos (25UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_25ER (Bit 25)

◆ GPIOINT_ENR0_P0_26ER_Msk

#define GPIOINT_ENR0_P0_26ER_Msk (0x4000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_26ER (Bitfield-Mask: 0x01)

◆ GPIOINT_ENR0_P0_26ER_Pos

#define GPIOINT_ENR0_P0_26ER_Pos (26UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_26ER (Bit 26)

◆ GPIOINT_ENR0_P0_27ER_Msk

#define GPIOINT_ENR0_P0_27ER_Msk (0x8000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_27ER (Bitfield-Mask: 0x01)

◆ GPIOINT_ENR0_P0_27ER_Pos

#define GPIOINT_ENR0_P0_27ER_Pos (27UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_27ER (Bit 27)

◆ GPIOINT_ENR0_P0_28ER_Msk

#define GPIOINT_ENR0_P0_28ER_Msk (0x10000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_28ER (Bitfield-Mask: 0x01)

◆ GPIOINT_ENR0_P0_28ER_Pos

#define GPIOINT_ENR0_P0_28ER_Pos (28UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_28ER (Bit 28)

◆ GPIOINT_ENR0_P0_29ER_Msk

#define GPIOINT_ENR0_P0_29ER_Msk (0x20000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_29ER (Bitfield-Mask: 0x01)

◆ GPIOINT_ENR0_P0_29ER_Pos

#define GPIOINT_ENR0_P0_29ER_Pos (29UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_29ER (Bit 29)

◆ GPIOINT_ENR0_P0_2ER_Msk

#define GPIOINT_ENR0_P0_2ER_Msk (0x4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_2ER (Bitfield-Mask: 0x01)

◆ GPIOINT_ENR0_P0_2ER_Pos

#define GPIOINT_ENR0_P0_2ER_Pos (2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_2ER (Bit 2)

◆ GPIOINT_ENR0_P0_30ER_Msk

#define GPIOINT_ENR0_P0_30ER_Msk (0x40000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_30ER (Bitfield-Mask: 0x01)

◆ GPIOINT_ENR0_P0_30ER_Pos

#define GPIOINT_ENR0_P0_30ER_Pos (30UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_30ER (Bit 30)

◆ GPIOINT_ENR0_P0_3ER_Msk

#define GPIOINT_ENR0_P0_3ER_Msk (0x8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_3ER (Bitfield-Mask: 0x01)

◆ GPIOINT_ENR0_P0_3ER_Pos

#define GPIOINT_ENR0_P0_3ER_Pos (3UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_3ER (Bit 3)

◆ GPIOINT_ENR0_P0_4ER_Msk

#define GPIOINT_ENR0_P0_4ER_Msk (0x10UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_4ER (Bitfield-Mask: 0x01)

◆ GPIOINT_ENR0_P0_4ER_Pos

#define GPIOINT_ENR0_P0_4ER_Pos (4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_4ER (Bit 4)

◆ GPIOINT_ENR0_P0_5ER_Msk

#define GPIOINT_ENR0_P0_5ER_Msk (0x20UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_5ER (Bitfield-Mask: 0x01)

◆ GPIOINT_ENR0_P0_5ER_Pos

#define GPIOINT_ENR0_P0_5ER_Pos (5UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_5ER (Bit 5)

◆ GPIOINT_ENR0_P0_6ER_Msk

#define GPIOINT_ENR0_P0_6ER_Msk (0x40UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_6ER (Bitfield-Mask: 0x01)

◆ GPIOINT_ENR0_P0_6ER_Pos

#define GPIOINT_ENR0_P0_6ER_Pos (6UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_6ER (Bit 6)

◆ GPIOINT_ENR0_P0_7ER_Msk

#define GPIOINT_ENR0_P0_7ER_Msk (0x80UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_7ER (Bitfield-Mask: 0x01)

◆ GPIOINT_ENR0_P0_7ER_Pos

#define GPIOINT_ENR0_P0_7ER_Pos (7UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_7ER (Bit 7)

◆ GPIOINT_ENR0_P0_8ER_Msk

#define GPIOINT_ENR0_P0_8ER_Msk (0x100UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_8ER (Bitfield-Mask: 0x01)

◆ GPIOINT_ENR0_P0_8ER_Pos

#define GPIOINT_ENR0_P0_8ER_Pos (8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_8ER (Bit 8)

◆ GPIOINT_ENR0_P0_9ER_Msk

#define GPIOINT_ENR0_P0_9ER_Msk (0x200UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_9ER (Bitfield-Mask: 0x01)

◆ GPIOINT_ENR0_P0_9ER_Pos

#define GPIOINT_ENR0_P0_9ER_Pos (9UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_9ER (Bit 9)

◆ GPIOINT_ENR2_P2_0ER_Msk

#define GPIOINT_ENR2_P2_0ER_Msk (0x1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P2_0ER (Bitfield-Mask: 0x01)

◆ GPIOINT_ENR2_P2_0ER_Pos

#define GPIOINT_ENR2_P2_0ER_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P2_0ER (Bit 0)

◆ GPIOINT_ENR2_P2_10ER_Msk

#define GPIOINT_ENR2_P2_10ER_Msk (0x400UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P2_10ER (Bitfield-Mask: 0x01)

◆ GPIOINT_ENR2_P2_10ER_Pos

#define GPIOINT_ENR2_P2_10ER_Pos (10UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P2_10ER (Bit 10)

◆ GPIOINT_ENR2_P2_11ER_Msk

#define GPIOINT_ENR2_P2_11ER_Msk (0x800UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P2_11ER (Bitfield-Mask: 0x01)

◆ GPIOINT_ENR2_P2_11ER_Pos

#define GPIOINT_ENR2_P2_11ER_Pos (11UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P2_11ER (Bit 11)

◆ GPIOINT_ENR2_P2_12ER_Msk

#define GPIOINT_ENR2_P2_12ER_Msk (0x1000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P2_12ER (Bitfield-Mask: 0x01)

◆ GPIOINT_ENR2_P2_12ER_Pos

#define GPIOINT_ENR2_P2_12ER_Pos (12UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P2_12ER (Bit 12)

◆ GPIOINT_ENR2_P2_13ER_Msk

#define GPIOINT_ENR2_P2_13ER_Msk (0x2000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P2_13ER (Bitfield-Mask: 0x01)

◆ GPIOINT_ENR2_P2_13ER_Pos

#define GPIOINT_ENR2_P2_13ER_Pos (13UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P2_13ER (Bit 13)

◆ GPIOINT_ENR2_P2_1ER_Msk

#define GPIOINT_ENR2_P2_1ER_Msk (0x2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P2_1ER (Bitfield-Mask: 0x01)

◆ GPIOINT_ENR2_P2_1ER_Pos

#define GPIOINT_ENR2_P2_1ER_Pos (1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P2_1ER (Bit 1)

◆ GPIOINT_ENR2_P2_2ER_Msk

#define GPIOINT_ENR2_P2_2ER_Msk (0x4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P2_2ER (Bitfield-Mask: 0x01)

◆ GPIOINT_ENR2_P2_2ER_Pos

#define GPIOINT_ENR2_P2_2ER_Pos (2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P2_2ER (Bit 2)

◆ GPIOINT_ENR2_P2_3ER_Msk

#define GPIOINT_ENR2_P2_3ER_Msk (0x8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P2_3ER (Bitfield-Mask: 0x01)

◆ GPIOINT_ENR2_P2_3ER_Pos

#define GPIOINT_ENR2_P2_3ER_Pos (3UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P2_3ER (Bit 3)

◆ GPIOINT_ENR2_P2_4ER_Msk

#define GPIOINT_ENR2_P2_4ER_Msk (0x10UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P2_4ER (Bitfield-Mask: 0x01)

◆ GPIOINT_ENR2_P2_4ER_Pos

#define GPIOINT_ENR2_P2_4ER_Pos (4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P2_4ER (Bit 4)

◆ GPIOINT_ENR2_P2_5ER_Msk

#define GPIOINT_ENR2_P2_5ER_Msk (0x20UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P2_5ER (Bitfield-Mask: 0x01)

◆ GPIOINT_ENR2_P2_5ER_Pos

#define GPIOINT_ENR2_P2_5ER_Pos (5UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P2_5ER (Bit 5)

◆ GPIOINT_ENR2_P2_6ER_Msk

#define GPIOINT_ENR2_P2_6ER_Msk (0x40UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P2_6ER (Bitfield-Mask: 0x01)

◆ GPIOINT_ENR2_P2_6ER_Pos

#define GPIOINT_ENR2_P2_6ER_Pos (6UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P2_6ER (Bit 6)

◆ GPIOINT_ENR2_P2_7ER_Msk

#define GPIOINT_ENR2_P2_7ER_Msk (0x80UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P2_7ER (Bitfield-Mask: 0x01)

◆ GPIOINT_ENR2_P2_7ER_Pos

#define GPIOINT_ENR2_P2_7ER_Pos (7UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P2_7ER (Bit 7)

◆ GPIOINT_ENR2_P2_8ER_Msk

#define GPIOINT_ENR2_P2_8ER_Msk (0x100UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P2_8ER (Bitfield-Mask: 0x01)

◆ GPIOINT_ENR2_P2_8ER_Pos

#define GPIOINT_ENR2_P2_8ER_Pos (8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P2_8ER (Bit 8)

◆ GPIOINT_ENR2_P2_9ER_Msk

#define GPIOINT_ENR2_P2_9ER_Msk (0x200UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P2_9ER (Bitfield-Mask: 0x01)

◆ GPIOINT_ENR2_P2_9ER_Pos

#define GPIOINT_ENR2_P2_9ER_Pos (9UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P2_9ER (Bit 9)

◆ GPIOINT_STATF0_P0_0FEI_Msk

#define GPIOINT_STATF0_P0_0FEI_Msk (0x1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_0FEI (Bitfield-Mask: 0x01)

◆ GPIOINT_STATF0_P0_0FEI_Pos

#define GPIOINT_STATF0_P0_0FEI_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_0FEI (Bit 0)

◆ GPIOINT_STATF0_P0_10FEI_Msk

#define GPIOINT_STATF0_P0_10FEI_Msk (0x400UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_10FEI (Bitfield-Mask: 0x01)

◆ GPIOINT_STATF0_P0_10FEI_Pos

#define GPIOINT_STATF0_P0_10FEI_Pos (10UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_10FEI (Bit 10)

◆ GPIOINT_STATF0_P0_11FEI_Msk

#define GPIOINT_STATF0_P0_11FEI_Msk (0x800UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_11FEI (Bitfield-Mask: 0x01)

◆ GPIOINT_STATF0_P0_11FEI_Pos

#define GPIOINT_STATF0_P0_11FEI_Pos (11UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_11FEI (Bit 11)

◆ GPIOINT_STATF0_P0_12FEI_Msk

#define GPIOINT_STATF0_P0_12FEI_Msk (0x1000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_12FEI (Bitfield-Mask: 0x01)

◆ GPIOINT_STATF0_P0_12FEI_Pos

#define GPIOINT_STATF0_P0_12FEI_Pos (12UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_12FEI (Bit 12)

◆ GPIOINT_STATF0_P0_13FEI_Msk

#define GPIOINT_STATF0_P0_13FEI_Msk (0x2000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_13FEI (Bitfield-Mask: 0x01)

◆ GPIOINT_STATF0_P0_13FEI_Pos

#define GPIOINT_STATF0_P0_13FEI_Pos (13UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_13FEI (Bit 13)

◆ GPIOINT_STATF0_P0_14FEI_Msk

#define GPIOINT_STATF0_P0_14FEI_Msk (0x4000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_14FEI (Bitfield-Mask: 0x01)

◆ GPIOINT_STATF0_P0_14FEI_Pos

#define GPIOINT_STATF0_P0_14FEI_Pos (14UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_14FEI (Bit 14)

◆ GPIOINT_STATF0_P0_15FEI_Msk

#define GPIOINT_STATF0_P0_15FEI_Msk (0x8000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_15FEI (Bitfield-Mask: 0x01)

◆ GPIOINT_STATF0_P0_15FEI_Pos

#define GPIOINT_STATF0_P0_15FEI_Pos (15UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_15FEI (Bit 15)

◆ GPIOINT_STATF0_P0_16FEI_Msk

#define GPIOINT_STATF0_P0_16FEI_Msk (0x10000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_16FEI (Bitfield-Mask: 0x01)

◆ GPIOINT_STATF0_P0_16FEI_Pos

#define GPIOINT_STATF0_P0_16FEI_Pos (16UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_16FEI (Bit 16)

◆ GPIOINT_STATF0_P0_17FEI_Msk

#define GPIOINT_STATF0_P0_17FEI_Msk (0x20000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_17FEI (Bitfield-Mask: 0x01)

◆ GPIOINT_STATF0_P0_17FEI_Pos

#define GPIOINT_STATF0_P0_17FEI_Pos (17UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_17FEI (Bit 17)

◆ GPIOINT_STATF0_P0_18FEI_Msk

#define GPIOINT_STATF0_P0_18FEI_Msk (0x40000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_18FEI (Bitfield-Mask: 0x01)

◆ GPIOINT_STATF0_P0_18FEI_Pos

#define GPIOINT_STATF0_P0_18FEI_Pos (18UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_18FEI (Bit 18)

◆ GPIOINT_STATF0_P0_19FEI_Msk

#define GPIOINT_STATF0_P0_19FEI_Msk (0x80000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_19FEI (Bitfield-Mask: 0x01)

◆ GPIOINT_STATF0_P0_19FEI_Pos

#define GPIOINT_STATF0_P0_19FEI_Pos (19UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_19FEI (Bit 19)

◆ GPIOINT_STATF0_P0_1FEI_Msk

#define GPIOINT_STATF0_P0_1FEI_Msk (0x2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_1FEI (Bitfield-Mask: 0x01)

◆ GPIOINT_STATF0_P0_1FEI_Pos

#define GPIOINT_STATF0_P0_1FEI_Pos (1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_1FEI (Bit 1)

◆ GPIOINT_STATF0_P0_20FEI_Msk

#define GPIOINT_STATF0_P0_20FEI_Msk (0x100000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_20FEI (Bitfield-Mask: 0x01)

◆ GPIOINT_STATF0_P0_20FEI_Pos

#define GPIOINT_STATF0_P0_20FEI_Pos (20UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_20FEI (Bit 20)

◆ GPIOINT_STATF0_P0_21FEI_Msk

#define GPIOINT_STATF0_P0_21FEI_Msk (0x200000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_21FEI (Bitfield-Mask: 0x01)

◆ GPIOINT_STATF0_P0_21FEI_Pos

#define GPIOINT_STATF0_P0_21FEI_Pos (21UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_21FEI (Bit 21)

◆ GPIOINT_STATF0_P0_22FEI_Msk

#define GPIOINT_STATF0_P0_22FEI_Msk (0x400000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_22FEI (Bitfield-Mask: 0x01)

◆ GPIOINT_STATF0_P0_22FEI_Pos

#define GPIOINT_STATF0_P0_22FEI_Pos (22UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_22FEI (Bit 22)

◆ GPIOINT_STATF0_P0_23FEI_Msk

#define GPIOINT_STATF0_P0_23FEI_Msk (0x800000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_23FEI (Bitfield-Mask: 0x01)

◆ GPIOINT_STATF0_P0_23FEI_Pos

#define GPIOINT_STATF0_P0_23FEI_Pos (23UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_23FEI (Bit 23)

◆ GPIOINT_STATF0_P0_24FEI_Msk

#define GPIOINT_STATF0_P0_24FEI_Msk (0x1000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_24FEI (Bitfield-Mask: 0x01)

◆ GPIOINT_STATF0_P0_24FEI_Pos

#define GPIOINT_STATF0_P0_24FEI_Pos (24UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_24FEI (Bit 24)

◆ GPIOINT_STATF0_P0_25FEI_Msk

#define GPIOINT_STATF0_P0_25FEI_Msk (0x2000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_25FEI (Bitfield-Mask: 0x01)

◆ GPIOINT_STATF0_P0_25FEI_Pos

#define GPIOINT_STATF0_P0_25FEI_Pos (25UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_25FEI (Bit 25)

◆ GPIOINT_STATF0_P0_26FEI_Msk

#define GPIOINT_STATF0_P0_26FEI_Msk (0x4000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_26FEI (Bitfield-Mask: 0x01)

◆ GPIOINT_STATF0_P0_26FEI_Pos

#define GPIOINT_STATF0_P0_26FEI_Pos (26UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_26FEI (Bit 26)

◆ GPIOINT_STATF0_P0_27FEI_Msk

#define GPIOINT_STATF0_P0_27FEI_Msk (0x8000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_27FEI (Bitfield-Mask: 0x01)

◆ GPIOINT_STATF0_P0_27FEI_Pos

#define GPIOINT_STATF0_P0_27FEI_Pos (27UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_27FEI (Bit 27)

◆ GPIOINT_STATF0_P0_28FEI_Msk

#define GPIOINT_STATF0_P0_28FEI_Msk (0x10000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_28FEI (Bitfield-Mask: 0x01)

◆ GPIOINT_STATF0_P0_28FEI_Pos

#define GPIOINT_STATF0_P0_28FEI_Pos (28UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_28FEI (Bit 28)

◆ GPIOINT_STATF0_P0_29FEI_Msk

#define GPIOINT_STATF0_P0_29FEI_Msk (0x20000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_29FEI (Bitfield-Mask: 0x01)

◆ GPIOINT_STATF0_P0_29FEI_Pos

#define GPIOINT_STATF0_P0_29FEI_Pos (29UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_29FEI (Bit 29)

◆ GPIOINT_STATF0_P0_2FEI_Msk

#define GPIOINT_STATF0_P0_2FEI_Msk (0x4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_2FEI (Bitfield-Mask: 0x01)

◆ GPIOINT_STATF0_P0_2FEI_Pos

#define GPIOINT_STATF0_P0_2FEI_Pos (2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_2FEI (Bit 2)

◆ GPIOINT_STATF0_P0_30FEI_Msk

#define GPIOINT_STATF0_P0_30FEI_Msk (0x40000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_30FEI (Bitfield-Mask: 0x01)

◆ GPIOINT_STATF0_P0_30FEI_Pos

#define GPIOINT_STATF0_P0_30FEI_Pos (30UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_30FEI (Bit 30)

◆ GPIOINT_STATF0_P0_3FEI_Msk

#define GPIOINT_STATF0_P0_3FEI_Msk (0x8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_3FEI (Bitfield-Mask: 0x01)

◆ GPIOINT_STATF0_P0_3FEI_Pos

#define GPIOINT_STATF0_P0_3FEI_Pos (3UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_3FEI (Bit 3)

◆ GPIOINT_STATF0_P0_4FEI_Msk

#define GPIOINT_STATF0_P0_4FEI_Msk (0x10UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_4FEI (Bitfield-Mask: 0x01)

◆ GPIOINT_STATF0_P0_4FEI_Pos

#define GPIOINT_STATF0_P0_4FEI_Pos (4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_4FEI (Bit 4)

◆ GPIOINT_STATF0_P0_5FEI_Msk

#define GPIOINT_STATF0_P0_5FEI_Msk (0x20UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_5FEI (Bitfield-Mask: 0x01)

◆ GPIOINT_STATF0_P0_5FEI_Pos

#define GPIOINT_STATF0_P0_5FEI_Pos (5UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_5FEI (Bit 5)

◆ GPIOINT_STATF0_P0_6FEI_Msk

#define GPIOINT_STATF0_P0_6FEI_Msk (0x40UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_6FEI (Bitfield-Mask: 0x01)

◆ GPIOINT_STATF0_P0_6FEI_Pos

#define GPIOINT_STATF0_P0_6FEI_Pos (6UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_6FEI (Bit 6)

◆ GPIOINT_STATF0_P0_7FEI_Msk

#define GPIOINT_STATF0_P0_7FEI_Msk (0x80UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_7FEI (Bitfield-Mask: 0x01)

◆ GPIOINT_STATF0_P0_7FEI_Pos

#define GPIOINT_STATF0_P0_7FEI_Pos (7UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_7FEI (Bit 7)

◆ GPIOINT_STATF0_P0_8FEI_Msk

#define GPIOINT_STATF0_P0_8FEI_Msk (0x100UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_8FEI (Bitfield-Mask: 0x01)

◆ GPIOINT_STATF0_P0_8FEI_Pos

#define GPIOINT_STATF0_P0_8FEI_Pos (8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_8FEI (Bit 8)

◆ GPIOINT_STATF0_P0_9FEI_Msk

#define GPIOINT_STATF0_P0_9FEI_Msk (0x200UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_9FEI (Bitfield-Mask: 0x01)

◆ GPIOINT_STATF0_P0_9FEI_Pos

#define GPIOINT_STATF0_P0_9FEI_Pos (9UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_9FEI (Bit 9)

◆ GPIOINT_STATF2_P2_0FEI_Msk

#define GPIOINT_STATF2_P2_0FEI_Msk (0x1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P2_0FEI (Bitfield-Mask: 0x01)

◆ GPIOINT_STATF2_P2_0FEI_Pos

#define GPIOINT_STATF2_P2_0FEI_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P2_0FEI (Bit 0)

◆ GPIOINT_STATF2_P2_10FEI_Msk

#define GPIOINT_STATF2_P2_10FEI_Msk (0x400UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P2_10FEI (Bitfield-Mask: 0x01)

◆ GPIOINT_STATF2_P2_10FEI_Pos

#define GPIOINT_STATF2_P2_10FEI_Pos (10UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P2_10FEI (Bit 10)

◆ GPIOINT_STATF2_P2_11FEI_Msk

#define GPIOINT_STATF2_P2_11FEI_Msk (0x800UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P2_11FEI (Bitfield-Mask: 0x01)

◆ GPIOINT_STATF2_P2_11FEI_Pos

#define GPIOINT_STATF2_P2_11FEI_Pos (11UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P2_11FEI (Bit 11)

◆ GPIOINT_STATF2_P2_12FEI_Msk

#define GPIOINT_STATF2_P2_12FEI_Msk (0x1000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P2_12FEI (Bitfield-Mask: 0x01)

◆ GPIOINT_STATF2_P2_12FEI_Pos

#define GPIOINT_STATF2_P2_12FEI_Pos (12UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P2_12FEI (Bit 12)

◆ GPIOINT_STATF2_P2_13FEI_Msk

#define GPIOINT_STATF2_P2_13FEI_Msk (0x2000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P2_13FEI (Bitfield-Mask: 0x01)

◆ GPIOINT_STATF2_P2_13FEI_Pos

#define GPIOINT_STATF2_P2_13FEI_Pos (13UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P2_13FEI (Bit 13)

◆ GPIOINT_STATF2_P2_1FEI_Msk

#define GPIOINT_STATF2_P2_1FEI_Msk (0x2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P2_1FEI (Bitfield-Mask: 0x01)

◆ GPIOINT_STATF2_P2_1FEI_Pos

#define GPIOINT_STATF2_P2_1FEI_Pos (1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P2_1FEI (Bit 1)

◆ GPIOINT_STATF2_P2_2FEI_Msk

#define GPIOINT_STATF2_P2_2FEI_Msk (0x4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P2_2FEI (Bitfield-Mask: 0x01)

◆ GPIOINT_STATF2_P2_2FEI_Pos

#define GPIOINT_STATF2_P2_2FEI_Pos (2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P2_2FEI (Bit 2)

◆ GPIOINT_STATF2_P2_3FEI_Msk

#define GPIOINT_STATF2_P2_3FEI_Msk (0x8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P2_3FEI (Bitfield-Mask: 0x01)

◆ GPIOINT_STATF2_P2_3FEI_Pos

#define GPIOINT_STATF2_P2_3FEI_Pos (3UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P2_3FEI (Bit 3)

◆ GPIOINT_STATF2_P2_4FEI_Msk

#define GPIOINT_STATF2_P2_4FEI_Msk (0x10UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P2_4FEI (Bitfield-Mask: 0x01)

◆ GPIOINT_STATF2_P2_4FEI_Pos

#define GPIOINT_STATF2_P2_4FEI_Pos (4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P2_4FEI (Bit 4)

◆ GPIOINT_STATF2_P2_5FEI_Msk

#define GPIOINT_STATF2_P2_5FEI_Msk (0x20UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P2_5FEI (Bitfield-Mask: 0x01)

◆ GPIOINT_STATF2_P2_5FEI_Pos

#define GPIOINT_STATF2_P2_5FEI_Pos (5UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P2_5FEI (Bit 5)

◆ GPIOINT_STATF2_P2_6FEI_Msk

#define GPIOINT_STATF2_P2_6FEI_Msk (0x40UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P2_6FEI (Bitfield-Mask: 0x01)

◆ GPIOINT_STATF2_P2_6FEI_Pos

#define GPIOINT_STATF2_P2_6FEI_Pos (6UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P2_6FEI (Bit 6)

◆ GPIOINT_STATF2_P2_7FEI_Msk

#define GPIOINT_STATF2_P2_7FEI_Msk (0x80UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P2_7FEI (Bitfield-Mask: 0x01)

◆ GPIOINT_STATF2_P2_7FEI_Pos

#define GPIOINT_STATF2_P2_7FEI_Pos (7UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P2_7FEI (Bit 7)

◆ GPIOINT_STATF2_P2_8FEI_Msk

#define GPIOINT_STATF2_P2_8FEI_Msk (0x100UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P2_8FEI (Bitfield-Mask: 0x01)

◆ GPIOINT_STATF2_P2_8FEI_Pos

#define GPIOINT_STATF2_P2_8FEI_Pos (8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P2_8FEI (Bit 8)

◆ GPIOINT_STATF2_P2_9FEI_Msk

#define GPIOINT_STATF2_P2_9FEI_Msk (0x200UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P2_9FEI (Bitfield-Mask: 0x01)

◆ GPIOINT_STATF2_P2_9FEI_Pos

#define GPIOINT_STATF2_P2_9FEI_Pos (9UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P2_9FEI (Bit 9)

◆ GPIOINT_STATR0_P0_0REI_Msk

#define GPIOINT_STATR0_P0_0REI_Msk (0x1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_0REI (Bitfield-Mask: 0x01)

◆ GPIOINT_STATR0_P0_0REI_Pos

#define GPIOINT_STATR0_P0_0REI_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_0REI (Bit 0)

◆ GPIOINT_STATR0_P0_10REI_Msk

#define GPIOINT_STATR0_P0_10REI_Msk (0x400UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_10REI (Bitfield-Mask: 0x01)

◆ GPIOINT_STATR0_P0_10REI_Pos

#define GPIOINT_STATR0_P0_10REI_Pos (10UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_10REI (Bit 10)

◆ GPIOINT_STATR0_P0_11REI_Msk

#define GPIOINT_STATR0_P0_11REI_Msk (0x800UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_11REI (Bitfield-Mask: 0x01)

◆ GPIOINT_STATR0_P0_11REI_Pos

#define GPIOINT_STATR0_P0_11REI_Pos (11UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_11REI (Bit 11)

◆ GPIOINT_STATR0_P0_12REI_Msk

#define GPIOINT_STATR0_P0_12REI_Msk (0x1000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_12REI (Bitfield-Mask: 0x01)

◆ GPIOINT_STATR0_P0_12REI_Pos

#define GPIOINT_STATR0_P0_12REI_Pos (12UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_12REI (Bit 12)

◆ GPIOINT_STATR0_P0_13REI_Msk

#define GPIOINT_STATR0_P0_13REI_Msk (0x2000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_13REI (Bitfield-Mask: 0x01)

◆ GPIOINT_STATR0_P0_13REI_Pos

#define GPIOINT_STATR0_P0_13REI_Pos (13UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_13REI (Bit 13)

◆ GPIOINT_STATR0_P0_14REI_Msk

#define GPIOINT_STATR0_P0_14REI_Msk (0x4000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_14REI (Bitfield-Mask: 0x01)

◆ GPIOINT_STATR0_P0_14REI_Pos

#define GPIOINT_STATR0_P0_14REI_Pos (14UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_14REI (Bit 14)

◆ GPIOINT_STATR0_P0_15REI_Msk

#define GPIOINT_STATR0_P0_15REI_Msk (0x8000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_15REI (Bitfield-Mask: 0x01)

◆ GPIOINT_STATR0_P0_15REI_Pos

#define GPIOINT_STATR0_P0_15REI_Pos (15UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_15REI (Bit 15)

◆ GPIOINT_STATR0_P0_16REI_Msk

#define GPIOINT_STATR0_P0_16REI_Msk (0x10000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_16REI (Bitfield-Mask: 0x01)

◆ GPIOINT_STATR0_P0_16REI_Pos

#define GPIOINT_STATR0_P0_16REI_Pos (16UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_16REI (Bit 16)

◆ GPIOINT_STATR0_P0_17REI_Msk

#define GPIOINT_STATR0_P0_17REI_Msk (0x20000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_17REI (Bitfield-Mask: 0x01)

◆ GPIOINT_STATR0_P0_17REI_Pos

#define GPIOINT_STATR0_P0_17REI_Pos (17UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_17REI (Bit 17)

◆ GPIOINT_STATR0_P0_18REI_Msk

#define GPIOINT_STATR0_P0_18REI_Msk (0x40000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_18REI (Bitfield-Mask: 0x01)

◆ GPIOINT_STATR0_P0_18REI_Pos

#define GPIOINT_STATR0_P0_18REI_Pos (18UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_18REI (Bit 18)

◆ GPIOINT_STATR0_P0_19REI_Msk

#define GPIOINT_STATR0_P0_19REI_Msk (0x80000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_19REI (Bitfield-Mask: 0x01)

◆ GPIOINT_STATR0_P0_19REI_Pos

#define GPIOINT_STATR0_P0_19REI_Pos (19UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_19REI (Bit 19)

◆ GPIOINT_STATR0_P0_1REI_Msk

#define GPIOINT_STATR0_P0_1REI_Msk (0x2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_1REI (Bitfield-Mask: 0x01)

◆ GPIOINT_STATR0_P0_1REI_Pos

#define GPIOINT_STATR0_P0_1REI_Pos (1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_1REI (Bit 1)

◆ GPIOINT_STATR0_P0_20REI_Msk

#define GPIOINT_STATR0_P0_20REI_Msk (0x100000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_20REI (Bitfield-Mask: 0x01)

◆ GPIOINT_STATR0_P0_20REI_Pos

#define GPIOINT_STATR0_P0_20REI_Pos (20UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_20REI (Bit 20)

◆ GPIOINT_STATR0_P0_21REI_Msk

#define GPIOINT_STATR0_P0_21REI_Msk (0x200000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_21REI (Bitfield-Mask: 0x01)

◆ GPIOINT_STATR0_P0_21REI_Pos

#define GPIOINT_STATR0_P0_21REI_Pos (21UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_21REI (Bit 21)

◆ GPIOINT_STATR0_P0_22REI_Msk

#define GPIOINT_STATR0_P0_22REI_Msk (0x400000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_22REI (Bitfield-Mask: 0x01)

◆ GPIOINT_STATR0_P0_22REI_Pos

#define GPIOINT_STATR0_P0_22REI_Pos (22UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_22REI (Bit 22)

◆ GPIOINT_STATR0_P0_23REI_Msk

#define GPIOINT_STATR0_P0_23REI_Msk (0x800000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_23REI (Bitfield-Mask: 0x01)

◆ GPIOINT_STATR0_P0_23REI_Pos

#define GPIOINT_STATR0_P0_23REI_Pos (23UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_23REI (Bit 23)

◆ GPIOINT_STATR0_P0_24REI_Msk

#define GPIOINT_STATR0_P0_24REI_Msk (0x1000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_24REI (Bitfield-Mask: 0x01)

◆ GPIOINT_STATR0_P0_24REI_Pos

#define GPIOINT_STATR0_P0_24REI_Pos (24UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_24REI (Bit 24)

◆ GPIOINT_STATR0_P0_25REI_Msk

#define GPIOINT_STATR0_P0_25REI_Msk (0x2000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_25REI (Bitfield-Mask: 0x01)

◆ GPIOINT_STATR0_P0_25REI_Pos

#define GPIOINT_STATR0_P0_25REI_Pos (25UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_25REI (Bit 25)

◆ GPIOINT_STATR0_P0_26REI_Msk

#define GPIOINT_STATR0_P0_26REI_Msk (0x4000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_26REI (Bitfield-Mask: 0x01)

◆ GPIOINT_STATR0_P0_26REI_Pos

#define GPIOINT_STATR0_P0_26REI_Pos (26UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_26REI (Bit 26)

◆ GPIOINT_STATR0_P0_27REI_Msk

#define GPIOINT_STATR0_P0_27REI_Msk (0x8000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_27REI (Bitfield-Mask: 0x01)

◆ GPIOINT_STATR0_P0_27REI_Pos

#define GPIOINT_STATR0_P0_27REI_Pos (27UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_27REI (Bit 27)

◆ GPIOINT_STATR0_P0_28REI_Msk

#define GPIOINT_STATR0_P0_28REI_Msk (0x10000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_28REI (Bitfield-Mask: 0x01)

◆ GPIOINT_STATR0_P0_28REI_Pos

#define GPIOINT_STATR0_P0_28REI_Pos (28UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_28REI (Bit 28)

◆ GPIOINT_STATR0_P0_29REI_Msk

#define GPIOINT_STATR0_P0_29REI_Msk (0x20000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_29REI (Bitfield-Mask: 0x01)

◆ GPIOINT_STATR0_P0_29REI_Pos

#define GPIOINT_STATR0_P0_29REI_Pos (29UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_29REI (Bit 29)

◆ GPIOINT_STATR0_P0_2REI_Msk

#define GPIOINT_STATR0_P0_2REI_Msk (0x4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_2REI (Bitfield-Mask: 0x01)

◆ GPIOINT_STATR0_P0_2REI_Pos

#define GPIOINT_STATR0_P0_2REI_Pos (2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_2REI (Bit 2)

◆ GPIOINT_STATR0_P0_30REI_Msk

#define GPIOINT_STATR0_P0_30REI_Msk (0x40000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_30REI (Bitfield-Mask: 0x01)

◆ GPIOINT_STATR0_P0_30REI_Pos

#define GPIOINT_STATR0_P0_30REI_Pos (30UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_30REI (Bit 30)

◆ GPIOINT_STATR0_P0_3REI_Msk

#define GPIOINT_STATR0_P0_3REI_Msk (0x8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_3REI (Bitfield-Mask: 0x01)

◆ GPIOINT_STATR0_P0_3REI_Pos

#define GPIOINT_STATR0_P0_3REI_Pos (3UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_3REI (Bit 3)

◆ GPIOINT_STATR0_P0_4REI_Msk

#define GPIOINT_STATR0_P0_4REI_Msk (0x10UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_4REI (Bitfield-Mask: 0x01)

◆ GPIOINT_STATR0_P0_4REI_Pos

#define GPIOINT_STATR0_P0_4REI_Pos (4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_4REI (Bit 4)

◆ GPIOINT_STATR0_P0_5REI_Msk

#define GPIOINT_STATR0_P0_5REI_Msk (0x20UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_5REI (Bitfield-Mask: 0x01)

◆ GPIOINT_STATR0_P0_5REI_Pos

#define GPIOINT_STATR0_P0_5REI_Pos (5UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_5REI (Bit 5)

◆ GPIOINT_STATR0_P0_6REI_Msk

#define GPIOINT_STATR0_P0_6REI_Msk (0x40UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_6REI (Bitfield-Mask: 0x01)

◆ GPIOINT_STATR0_P0_6REI_Pos

#define GPIOINT_STATR0_P0_6REI_Pos (6UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_6REI (Bit 6)

◆ GPIOINT_STATR0_P0_7REI_Msk

#define GPIOINT_STATR0_P0_7REI_Msk (0x80UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_7REI (Bitfield-Mask: 0x01)

◆ GPIOINT_STATR0_P0_7REI_Pos

#define GPIOINT_STATR0_P0_7REI_Pos (7UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_7REI (Bit 7)

◆ GPIOINT_STATR0_P0_8REI_Msk

#define GPIOINT_STATR0_P0_8REI_Msk (0x100UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_8REI (Bitfield-Mask: 0x01)

◆ GPIOINT_STATR0_P0_8REI_Pos

#define GPIOINT_STATR0_P0_8REI_Pos (8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_8REI (Bit 8)

◆ GPIOINT_STATR0_P0_9REI_Msk

#define GPIOINT_STATR0_P0_9REI_Msk (0x200UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_9REI (Bitfield-Mask: 0x01)

◆ GPIOINT_STATR0_P0_9REI_Pos

#define GPIOINT_STATR0_P0_9REI_Pos (9UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_9REI (Bit 9)

◆ GPIOINT_STATR2_P2_0REI_Msk

#define GPIOINT_STATR2_P2_0REI_Msk (0x1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P2_0REI (Bitfield-Mask: 0x01)

◆ GPIOINT_STATR2_P2_0REI_Pos

#define GPIOINT_STATR2_P2_0REI_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P2_0REI (Bit 0)

◆ GPIOINT_STATR2_P2_10REI_Msk

#define GPIOINT_STATR2_P2_10REI_Msk (0x400UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P2_10REI (Bitfield-Mask: 0x01)

◆ GPIOINT_STATR2_P2_10REI_Pos

#define GPIOINT_STATR2_P2_10REI_Pos (10UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P2_10REI (Bit 10)

◆ GPIOINT_STATR2_P2_11REI_Msk

#define GPIOINT_STATR2_P2_11REI_Msk (0x800UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P2_11REI (Bitfield-Mask: 0x01)

◆ GPIOINT_STATR2_P2_11REI_Pos

#define GPIOINT_STATR2_P2_11REI_Pos (11UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P2_11REI (Bit 11)

◆ GPIOINT_STATR2_P2_12REI_Msk

#define GPIOINT_STATR2_P2_12REI_Msk (0x1000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P2_12REI (Bitfield-Mask: 0x01)

◆ GPIOINT_STATR2_P2_12REI_Pos

#define GPIOINT_STATR2_P2_12REI_Pos (12UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P2_12REI (Bit 12)

◆ GPIOINT_STATR2_P2_13REI_Msk

#define GPIOINT_STATR2_P2_13REI_Msk (0x2000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P2_13REI (Bitfield-Mask: 0x01)

◆ GPIOINT_STATR2_P2_13REI_Pos

#define GPIOINT_STATR2_P2_13REI_Pos (13UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P2_13REI (Bit 13)

◆ GPIOINT_STATR2_P2_1REI_Msk

#define GPIOINT_STATR2_P2_1REI_Msk (0x2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P2_1REI (Bitfield-Mask: 0x01)

◆ GPIOINT_STATR2_P2_1REI_Pos

#define GPIOINT_STATR2_P2_1REI_Pos (1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P2_1REI (Bit 1)

◆ GPIOINT_STATR2_P2_2REI_Msk

#define GPIOINT_STATR2_P2_2REI_Msk (0x4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P2_2REI (Bitfield-Mask: 0x01)

◆ GPIOINT_STATR2_P2_2REI_Pos

#define GPIOINT_STATR2_P2_2REI_Pos (2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P2_2REI (Bit 2)

◆ GPIOINT_STATR2_P2_3REI_Msk

#define GPIOINT_STATR2_P2_3REI_Msk (0x8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P2_3REI (Bitfield-Mask: 0x01)

◆ GPIOINT_STATR2_P2_3REI_Pos

#define GPIOINT_STATR2_P2_3REI_Pos (3UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P2_3REI (Bit 3)

◆ GPIOINT_STATR2_P2_4REI_Msk

#define GPIOINT_STATR2_P2_4REI_Msk (0x10UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P2_4REI (Bitfield-Mask: 0x01)

◆ GPIOINT_STATR2_P2_4REI_Pos

#define GPIOINT_STATR2_P2_4REI_Pos (4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P2_4REI (Bit 4)

◆ GPIOINT_STATR2_P2_5REI_Msk

#define GPIOINT_STATR2_P2_5REI_Msk (0x20UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P2_5REI (Bitfield-Mask: 0x01)

◆ GPIOINT_STATR2_P2_5REI_Pos

#define GPIOINT_STATR2_P2_5REI_Pos (5UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P2_5REI (Bit 5)

◆ GPIOINT_STATR2_P2_6REI_Msk

#define GPIOINT_STATR2_P2_6REI_Msk (0x40UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P2_6REI (Bitfield-Mask: 0x01)

◆ GPIOINT_STATR2_P2_6REI_Pos

#define GPIOINT_STATR2_P2_6REI_Pos (6UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P2_6REI (Bit 6)

◆ GPIOINT_STATR2_P2_7REI_Msk

#define GPIOINT_STATR2_P2_7REI_Msk (0x80UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P2_7REI (Bitfield-Mask: 0x01)

◆ GPIOINT_STATR2_P2_7REI_Pos

#define GPIOINT_STATR2_P2_7REI_Pos (7UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P2_7REI (Bit 7)

◆ GPIOINT_STATR2_P2_8REI_Msk

#define GPIOINT_STATR2_P2_8REI_Msk (0x100UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P2_8REI (Bitfield-Mask: 0x01)

◆ GPIOINT_STATR2_P2_8REI_Pos

#define GPIOINT_STATR2_P2_8REI_Pos (8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P2_8REI (Bit 8)

◆ GPIOINT_STATR2_P2_9REI_Msk

#define GPIOINT_STATR2_P2_9REI_Msk (0x200UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P2_9REI (Bitfield-Mask: 0x01)

◆ GPIOINT_STATR2_P2_9REI_Pos

#define GPIOINT_STATR2_P2_9REI_Pos (9UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P2_9REI (Bit 9)

◆ GPIOINT_STATUS_P0INT_Msk

#define GPIOINT_STATUS_P0INT_Msk (0x1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0INT (Bitfield-Mask: 0x01)

◆ GPIOINT_STATUS_P0INT_Pos

#define GPIOINT_STATUS_P0INT_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0INT (Bit 0)

◆ GPIOINT_STATUS_P2INT_Msk

#define GPIOINT_STATUS_P2INT_Msk (0x4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P2INT (Bitfield-Mask: 0x01)

◆ GPIOINT_STATUS_P2INT_Pos

#define GPIOINT_STATUS_P2INT_Pos (2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P2INT (Bit 2)

◆ I2C0_ADR0_Address_Msk

#define I2C0_ADR0_Address_Msk (0xfeUL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

Address (Bitfield-Mask: 0x7f)

◆ I2C0_ADR0_Address_Pos

#define I2C0_ADR0_Address_Pos (1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

Address (Bit 1)

◆ I2C0_ADR0_GC_Msk

#define I2C0_ADR0_GC_Msk (0x1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

GC (Bitfield-Mask: 0x01)

◆ I2C0_ADR0_GC_Pos

#define I2C0_ADR0_GC_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

GC (Bit 0)

◆ I2C0_ADR1_Address_Msk

#define I2C0_ADR1_Address_Msk (0xfeUL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

Address (Bitfield-Mask: 0x7f)

◆ I2C0_ADR1_Address_Pos

#define I2C0_ADR1_Address_Pos (1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

Address (Bit 1)

◆ I2C0_ADR1_GC_Msk

#define I2C0_ADR1_GC_Msk (0x1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

GC (Bitfield-Mask: 0x01)

◆ I2C0_ADR1_GC_Pos

#define I2C0_ADR1_GC_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

GC (Bit 0)

◆ I2C0_ADR2_Address_Msk

#define I2C0_ADR2_Address_Msk (0xfeUL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

Address (Bitfield-Mask: 0x7f)

◆ I2C0_ADR2_Address_Pos

#define I2C0_ADR2_Address_Pos (1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

Address (Bit 1)

◆ I2C0_ADR2_GC_Msk

#define I2C0_ADR2_GC_Msk (0x1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

GC (Bitfield-Mask: 0x01)

◆ I2C0_ADR2_GC_Pos

#define I2C0_ADR2_GC_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

GC (Bit 0)

◆ I2C0_ADR3_Address_Msk

#define I2C0_ADR3_Address_Msk (0xfeUL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

Address (Bitfield-Mask: 0x7f)

◆ I2C0_ADR3_Address_Pos

#define I2C0_ADR3_Address_Pos (1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

Address (Bit 1)

◆ I2C0_ADR3_GC_Msk

#define I2C0_ADR3_GC_Msk (0x1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

GC (Bitfield-Mask: 0x01)

◆ I2C0_ADR3_GC_Pos

#define I2C0_ADR3_GC_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

GC (Bit 0)

◆ I2C0_CONCLR_AAC_Msk

#define I2C0_CONCLR_AAC_Msk (0x4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

AAC (Bitfield-Mask: 0x01)

◆ I2C0_CONCLR_AAC_Pos

#define I2C0_CONCLR_AAC_Pos (2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

AAC (Bit 2)

◆ I2C0_CONCLR_I2ENC_Msk

#define I2C0_CONCLR_I2ENC_Msk (0x40UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

I2ENC (Bitfield-Mask: 0x01)

◆ I2C0_CONCLR_I2ENC_Pos

#define I2C0_CONCLR_I2ENC_Pos (6UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

I2ENC (Bit 6)

◆ I2C0_CONCLR_SIC_Msk

#define I2C0_CONCLR_SIC_Msk (0x8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

SIC (Bitfield-Mask: 0x01)

◆ I2C0_CONCLR_SIC_Pos

#define I2C0_CONCLR_SIC_Pos (3UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

SIC (Bit 3)

◆ I2C0_CONCLR_STAC_Msk

#define I2C0_CONCLR_STAC_Msk (0x20UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

STAC (Bitfield-Mask: 0x01)

◆ I2C0_CONCLR_STAC_Pos

#define I2C0_CONCLR_STAC_Pos (5UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

STAC (Bit 5)

◆ I2C0_CONSET_AA_Msk

#define I2C0_CONSET_AA_Msk (0x4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

AA (Bitfield-Mask: 0x01)

◆ I2C0_CONSET_AA_Pos

#define I2C0_CONSET_AA_Pos (2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

AA (Bit 2)

◆ I2C0_CONSET_I2EN_Msk

#define I2C0_CONSET_I2EN_Msk (0x40UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

I2EN (Bitfield-Mask: 0x01)

◆ I2C0_CONSET_I2EN_Pos

#define I2C0_CONSET_I2EN_Pos (6UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

I2EN (Bit 6)

◆ I2C0_CONSET_SI_Msk

#define I2C0_CONSET_SI_Msk (0x8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

SI (Bitfield-Mask: 0x01)

◆ I2C0_CONSET_SI_Pos

#define I2C0_CONSET_SI_Pos (3UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

SI (Bit 3)

◆ I2C0_CONSET_STA_Msk

#define I2C0_CONSET_STA_Msk (0x20UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

STA (Bitfield-Mask: 0x01)

◆ I2C0_CONSET_STA_Pos

#define I2C0_CONSET_STA_Pos (5UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

STA (Bit 5)

◆ I2C0_CONSET_STO_Msk

#define I2C0_CONSET_STO_Msk (0x10UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

STO (Bitfield-Mask: 0x01)

◆ I2C0_CONSET_STO_Pos

#define I2C0_CONSET_STO_Pos (4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

STO (Bit 4)

◆ I2C0_DAT_Data_Msk

#define I2C0_DAT_Data_Msk (0xffUL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

Data (Bitfield-Mask: 0xff)

◆ I2C0_DAT_Data_Pos

#define I2C0_DAT_Data_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

Data (Bit 0)

◆ I2C0_DATA_BUFFER_Data_Msk

#define I2C0_DATA_BUFFER_Data_Msk (0xffUL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

Data (Bitfield-Mask: 0xff)

◆ I2C0_DATA_BUFFER_Data_Pos

#define I2C0_DATA_BUFFER_Data_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

Data (Bit 0)

◆ I2C0_MMCTRL_ENA_SCL_Msk

#define I2C0_MMCTRL_ENA_SCL_Msk (0x2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

ENA_SCL (Bitfield-Mask: 0x01)

◆ I2C0_MMCTRL_ENA_SCL_Pos

#define I2C0_MMCTRL_ENA_SCL_Pos (1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

ENA_SCL (Bit 1)

◆ I2C0_MMCTRL_MATCH_ALL_Msk

#define I2C0_MMCTRL_MATCH_ALL_Msk (0x4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

MATCH_ALL (Bitfield-Mask: 0x01)

◆ I2C0_MMCTRL_MATCH_ALL_Pos

#define I2C0_MMCTRL_MATCH_ALL_Pos (2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

MATCH_ALL (Bit 2)

◆ I2C0_MMCTRL_MM_ENA_Msk

#define I2C0_MMCTRL_MM_ENA_Msk (0x1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

MM_ENA (Bitfield-Mask: 0x01)

◆ I2C0_MMCTRL_MM_ENA_Pos

#define I2C0_MMCTRL_MM_ENA_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

MM_ENA (Bit 0)

◆ I2C0_SCLH_SCLH_Msk

#define I2C0_SCLH_SCLH_Msk (0xffffUL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

SCLH (Bitfield-Mask: 0xffff)

◆ I2C0_SCLH_SCLH_Pos

#define I2C0_SCLH_SCLH_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

SCLH (Bit 0)

◆ I2C0_SCLL_SCLL_Msk

#define I2C0_SCLL_SCLL_Msk (0xffffUL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

SCLL (Bitfield-Mask: 0xffff)

◆ I2C0_SCLL_SCLL_Pos

#define I2C0_SCLL_SCLL_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

SCLL (Bit 0)

◆ I2C0_STAT_Status_Msk

#define I2C0_STAT_Status_Msk (0xf8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

Status (Bitfield-Mask: 0x1f)

◆ I2C0_STAT_Status_Pos

#define I2C0_STAT_Status_Pos (3UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

Status (Bit 3)

◆ I2S_DAI_MONO_Msk

#define I2S_DAI_MONO_Msk (0x4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

MONO (Bitfield-Mask: 0x01)

◆ I2S_DAI_MONO_Pos

#define I2S_DAI_MONO_Pos (2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

MONO (Bit 2)

◆ I2S_DAI_RESET_Msk

#define I2S_DAI_RESET_Msk (0x10UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RESET (Bitfield-Mask: 0x01)

◆ I2S_DAI_RESET_Pos

#define I2S_DAI_RESET_Pos (4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RESET (Bit 4)

◆ I2S_DAI_STOP_Msk

#define I2S_DAI_STOP_Msk (0x8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

STOP (Bitfield-Mask: 0x01)

◆ I2S_DAI_STOP_Pos

#define I2S_DAI_STOP_Pos (3UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

STOP (Bit 3)

◆ I2S_DAI_WORDWIDTH_Msk

#define I2S_DAI_WORDWIDTH_Msk (0x3UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

WORDWIDTH (Bitfield-Mask: 0x03)

◆ I2S_DAI_WORDWIDTH_Pos

#define I2S_DAI_WORDWIDTH_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

WORDWIDTH (Bit 0)

◆ I2S_DAI_WS_HALFPERIOD_Msk

#define I2S_DAI_WS_HALFPERIOD_Msk (0x7fc0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

WS_HALFPERIOD (Bitfield-Mask: 0x1ff)

◆ I2S_DAI_WS_HALFPERIOD_Pos

#define I2S_DAI_WS_HALFPERIOD_Pos (6UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

WS_HALFPERIOD (Bit 6)

◆ I2S_DAI_WS_SEL_Msk

#define I2S_DAI_WS_SEL_Msk (0x20UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

WS_SEL (Bitfield-Mask: 0x01)

◆ I2S_DAI_WS_SEL_Pos

#define I2S_DAI_WS_SEL_Pos (5UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

WS_SEL (Bit 5)

◆ I2S_DAO_MONO_Msk

#define I2S_DAO_MONO_Msk (0x4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

MONO (Bitfield-Mask: 0x01)

◆ I2S_DAO_MONO_Pos

#define I2S_DAO_MONO_Pos (2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

MONO (Bit 2)

◆ I2S_DAO_MUTE_Msk

#define I2S_DAO_MUTE_Msk (0x8000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

MUTE (Bitfield-Mask: 0x01)

◆ I2S_DAO_MUTE_Pos

#define I2S_DAO_MUTE_Pos (15UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

MUTE (Bit 15)

◆ I2S_DAO_RESET_Msk

#define I2S_DAO_RESET_Msk (0x10UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RESET (Bitfield-Mask: 0x01)

◆ I2S_DAO_RESET_Pos

#define I2S_DAO_RESET_Pos (4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RESET (Bit 4)

◆ I2S_DAO_STOP_Msk

#define I2S_DAO_STOP_Msk (0x8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

STOP (Bitfield-Mask: 0x01)

◆ I2S_DAO_STOP_Pos

#define I2S_DAO_STOP_Pos (3UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

STOP (Bit 3)

◆ I2S_DAO_WORDWIDTH_Msk

#define I2S_DAO_WORDWIDTH_Msk (0x3UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

WORDWIDTH (Bitfield-Mask: 0x03)

◆ I2S_DAO_WORDWIDTH_Pos

#define I2S_DAO_WORDWIDTH_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

WORDWIDTH (Bit 0)

◆ I2S_DAO_WS_HALFPERIOD_Msk

#define I2S_DAO_WS_HALFPERIOD_Msk (0x7fc0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

WS_HALFPERIOD (Bitfield-Mask: 0x1ff)

◆ I2S_DAO_WS_HALFPERIOD_Pos

#define I2S_DAO_WS_HALFPERIOD_Pos (6UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

WS_HALFPERIOD (Bit 6)

◆ I2S_DAO_WS_SEL_Msk

#define I2S_DAO_WS_SEL_Msk (0x20UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

WS_SEL (Bitfield-Mask: 0x01)

◆ I2S_DAO_WS_SEL_Pos

#define I2S_DAO_WS_SEL_Pos (5UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

WS_SEL (Bit 5)

◆ I2S_DMA1_RX_DEPTH_DMA1_Msk

#define I2S_DMA1_RX_DEPTH_DMA1_Msk (0xf00UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RX_DEPTH_DMA1 (Bitfield-Mask: 0x0f)

◆ I2S_DMA1_RX_DEPTH_DMA1_Pos

#define I2S_DMA1_RX_DEPTH_DMA1_Pos (8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RX_DEPTH_DMA1 (Bit 8)

◆ I2S_DMA1_RX_DMA1_ENABLE_Msk

#define I2S_DMA1_RX_DMA1_ENABLE_Msk (0x1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RX_DMA1_ENABLE (Bitfield-Mask: 0x01)

◆ I2S_DMA1_RX_DMA1_ENABLE_Pos

#define I2S_DMA1_RX_DMA1_ENABLE_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RX_DMA1_ENABLE (Bit 0)

◆ I2S_DMA1_TX_DEPTH_DMA1_Msk

#define I2S_DMA1_TX_DEPTH_DMA1_Msk (0xf0000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TX_DEPTH_DMA1 (Bitfield-Mask: 0x0f)

◆ I2S_DMA1_TX_DEPTH_DMA1_Pos

#define I2S_DMA1_TX_DEPTH_DMA1_Pos (16UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TX_DEPTH_DMA1 (Bit 16)

◆ I2S_DMA1_TX_DMA1_ENABLE_Msk

#define I2S_DMA1_TX_DMA1_ENABLE_Msk (0x2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TX_DMA1_ENABLE (Bitfield-Mask: 0x01)

◆ I2S_DMA1_TX_DMA1_ENABLE_Pos

#define I2S_DMA1_TX_DMA1_ENABLE_Pos (1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TX_DMA1_ENABLE (Bit 1)

◆ I2S_DMA2_RX_DEPTH_DMA2_Msk

#define I2S_DMA2_RX_DEPTH_DMA2_Msk (0xf00UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RX_DEPTH_DMA2 (Bitfield-Mask: 0x0f)

◆ I2S_DMA2_RX_DEPTH_DMA2_Pos

#define I2S_DMA2_RX_DEPTH_DMA2_Pos (8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RX_DEPTH_DMA2 (Bit 8)

◆ I2S_DMA2_RX_DMA2_ENABLE_Msk

#define I2S_DMA2_RX_DMA2_ENABLE_Msk (0x1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RX_DMA2_ENABLE (Bitfield-Mask: 0x01)

◆ I2S_DMA2_RX_DMA2_ENABLE_Pos

#define I2S_DMA2_RX_DMA2_ENABLE_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RX_DMA2_ENABLE (Bit 0)

◆ I2S_DMA2_TX_DEPTH_DMA2_Msk

#define I2S_DMA2_TX_DEPTH_DMA2_Msk (0xf0000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TX_DEPTH_DMA2 (Bitfield-Mask: 0x0f)

◆ I2S_DMA2_TX_DEPTH_DMA2_Pos

#define I2S_DMA2_TX_DEPTH_DMA2_Pos (16UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TX_DEPTH_DMA2 (Bit 16)

◆ I2S_DMA2_TX_DMA2_ENABLE_Msk

#define I2S_DMA2_TX_DMA2_ENABLE_Msk (0x2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TX_DMA2_ENABLE (Bitfield-Mask: 0x01)

◆ I2S_DMA2_TX_DMA2_ENABLE_Pos

#define I2S_DMA2_TX_DMA2_ENABLE_Pos (1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TX_DMA2_ENABLE (Bit 1)

◆ I2S_IRQ_RX_DEPTH_IRQ_Msk

#define I2S_IRQ_RX_DEPTH_IRQ_Msk (0xf00UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RX_DEPTH_IRQ (Bitfield-Mask: 0x0f)

◆ I2S_IRQ_RX_DEPTH_IRQ_Pos

#define I2S_IRQ_RX_DEPTH_IRQ_Pos (8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RX_DEPTH_IRQ (Bit 8)

◆ I2S_IRQ_RX_IRQ_ENABLE_Msk

#define I2S_IRQ_RX_IRQ_ENABLE_Msk (0x1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RX_IRQ_ENABLE (Bitfield-Mask: 0x01)

◆ I2S_IRQ_RX_IRQ_ENABLE_Pos

#define I2S_IRQ_RX_IRQ_ENABLE_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RX_IRQ_ENABLE (Bit 0)

◆ I2S_IRQ_TX_DEPTH_IRQ_Msk

#define I2S_IRQ_TX_DEPTH_IRQ_Msk (0xf0000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TX_DEPTH_IRQ (Bitfield-Mask: 0x0f)

◆ I2S_IRQ_TX_DEPTH_IRQ_Pos

#define I2S_IRQ_TX_DEPTH_IRQ_Pos (16UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TX_DEPTH_IRQ (Bit 16)

◆ I2S_IRQ_TX_IRQ_ENABLE_Msk

#define I2S_IRQ_TX_IRQ_ENABLE_Msk (0x2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TX_IRQ_ENABLE (Bitfield-Mask: 0x01)

◆ I2S_IRQ_TX_IRQ_ENABLE_Pos

#define I2S_IRQ_TX_IRQ_ENABLE_Pos (1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TX_IRQ_ENABLE (Bit 1)

◆ I2S_RXBITRATE_RX_BITRATE_Msk

#define I2S_RXBITRATE_RX_BITRATE_Msk (0x3fUL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RX_BITRATE (Bitfield-Mask: 0x3f)

◆ I2S_RXBITRATE_RX_BITRATE_Pos

#define I2S_RXBITRATE_RX_BITRATE_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RX_BITRATE (Bit 0)

◆ I2S_RXFIFO_I2SRXFIFO_Msk

#define I2S_RXFIFO_I2SRXFIFO_Msk (0xffffffffUL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

I2SRXFIFO (Bitfield-Mask: 0xffffffff)

◆ I2S_RXFIFO_I2SRXFIFO_Pos

#define I2S_RXFIFO_I2SRXFIFO_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

I2SRXFIFO (Bit 0)

◆ I2S_RXMODE_RX4PIN_Msk

#define I2S_RXMODE_RX4PIN_Msk (0x4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RX4PIN (Bitfield-Mask: 0x01)

◆ I2S_RXMODE_RX4PIN_Pos

#define I2S_RXMODE_RX4PIN_Pos (2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RX4PIN (Bit 2)

◆ I2S_RXMODE_RXCLKSEL_Msk

#define I2S_RXMODE_RXCLKSEL_Msk (0x3UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RXCLKSEL (Bitfield-Mask: 0x03)

◆ I2S_RXMODE_RXCLKSEL_Pos

#define I2S_RXMODE_RXCLKSEL_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RXCLKSEL (Bit 0)

◆ I2S_RXMODE_RXMCENA_Msk

#define I2S_RXMODE_RXMCENA_Msk (0x8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RXMCENA (Bitfield-Mask: 0x01)

◆ I2S_RXMODE_RXMCENA_Pos

#define I2S_RXMODE_RXMCENA_Pos (3UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RXMCENA (Bit 3)

◆ I2S_RXRATE_X_DIVIDER_Msk

#define I2S_RXRATE_X_DIVIDER_Msk (0xff00UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

X_DIVIDER (Bitfield-Mask: 0xff)

◆ I2S_RXRATE_X_DIVIDER_Pos

#define I2S_RXRATE_X_DIVIDER_Pos (8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

X_DIVIDER (Bit 8)

◆ I2S_RXRATE_Y_DIVIDER_Msk

#define I2S_RXRATE_Y_DIVIDER_Msk (0xffUL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

Y_DIVIDER (Bitfield-Mask: 0xff)

◆ I2S_RXRATE_Y_DIVIDER_Pos

#define I2S_RXRATE_Y_DIVIDER_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

Y_DIVIDER (Bit 0)

◆ I2S_STATE_DMAREQ1_Msk

#define I2S_STATE_DMAREQ1_Msk (0x2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DMAREQ1 (Bitfield-Mask: 0x01)

◆ I2S_STATE_DMAREQ1_Pos

#define I2S_STATE_DMAREQ1_Pos (1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DMAREQ1 (Bit 1)

◆ I2S_STATE_DMAREQ2_Msk

#define I2S_STATE_DMAREQ2_Msk (0x4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DMAREQ2 (Bitfield-Mask: 0x01)

◆ I2S_STATE_DMAREQ2_Pos

#define I2S_STATE_DMAREQ2_Pos (2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DMAREQ2 (Bit 2)

◆ I2S_STATE_IRQ_Msk

#define I2S_STATE_IRQ_Msk (0x1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

IRQ (Bitfield-Mask: 0x01)

◆ I2S_STATE_IRQ_Pos

#define I2S_STATE_IRQ_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

IRQ (Bit 0)

◆ I2S_STATE_RX_LEVEL_Msk

#define I2S_STATE_RX_LEVEL_Msk (0xf00UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RX_LEVEL (Bitfield-Mask: 0x0f)

◆ I2S_STATE_RX_LEVEL_Pos

#define I2S_STATE_RX_LEVEL_Pos (8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RX_LEVEL (Bit 8)

◆ I2S_STATE_TX_LEVEL_Msk

#define I2S_STATE_TX_LEVEL_Msk (0xf0000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TX_LEVEL (Bitfield-Mask: 0x0f)

◆ I2S_STATE_TX_LEVEL_Pos

#define I2S_STATE_TX_LEVEL_Pos (16UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TX_LEVEL (Bit 16)

◆ I2S_TXBITRATE_TX_BITRATE_Msk

#define I2S_TXBITRATE_TX_BITRATE_Msk (0x3fUL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TX_BITRATE (Bitfield-Mask: 0x3f)

◆ I2S_TXBITRATE_TX_BITRATE_Pos

#define I2S_TXBITRATE_TX_BITRATE_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TX_BITRATE (Bit 0)

◆ I2S_TXFIFO_I2STXFIFO_Msk

#define I2S_TXFIFO_I2STXFIFO_Msk (0xffffffffUL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

I2STXFIFO (Bitfield-Mask: 0xffffffff)

◆ I2S_TXFIFO_I2STXFIFO_Pos

#define I2S_TXFIFO_I2STXFIFO_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

I2STXFIFO (Bit 0)

◆ I2S_TXMODE_TX4PIN_Msk

#define I2S_TXMODE_TX4PIN_Msk (0x4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TX4PIN (Bitfield-Mask: 0x01)

◆ I2S_TXMODE_TX4PIN_Pos

#define I2S_TXMODE_TX4PIN_Pos (2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TX4PIN (Bit 2)

◆ I2S_TXMODE_TXCLKSEL_Msk

#define I2S_TXMODE_TXCLKSEL_Msk (0x3UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TXCLKSEL (Bitfield-Mask: 0x03)

◆ I2S_TXMODE_TXCLKSEL_Pos

#define I2S_TXMODE_TXCLKSEL_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TXCLKSEL (Bit 0)

◆ I2S_TXMODE_TXMCENA_Msk

#define I2S_TXMODE_TXMCENA_Msk (0x8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TXMCENA (Bitfield-Mask: 0x01)

◆ I2S_TXMODE_TXMCENA_Pos

#define I2S_TXMODE_TXMCENA_Pos (3UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TXMCENA (Bit 3)

◆ I2S_TXRATE_X_DIVIDER_Msk

#define I2S_TXRATE_X_DIVIDER_Msk (0xff00UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

X_DIVIDER (Bitfield-Mask: 0xff)

◆ I2S_TXRATE_X_DIVIDER_Pos

#define I2S_TXRATE_X_DIVIDER_Pos (8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

X_DIVIDER (Bit 8)

◆ I2S_TXRATE_Y_DIVIDER_Msk

#define I2S_TXRATE_Y_DIVIDER_Msk (0xffUL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

Y_DIVIDER (Bitfield-Mask: 0xff)

◆ I2S_TXRATE_Y_DIVIDER_Pos

#define I2S_TXRATE_Y_DIVIDER_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

Y_DIVIDER (Bit 0)

◆ MCPWM_CAP_CLR_CAP_CLR0_Msk

#define MCPWM_CAP_CLR_CAP_CLR0_Msk (0x1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CAP_CLR0 (Bitfield-Mask: 0x01)

◆ MCPWM_CAP_CLR_CAP_CLR0_Pos

#define MCPWM_CAP_CLR_CAP_CLR0_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CAP_CLR0 (Bit 0)

◆ MCPWM_CAP_CLR_CAP_CLR1_Msk

#define MCPWM_CAP_CLR_CAP_CLR1_Msk (0x2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CAP_CLR1 (Bitfield-Mask: 0x01)

◆ MCPWM_CAP_CLR_CAP_CLR1_Pos

#define MCPWM_CAP_CLR_CAP_CLR1_Pos (1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CAP_CLR1 (Bit 1)

◆ MCPWM_CAP_CLR_CAP_CLR2_Msk

#define MCPWM_CAP_CLR_CAP_CLR2_Msk (0x4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CAP_CLR2 (Bitfield-Mask: 0x01)

◆ MCPWM_CAP_CLR_CAP_CLR2_Pos

#define MCPWM_CAP_CLR_CAP_CLR2_Pos (2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CAP_CLR2 (Bit 2)

◆ MCPWM_CAPCON_CAP0MCI0_FE_Msk

#define MCPWM_CAPCON_CAP0MCI0_FE_Msk (0x2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CAP0MCI0_FE (Bitfield-Mask: 0x01)

◆ MCPWM_CAPCON_CAP0MCI0_FE_Pos

#define MCPWM_CAPCON_CAP0MCI0_FE_Pos (1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CAP0MCI0_FE (Bit 1)

◆ MCPWM_CAPCON_CAP0MCI0_RE_Msk

#define MCPWM_CAPCON_CAP0MCI0_RE_Msk (0x1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CAP0MCI0_RE (Bitfield-Mask: 0x01)

◆ MCPWM_CAPCON_CAP0MCI0_RE_Pos

#define MCPWM_CAPCON_CAP0MCI0_RE_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CAP0MCI0_RE (Bit 0)

◆ MCPWM_CAPCON_CAP0MCI1_FE_Msk

#define MCPWM_CAPCON_CAP0MCI1_FE_Msk (0x8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CAP0MCI1_FE (Bitfield-Mask: 0x01)

◆ MCPWM_CAPCON_CAP0MCI1_FE_Pos

#define MCPWM_CAPCON_CAP0MCI1_FE_Pos (3UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CAP0MCI1_FE (Bit 3)

◆ MCPWM_CAPCON_CAP0MCI1_RE_Msk

#define MCPWM_CAPCON_CAP0MCI1_RE_Msk (0x4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CAP0MCI1_RE (Bitfield-Mask: 0x01)

◆ MCPWM_CAPCON_CAP0MCI1_RE_Pos

#define MCPWM_CAPCON_CAP0MCI1_RE_Pos (2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CAP0MCI1_RE (Bit 2)

◆ MCPWM_CAPCON_CAP0MCI2_FE_Msk

#define MCPWM_CAPCON_CAP0MCI2_FE_Msk (0x20UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CAP0MCI2_FE (Bitfield-Mask: 0x01)

◆ MCPWM_CAPCON_CAP0MCI2_FE_Pos

#define MCPWM_CAPCON_CAP0MCI2_FE_Pos (5UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CAP0MCI2_FE (Bit 5)

◆ MCPWM_CAPCON_CAP0MCI2_RE_Msk

#define MCPWM_CAPCON_CAP0MCI2_RE_Msk (0x10UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CAP0MCI2_RE (Bitfield-Mask: 0x01)

◆ MCPWM_CAPCON_CAP0MCI2_RE_Pos

#define MCPWM_CAPCON_CAP0MCI2_RE_Pos (4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CAP0MCI2_RE (Bit 4)

◆ MCPWM_CAPCON_CAP1MCI0_FE_Msk

#define MCPWM_CAPCON_CAP1MCI0_FE_Msk (0x80UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CAP1MCI0_FE (Bitfield-Mask: 0x01)

◆ MCPWM_CAPCON_CAP1MCI0_FE_Pos

#define MCPWM_CAPCON_CAP1MCI0_FE_Pos (7UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CAP1MCI0_FE (Bit 7)

◆ MCPWM_CAPCON_CAP1MCI0_RE_Msk

#define MCPWM_CAPCON_CAP1MCI0_RE_Msk (0x40UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CAP1MCI0_RE (Bitfield-Mask: 0x01)

◆ MCPWM_CAPCON_CAP1MCI0_RE_Pos

#define MCPWM_CAPCON_CAP1MCI0_RE_Pos (6UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CAP1MCI0_RE (Bit 6)

◆ MCPWM_CAPCON_CAP1MCI1_FE_Msk

#define MCPWM_CAPCON_CAP1MCI1_FE_Msk (0x200UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CAP1MCI1_FE (Bitfield-Mask: 0x01)

◆ MCPWM_CAPCON_CAP1MCI1_FE_Pos

#define MCPWM_CAPCON_CAP1MCI1_FE_Pos (9UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CAP1MCI1_FE (Bit 9)

◆ MCPWM_CAPCON_CAP1MCI1_RE_Msk

#define MCPWM_CAPCON_CAP1MCI1_RE_Msk (0x100UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CAP1MCI1_RE (Bitfield-Mask: 0x01)

◆ MCPWM_CAPCON_CAP1MCI1_RE_Pos

#define MCPWM_CAPCON_CAP1MCI1_RE_Pos (8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CAP1MCI1_RE (Bit 8)

◆ MCPWM_CAPCON_CAP1MCI2_FE_Msk

#define MCPWM_CAPCON_CAP1MCI2_FE_Msk (0x800UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CAP1MCI2_FE (Bitfield-Mask: 0x01)

◆ MCPWM_CAPCON_CAP1MCI2_FE_Pos

#define MCPWM_CAPCON_CAP1MCI2_FE_Pos (11UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CAP1MCI2_FE (Bit 11)

◆ MCPWM_CAPCON_CAP1MCI2_RE_Msk

#define MCPWM_CAPCON_CAP1MCI2_RE_Msk (0x400UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CAP1MCI2_RE (Bitfield-Mask: 0x01)

◆ MCPWM_CAPCON_CAP1MCI2_RE_Pos

#define MCPWM_CAPCON_CAP1MCI2_RE_Pos (10UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CAP1MCI2_RE (Bit 10)

◆ MCPWM_CAPCON_CAP2MCI0_FE_Msk

#define MCPWM_CAPCON_CAP2MCI0_FE_Msk (0x2000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CAP2MCI0_FE (Bitfield-Mask: 0x01)

◆ MCPWM_CAPCON_CAP2MCI0_FE_Pos

#define MCPWM_CAPCON_CAP2MCI0_FE_Pos (13UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CAP2MCI0_FE (Bit 13)

◆ MCPWM_CAPCON_CAP2MCI0_RE_Msk

#define MCPWM_CAPCON_CAP2MCI0_RE_Msk (0x1000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CAP2MCI0_RE (Bitfield-Mask: 0x01)

◆ MCPWM_CAPCON_CAP2MCI0_RE_Pos

#define MCPWM_CAPCON_CAP2MCI0_RE_Pos (12UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CAP2MCI0_RE (Bit 12)

◆ MCPWM_CAPCON_CAP2MCI1_FE_Msk

#define MCPWM_CAPCON_CAP2MCI1_FE_Msk (0x8000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CAP2MCI1_FE (Bitfield-Mask: 0x01)

◆ MCPWM_CAPCON_CAP2MCI1_FE_Pos

#define MCPWM_CAPCON_CAP2MCI1_FE_Pos (15UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CAP2MCI1_FE (Bit 15)

◆ MCPWM_CAPCON_CAP2MCI1_RE_Msk

#define MCPWM_CAPCON_CAP2MCI1_RE_Msk (0x4000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CAP2MCI1_RE (Bitfield-Mask: 0x01)

◆ MCPWM_CAPCON_CAP2MCI1_RE_Pos

#define MCPWM_CAPCON_CAP2MCI1_RE_Pos (14UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CAP2MCI1_RE (Bit 14)

◆ MCPWM_CAPCON_CAP2MCI2_FE_Msk

#define MCPWM_CAPCON_CAP2MCI2_FE_Msk (0x20000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CAP2MCI2_FE (Bitfield-Mask: 0x01)

◆ MCPWM_CAPCON_CAP2MCI2_FE_Pos

#define MCPWM_CAPCON_CAP2MCI2_FE_Pos (17UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CAP2MCI2_FE (Bit 17)

◆ MCPWM_CAPCON_CAP2MCI2_RE_Msk

#define MCPWM_CAPCON_CAP2MCI2_RE_Msk (0x10000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CAP2MCI2_RE (Bitfield-Mask: 0x01)

◆ MCPWM_CAPCON_CAP2MCI2_RE_Pos

#define MCPWM_CAPCON_CAP2MCI2_RE_Pos (16UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CAP2MCI2_RE (Bit 16)

◆ MCPWM_CAPCON_CLR_CAP0MCI0_FE_CLR_Msk

#define MCPWM_CAPCON_CLR_CAP0MCI0_FE_CLR_Msk (0x2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CAP0MCI0_FE_CLR (Bitfield-Mask: 0x01)

◆ MCPWM_CAPCON_CLR_CAP0MCI0_FE_CLR_Pos

#define MCPWM_CAPCON_CLR_CAP0MCI0_FE_CLR_Pos (1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CAP0MCI0_FE_CLR (Bit 1)

◆ MCPWM_CAPCON_CLR_CAP0MCI0_RE_CLR_Msk

#define MCPWM_CAPCON_CLR_CAP0MCI0_RE_CLR_Msk (0x1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CAP0MCI0_RE_CLR (Bitfield-Mask: 0x01)

◆ MCPWM_CAPCON_CLR_CAP0MCI0_RE_CLR_Pos

#define MCPWM_CAPCON_CLR_CAP0MCI0_RE_CLR_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CAP0MCI0_RE_CLR (Bit 0)

◆ MCPWM_CAPCON_CLR_CAP0MCI1_FE_CLR_Msk

#define MCPWM_CAPCON_CLR_CAP0MCI1_FE_CLR_Msk (0x8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CAP0MCI1_FE_CLR (Bitfield-Mask: 0x01)

◆ MCPWM_CAPCON_CLR_CAP0MCI1_FE_CLR_Pos

#define MCPWM_CAPCON_CLR_CAP0MCI1_FE_CLR_Pos (3UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CAP0MCI1_FE_CLR (Bit 3)

◆ MCPWM_CAPCON_CLR_CAP0MCI1_RE_CLR_Msk

#define MCPWM_CAPCON_CLR_CAP0MCI1_RE_CLR_Msk (0x4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CAP0MCI1_RE_CLR (Bitfield-Mask: 0x01)

◆ MCPWM_CAPCON_CLR_CAP0MCI1_RE_CLR_Pos

#define MCPWM_CAPCON_CLR_CAP0MCI1_RE_CLR_Pos (2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CAP0MCI1_RE_CLR (Bit 2)

◆ MCPWM_CAPCON_CLR_CAP0MCI2_FE_CLR_Msk

#define MCPWM_CAPCON_CLR_CAP0MCI2_FE_CLR_Msk (0x20UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CAP0MCI2_FE_CLR (Bitfield-Mask: 0x01)

◆ MCPWM_CAPCON_CLR_CAP0MCI2_FE_CLR_Pos

#define MCPWM_CAPCON_CLR_CAP0MCI2_FE_CLR_Pos (5UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CAP0MCI2_FE_CLR (Bit 5)

◆ MCPWM_CAPCON_CLR_CAP0MCI2_RE_CLR_Msk

#define MCPWM_CAPCON_CLR_CAP0MCI2_RE_CLR_Msk (0x10UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CAP0MCI2_RE_CLR (Bitfield-Mask: 0x01)

◆ MCPWM_CAPCON_CLR_CAP0MCI2_RE_CLR_Pos

#define MCPWM_CAPCON_CLR_CAP0MCI2_RE_CLR_Pos (4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CAP0MCI2_RE_CLR (Bit 4)

◆ MCPWM_CAPCON_CLR_CAP1MCI0_FE_CLR_Msk

#define MCPWM_CAPCON_CLR_CAP1MCI0_FE_CLR_Msk (0x80UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CAP1MCI0_FE_CLR (Bitfield-Mask: 0x01)

◆ MCPWM_CAPCON_CLR_CAP1MCI0_FE_CLR_Pos

#define MCPWM_CAPCON_CLR_CAP1MCI0_FE_CLR_Pos (7UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CAP1MCI0_FE_CLR (Bit 7)

◆ MCPWM_CAPCON_CLR_CAP1MCI0_RE_CLR_Msk

#define MCPWM_CAPCON_CLR_CAP1MCI0_RE_CLR_Msk (0x40UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CAP1MCI0_RE_CLR (Bitfield-Mask: 0x01)

◆ MCPWM_CAPCON_CLR_CAP1MCI0_RE_CLR_Pos

#define MCPWM_CAPCON_CLR_CAP1MCI0_RE_CLR_Pos (6UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CAP1MCI0_RE_CLR (Bit 6)

◆ MCPWM_CAPCON_CLR_CAP1MCI1_FE_CLR_Msk

#define MCPWM_CAPCON_CLR_CAP1MCI1_FE_CLR_Msk (0x200UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CAP1MCI1_FE_CLR (Bitfield-Mask: 0x01)

◆ MCPWM_CAPCON_CLR_CAP1MCI1_FE_CLR_Pos

#define MCPWM_CAPCON_CLR_CAP1MCI1_FE_CLR_Pos (9UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CAP1MCI1_FE_CLR (Bit 9)

◆ MCPWM_CAPCON_CLR_CAP1MCI1_RE_CLR_Msk

#define MCPWM_CAPCON_CLR_CAP1MCI1_RE_CLR_Msk (0x100UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CAP1MCI1_RE_CLR (Bitfield-Mask: 0x01)

◆ MCPWM_CAPCON_CLR_CAP1MCI1_RE_CLR_Pos

#define MCPWM_CAPCON_CLR_CAP1MCI1_RE_CLR_Pos (8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CAP1MCI1_RE_CLR (Bit 8)

◆ MCPWM_CAPCON_CLR_CAP1MCI2_FE_CLR_Msk

#define MCPWM_CAPCON_CLR_CAP1MCI2_FE_CLR_Msk (0x800UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CAP1MCI2_FE_CLR (Bitfield-Mask: 0x01)

◆ MCPWM_CAPCON_CLR_CAP1MCI2_FE_CLR_Pos

#define MCPWM_CAPCON_CLR_CAP1MCI2_FE_CLR_Pos (11UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CAP1MCI2_FE_CLR (Bit 11)

◆ MCPWM_CAPCON_CLR_CAP1MCI2_RE_CLR_Msk

#define MCPWM_CAPCON_CLR_CAP1MCI2_RE_CLR_Msk (0x400UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CAP1MCI2_RE_CLR (Bitfield-Mask: 0x01)

◆ MCPWM_CAPCON_CLR_CAP1MCI2_RE_CLR_Pos

#define MCPWM_CAPCON_CLR_CAP1MCI2_RE_CLR_Pos (10UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CAP1MCI2_RE_CLR (Bit 10)

◆ MCPWM_CAPCON_CLR_CAP2MCI0_FE_CLR_Msk

#define MCPWM_CAPCON_CLR_CAP2MCI0_FE_CLR_Msk (0x2000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CAP2MCI0_FE_CLR (Bitfield-Mask: 0x01)

◆ MCPWM_CAPCON_CLR_CAP2MCI0_FE_CLR_Pos

#define MCPWM_CAPCON_CLR_CAP2MCI0_FE_CLR_Pos (13UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CAP2MCI0_FE_CLR (Bit 13)

◆ MCPWM_CAPCON_CLR_CAP2MCI0_RE_CLR_Msk

#define MCPWM_CAPCON_CLR_CAP2MCI0_RE_CLR_Msk (0x1000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CAP2MCI0_RE_CLR (Bitfield-Mask: 0x01)

◆ MCPWM_CAPCON_CLR_CAP2MCI0_RE_CLR_Pos

#define MCPWM_CAPCON_CLR_CAP2MCI0_RE_CLR_Pos (12UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CAP2MCI0_RE_CLR (Bit 12)

◆ MCPWM_CAPCON_CLR_CAP2MCI1_FE_CLR_Msk

#define MCPWM_CAPCON_CLR_CAP2MCI1_FE_CLR_Msk (0x8000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CAP2MCI1_FE_CLR (Bitfield-Mask: 0x01)

◆ MCPWM_CAPCON_CLR_CAP2MCI1_FE_CLR_Pos

#define MCPWM_CAPCON_CLR_CAP2MCI1_FE_CLR_Pos (15UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CAP2MCI1_FE_CLR (Bit 15)

◆ MCPWM_CAPCON_CLR_CAP2MCI1_RE_CLR_Msk

#define MCPWM_CAPCON_CLR_CAP2MCI1_RE_CLR_Msk (0x4000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CAP2MCI1_RE_CLR (Bitfield-Mask: 0x01)

◆ MCPWM_CAPCON_CLR_CAP2MCI1_RE_CLR_Pos

#define MCPWM_CAPCON_CLR_CAP2MCI1_RE_CLR_Pos (14UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CAP2MCI1_RE_CLR (Bit 14)

◆ MCPWM_CAPCON_CLR_CAP2MCI2_FE_CLR_Msk

#define MCPWM_CAPCON_CLR_CAP2MCI2_FE_CLR_Msk (0x20000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CAP2MCI2_FE_CLR (Bitfield-Mask: 0x01)

◆ MCPWM_CAPCON_CLR_CAP2MCI2_FE_CLR_Pos

#define MCPWM_CAPCON_CLR_CAP2MCI2_FE_CLR_Pos (17UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CAP2MCI2_FE_CLR (Bit 17)

◆ MCPWM_CAPCON_CLR_CAP2MCI2_RE_CLR_Msk

#define MCPWM_CAPCON_CLR_CAP2MCI2_RE_CLR_Msk (0x10000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CAP2MCI2_RE_CLR (Bitfield-Mask: 0x01)

◆ MCPWM_CAPCON_CLR_CAP2MCI2_RE_CLR_Pos

#define MCPWM_CAPCON_CLR_CAP2MCI2_RE_CLR_Pos (16UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CAP2MCI2_RE_CLR (Bit 16)

◆ MCPWM_CAPCON_CLR_RT0_CLR_Msk

#define MCPWM_CAPCON_CLR_RT0_CLR_Msk (0x40000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RT0_CLR (Bitfield-Mask: 0x01)

◆ MCPWM_CAPCON_CLR_RT0_CLR_Pos

#define MCPWM_CAPCON_CLR_RT0_CLR_Pos (18UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RT0_CLR (Bit 18)

◆ MCPWM_CAPCON_CLR_RT1_CLR_Msk

#define MCPWM_CAPCON_CLR_RT1_CLR_Msk (0x80000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RT1_CLR (Bitfield-Mask: 0x01)

◆ MCPWM_CAPCON_CLR_RT1_CLR_Pos

#define MCPWM_CAPCON_CLR_RT1_CLR_Pos (19UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RT1_CLR (Bit 19)

◆ MCPWM_CAPCON_CLR_RT2_CLR_Msk

#define MCPWM_CAPCON_CLR_RT2_CLR_Msk (0x100000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RT2_CLR (Bitfield-Mask: 0x01)

◆ MCPWM_CAPCON_CLR_RT2_CLR_Pos

#define MCPWM_CAPCON_CLR_RT2_CLR_Pos (20UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RT2_CLR (Bit 20)

◆ MCPWM_CAPCON_RT0_Msk

#define MCPWM_CAPCON_RT0_Msk (0x40000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RT0 (Bitfield-Mask: 0x01)

◆ MCPWM_CAPCON_RT0_Pos

#define MCPWM_CAPCON_RT0_Pos (18UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RT0 (Bit 18)

◆ MCPWM_CAPCON_RT1_Msk

#define MCPWM_CAPCON_RT1_Msk (0x80000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RT1 (Bitfield-Mask: 0x01)

◆ MCPWM_CAPCON_RT1_Pos

#define MCPWM_CAPCON_RT1_Pos (19UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RT1 (Bit 19)

◆ MCPWM_CAPCON_RT2_Msk

#define MCPWM_CAPCON_RT2_Msk (0x100000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RT2 (Bitfield-Mask: 0x01)

◆ MCPWM_CAPCON_RT2_Pos

#define MCPWM_CAPCON_RT2_Pos (20UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RT2 (Bit 20)

◆ MCPWM_CAPCON_SET_CAP0MCI0_FE_SET_Msk

#define MCPWM_CAPCON_SET_CAP0MCI0_FE_SET_Msk (0x2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CAP0MCI0_FE_SET (Bitfield-Mask: 0x01)

◆ MCPWM_CAPCON_SET_CAP0MCI0_FE_SET_Pos

#define MCPWM_CAPCON_SET_CAP0MCI0_FE_SET_Pos (1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CAP0MCI0_FE_SET (Bit 1)

◆ MCPWM_CAPCON_SET_CAP0MCI0_RE_SET_Msk

#define MCPWM_CAPCON_SET_CAP0MCI0_RE_SET_Msk (0x1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CAP0MCI0_RE_SET (Bitfield-Mask: 0x01)

◆ MCPWM_CAPCON_SET_CAP0MCI0_RE_SET_Pos

#define MCPWM_CAPCON_SET_CAP0MCI0_RE_SET_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CAP0MCI0_RE_SET (Bit 0)

◆ MCPWM_CAPCON_SET_CAP0MCI1_FE_SET_Msk

#define MCPWM_CAPCON_SET_CAP0MCI1_FE_SET_Msk (0x8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CAP0MCI1_FE_SET (Bitfield-Mask: 0x01)

◆ MCPWM_CAPCON_SET_CAP0MCI1_FE_SET_Pos

#define MCPWM_CAPCON_SET_CAP0MCI1_FE_SET_Pos (3UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CAP0MCI1_FE_SET (Bit 3)

◆ MCPWM_CAPCON_SET_CAP0MCI1_RE_SET_Msk

#define MCPWM_CAPCON_SET_CAP0MCI1_RE_SET_Msk (0x4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CAP0MCI1_RE_SET (Bitfield-Mask: 0x01)

◆ MCPWM_CAPCON_SET_CAP0MCI1_RE_SET_Pos

#define MCPWM_CAPCON_SET_CAP0MCI1_RE_SET_Pos (2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CAP0MCI1_RE_SET (Bit 2)

◆ MCPWM_CAPCON_SET_CAP0MCI2_FE_SET_Msk

#define MCPWM_CAPCON_SET_CAP0MCI2_FE_SET_Msk (0x20UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CAP0MCI2_FE_SET (Bitfield-Mask: 0x01)

◆ MCPWM_CAPCON_SET_CAP0MCI2_FE_SET_Pos

#define MCPWM_CAPCON_SET_CAP0MCI2_FE_SET_Pos (5UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CAP0MCI2_FE_SET (Bit 5)

◆ MCPWM_CAPCON_SET_CAP0MCI2_RE_SET_Msk

#define MCPWM_CAPCON_SET_CAP0MCI2_RE_SET_Msk (0x10UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CAP0MCI2_RE_SET (Bitfield-Mask: 0x01)

◆ MCPWM_CAPCON_SET_CAP0MCI2_RE_SET_Pos

#define MCPWM_CAPCON_SET_CAP0MCI2_RE_SET_Pos (4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CAP0MCI2_RE_SET (Bit 4)

◆ MCPWM_CAPCON_SET_CAP1MCI0_FE_SET_Msk

#define MCPWM_CAPCON_SET_CAP1MCI0_FE_SET_Msk (0x80UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CAP1MCI0_FE_SET (Bitfield-Mask: 0x01)

◆ MCPWM_CAPCON_SET_CAP1MCI0_FE_SET_Pos

#define MCPWM_CAPCON_SET_CAP1MCI0_FE_SET_Pos (7UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CAP1MCI0_FE_SET (Bit 7)

◆ MCPWM_CAPCON_SET_CAP1MCI0_RE_SET_Msk

#define MCPWM_CAPCON_SET_CAP1MCI0_RE_SET_Msk (0x40UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CAP1MCI0_RE_SET (Bitfield-Mask: 0x01)

◆ MCPWM_CAPCON_SET_CAP1MCI0_RE_SET_Pos

#define MCPWM_CAPCON_SET_CAP1MCI0_RE_SET_Pos (6UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CAP1MCI0_RE_SET (Bit 6)

◆ MCPWM_CAPCON_SET_CAP1MCI1_FE_SET_Msk

#define MCPWM_CAPCON_SET_CAP1MCI1_FE_SET_Msk (0x200UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CAP1MCI1_FE_SET (Bitfield-Mask: 0x01)

◆ MCPWM_CAPCON_SET_CAP1MCI1_FE_SET_Pos

#define MCPWM_CAPCON_SET_CAP1MCI1_FE_SET_Pos (9UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CAP1MCI1_FE_SET (Bit 9)

◆ MCPWM_CAPCON_SET_CAP1MCI1_RE_SET_Msk

#define MCPWM_CAPCON_SET_CAP1MCI1_RE_SET_Msk (0x100UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CAP1MCI1_RE_SET (Bitfield-Mask: 0x01)

◆ MCPWM_CAPCON_SET_CAP1MCI1_RE_SET_Pos

#define MCPWM_CAPCON_SET_CAP1MCI1_RE_SET_Pos (8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CAP1MCI1_RE_SET (Bit 8)

◆ MCPWM_CAPCON_SET_CAP1MCI2_FE_SET_Msk

#define MCPWM_CAPCON_SET_CAP1MCI2_FE_SET_Msk (0x800UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CAP1MCI2_FE_SET (Bitfield-Mask: 0x01)

◆ MCPWM_CAPCON_SET_CAP1MCI2_FE_SET_Pos

#define MCPWM_CAPCON_SET_CAP1MCI2_FE_SET_Pos (11UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CAP1MCI2_FE_SET (Bit 11)

◆ MCPWM_CAPCON_SET_CAP1MCI2_RE_SET_Msk

#define MCPWM_CAPCON_SET_CAP1MCI2_RE_SET_Msk (0x400UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CAP1MCI2_RE_SET (Bitfield-Mask: 0x01)

◆ MCPWM_CAPCON_SET_CAP1MCI2_RE_SET_Pos

#define MCPWM_CAPCON_SET_CAP1MCI2_RE_SET_Pos (10UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CAP1MCI2_RE_SET (Bit 10)

◆ MCPWM_CAPCON_SET_CAP2MCI0_FE_SET_Msk

#define MCPWM_CAPCON_SET_CAP2MCI0_FE_SET_Msk (0x2000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CAP2MCI0_FE_SET (Bitfield-Mask: 0x01)

◆ MCPWM_CAPCON_SET_CAP2MCI0_FE_SET_Pos

#define MCPWM_CAPCON_SET_CAP2MCI0_FE_SET_Pos (13UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CAP2MCI0_FE_SET (Bit 13)

◆ MCPWM_CAPCON_SET_CAP2MCI0_RE_SET_Msk

#define MCPWM_CAPCON_SET_CAP2MCI0_RE_SET_Msk (0x1000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CAP2MCI0_RE_SET (Bitfield-Mask: 0x01)

◆ MCPWM_CAPCON_SET_CAP2MCI0_RE_SET_Pos

#define MCPWM_CAPCON_SET_CAP2MCI0_RE_SET_Pos (12UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CAP2MCI0_RE_SET (Bit 12)

◆ MCPWM_CAPCON_SET_CAP2MCI1_FE_SET_Msk

#define MCPWM_CAPCON_SET_CAP2MCI1_FE_SET_Msk (0x8000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CAP2MCI1_FE_SET (Bitfield-Mask: 0x01)

◆ MCPWM_CAPCON_SET_CAP2MCI1_FE_SET_Pos

#define MCPWM_CAPCON_SET_CAP2MCI1_FE_SET_Pos (15UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CAP2MCI1_FE_SET (Bit 15)

◆ MCPWM_CAPCON_SET_CAP2MCI1_RE_SET_Msk

#define MCPWM_CAPCON_SET_CAP2MCI1_RE_SET_Msk (0x4000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CAP2MCI1_RE_SET (Bitfield-Mask: 0x01)

◆ MCPWM_CAPCON_SET_CAP2MCI1_RE_SET_Pos

#define MCPWM_CAPCON_SET_CAP2MCI1_RE_SET_Pos (14UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CAP2MCI1_RE_SET (Bit 14)

◆ MCPWM_CAPCON_SET_CAP2MCI2_FE_SET_Msk

#define MCPWM_CAPCON_SET_CAP2MCI2_FE_SET_Msk (0x20000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CAP2MCI2_FE_SET (Bitfield-Mask: 0x01)

◆ MCPWM_CAPCON_SET_CAP2MCI2_FE_SET_Pos

#define MCPWM_CAPCON_SET_CAP2MCI2_FE_SET_Pos (17UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CAP2MCI2_FE_SET (Bit 17)

◆ MCPWM_CAPCON_SET_CAP2MCI2_RE_SET_Msk

#define MCPWM_CAPCON_SET_CAP2MCI2_RE_SET_Msk (0x10000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CAP2MCI2_RE_SET (Bitfield-Mask: 0x01)

◆ MCPWM_CAPCON_SET_CAP2MCI2_RE_SET_Pos

#define MCPWM_CAPCON_SET_CAP2MCI2_RE_SET_Pos (16UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CAP2MCI2_RE_SET (Bit 16)

◆ MCPWM_CAPCON_SET_RT0_SET_Msk

#define MCPWM_CAPCON_SET_RT0_SET_Msk (0x40000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RT0_SET (Bitfield-Mask: 0x01)

◆ MCPWM_CAPCON_SET_RT0_SET_Pos

#define MCPWM_CAPCON_SET_RT0_SET_Pos (18UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RT0_SET (Bit 18)

◆ MCPWM_CAPCON_SET_RT1_SET_Msk

#define MCPWM_CAPCON_SET_RT1_SET_Msk (0x80000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RT1_SET (Bitfield-Mask: 0x01)

◆ MCPWM_CAPCON_SET_RT1_SET_Pos

#define MCPWM_CAPCON_SET_RT1_SET_Pos (19UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RT1_SET (Bit 19)

◆ MCPWM_CAPCON_SET_RT2_SET_Msk

#define MCPWM_CAPCON_SET_RT2_SET_Msk (0x100000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RT2_SET (Bitfield-Mask: 0x01)

◆ MCPWM_CAPCON_SET_RT2_SET_Pos

#define MCPWM_CAPCON_SET_RT2_SET_Pos (20UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RT2_SET (Bit 20)

◆ MCPWM_CNTCON_CLR_CNTR0_CLR_Msk

#define MCPWM_CNTCON_CLR_CNTR0_CLR_Msk (0x20000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CNTR0_CLR (Bitfield-Mask: 0x01)

◆ MCPWM_CNTCON_CLR_CNTR0_CLR_Pos

#define MCPWM_CNTCON_CLR_CNTR0_CLR_Pos (29UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CNTR0_CLR (Bit 29)

◆ MCPWM_CNTCON_CLR_CNTR1_CLR_Msk

#define MCPWM_CNTCON_CLR_CNTR1_CLR_Msk (0x40000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CNTR1_CLR (Bitfield-Mask: 0x01)

◆ MCPWM_CNTCON_CLR_CNTR1_CLR_Pos

#define MCPWM_CNTCON_CLR_CNTR1_CLR_Pos (30UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CNTR1_CLR (Bit 30)

◆ MCPWM_CNTCON_CLR_CNTR2_CLR_Msk

#define MCPWM_CNTCON_CLR_CNTR2_CLR_Msk (0x80000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CNTR2_CLR (Bitfield-Mask: 0x01)

◆ MCPWM_CNTCON_CLR_CNTR2_CLR_Pos

#define MCPWM_CNTCON_CLR_CNTR2_CLR_Pos (31UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CNTR2_CLR (Bit 31)

◆ MCPWM_CNTCON_CLR_TC0MCI0_FE_CLR_Msk

#define MCPWM_CNTCON_CLR_TC0MCI0_FE_CLR_Msk (0x2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TC0MCI0_FE_CLR (Bitfield-Mask: 0x01)

◆ MCPWM_CNTCON_CLR_TC0MCI0_FE_CLR_Pos

#define MCPWM_CNTCON_CLR_TC0MCI0_FE_CLR_Pos (1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TC0MCI0_FE_CLR (Bit 1)

◆ MCPWM_CNTCON_CLR_TC0MCI0_RE_CLR_Msk

#define MCPWM_CNTCON_CLR_TC0MCI0_RE_CLR_Msk (0x1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TC0MCI0_RE_CLR (Bitfield-Mask: 0x01)

◆ MCPWM_CNTCON_CLR_TC0MCI0_RE_CLR_Pos

#define MCPWM_CNTCON_CLR_TC0MCI0_RE_CLR_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TC0MCI0_RE_CLR (Bit 0)

◆ MCPWM_CNTCON_CLR_TC0MCI1_FE_CLR_Msk

#define MCPWM_CNTCON_CLR_TC0MCI1_FE_CLR_Msk (0x8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TC0MCI1_FE_CLR (Bitfield-Mask: 0x01)

◆ MCPWM_CNTCON_CLR_TC0MCI1_FE_CLR_Pos

#define MCPWM_CNTCON_CLR_TC0MCI1_FE_CLR_Pos (3UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TC0MCI1_FE_CLR (Bit 3)

◆ MCPWM_CNTCON_CLR_TC0MCI1_RE_CLR_Msk

#define MCPWM_CNTCON_CLR_TC0MCI1_RE_CLR_Msk (0x4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TC0MCI1_RE_CLR (Bitfield-Mask: 0x01)

◆ MCPWM_CNTCON_CLR_TC0MCI1_RE_CLR_Pos

#define MCPWM_CNTCON_CLR_TC0MCI1_RE_CLR_Pos (2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TC0MCI1_RE_CLR (Bit 2)

◆ MCPWM_CNTCON_CLR_TC0MCI2_FE_CLR_Msk

#define MCPWM_CNTCON_CLR_TC0MCI2_FE_CLR_Msk (0x20UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TC0MCI2_FE_CLR (Bitfield-Mask: 0x01)

◆ MCPWM_CNTCON_CLR_TC0MCI2_FE_CLR_Pos

#define MCPWM_CNTCON_CLR_TC0MCI2_FE_CLR_Pos (5UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TC0MCI2_FE_CLR (Bit 5)

◆ MCPWM_CNTCON_CLR_TC0MCI2_RE_Msk

#define MCPWM_CNTCON_CLR_TC0MCI2_RE_Msk (0x10UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TC0MCI2_RE (Bitfield-Mask: 0x01)

◆ MCPWM_CNTCON_CLR_TC0MCI2_RE_Pos

#define MCPWM_CNTCON_CLR_TC0MCI2_RE_Pos (4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TC0MCI2_RE (Bit 4)

◆ MCPWM_CNTCON_CLR_TC1MCI0_FE_CLR_Msk

#define MCPWM_CNTCON_CLR_TC1MCI0_FE_CLR_Msk (0x80UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TC1MCI0_FE_CLR (Bitfield-Mask: 0x01)

◆ MCPWM_CNTCON_CLR_TC1MCI0_FE_CLR_Pos

#define MCPWM_CNTCON_CLR_TC1MCI0_FE_CLR_Pos (7UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TC1MCI0_FE_CLR (Bit 7)

◆ MCPWM_CNTCON_CLR_TC1MCI0_RE_CLR_Msk

#define MCPWM_CNTCON_CLR_TC1MCI0_RE_CLR_Msk (0x40UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TC1MCI0_RE_CLR (Bitfield-Mask: 0x01)

◆ MCPWM_CNTCON_CLR_TC1MCI0_RE_CLR_Pos

#define MCPWM_CNTCON_CLR_TC1MCI0_RE_CLR_Pos (6UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TC1MCI0_RE_CLR (Bit 6)

◆ MCPWM_CNTCON_CLR_TC1MCI1_FE_CLR_Msk

#define MCPWM_CNTCON_CLR_TC1MCI1_FE_CLR_Msk (0x200UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TC1MCI1_FE_CLR (Bitfield-Mask: 0x01)

◆ MCPWM_CNTCON_CLR_TC1MCI1_FE_CLR_Pos

#define MCPWM_CNTCON_CLR_TC1MCI1_FE_CLR_Pos (9UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TC1MCI1_FE_CLR (Bit 9)

◆ MCPWM_CNTCON_CLR_TC1MCI1_RE_CLR_Msk

#define MCPWM_CNTCON_CLR_TC1MCI1_RE_CLR_Msk (0x100UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TC1MCI1_RE_CLR (Bitfield-Mask: 0x01)

◆ MCPWM_CNTCON_CLR_TC1MCI1_RE_CLR_Pos

#define MCPWM_CNTCON_CLR_TC1MCI1_RE_CLR_Pos (8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TC1MCI1_RE_CLR (Bit 8)

◆ MCPWM_CNTCON_CLR_TC1MCI2_FE_CLR_Msk

#define MCPWM_CNTCON_CLR_TC1MCI2_FE_CLR_Msk (0x800UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TC1MCI2_FE_CLR (Bitfield-Mask: 0x01)

◆ MCPWM_CNTCON_CLR_TC1MCI2_FE_CLR_Pos

#define MCPWM_CNTCON_CLR_TC1MCI2_FE_CLR_Pos (11UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TC1MCI2_FE_CLR (Bit 11)

◆ MCPWM_CNTCON_CLR_TC1MCI2_RE_CLR_Msk

#define MCPWM_CNTCON_CLR_TC1MCI2_RE_CLR_Msk (0x400UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TC1MCI2_RE_CLR (Bitfield-Mask: 0x01)

◆ MCPWM_CNTCON_CLR_TC1MCI2_RE_CLR_Pos

#define MCPWM_CNTCON_CLR_TC1MCI2_RE_CLR_Pos (10UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TC1MCI2_RE_CLR (Bit 10)

◆ MCPWM_CNTCON_CLR_TC2MCI0_FE_CLR_Msk

#define MCPWM_CNTCON_CLR_TC2MCI0_FE_CLR_Msk (0x2000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TC2MCI0_FE_CLR (Bitfield-Mask: 0x01)

◆ MCPWM_CNTCON_CLR_TC2MCI0_FE_CLR_Pos

#define MCPWM_CNTCON_CLR_TC2MCI0_FE_CLR_Pos (13UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TC2MCI0_FE_CLR (Bit 13)

◆ MCPWM_CNTCON_CLR_TC2MCI0_RE_CLR_Msk

#define MCPWM_CNTCON_CLR_TC2MCI0_RE_CLR_Msk (0x1000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TC2MCI0_RE_CLR (Bitfield-Mask: 0x01)

◆ MCPWM_CNTCON_CLR_TC2MCI0_RE_CLR_Pos

#define MCPWM_CNTCON_CLR_TC2MCI0_RE_CLR_Pos (12UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TC2MCI0_RE_CLR (Bit 12)

◆ MCPWM_CNTCON_CLR_TC2MCI1_FE_CLR_Msk

#define MCPWM_CNTCON_CLR_TC2MCI1_FE_CLR_Msk (0x8000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TC2MCI1_FE_CLR (Bitfield-Mask: 0x01)

◆ MCPWM_CNTCON_CLR_TC2MCI1_FE_CLR_Pos

#define MCPWM_CNTCON_CLR_TC2MCI1_FE_CLR_Pos (15UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TC2MCI1_FE_CLR (Bit 15)

◆ MCPWM_CNTCON_CLR_TC2MCI1_RE_CLR_Msk

#define MCPWM_CNTCON_CLR_TC2MCI1_RE_CLR_Msk (0x4000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TC2MCI1_RE_CLR (Bitfield-Mask: 0x01)

◆ MCPWM_CNTCON_CLR_TC2MCI1_RE_CLR_Pos

#define MCPWM_CNTCON_CLR_TC2MCI1_RE_CLR_Pos (14UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TC2MCI1_RE_CLR (Bit 14)

◆ MCPWM_CNTCON_CLR_TC2MCI2_FE_CLR_Msk

#define MCPWM_CNTCON_CLR_TC2MCI2_FE_CLR_Msk (0x20000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TC2MCI2_FE_CLR (Bitfield-Mask: 0x01)

◆ MCPWM_CNTCON_CLR_TC2MCI2_FE_CLR_Pos

#define MCPWM_CNTCON_CLR_TC2MCI2_FE_CLR_Pos (17UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TC2MCI2_FE_CLR (Bit 17)

◆ MCPWM_CNTCON_CLR_TC2MCI2_RE_CLR_Msk

#define MCPWM_CNTCON_CLR_TC2MCI2_RE_CLR_Msk (0x10000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TC2MCI2_RE_CLR (Bitfield-Mask: 0x01)

◆ MCPWM_CNTCON_CLR_TC2MCI2_RE_CLR_Pos

#define MCPWM_CNTCON_CLR_TC2MCI2_RE_CLR_Pos (16UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TC2MCI2_RE_CLR (Bit 16)

◆ MCPWM_CNTCON_CNTR0_Msk

#define MCPWM_CNTCON_CNTR0_Msk (0x20000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CNTR0 (Bitfield-Mask: 0x01)

◆ MCPWM_CNTCON_CNTR0_Pos

#define MCPWM_CNTCON_CNTR0_Pos (29UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CNTR0 (Bit 29)

◆ MCPWM_CNTCON_CNTR1_Msk

#define MCPWM_CNTCON_CNTR1_Msk (0x40000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CNTR1 (Bitfield-Mask: 0x01)

◆ MCPWM_CNTCON_CNTR1_Pos

#define MCPWM_CNTCON_CNTR1_Pos (30UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CNTR1 (Bit 30)

◆ MCPWM_CNTCON_CNTR2_Msk

#define MCPWM_CNTCON_CNTR2_Msk (0x80000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CNTR2 (Bitfield-Mask: 0x01)

◆ MCPWM_CNTCON_CNTR2_Pos

#define MCPWM_CNTCON_CNTR2_Pos (31UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CNTR2 (Bit 31)

◆ MCPWM_CNTCON_SET_CNTR0_SET_Msk

#define MCPWM_CNTCON_SET_CNTR0_SET_Msk (0x20000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CNTR0_SET (Bitfield-Mask: 0x01)

◆ MCPWM_CNTCON_SET_CNTR0_SET_Pos

#define MCPWM_CNTCON_SET_CNTR0_SET_Pos (29UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CNTR0_SET (Bit 29)

◆ MCPWM_CNTCON_SET_CNTR1_SET_Msk

#define MCPWM_CNTCON_SET_CNTR1_SET_Msk (0x40000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CNTR1_SET (Bitfield-Mask: 0x01)

◆ MCPWM_CNTCON_SET_CNTR1_SET_Pos

#define MCPWM_CNTCON_SET_CNTR1_SET_Pos (30UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CNTR1_SET (Bit 30)

◆ MCPWM_CNTCON_SET_CNTR2_SET_Msk

#define MCPWM_CNTCON_SET_CNTR2_SET_Msk (0x80000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CNTR2_SET (Bitfield-Mask: 0x01)

◆ MCPWM_CNTCON_SET_CNTR2_SET_Pos

#define MCPWM_CNTCON_SET_CNTR2_SET_Pos (31UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CNTR2_SET (Bit 31)

◆ MCPWM_CNTCON_SET_TC0MCI0_FE_SET_Msk

#define MCPWM_CNTCON_SET_TC0MCI0_FE_SET_Msk (0x2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TC0MCI0_FE_SET (Bitfield-Mask: 0x01)

◆ MCPWM_CNTCON_SET_TC0MCI0_FE_SET_Pos

#define MCPWM_CNTCON_SET_TC0MCI0_FE_SET_Pos (1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TC0MCI0_FE_SET (Bit 1)

◆ MCPWM_CNTCON_SET_TC0MCI0_RE_SET_Msk

#define MCPWM_CNTCON_SET_TC0MCI0_RE_SET_Msk (0x1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TC0MCI0_RE_SET (Bitfield-Mask: 0x01)

◆ MCPWM_CNTCON_SET_TC0MCI0_RE_SET_Pos

#define MCPWM_CNTCON_SET_TC0MCI0_RE_SET_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TC0MCI0_RE_SET (Bit 0)

◆ MCPWM_CNTCON_SET_TC0MCI1_FE_SET_Msk

#define MCPWM_CNTCON_SET_TC0MCI1_FE_SET_Msk (0x8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TC0MCI1_FE_SET (Bitfield-Mask: 0x01)

◆ MCPWM_CNTCON_SET_TC0MCI1_FE_SET_Pos

#define MCPWM_CNTCON_SET_TC0MCI1_FE_SET_Pos (3UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TC0MCI1_FE_SET (Bit 3)

◆ MCPWM_CNTCON_SET_TC0MCI1_RE_SET_Msk

#define MCPWM_CNTCON_SET_TC0MCI1_RE_SET_Msk (0x4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TC0MCI1_RE_SET (Bitfield-Mask: 0x01)

◆ MCPWM_CNTCON_SET_TC0MCI1_RE_SET_Pos

#define MCPWM_CNTCON_SET_TC0MCI1_RE_SET_Pos (2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TC0MCI1_RE_SET (Bit 2)

◆ MCPWM_CNTCON_SET_TC0MCI2_FE_SET_Msk

#define MCPWM_CNTCON_SET_TC0MCI2_FE_SET_Msk (0x20UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TC0MCI2_FE_SET (Bitfield-Mask: 0x01)

◆ MCPWM_CNTCON_SET_TC0MCI2_FE_SET_Pos

#define MCPWM_CNTCON_SET_TC0MCI2_FE_SET_Pos (5UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TC0MCI2_FE_SET (Bit 5)

◆ MCPWM_CNTCON_SET_TC0MCI2_RE_SET_Msk

#define MCPWM_CNTCON_SET_TC0MCI2_RE_SET_Msk (0x10UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TC0MCI2_RE_SET (Bitfield-Mask: 0x01)

◆ MCPWM_CNTCON_SET_TC0MCI2_RE_SET_Pos

#define MCPWM_CNTCON_SET_TC0MCI2_RE_SET_Pos (4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TC0MCI2_RE_SET (Bit 4)

◆ MCPWM_CNTCON_SET_TC1MCI0_FE_SET_Msk

#define MCPWM_CNTCON_SET_TC1MCI0_FE_SET_Msk (0x80UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TC1MCI0_FE_SET (Bitfield-Mask: 0x01)

◆ MCPWM_CNTCON_SET_TC1MCI0_FE_SET_Pos

#define MCPWM_CNTCON_SET_TC1MCI0_FE_SET_Pos (7UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TC1MCI0_FE_SET (Bit 7)

◆ MCPWM_CNTCON_SET_TC1MCI0_RE_SET_Msk

#define MCPWM_CNTCON_SET_TC1MCI0_RE_SET_Msk (0x40UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TC1MCI0_RE_SET (Bitfield-Mask: 0x01)

◆ MCPWM_CNTCON_SET_TC1MCI0_RE_SET_Pos

#define MCPWM_CNTCON_SET_TC1MCI0_RE_SET_Pos (6UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TC1MCI0_RE_SET (Bit 6)

◆ MCPWM_CNTCON_SET_TC1MCI1_FE_SET_Msk

#define MCPWM_CNTCON_SET_TC1MCI1_FE_SET_Msk (0x200UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TC1MCI1_FE_SET (Bitfield-Mask: 0x01)

◆ MCPWM_CNTCON_SET_TC1MCI1_FE_SET_Pos

#define MCPWM_CNTCON_SET_TC1MCI1_FE_SET_Pos (9UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TC1MCI1_FE_SET (Bit 9)

◆ MCPWM_CNTCON_SET_TC1MCI1_RE_SET_Msk

#define MCPWM_CNTCON_SET_TC1MCI1_RE_SET_Msk (0x100UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TC1MCI1_RE_SET (Bitfield-Mask: 0x01)

◆ MCPWM_CNTCON_SET_TC1MCI1_RE_SET_Pos

#define MCPWM_CNTCON_SET_TC1MCI1_RE_SET_Pos (8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TC1MCI1_RE_SET (Bit 8)

◆ MCPWM_CNTCON_SET_TC1MCI2_FE_SET_Msk

#define MCPWM_CNTCON_SET_TC1MCI2_FE_SET_Msk (0x800UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TC1MCI2_FE_SET (Bitfield-Mask: 0x01)

◆ MCPWM_CNTCON_SET_TC1MCI2_FE_SET_Pos

#define MCPWM_CNTCON_SET_TC1MCI2_FE_SET_Pos (11UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TC1MCI2_FE_SET (Bit 11)

◆ MCPWM_CNTCON_SET_TC1MCI2_RE_SET_Msk

#define MCPWM_CNTCON_SET_TC1MCI2_RE_SET_Msk (0x400UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TC1MCI2_RE_SET (Bitfield-Mask: 0x01)

◆ MCPWM_CNTCON_SET_TC1MCI2_RE_SET_Pos

#define MCPWM_CNTCON_SET_TC1MCI2_RE_SET_Pos (10UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TC1MCI2_RE_SET (Bit 10)

◆ MCPWM_CNTCON_SET_TC2MCI0_FE_SET_Msk

#define MCPWM_CNTCON_SET_TC2MCI0_FE_SET_Msk (0x2000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TC2MCI0_FE_SET (Bitfield-Mask: 0x01)

◆ MCPWM_CNTCON_SET_TC2MCI0_FE_SET_Pos

#define MCPWM_CNTCON_SET_TC2MCI0_FE_SET_Pos (13UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TC2MCI0_FE_SET (Bit 13)

◆ MCPWM_CNTCON_SET_TC2MCI0_RE_SET_Msk

#define MCPWM_CNTCON_SET_TC2MCI0_RE_SET_Msk (0x1000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TC2MCI0_RE_SET (Bitfield-Mask: 0x01)

◆ MCPWM_CNTCON_SET_TC2MCI0_RE_SET_Pos

#define MCPWM_CNTCON_SET_TC2MCI0_RE_SET_Pos (12UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TC2MCI0_RE_SET (Bit 12)

◆ MCPWM_CNTCON_SET_TC2MCI1_FE_SET_Msk

#define MCPWM_CNTCON_SET_TC2MCI1_FE_SET_Msk (0x8000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TC2MCI1_FE_SET (Bitfield-Mask: 0x01)

◆ MCPWM_CNTCON_SET_TC2MCI1_FE_SET_Pos

#define MCPWM_CNTCON_SET_TC2MCI1_FE_SET_Pos (15UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TC2MCI1_FE_SET (Bit 15)

◆ MCPWM_CNTCON_SET_TC2MCI1_RE_SET_Msk

#define MCPWM_CNTCON_SET_TC2MCI1_RE_SET_Msk (0x4000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TC2MCI1_RE_SET (Bitfield-Mask: 0x01)

◆ MCPWM_CNTCON_SET_TC2MCI1_RE_SET_Pos

#define MCPWM_CNTCON_SET_TC2MCI1_RE_SET_Pos (14UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TC2MCI1_RE_SET (Bit 14)

◆ MCPWM_CNTCON_SET_TC2MCI2_FE_SET_Msk

#define MCPWM_CNTCON_SET_TC2MCI2_FE_SET_Msk (0x20000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TC2MCI2_FE_SET (Bitfield-Mask: 0x01)

◆ MCPWM_CNTCON_SET_TC2MCI2_FE_SET_Pos

#define MCPWM_CNTCON_SET_TC2MCI2_FE_SET_Pos (17UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TC2MCI2_FE_SET (Bit 17)

◆ MCPWM_CNTCON_SET_TC2MCI2_RE_SET_Msk

#define MCPWM_CNTCON_SET_TC2MCI2_RE_SET_Msk (0x10000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TC2MCI2_RE_SET (Bitfield-Mask: 0x01)

◆ MCPWM_CNTCON_SET_TC2MCI2_RE_SET_Pos

#define MCPWM_CNTCON_SET_TC2MCI2_RE_SET_Pos (16UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TC2MCI2_RE_SET (Bit 16)

◆ MCPWM_CNTCON_TC0MCI0_FE_Msk

#define MCPWM_CNTCON_TC0MCI0_FE_Msk (0x2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TC0MCI0_FE (Bitfield-Mask: 0x01)

◆ MCPWM_CNTCON_TC0MCI0_FE_Pos

#define MCPWM_CNTCON_TC0MCI0_FE_Pos (1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TC0MCI0_FE (Bit 1)

◆ MCPWM_CNTCON_TC0MCI0_RE_Msk

#define MCPWM_CNTCON_TC0MCI0_RE_Msk (0x1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TC0MCI0_RE (Bitfield-Mask: 0x01)

◆ MCPWM_CNTCON_TC0MCI0_RE_Pos

#define MCPWM_CNTCON_TC0MCI0_RE_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TC0MCI0_RE (Bit 0)

◆ MCPWM_CNTCON_TC0MCI1_FE_Msk

#define MCPWM_CNTCON_TC0MCI1_FE_Msk (0x8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TC0MCI1_FE (Bitfield-Mask: 0x01)

◆ MCPWM_CNTCON_TC0MCI1_FE_Pos

#define MCPWM_CNTCON_TC0MCI1_FE_Pos (3UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TC0MCI1_FE (Bit 3)

◆ MCPWM_CNTCON_TC0MCI1_RE_Msk

#define MCPWM_CNTCON_TC0MCI1_RE_Msk (0x4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TC0MCI1_RE (Bitfield-Mask: 0x01)

◆ MCPWM_CNTCON_TC0MCI1_RE_Pos

#define MCPWM_CNTCON_TC0MCI1_RE_Pos (2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TC0MCI1_RE (Bit 2)

◆ MCPWM_CNTCON_TC0MCI2_FE_Msk

#define MCPWM_CNTCON_TC0MCI2_FE_Msk (0x20UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TC0MCI2_FE (Bitfield-Mask: 0x01)

◆ MCPWM_CNTCON_TC0MCI2_FE_Pos

#define MCPWM_CNTCON_TC0MCI2_FE_Pos (5UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TC0MCI2_FE (Bit 5)

◆ MCPWM_CNTCON_TC0MCI2_RE_Msk

#define MCPWM_CNTCON_TC0MCI2_RE_Msk (0x10UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TC0MCI2_RE (Bitfield-Mask: 0x01)

◆ MCPWM_CNTCON_TC0MCI2_RE_Pos

#define MCPWM_CNTCON_TC0MCI2_RE_Pos (4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TC0MCI2_RE (Bit 4)

◆ MCPWM_CNTCON_TC1MCI0_FE_Msk

#define MCPWM_CNTCON_TC1MCI0_FE_Msk (0x80UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TC1MCI0_FE (Bitfield-Mask: 0x01)

◆ MCPWM_CNTCON_TC1MCI0_FE_Pos

#define MCPWM_CNTCON_TC1MCI0_FE_Pos (7UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TC1MCI0_FE (Bit 7)

◆ MCPWM_CNTCON_TC1MCI0_RE_Msk

#define MCPWM_CNTCON_TC1MCI0_RE_Msk (0x40UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TC1MCI0_RE (Bitfield-Mask: 0x01)

◆ MCPWM_CNTCON_TC1MCI0_RE_Pos

#define MCPWM_CNTCON_TC1MCI0_RE_Pos (6UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TC1MCI0_RE (Bit 6)

◆ MCPWM_CNTCON_TC1MCI1_FE_Msk

#define MCPWM_CNTCON_TC1MCI1_FE_Msk (0x200UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TC1MCI1_FE (Bitfield-Mask: 0x01)

◆ MCPWM_CNTCON_TC1MCI1_FE_Pos

#define MCPWM_CNTCON_TC1MCI1_FE_Pos (9UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TC1MCI1_FE (Bit 9)

◆ MCPWM_CNTCON_TC1MCI1_RE_Msk

#define MCPWM_CNTCON_TC1MCI1_RE_Msk (0x100UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TC1MCI1_RE (Bitfield-Mask: 0x01)

◆ MCPWM_CNTCON_TC1MCI1_RE_Pos

#define MCPWM_CNTCON_TC1MCI1_RE_Pos (8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TC1MCI1_RE (Bit 8)

◆ MCPWM_CNTCON_TC1MCI2_FE_Msk

#define MCPWM_CNTCON_TC1MCI2_FE_Msk (0x800UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TC1MCI2_FE (Bitfield-Mask: 0x01)

◆ MCPWM_CNTCON_TC1MCI2_FE_Pos

#define MCPWM_CNTCON_TC1MCI2_FE_Pos (11UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TC1MCI2_FE (Bit 11)

◆ MCPWM_CNTCON_TC1MCI2_RE_Msk

#define MCPWM_CNTCON_TC1MCI2_RE_Msk (0x400UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TC1MCI2_RE (Bitfield-Mask: 0x01)

◆ MCPWM_CNTCON_TC1MCI2_RE_Pos

#define MCPWM_CNTCON_TC1MCI2_RE_Pos (10UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TC1MCI2_RE (Bit 10)

◆ MCPWM_CNTCON_TC2MCI0_FE_Msk

#define MCPWM_CNTCON_TC2MCI0_FE_Msk (0x2000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TC2MCI0_FE (Bitfield-Mask: 0x01)

◆ MCPWM_CNTCON_TC2MCI0_FE_Pos

#define MCPWM_CNTCON_TC2MCI0_FE_Pos (13UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TC2MCI0_FE (Bit 13)

◆ MCPWM_CNTCON_TC2MCI0_RE_Msk

#define MCPWM_CNTCON_TC2MCI0_RE_Msk (0x1000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TC2MCI0_RE (Bitfield-Mask: 0x01)

◆ MCPWM_CNTCON_TC2MCI0_RE_Pos

#define MCPWM_CNTCON_TC2MCI0_RE_Pos (12UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TC2MCI0_RE (Bit 12)

◆ MCPWM_CNTCON_TC2MCI1_FE_Msk

#define MCPWM_CNTCON_TC2MCI1_FE_Msk (0x8000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TC2MCI1_FE (Bitfield-Mask: 0x01)

◆ MCPWM_CNTCON_TC2MCI1_FE_Pos

#define MCPWM_CNTCON_TC2MCI1_FE_Pos (15UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TC2MCI1_FE (Bit 15)

◆ MCPWM_CNTCON_TC2MCI1_RE_Msk

#define MCPWM_CNTCON_TC2MCI1_RE_Msk (0x4000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TC2MCI1_RE (Bitfield-Mask: 0x01)

◆ MCPWM_CNTCON_TC2MCI1_RE_Pos

#define MCPWM_CNTCON_TC2MCI1_RE_Pos (14UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TC2MCI1_RE (Bit 14)

◆ MCPWM_CNTCON_TC2MCI2_FE_Msk

#define MCPWM_CNTCON_TC2MCI2_FE_Msk (0x20000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TC2MCI2_FE (Bitfield-Mask: 0x01)

◆ MCPWM_CNTCON_TC2MCI2_FE_Pos

#define MCPWM_CNTCON_TC2MCI2_FE_Pos (17UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TC2MCI2_FE (Bit 17)

◆ MCPWM_CNTCON_TC2MCI2_RE_Msk

#define MCPWM_CNTCON_TC2MCI2_RE_Msk (0x10000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TC2MCI2_RE (Bitfield-Mask: 0x01)

◆ MCPWM_CNTCON_TC2MCI2_RE_Pos

#define MCPWM_CNTCON_TC2MCI2_RE_Pos (16UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TC2MCI2_RE (Bit 16)

◆ MCPWM_CON_ACMODE_Msk

#define MCPWM_CON_ACMODE_Msk (0x40000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

ACMODE (Bitfield-Mask: 0x01)

◆ MCPWM_CON_ACMODE_Pos

#define MCPWM_CON_ACMODE_Pos (30UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

ACMODE (Bit 30)

◆ MCPWM_CON_CENTER0_Msk

#define MCPWM_CON_CENTER0_Msk (0x2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CENTER0 (Bitfield-Mask: 0x01)

◆ MCPWM_CON_CENTER0_Pos

#define MCPWM_CON_CENTER0_Pos (1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CENTER0 (Bit 1)

◆ MCPWM_CON_CENTER1_Msk

#define MCPWM_CON_CENTER1_Msk (0x200UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CENTER1 (Bitfield-Mask: 0x01)

◆ MCPWM_CON_CENTER1_Pos

#define MCPWM_CON_CENTER1_Pos (9UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CENTER1 (Bit 9)

◆ MCPWM_CON_CENTER2_Msk

#define MCPWM_CON_CENTER2_Msk (0x20000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CENTER2 (Bitfield-Mask: 0x01)

◆ MCPWM_CON_CENTER2_Pos

#define MCPWM_CON_CENTER2_Pos (17UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CENTER2 (Bit 17)

◆ MCPWM_CON_CLR_ACMOD_CLR_Msk

#define MCPWM_CON_CLR_ACMOD_CLR_Msk (0x40000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

ACMOD_CLR (Bitfield-Mask: 0x01)

◆ MCPWM_CON_CLR_ACMOD_CLR_Pos

#define MCPWM_CON_CLR_ACMOD_CLR_Pos (30UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

ACMOD_CLR (Bit 30)

◆ MCPWM_CON_CLR_CENTER0_CLR_Msk

#define MCPWM_CON_CLR_CENTER0_CLR_Msk (0x2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CENTER0_CLR (Bitfield-Mask: 0x01)

◆ MCPWM_CON_CLR_CENTER0_CLR_Pos

#define MCPWM_CON_CLR_CENTER0_CLR_Pos (1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CENTER0_CLR (Bit 1)

◆ MCPWM_CON_CLR_CENTER1_CLR_Msk

#define MCPWM_CON_CLR_CENTER1_CLR_Msk (0x200UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CENTER1_CLR (Bitfield-Mask: 0x01)

◆ MCPWM_CON_CLR_CENTER1_CLR_Pos

#define MCPWM_CON_CLR_CENTER1_CLR_Pos (9UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CENTER1_CLR (Bit 9)

◆ MCPWM_CON_CLR_CENTER2_CLR_Msk

#define MCPWM_CON_CLR_CENTER2_CLR_Msk (0x20000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CENTER2_CLR (Bitfield-Mask: 0x01)

◆ MCPWM_CON_CLR_CENTER2_CLR_Pos

#define MCPWM_CON_CLR_CENTER2_CLR_Pos (17UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CENTER2_CLR (Bit 17)

◆ MCPWM_CON_CLR_DCMODE_CLR_Msk

#define MCPWM_CON_CLR_DCMODE_CLR_Msk (0x80000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DCMODE_CLR (Bitfield-Mask: 0x01)

◆ MCPWM_CON_CLR_DCMODE_CLR_Pos

#define MCPWM_CON_CLR_DCMODE_CLR_Pos (31UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DCMODE_CLR (Bit 31)

◆ MCPWM_CON_CLR_DISUP0_CLR_Msk

#define MCPWM_CON_CLR_DISUP0_CLR_Msk (0x10UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DISUP0_CLR (Bitfield-Mask: 0x01)

◆ MCPWM_CON_CLR_DISUP0_CLR_Pos

#define MCPWM_CON_CLR_DISUP0_CLR_Pos (4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DISUP0_CLR (Bit 4)

◆ MCPWM_CON_CLR_DISUP1_CLR_Msk

#define MCPWM_CON_CLR_DISUP1_CLR_Msk (0x1000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DISUP1_CLR (Bitfield-Mask: 0x01)

◆ MCPWM_CON_CLR_DISUP1_CLR_Pos

#define MCPWM_CON_CLR_DISUP1_CLR_Pos (12UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DISUP1_CLR (Bit 12)

◆ MCPWM_CON_CLR_DISUP2_CLR_Msk

#define MCPWM_CON_CLR_DISUP2_CLR_Msk (0x100000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DISUP2_CLR (Bitfield-Mask: 0x01)

◆ MCPWM_CON_CLR_DISUP2_CLR_Pos

#define MCPWM_CON_CLR_DISUP2_CLR_Pos (20UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DISUP2_CLR (Bit 20)

◆ MCPWM_CON_CLR_DTE0_CLR_Msk

#define MCPWM_CON_CLR_DTE0_CLR_Msk (0x8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DTE0_CLR (Bitfield-Mask: 0x01)

◆ MCPWM_CON_CLR_DTE0_CLR_Pos

#define MCPWM_CON_CLR_DTE0_CLR_Pos (3UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DTE0_CLR (Bit 3)

◆ MCPWM_CON_CLR_DTE1_CLR_Msk

#define MCPWM_CON_CLR_DTE1_CLR_Msk (0x800UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DTE1_CLR (Bitfield-Mask: 0x01)

◆ MCPWM_CON_CLR_DTE1_CLR_Pos

#define MCPWM_CON_CLR_DTE1_CLR_Pos (11UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DTE1_CLR (Bit 11)

◆ MCPWM_CON_CLR_DTE2_CLR_Msk

#define MCPWM_CON_CLR_DTE2_CLR_Msk (0x80000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DTE2_CLR (Bitfield-Mask: 0x01)

◆ MCPWM_CON_CLR_DTE2_CLR_Pos

#define MCPWM_CON_CLR_DTE2_CLR_Pos (19UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DTE2_CLR (Bit 19)

◆ MCPWM_CON_CLR_INVBDC_CLR_Msk

#define MCPWM_CON_CLR_INVBDC_CLR_Msk (0x20000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

INVBDC_CLR (Bitfield-Mask: 0x01)

◆ MCPWM_CON_CLR_INVBDC_CLR_Pos

#define MCPWM_CON_CLR_INVBDC_CLR_Pos (29UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

INVBDC_CLR (Bit 29)

◆ MCPWM_CON_CLR_POLA0_CLR_Msk

#define MCPWM_CON_CLR_POLA0_CLR_Msk (0x4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

POLA0_CLR (Bitfield-Mask: 0x01)

◆ MCPWM_CON_CLR_POLA0_CLR_Pos

#define MCPWM_CON_CLR_POLA0_CLR_Pos (2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

POLA0_CLR (Bit 2)

◆ MCPWM_CON_CLR_POLA1_CLR_Msk

#define MCPWM_CON_CLR_POLA1_CLR_Msk (0x400UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

POLA1_CLR (Bitfield-Mask: 0x01)

◆ MCPWM_CON_CLR_POLA1_CLR_Pos

#define MCPWM_CON_CLR_POLA1_CLR_Pos (10UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

POLA1_CLR (Bit 10)

◆ MCPWM_CON_CLR_POLA2_CLR_Msk

#define MCPWM_CON_CLR_POLA2_CLR_Msk (0x40000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

POLA2_CLR (Bitfield-Mask: 0x01)

◆ MCPWM_CON_CLR_POLA2_CLR_Pos

#define MCPWM_CON_CLR_POLA2_CLR_Pos (18UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

POLA2_CLR (Bit 18)

◆ MCPWM_CON_CLR_RUN0_CLR_Msk

#define MCPWM_CON_CLR_RUN0_CLR_Msk (0x1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RUN0_CLR (Bitfield-Mask: 0x01)

◆ MCPWM_CON_CLR_RUN0_CLR_Pos

#define MCPWM_CON_CLR_RUN0_CLR_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RUN0_CLR (Bit 0)

◆ MCPWM_CON_CLR_RUN1_CLR_Msk

#define MCPWM_CON_CLR_RUN1_CLR_Msk (0x100UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RUN1_CLR (Bitfield-Mask: 0x01)

◆ MCPWM_CON_CLR_RUN1_CLR_Pos

#define MCPWM_CON_CLR_RUN1_CLR_Pos (8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RUN1_CLR (Bit 8)

◆ MCPWM_CON_CLR_RUN2_CLR_Msk

#define MCPWM_CON_CLR_RUN2_CLR_Msk (0x10000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RUN2_CLR (Bitfield-Mask: 0x01)

◆ MCPWM_CON_CLR_RUN2_CLR_Pos

#define MCPWM_CON_CLR_RUN2_CLR_Pos (16UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RUN2_CLR (Bit 16)

◆ MCPWM_CON_DCMODE_Msk

#define MCPWM_CON_DCMODE_Msk (0x80000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DCMODE (Bitfield-Mask: 0x01)

◆ MCPWM_CON_DCMODE_Pos

#define MCPWM_CON_DCMODE_Pos (31UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DCMODE (Bit 31)

◆ MCPWM_CON_DISUP0_Msk

#define MCPWM_CON_DISUP0_Msk (0x10UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DISUP0 (Bitfield-Mask: 0x01)

◆ MCPWM_CON_DISUP0_Pos

#define MCPWM_CON_DISUP0_Pos (4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DISUP0 (Bit 4)

◆ MCPWM_CON_DISUP1_Msk

#define MCPWM_CON_DISUP1_Msk (0x1000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DISUP1 (Bitfield-Mask: 0x01)

◆ MCPWM_CON_DISUP1_Pos

#define MCPWM_CON_DISUP1_Pos (12UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DISUP1 (Bit 12)

◆ MCPWM_CON_DISUP2_Msk

#define MCPWM_CON_DISUP2_Msk (0x100000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DISUP2 (Bitfield-Mask: 0x01)

◆ MCPWM_CON_DISUP2_Pos

#define MCPWM_CON_DISUP2_Pos (20UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DISUP2 (Bit 20)

◆ MCPWM_CON_DTE0_Msk

#define MCPWM_CON_DTE0_Msk (0x8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DTE0 (Bitfield-Mask: 0x01)

◆ MCPWM_CON_DTE0_Pos

#define MCPWM_CON_DTE0_Pos (3UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DTE0 (Bit 3)

◆ MCPWM_CON_DTE1_Msk

#define MCPWM_CON_DTE1_Msk (0x800UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DTE1 (Bitfield-Mask: 0x01)

◆ MCPWM_CON_DTE1_Pos

#define MCPWM_CON_DTE1_Pos (11UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DTE1 (Bit 11)

◆ MCPWM_CON_DTE2_Msk

#define MCPWM_CON_DTE2_Msk (0x80000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DTE2 (Bitfield-Mask: 0x01)

◆ MCPWM_CON_DTE2_Pos

#define MCPWM_CON_DTE2_Pos (19UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DTE2 (Bit 19)

◆ MCPWM_CON_INVBDC_Msk

#define MCPWM_CON_INVBDC_Msk (0x20000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

INVBDC (Bitfield-Mask: 0x01)

◆ MCPWM_CON_INVBDC_Pos

#define MCPWM_CON_INVBDC_Pos (29UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

INVBDC (Bit 29)

◆ MCPWM_CON_POLA0_Msk

#define MCPWM_CON_POLA0_Msk (0x4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

POLA0 (Bitfield-Mask: 0x01)

◆ MCPWM_CON_POLA0_Pos

#define MCPWM_CON_POLA0_Pos (2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

POLA0 (Bit 2)

◆ MCPWM_CON_POLA1_Msk

#define MCPWM_CON_POLA1_Msk (0x400UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

POLA1 (Bitfield-Mask: 0x01)

◆ MCPWM_CON_POLA1_Pos

#define MCPWM_CON_POLA1_Pos (10UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

POLA1 (Bit 10)

◆ MCPWM_CON_POLA2_Msk

#define MCPWM_CON_POLA2_Msk (0x40000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

POLA2 (Bitfield-Mask: 0x01)

◆ MCPWM_CON_POLA2_Pos

#define MCPWM_CON_POLA2_Pos (18UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

POLA2 (Bit 18)

◆ MCPWM_CON_RUN0_Msk

#define MCPWM_CON_RUN0_Msk (0x1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RUN0 (Bitfield-Mask: 0x01)

◆ MCPWM_CON_RUN0_Pos

#define MCPWM_CON_RUN0_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RUN0 (Bit 0)

◆ MCPWM_CON_RUN1_Msk

#define MCPWM_CON_RUN1_Msk (0x100UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RUN1 (Bitfield-Mask: 0x01)

◆ MCPWM_CON_RUN1_Pos

#define MCPWM_CON_RUN1_Pos (8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RUN1 (Bit 8)

◆ MCPWM_CON_RUN2_Msk

#define MCPWM_CON_RUN2_Msk (0x10000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RUN2 (Bitfield-Mask: 0x01)

◆ MCPWM_CON_RUN2_Pos

#define MCPWM_CON_RUN2_Pos (16UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RUN2 (Bit 16)

◆ MCPWM_CON_SET_ACMODE_SET_Msk

#define MCPWM_CON_SET_ACMODE_SET_Msk (0x40000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

ACMODE_SET (Bitfield-Mask: 0x01)

◆ MCPWM_CON_SET_ACMODE_SET_Pos

#define MCPWM_CON_SET_ACMODE_SET_Pos (30UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

ACMODE_SET (Bit 30)

◆ MCPWM_CON_SET_CENTER0_SET_Msk

#define MCPWM_CON_SET_CENTER0_SET_Msk (0x2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CENTER0_SET (Bitfield-Mask: 0x01)

◆ MCPWM_CON_SET_CENTER0_SET_Pos

#define MCPWM_CON_SET_CENTER0_SET_Pos (1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CENTER0_SET (Bit 1)

◆ MCPWM_CON_SET_CENTER1_SET_Msk

#define MCPWM_CON_SET_CENTER1_SET_Msk (0x200UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CENTER1_SET (Bitfield-Mask: 0x01)

◆ MCPWM_CON_SET_CENTER1_SET_Pos

#define MCPWM_CON_SET_CENTER1_SET_Pos (9UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CENTER1_SET (Bit 9)

◆ MCPWM_CON_SET_CENTER2_SET_Msk

#define MCPWM_CON_SET_CENTER2_SET_Msk (0x20000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CENTER2_SET (Bitfield-Mask: 0x01)

◆ MCPWM_CON_SET_CENTER2_SET_Pos

#define MCPWM_CON_SET_CENTER2_SET_Pos (17UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CENTER2_SET (Bit 17)

◆ MCPWM_CON_SET_DCMODE_SET_Msk

#define MCPWM_CON_SET_DCMODE_SET_Msk (0x80000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DCMODE_SET (Bitfield-Mask: 0x01)

◆ MCPWM_CON_SET_DCMODE_SET_Pos

#define MCPWM_CON_SET_DCMODE_SET_Pos (31UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DCMODE_SET (Bit 31)

◆ MCPWM_CON_SET_DISUP0_SET_Msk

#define MCPWM_CON_SET_DISUP0_SET_Msk (0x10UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DISUP0_SET (Bitfield-Mask: 0x01)

◆ MCPWM_CON_SET_DISUP0_SET_Pos

#define MCPWM_CON_SET_DISUP0_SET_Pos (4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DISUP0_SET (Bit 4)

◆ MCPWM_CON_SET_DISUP1_SET_Msk

#define MCPWM_CON_SET_DISUP1_SET_Msk (0x1000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DISUP1_SET (Bitfield-Mask: 0x01)

◆ MCPWM_CON_SET_DISUP1_SET_Pos

#define MCPWM_CON_SET_DISUP1_SET_Pos (12UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DISUP1_SET (Bit 12)

◆ MCPWM_CON_SET_DISUP2_SET_Msk

#define MCPWM_CON_SET_DISUP2_SET_Msk (0x100000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DISUP2_SET (Bitfield-Mask: 0x01)

◆ MCPWM_CON_SET_DISUP2_SET_Pos

#define MCPWM_CON_SET_DISUP2_SET_Pos (20UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DISUP2_SET (Bit 20)

◆ MCPWM_CON_SET_DTE0_SET_Msk

#define MCPWM_CON_SET_DTE0_SET_Msk (0x8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DTE0_SET (Bitfield-Mask: 0x01)

◆ MCPWM_CON_SET_DTE0_SET_Pos

#define MCPWM_CON_SET_DTE0_SET_Pos (3UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DTE0_SET (Bit 3)

◆ MCPWM_CON_SET_DTE1_SET_Msk

#define MCPWM_CON_SET_DTE1_SET_Msk (0x800UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DTE1_SET (Bitfield-Mask: 0x01)

◆ MCPWM_CON_SET_DTE1_SET_Pos

#define MCPWM_CON_SET_DTE1_SET_Pos (11UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DTE1_SET (Bit 11)

◆ MCPWM_CON_SET_DTE2_SET_Msk

#define MCPWM_CON_SET_DTE2_SET_Msk (0x80000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DTE2_SET (Bitfield-Mask: 0x01)

◆ MCPWM_CON_SET_DTE2_SET_Pos

#define MCPWM_CON_SET_DTE2_SET_Pos (19UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DTE2_SET (Bit 19)

◆ MCPWM_CON_SET_INVBDC_SET_Msk

#define MCPWM_CON_SET_INVBDC_SET_Msk (0x20000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

INVBDC_SET (Bitfield-Mask: 0x01)

◆ MCPWM_CON_SET_INVBDC_SET_Pos

#define MCPWM_CON_SET_INVBDC_SET_Pos (29UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

INVBDC_SET (Bit 29)

◆ MCPWM_CON_SET_POLA0_SET_Msk

#define MCPWM_CON_SET_POLA0_SET_Msk (0x4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

POLA0_SET (Bitfield-Mask: 0x01)

◆ MCPWM_CON_SET_POLA0_SET_Pos

#define MCPWM_CON_SET_POLA0_SET_Pos (2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

POLA0_SET (Bit 2)

◆ MCPWM_CON_SET_POLA1_SET_Msk

#define MCPWM_CON_SET_POLA1_SET_Msk (0x400UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

POLA1_SET (Bitfield-Mask: 0x01)

◆ MCPWM_CON_SET_POLA1_SET_Pos

#define MCPWM_CON_SET_POLA1_SET_Pos (10UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

POLA1_SET (Bit 10)

◆ MCPWM_CON_SET_POLA2_SET_Msk

#define MCPWM_CON_SET_POLA2_SET_Msk (0x40000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

POLA2_SET (Bitfield-Mask: 0x01)

◆ MCPWM_CON_SET_POLA2_SET_Pos

#define MCPWM_CON_SET_POLA2_SET_Pos (18UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

POLA2_SET (Bit 18)

◆ MCPWM_CON_SET_RUN0_SET_Msk

#define MCPWM_CON_SET_RUN0_SET_Msk (0x1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RUN0_SET (Bitfield-Mask: 0x01)

◆ MCPWM_CON_SET_RUN0_SET_Pos

#define MCPWM_CON_SET_RUN0_SET_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RUN0_SET (Bit 0)

◆ MCPWM_CON_SET_RUN1_SET_Msk

#define MCPWM_CON_SET_RUN1_SET_Msk (0x100UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RUN1_SET (Bitfield-Mask: 0x01)

◆ MCPWM_CON_SET_RUN1_SET_Pos

#define MCPWM_CON_SET_RUN1_SET_Pos (8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RUN1_SET (Bit 8)

◆ MCPWM_CON_SET_RUN2_SET_Msk

#define MCPWM_CON_SET_RUN2_SET_Msk (0x10000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RUN2_SET (Bitfield-Mask: 0x01)

◆ MCPWM_CON_SET_RUN2_SET_Pos

#define MCPWM_CON_SET_RUN2_SET_Pos (16UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RUN2_SET (Bit 16)

◆ MCPWM_CP_CCPA0_Msk

#define MCPWM_CP_CCPA0_Msk (0x1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CCPA0 (Bitfield-Mask: 0x01)

◆ MCPWM_CP_CCPA0_Pos

#define MCPWM_CP_CCPA0_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CCPA0 (Bit 0)

◆ MCPWM_CP_CCPA1_Msk

#define MCPWM_CP_CCPA1_Msk (0x4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CCPA1 (Bitfield-Mask: 0x01)

◆ MCPWM_CP_CCPA1_Pos

#define MCPWM_CP_CCPA1_Pos (2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CCPA1 (Bit 2)

◆ MCPWM_CP_CCPA2_Msk

#define MCPWM_CP_CCPA2_Msk (0x10UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CCPA2 (Bitfield-Mask: 0x01)

◆ MCPWM_CP_CCPA2_Pos

#define MCPWM_CP_CCPA2_Pos (4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CCPA2 (Bit 4)

◆ MCPWM_CP_CCPB0_Msk

#define MCPWM_CP_CCPB0_Msk (0x2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CCPB0 (Bitfield-Mask: 0x01)

◆ MCPWM_CP_CCPB0_Pos

#define MCPWM_CP_CCPB0_Pos (1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CCPB0 (Bit 1)

◆ MCPWM_CP_CCPB1_Msk

#define MCPWM_CP_CCPB1_Msk (0x8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CCPB1 (Bitfield-Mask: 0x01)

◆ MCPWM_CP_CCPB1_Pos

#define MCPWM_CP_CCPB1_Pos (3UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CCPB1 (Bit 3)

◆ MCPWM_CP_CCPB2_Msk

#define MCPWM_CP_CCPB2_Msk (0x20UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CCPB2 (Bitfield-Mask: 0x01)

◆ MCPWM_CP_CCPB2_Pos

#define MCPWM_CP_CCPB2_Pos (5UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CCPB2 (Bit 5)

◆ MCPWM_DT_DT0_Msk

#define MCPWM_DT_DT0_Msk (0x3ffUL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DT0 (Bitfield-Mask: 0x3ff)

◆ MCPWM_DT_DT0_Pos

#define MCPWM_DT_DT0_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DT0 (Bit 0)

◆ MCPWM_DT_DT1_Msk

#define MCPWM_DT_DT1_Msk (0xffc00UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DT1 (Bitfield-Mask: 0x3ff)

◆ MCPWM_DT_DT1_Pos

#define MCPWM_DT_DT1_Pos (10UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DT1 (Bit 10)

◆ MCPWM_DT_DT2_Msk

#define MCPWM_DT_DT2_Msk (0x3ff00000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DT2 (Bitfield-Mask: 0x3ff)

◆ MCPWM_DT_DT2_Pos

#define MCPWM_DT_DT2_Pos (20UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DT2 (Bit 20)

◆ MCPWM_INTEN_ABORT_Msk

#define MCPWM_INTEN_ABORT_Msk (0x8000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

ABORT (Bitfield-Mask: 0x01)

◆ MCPWM_INTEN_ABORT_Pos

#define MCPWM_INTEN_ABORT_Pos (15UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

ABORT (Bit 15)

◆ MCPWM_INTEN_CLR_ABORT_CLR_Msk

#define MCPWM_INTEN_CLR_ABORT_CLR_Msk (0x8000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

ABORT_CLR (Bitfield-Mask: 0x01)

◆ MCPWM_INTEN_CLR_ABORT_CLR_Pos

#define MCPWM_INTEN_CLR_ABORT_CLR_Pos (15UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

ABORT_CLR (Bit 15)

◆ MCPWM_INTEN_CLR_ICAP0_CLR_Msk

#define MCPWM_INTEN_CLR_ICAP0_CLR_Msk (0x4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

ICAP0_CLR (Bitfield-Mask: 0x01)

◆ MCPWM_INTEN_CLR_ICAP0_CLR_Pos

#define MCPWM_INTEN_CLR_ICAP0_CLR_Pos (2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

ICAP0_CLR (Bit 2)

◆ MCPWM_INTEN_CLR_ICAP1_CLR_Msk

#define MCPWM_INTEN_CLR_ICAP1_CLR_Msk (0x40UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

ICAP1_CLR (Bitfield-Mask: 0x01)

◆ MCPWM_INTEN_CLR_ICAP1_CLR_Pos

#define MCPWM_INTEN_CLR_ICAP1_CLR_Pos (6UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

ICAP1_CLR (Bit 6)

◆ MCPWM_INTEN_CLR_ICAP2_CLR_Msk

#define MCPWM_INTEN_CLR_ICAP2_CLR_Msk (0x400UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

ICAP2_CLR (Bitfield-Mask: 0x01)

◆ MCPWM_INTEN_CLR_ICAP2_CLR_Pos

#define MCPWM_INTEN_CLR_ICAP2_CLR_Pos (10UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

ICAP2_CLR (Bit 10)

◆ MCPWM_INTEN_CLR_ILIM0_CLR_Msk

#define MCPWM_INTEN_CLR_ILIM0_CLR_Msk (0x1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

ILIM0_CLR (Bitfield-Mask: 0x01)

◆ MCPWM_INTEN_CLR_ILIM0_CLR_Pos

#define MCPWM_INTEN_CLR_ILIM0_CLR_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

ILIM0_CLR (Bit 0)

◆ MCPWM_INTEN_CLR_ILIM1_CLR_Msk

#define MCPWM_INTEN_CLR_ILIM1_CLR_Msk (0x10UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

ILIM1_CLR (Bitfield-Mask: 0x01)

◆ MCPWM_INTEN_CLR_ILIM1_CLR_Pos

#define MCPWM_INTEN_CLR_ILIM1_CLR_Pos (4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

ILIM1_CLR (Bit 4)

◆ MCPWM_INTEN_CLR_ILIM2_CLR_Msk

#define MCPWM_INTEN_CLR_ILIM2_CLR_Msk (0x100UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

ILIM2_CLR (Bitfield-Mask: 0x01)

◆ MCPWM_INTEN_CLR_ILIM2_CLR_Pos

#define MCPWM_INTEN_CLR_ILIM2_CLR_Pos (8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

ILIM2_CLR (Bit 8)

◆ MCPWM_INTEN_CLR_IMAT0_CLR_Msk

#define MCPWM_INTEN_CLR_IMAT0_CLR_Msk (0x2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

IMAT0_CLR (Bitfield-Mask: 0x01)

◆ MCPWM_INTEN_CLR_IMAT0_CLR_Pos

#define MCPWM_INTEN_CLR_IMAT0_CLR_Pos (1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

IMAT0_CLR (Bit 1)

◆ MCPWM_INTEN_CLR_IMAT1_CLR_Msk

#define MCPWM_INTEN_CLR_IMAT1_CLR_Msk (0x20UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

IMAT1_CLR (Bitfield-Mask: 0x01)

◆ MCPWM_INTEN_CLR_IMAT1_CLR_Pos

#define MCPWM_INTEN_CLR_IMAT1_CLR_Pos (5UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

IMAT1_CLR (Bit 5)

◆ MCPWM_INTEN_CLR_IMAT2_CLR_Msk

#define MCPWM_INTEN_CLR_IMAT2_CLR_Msk (0x200UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

IMAT2_CLR (Bitfield-Mask: 0x01)

◆ MCPWM_INTEN_CLR_IMAT2_CLR_Pos

#define MCPWM_INTEN_CLR_IMAT2_CLR_Pos (9UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

IMAT2_CLR (Bit 9)

◆ MCPWM_INTEN_ICAP0_Msk

#define MCPWM_INTEN_ICAP0_Msk (0x4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

ICAP0 (Bitfield-Mask: 0x01)

◆ MCPWM_INTEN_ICAP0_Pos

#define MCPWM_INTEN_ICAP0_Pos (2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

ICAP0 (Bit 2)

◆ MCPWM_INTEN_ICAP1_Msk

#define MCPWM_INTEN_ICAP1_Msk (0x40UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

ICAP1 (Bitfield-Mask: 0x01)

◆ MCPWM_INTEN_ICAP1_Pos

#define MCPWM_INTEN_ICAP1_Pos (6UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

ICAP1 (Bit 6)

◆ MCPWM_INTEN_ICAP2_Msk

#define MCPWM_INTEN_ICAP2_Msk (0x400UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

ICAP2 (Bitfield-Mask: 0x01)

◆ MCPWM_INTEN_ICAP2_Pos

#define MCPWM_INTEN_ICAP2_Pos (10UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

ICAP2 (Bit 10)

◆ MCPWM_INTEN_ILIM0_Msk

#define MCPWM_INTEN_ILIM0_Msk (0x1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

ILIM0 (Bitfield-Mask: 0x01)

◆ MCPWM_INTEN_ILIM0_Pos

#define MCPWM_INTEN_ILIM0_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

ILIM0 (Bit 0)

◆ MCPWM_INTEN_ILIM1_Msk

#define MCPWM_INTEN_ILIM1_Msk (0x10UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

ILIM1 (Bitfield-Mask: 0x01)

◆ MCPWM_INTEN_ILIM1_Pos

#define MCPWM_INTEN_ILIM1_Pos (4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

ILIM1 (Bit 4)

◆ MCPWM_INTEN_ILIM2_Msk

#define MCPWM_INTEN_ILIM2_Msk (0x100UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

ILIM2 (Bitfield-Mask: 0x01)

◆ MCPWM_INTEN_ILIM2_Pos

#define MCPWM_INTEN_ILIM2_Pos (8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

ILIM2 (Bit 8)

◆ MCPWM_INTEN_IMAT0_Msk

#define MCPWM_INTEN_IMAT0_Msk (0x2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

IMAT0 (Bitfield-Mask: 0x01)

◆ MCPWM_INTEN_IMAT0_Pos

#define MCPWM_INTEN_IMAT0_Pos (1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

IMAT0 (Bit 1)

◆ MCPWM_INTEN_IMAT1_Msk

#define MCPWM_INTEN_IMAT1_Msk (0x20UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

IMAT1 (Bitfield-Mask: 0x01)

◆ MCPWM_INTEN_IMAT1_Pos

#define MCPWM_INTEN_IMAT1_Pos (5UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

IMAT1 (Bit 5)

◆ MCPWM_INTEN_IMAT2_Msk

#define MCPWM_INTEN_IMAT2_Msk (0x200UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

IMAT2 (Bitfield-Mask: 0x01)

◆ MCPWM_INTEN_IMAT2_Pos

#define MCPWM_INTEN_IMAT2_Pos (9UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

IMAT2 (Bit 9)

◆ MCPWM_INTEN_SET_ABORT_SET_Msk

#define MCPWM_INTEN_SET_ABORT_SET_Msk (0x8000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

ABORT_SET (Bitfield-Mask: 0x01)

◆ MCPWM_INTEN_SET_ABORT_SET_Pos

#define MCPWM_INTEN_SET_ABORT_SET_Pos (15UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

ABORT_SET (Bit 15)

◆ MCPWM_INTEN_SET_ICAP0_SET_Msk

#define MCPWM_INTEN_SET_ICAP0_SET_Msk (0x4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

ICAP0_SET (Bitfield-Mask: 0x01)

◆ MCPWM_INTEN_SET_ICAP0_SET_Pos

#define MCPWM_INTEN_SET_ICAP0_SET_Pos (2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

ICAP0_SET (Bit 2)

◆ MCPWM_INTEN_SET_ICAP1_SET_Msk

#define MCPWM_INTEN_SET_ICAP1_SET_Msk (0x40UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

ICAP1_SET (Bitfield-Mask: 0x01)

◆ MCPWM_INTEN_SET_ICAP1_SET_Pos

#define MCPWM_INTEN_SET_ICAP1_SET_Pos (6UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

ICAP1_SET (Bit 6)

◆ MCPWM_INTEN_SET_ICAP2_SET_Msk

#define MCPWM_INTEN_SET_ICAP2_SET_Msk (0x800UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

ICAP2_SET (Bitfield-Mask: 0x01)

◆ MCPWM_INTEN_SET_ICAP2_SET_Pos

#define MCPWM_INTEN_SET_ICAP2_SET_Pos (11UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

ICAP2_SET (Bit 11)

◆ MCPWM_INTEN_SET_ILIM0_SET_Msk

#define MCPWM_INTEN_SET_ILIM0_SET_Msk (0x1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

ILIM0_SET (Bitfield-Mask: 0x01)

◆ MCPWM_INTEN_SET_ILIM0_SET_Pos

#define MCPWM_INTEN_SET_ILIM0_SET_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

ILIM0_SET (Bit 0)

◆ MCPWM_INTEN_SET_ILIM1_SET_Msk

#define MCPWM_INTEN_SET_ILIM1_SET_Msk (0x10UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

ILIM1_SET (Bitfield-Mask: 0x01)

◆ MCPWM_INTEN_SET_ILIM1_SET_Pos

#define MCPWM_INTEN_SET_ILIM1_SET_Pos (4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

ILIM1_SET (Bit 4)

◆ MCPWM_INTEN_SET_ILIM2_SET_Msk

#define MCPWM_INTEN_SET_ILIM2_SET_Msk (0x200UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

ILIM2_SET (Bitfield-Mask: 0x01)

◆ MCPWM_INTEN_SET_ILIM2_SET_Pos

#define MCPWM_INTEN_SET_ILIM2_SET_Pos (9UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

ILIM2_SET (Bit 9)

◆ MCPWM_INTEN_SET_IMAT0_SET_Msk

#define MCPWM_INTEN_SET_IMAT0_SET_Msk (0x2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

IMAT0_SET (Bitfield-Mask: 0x01)

◆ MCPWM_INTEN_SET_IMAT0_SET_Pos

#define MCPWM_INTEN_SET_IMAT0_SET_Pos (1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

IMAT0_SET (Bit 1)

◆ MCPWM_INTEN_SET_IMAT1_SET_Msk

#define MCPWM_INTEN_SET_IMAT1_SET_Msk (0x20UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

IMAT1_SET (Bitfield-Mask: 0x01)

◆ MCPWM_INTEN_SET_IMAT1_SET_Pos

#define MCPWM_INTEN_SET_IMAT1_SET_Pos (5UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

IMAT1_SET (Bit 5)

◆ MCPWM_INTEN_SET_IMAT2_SET_Msk

#define MCPWM_INTEN_SET_IMAT2_SET_Msk (0x400UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

IMAT2_SET (Bitfield-Mask: 0x01)

◆ MCPWM_INTEN_SET_IMAT2_SET_Pos

#define MCPWM_INTEN_SET_IMAT2_SET_Pos (10UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

IMAT2_SET (Bit 10)

◆ MCPWM_INTF_ABORT_F_Msk

#define MCPWM_INTF_ABORT_F_Msk (0x8000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

ABORT_F (Bitfield-Mask: 0x01)

◆ MCPWM_INTF_ABORT_F_Pos

#define MCPWM_INTF_ABORT_F_Pos (15UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

ABORT_F (Bit 15)

◆ MCPWM_INTF_CLR_ABORT_F_CLR_Msk

#define MCPWM_INTF_CLR_ABORT_F_CLR_Msk (0x8000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

ABORT_F_CLR (Bitfield-Mask: 0x01)

◆ MCPWM_INTF_CLR_ABORT_F_CLR_Pos

#define MCPWM_INTF_CLR_ABORT_F_CLR_Pos (15UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

ABORT_F_CLR (Bit 15)

◆ MCPWM_INTF_CLR_ICAP0_F_CLR_Msk

#define MCPWM_INTF_CLR_ICAP0_F_CLR_Msk (0x4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

ICAP0_F_CLR (Bitfield-Mask: 0x01)

◆ MCPWM_INTF_CLR_ICAP0_F_CLR_Pos

#define MCPWM_INTF_CLR_ICAP0_F_CLR_Pos (2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

ICAP0_F_CLR (Bit 2)

◆ MCPWM_INTF_CLR_ICAP1_F_CLR_Msk

#define MCPWM_INTF_CLR_ICAP1_F_CLR_Msk (0x40UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

ICAP1_F_CLR (Bitfield-Mask: 0x01)

◆ MCPWM_INTF_CLR_ICAP1_F_CLR_Pos

#define MCPWM_INTF_CLR_ICAP1_F_CLR_Pos (6UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

ICAP1_F_CLR (Bit 6)

◆ MCPWM_INTF_CLR_ICAP2_F_CLR_Msk

#define MCPWM_INTF_CLR_ICAP2_F_CLR_Msk (0x400UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

ICAP2_F_CLR (Bitfield-Mask: 0x01)

◆ MCPWM_INTF_CLR_ICAP2_F_CLR_Pos

#define MCPWM_INTF_CLR_ICAP2_F_CLR_Pos (10UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

ICAP2_F_CLR (Bit 10)

◆ MCPWM_INTF_CLR_ILIM0_F_CLR_Msk

#define MCPWM_INTF_CLR_ILIM0_F_CLR_Msk (0x1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

ILIM0_F_CLR (Bitfield-Mask: 0x01)

◆ MCPWM_INTF_CLR_ILIM0_F_CLR_Pos

#define MCPWM_INTF_CLR_ILIM0_F_CLR_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

ILIM0_F_CLR (Bit 0)

◆ MCPWM_INTF_CLR_ILIM1_F_CLR_Msk

#define MCPWM_INTF_CLR_ILIM1_F_CLR_Msk (0x10UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

ILIM1_F_CLR (Bitfield-Mask: 0x01)

◆ MCPWM_INTF_CLR_ILIM1_F_CLR_Pos

#define MCPWM_INTF_CLR_ILIM1_F_CLR_Pos (4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

ILIM1_F_CLR (Bit 4)

◆ MCPWM_INTF_CLR_ILIM2_F_CLR_Msk

#define MCPWM_INTF_CLR_ILIM2_F_CLR_Msk (0x100UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

ILIM2_F_CLR (Bitfield-Mask: 0x01)

◆ MCPWM_INTF_CLR_ILIM2_F_CLR_Pos

#define MCPWM_INTF_CLR_ILIM2_F_CLR_Pos (8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

ILIM2_F_CLR (Bit 8)

◆ MCPWM_INTF_CLR_IMAT0_F_CLR_Msk

#define MCPWM_INTF_CLR_IMAT0_F_CLR_Msk (0x2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

IMAT0_F_CLR (Bitfield-Mask: 0x01)

◆ MCPWM_INTF_CLR_IMAT0_F_CLR_Pos

#define MCPWM_INTF_CLR_IMAT0_F_CLR_Pos (1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

IMAT0_F_CLR (Bit 1)

◆ MCPWM_INTF_CLR_IMAT1_F_CLR_Msk

#define MCPWM_INTF_CLR_IMAT1_F_CLR_Msk (0x20UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

IMAT1_F_CLR (Bitfield-Mask: 0x01)

◆ MCPWM_INTF_CLR_IMAT1_F_CLR_Pos

#define MCPWM_INTF_CLR_IMAT1_F_CLR_Pos (5UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

IMAT1_F_CLR (Bit 5)

◆ MCPWM_INTF_CLR_IMAT2_F_CLR_Msk

#define MCPWM_INTF_CLR_IMAT2_F_CLR_Msk (0x200UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

IMAT2_F_CLR (Bitfield-Mask: 0x01)

◆ MCPWM_INTF_CLR_IMAT2_F_CLR_Pos

#define MCPWM_INTF_CLR_IMAT2_F_CLR_Pos (9UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

IMAT2_F_CLR (Bit 9)

◆ MCPWM_INTF_ICAP0_F_Msk

#define MCPWM_INTF_ICAP0_F_Msk (0x4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

ICAP0_F (Bitfield-Mask: 0x01)

◆ MCPWM_INTF_ICAP0_F_Pos

#define MCPWM_INTF_ICAP0_F_Pos (2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

ICAP0_F (Bit 2)

◆ MCPWM_INTF_ICAP1_F_Msk

#define MCPWM_INTF_ICAP1_F_Msk (0x40UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

ICAP1_F (Bitfield-Mask: 0x01)

◆ MCPWM_INTF_ICAP1_F_Pos

#define MCPWM_INTF_ICAP1_F_Pos (6UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

ICAP1_F (Bit 6)

◆ MCPWM_INTF_ICAP2_F_Msk

#define MCPWM_INTF_ICAP2_F_Msk (0x400UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

ICAP2_F (Bitfield-Mask: 0x01)

◆ MCPWM_INTF_ICAP2_F_Pos

#define MCPWM_INTF_ICAP2_F_Pos (10UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

ICAP2_F (Bit 10)

◆ MCPWM_INTF_ILIM0_F_Msk

#define MCPWM_INTF_ILIM0_F_Msk (0x1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

ILIM0_F (Bitfield-Mask: 0x01)

◆ MCPWM_INTF_ILIM0_F_Pos

#define MCPWM_INTF_ILIM0_F_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

ILIM0_F (Bit 0)

◆ MCPWM_INTF_ILIM1_F_Msk

#define MCPWM_INTF_ILIM1_F_Msk (0x10UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

ILIM1_F (Bitfield-Mask: 0x01)

◆ MCPWM_INTF_ILIM1_F_Pos

#define MCPWM_INTF_ILIM1_F_Pos (4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

ILIM1_F (Bit 4)

◆ MCPWM_INTF_ILIM2_F_Msk

#define MCPWM_INTF_ILIM2_F_Msk (0x100UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

ILIM2_F (Bitfield-Mask: 0x01)

◆ MCPWM_INTF_ILIM2_F_Pos

#define MCPWM_INTF_ILIM2_F_Pos (8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

ILIM2_F (Bit 8)

◆ MCPWM_INTF_IMAT0_F_Msk

#define MCPWM_INTF_IMAT0_F_Msk (0x2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

IMAT0_F (Bitfield-Mask: 0x01)

◆ MCPWM_INTF_IMAT0_F_Pos

#define MCPWM_INTF_IMAT0_F_Pos (1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

IMAT0_F (Bit 1)

◆ MCPWM_INTF_IMAT1_F_Msk

#define MCPWM_INTF_IMAT1_F_Msk (0x20UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

IMAT1_F (Bitfield-Mask: 0x01)

◆ MCPWM_INTF_IMAT1_F_Pos

#define MCPWM_INTF_IMAT1_F_Pos (5UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

IMAT1_F (Bit 5)

◆ MCPWM_INTF_IMAT2_F_Msk

#define MCPWM_INTF_IMAT2_F_Msk (0x200UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

IMAT2_F (Bitfield-Mask: 0x01)

◆ MCPWM_INTF_IMAT2_F_Pos

#define MCPWM_INTF_IMAT2_F_Pos (9UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

IMAT2_F (Bit 9)

◆ MCPWM_INTF_SET_ABORT_F_SET_Msk

#define MCPWM_INTF_SET_ABORT_F_SET_Msk (0x8000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

ABORT_F_SET (Bitfield-Mask: 0x01)

◆ MCPWM_INTF_SET_ABORT_F_SET_Pos

#define MCPWM_INTF_SET_ABORT_F_SET_Pos (15UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

ABORT_F_SET (Bit 15)

◆ MCPWM_INTF_SET_ICAP0_F_SET_Msk

#define MCPWM_INTF_SET_ICAP0_F_SET_Msk (0x4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

ICAP0_F_SET (Bitfield-Mask: 0x01)

◆ MCPWM_INTF_SET_ICAP0_F_SET_Pos

#define MCPWM_INTF_SET_ICAP0_F_SET_Pos (2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

ICAP0_F_SET (Bit 2)

◆ MCPWM_INTF_SET_ICAP1_F_SET_Msk

#define MCPWM_INTF_SET_ICAP1_F_SET_Msk (0x40UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

ICAP1_F_SET (Bitfield-Mask: 0x01)

◆ MCPWM_INTF_SET_ICAP1_F_SET_Pos

#define MCPWM_INTF_SET_ICAP1_F_SET_Pos (6UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

ICAP1_F_SET (Bit 6)

◆ MCPWM_INTF_SET_ICAP2_F_SET_Msk

#define MCPWM_INTF_SET_ICAP2_F_SET_Msk (0x400UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

ICAP2_F_SET (Bitfield-Mask: 0x01)

◆ MCPWM_INTF_SET_ICAP2_F_SET_Pos

#define MCPWM_INTF_SET_ICAP2_F_SET_Pos (10UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

ICAP2_F_SET (Bit 10)

◆ MCPWM_INTF_SET_ILIM0_F_SET_Msk

#define MCPWM_INTF_SET_ILIM0_F_SET_Msk (0x1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

ILIM0_F_SET (Bitfield-Mask: 0x01)

◆ MCPWM_INTF_SET_ILIM0_F_SET_Pos

#define MCPWM_INTF_SET_ILIM0_F_SET_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

ILIM0_F_SET (Bit 0)

◆ MCPWM_INTF_SET_ILIM1_F_SET_Msk

#define MCPWM_INTF_SET_ILIM1_F_SET_Msk (0x10UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

ILIM1_F_SET (Bitfield-Mask: 0x01)

◆ MCPWM_INTF_SET_ILIM1_F_SET_Pos

#define MCPWM_INTF_SET_ILIM1_F_SET_Pos (4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

ILIM1_F_SET (Bit 4)

◆ MCPWM_INTF_SET_ILIM2_F_SET_Msk

#define MCPWM_INTF_SET_ILIM2_F_SET_Msk (0x100UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

ILIM2_F_SET (Bitfield-Mask: 0x01)

◆ MCPWM_INTF_SET_ILIM2_F_SET_Pos

#define MCPWM_INTF_SET_ILIM2_F_SET_Pos (8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

ILIM2_F_SET (Bit 8)

◆ MCPWM_INTF_SET_IMAT0_F_SET_Msk

#define MCPWM_INTF_SET_IMAT0_F_SET_Msk (0x2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

IMAT0_F_SET (Bitfield-Mask: 0x01)

◆ MCPWM_INTF_SET_IMAT0_F_SET_Pos

#define MCPWM_INTF_SET_IMAT0_F_SET_Pos (1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

IMAT0_F_SET (Bit 1)

◆ MCPWM_INTF_SET_IMAT1_F_SET_Msk

#define MCPWM_INTF_SET_IMAT1_F_SET_Msk (0x20UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

IMAT1_F_SET (Bitfield-Mask: 0x01)

◆ MCPWM_INTF_SET_IMAT1_F_SET_Pos

#define MCPWM_INTF_SET_IMAT1_F_SET_Pos (5UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

IMAT1_F_SET (Bit 5)

◆ MCPWM_INTF_SET_IMAT2_F_SET_Msk

#define MCPWM_INTF_SET_IMAT2_F_SET_Msk (0x200UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

IMAT2_F_SET (Bitfield-Mask: 0x01)

◆ MCPWM_INTF_SET_IMAT2_F_SET_Pos

#define MCPWM_INTF_SET_IMAT2_F_SET_Pos (9UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

IMAT2_F_SET (Bit 9)

◆ PINCONNECT_I2CPADCFG_SCLDRV0_Msk

#define PINCONNECT_I2CPADCFG_SCLDRV0_Msk (0x4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

SCLDRV0 (Bitfield-Mask: 0x01)

◆ PINCONNECT_I2CPADCFG_SCLDRV0_Pos

#define PINCONNECT_I2CPADCFG_SCLDRV0_Pos (2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

SCLDRV0 (Bit 2)

◆ PINCONNECT_I2CPADCFG_SCLI2C0_Msk

#define PINCONNECT_I2CPADCFG_SCLI2C0_Msk (0x8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

SCLI2C0 (Bitfield-Mask: 0x01)

◆ PINCONNECT_I2CPADCFG_SCLI2C0_Pos

#define PINCONNECT_I2CPADCFG_SCLI2C0_Pos (3UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

SCLI2C0 (Bit 3)

◆ PINCONNECT_I2CPADCFG_SDADRV0_Msk

#define PINCONNECT_I2CPADCFG_SDADRV0_Msk (0x1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

SDADRV0 (Bitfield-Mask: 0x01)

◆ PINCONNECT_I2CPADCFG_SDADRV0_Pos

#define PINCONNECT_I2CPADCFG_SDADRV0_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

SDADRV0 (Bit 0)

◆ PINCONNECT_I2CPADCFG_SDAI2C0_Msk

#define PINCONNECT_I2CPADCFG_SDAI2C0_Msk (0x2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

SDAI2C0 (Bitfield-Mask: 0x01)

◆ PINCONNECT_I2CPADCFG_SDAI2C0_Pos

#define PINCONNECT_I2CPADCFG_SDAI2C0_Pos (1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

SDAI2C0 (Bit 1)

◆ PINCONNECT_PINMODE0_P0_00MODE_Msk

#define PINCONNECT_PINMODE0_P0_00MODE_Msk (0x3UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_00MODE (Bitfield-Mask: 0x03)

◆ PINCONNECT_PINMODE0_P0_00MODE_Pos

#define PINCONNECT_PINMODE0_P0_00MODE_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_00MODE (Bit 0)

◆ PINCONNECT_PINMODE0_P0_01MODE_Msk

#define PINCONNECT_PINMODE0_P0_01MODE_Msk (0xcUL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_01MODE (Bitfield-Mask: 0x03)

◆ PINCONNECT_PINMODE0_P0_01MODE_Pos

#define PINCONNECT_PINMODE0_P0_01MODE_Pos (2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_01MODE (Bit 2)

◆ PINCONNECT_PINMODE0_P0_02MODE_Msk

#define PINCONNECT_PINMODE0_P0_02MODE_Msk (0x30UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_02MODE (Bitfield-Mask: 0x03)

◆ PINCONNECT_PINMODE0_P0_02MODE_Pos

#define PINCONNECT_PINMODE0_P0_02MODE_Pos (4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_02MODE (Bit 4)

◆ PINCONNECT_PINMODE0_P0_03MODE_Msk

#define PINCONNECT_PINMODE0_P0_03MODE_Msk (0xc0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_03MODE (Bitfield-Mask: 0x03)

◆ PINCONNECT_PINMODE0_P0_03MODE_Pos

#define PINCONNECT_PINMODE0_P0_03MODE_Pos (6UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_03MODE (Bit 6)

◆ PINCONNECT_PINMODE0_P0_04MODE_Msk

#define PINCONNECT_PINMODE0_P0_04MODE_Msk (0x300UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_04MODE (Bitfield-Mask: 0x03)

◆ PINCONNECT_PINMODE0_P0_04MODE_Pos

#define PINCONNECT_PINMODE0_P0_04MODE_Pos (8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_04MODE (Bit 8)

◆ PINCONNECT_PINMODE0_P0_05MODE_Msk

#define PINCONNECT_PINMODE0_P0_05MODE_Msk (0xc00UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_05MODE (Bitfield-Mask: 0x03)

◆ PINCONNECT_PINMODE0_P0_05MODE_Pos

#define PINCONNECT_PINMODE0_P0_05MODE_Pos (10UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_05MODE (Bit 10)

◆ PINCONNECT_PINMODE0_P0_06MODE_Msk

#define PINCONNECT_PINMODE0_P0_06MODE_Msk (0x3000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_06MODE (Bitfield-Mask: 0x03)

◆ PINCONNECT_PINMODE0_P0_06MODE_Pos

#define PINCONNECT_PINMODE0_P0_06MODE_Pos (12UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_06MODE (Bit 12)

◆ PINCONNECT_PINMODE0_P0_07MODE_Msk

#define PINCONNECT_PINMODE0_P0_07MODE_Msk (0xc000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_07MODE (Bitfield-Mask: 0x03)

◆ PINCONNECT_PINMODE0_P0_07MODE_Pos

#define PINCONNECT_PINMODE0_P0_07MODE_Pos (14UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_07MODE (Bit 14)

◆ PINCONNECT_PINMODE0_P0_08MODE_Msk

#define PINCONNECT_PINMODE0_P0_08MODE_Msk (0x30000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_08MODE (Bitfield-Mask: 0x03)

◆ PINCONNECT_PINMODE0_P0_08MODE_Pos

#define PINCONNECT_PINMODE0_P0_08MODE_Pos (16UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_08MODE (Bit 16)

◆ PINCONNECT_PINMODE0_P0_09MODE_Msk

#define PINCONNECT_PINMODE0_P0_09MODE_Msk (0xc0000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_09MODE (Bitfield-Mask: 0x03)

◆ PINCONNECT_PINMODE0_P0_09MODE_Pos

#define PINCONNECT_PINMODE0_P0_09MODE_Pos (18UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_09MODE (Bit 18)

◆ PINCONNECT_PINMODE0_P0_10MODE_Msk

#define PINCONNECT_PINMODE0_P0_10MODE_Msk (0x300000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_10MODE (Bitfield-Mask: 0x03)

◆ PINCONNECT_PINMODE0_P0_10MODE_Pos

#define PINCONNECT_PINMODE0_P0_10MODE_Pos (20UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_10MODE (Bit 20)

◆ PINCONNECT_PINMODE0_P0_11MODE_Msk

#define PINCONNECT_PINMODE0_P0_11MODE_Msk (0xc00000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_11MODE (Bitfield-Mask: 0x03)

◆ PINCONNECT_PINMODE0_P0_11MODE_Pos

#define PINCONNECT_PINMODE0_P0_11MODE_Pos (22UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_11MODE (Bit 22)

◆ PINCONNECT_PINMODE0_P0_15MODE_Msk

#define PINCONNECT_PINMODE0_P0_15MODE_Msk (0xc0000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_15MODE (Bitfield-Mask: 0x03)

◆ PINCONNECT_PINMODE0_P0_15MODE_Pos

#define PINCONNECT_PINMODE0_P0_15MODE_Pos (30UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_15MODE (Bit 30)

◆ PINCONNECT_PINMODE1_P0_16MODE_Msk

#define PINCONNECT_PINMODE1_P0_16MODE_Msk (0x3UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_16MODE (Bitfield-Mask: 0x03)

◆ PINCONNECT_PINMODE1_P0_16MODE_Pos

#define PINCONNECT_PINMODE1_P0_16MODE_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_16MODE (Bit 0)

◆ PINCONNECT_PINMODE1_P0_17MODE_Msk

#define PINCONNECT_PINMODE1_P0_17MODE_Msk (0xcUL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_17MODE (Bitfield-Mask: 0x03)

◆ PINCONNECT_PINMODE1_P0_17MODE_Pos

#define PINCONNECT_PINMODE1_P0_17MODE_Pos (2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_17MODE (Bit 2)

◆ PINCONNECT_PINMODE1_P0_18MODE_Msk

#define PINCONNECT_PINMODE1_P0_18MODE_Msk (0x30UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_18MODE (Bitfield-Mask: 0x03)

◆ PINCONNECT_PINMODE1_P0_18MODE_Pos

#define PINCONNECT_PINMODE1_P0_18MODE_Pos (4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_18MODE (Bit 4)

◆ PINCONNECT_PINMODE1_P0_19MODE_Msk

#define PINCONNECT_PINMODE1_P0_19MODE_Msk (0xc0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_19MODE (Bitfield-Mask: 0x03)

◆ PINCONNECT_PINMODE1_P0_19MODE_Pos

#define PINCONNECT_PINMODE1_P0_19MODE_Pos (6UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_19MODE (Bit 6)

◆ PINCONNECT_PINMODE1_P0_20MODE_Msk

#define PINCONNECT_PINMODE1_P0_20MODE_Msk (0x300UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_20MODE (Bitfield-Mask: 0x03)

◆ PINCONNECT_PINMODE1_P0_20MODE_Pos

#define PINCONNECT_PINMODE1_P0_20MODE_Pos (8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_20MODE (Bit 8)

◆ PINCONNECT_PINMODE1_P0_21MODE_Msk

#define PINCONNECT_PINMODE1_P0_21MODE_Msk (0xc00UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_21MODE (Bitfield-Mask: 0x03)

◆ PINCONNECT_PINMODE1_P0_21MODE_Pos

#define PINCONNECT_PINMODE1_P0_21MODE_Pos (10UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_21MODE (Bit 10)

◆ PINCONNECT_PINMODE1_P0_22MODE_Msk

#define PINCONNECT_PINMODE1_P0_22MODE_Msk (0x3000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_22MODE (Bitfield-Mask: 0x03)

◆ PINCONNECT_PINMODE1_P0_22MODE_Pos

#define PINCONNECT_PINMODE1_P0_22MODE_Pos (12UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_22MODE (Bit 12)

◆ PINCONNECT_PINMODE1_P0_23MODE_Msk

#define PINCONNECT_PINMODE1_P0_23MODE_Msk (0xc000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_23MODE (Bitfield-Mask: 0x03)

◆ PINCONNECT_PINMODE1_P0_23MODE_Pos

#define PINCONNECT_PINMODE1_P0_23MODE_Pos (14UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_23MODE (Bit 14)

◆ PINCONNECT_PINMODE1_P0_24MODE_Msk

#define PINCONNECT_PINMODE1_P0_24MODE_Msk (0x30000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_24MODE (Bitfield-Mask: 0x03)

◆ PINCONNECT_PINMODE1_P0_24MODE_Pos

#define PINCONNECT_PINMODE1_P0_24MODE_Pos (16UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_24MODE (Bit 16)

◆ PINCONNECT_PINMODE1_P0_25MODE_Msk

#define PINCONNECT_PINMODE1_P0_25MODE_Msk (0xc0000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_25MODE (Bitfield-Mask: 0x03)

◆ PINCONNECT_PINMODE1_P0_25MODE_Pos

#define PINCONNECT_PINMODE1_P0_25MODE_Pos (18UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_25MODE (Bit 18)

◆ PINCONNECT_PINMODE1_P0_26MODE_Msk

#define PINCONNECT_PINMODE1_P0_26MODE_Msk (0x300000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_26MODE (Bitfield-Mask: 0x03)

◆ PINCONNECT_PINMODE1_P0_26MODE_Pos

#define PINCONNECT_PINMODE1_P0_26MODE_Pos (20UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_26MODE (Bit 20)

◆ PINCONNECT_PINMODE2_P1_00MODE_Msk

#define PINCONNECT_PINMODE2_P1_00MODE_Msk (0x3UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P1_00MODE (Bitfield-Mask: 0x03)

◆ PINCONNECT_PINMODE2_P1_00MODE_Pos

#define PINCONNECT_PINMODE2_P1_00MODE_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P1_00MODE (Bit 0)

◆ PINCONNECT_PINMODE2_P1_01MODE_Msk

#define PINCONNECT_PINMODE2_P1_01MODE_Msk (0xcUL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P1_01MODE (Bitfield-Mask: 0x03)

◆ PINCONNECT_PINMODE2_P1_01MODE_Pos

#define PINCONNECT_PINMODE2_P1_01MODE_Pos (2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P1_01MODE (Bit 2)

◆ PINCONNECT_PINMODE2_P1_04MODE_Msk

#define PINCONNECT_PINMODE2_P1_04MODE_Msk (0x300UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P1_04MODE (Bitfield-Mask: 0x03)

◆ PINCONNECT_PINMODE2_P1_04MODE_Pos

#define PINCONNECT_PINMODE2_P1_04MODE_Pos (8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P1_04MODE (Bit 8)

◆ PINCONNECT_PINMODE2_P1_08MODE_Msk

#define PINCONNECT_PINMODE2_P1_08MODE_Msk (0x30000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P1_08MODE (Bitfield-Mask: 0x03)

◆ PINCONNECT_PINMODE2_P1_08MODE_Pos

#define PINCONNECT_PINMODE2_P1_08MODE_Pos (16UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P1_08MODE (Bit 16)

◆ PINCONNECT_PINMODE2_P1_09MODE_Msk

#define PINCONNECT_PINMODE2_P1_09MODE_Msk (0xc0000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P1_09MODE (Bitfield-Mask: 0x03)

◆ PINCONNECT_PINMODE2_P1_09MODE_Pos

#define PINCONNECT_PINMODE2_P1_09MODE_Pos (18UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P1_09MODE (Bit 18)

◆ PINCONNECT_PINMODE2_P1_10MODE_Msk

#define PINCONNECT_PINMODE2_P1_10MODE_Msk (0x300000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P1_10MODE (Bitfield-Mask: 0x03)

◆ PINCONNECT_PINMODE2_P1_10MODE_Pos

#define PINCONNECT_PINMODE2_P1_10MODE_Pos (20UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P1_10MODE (Bit 20)

◆ PINCONNECT_PINMODE2_P1_14MODE_Msk

#define PINCONNECT_PINMODE2_P1_14MODE_Msk (0x30000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P1_14MODE (Bitfield-Mask: 0x03)

◆ PINCONNECT_PINMODE2_P1_14MODE_Pos

#define PINCONNECT_PINMODE2_P1_14MODE_Pos (28UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P1_14MODE (Bit 28)

◆ PINCONNECT_PINMODE2_P1_15MODE_Msk

#define PINCONNECT_PINMODE2_P1_15MODE_Msk (0xc0000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P1_15MODE (Bitfield-Mask: 0x03)

◆ PINCONNECT_PINMODE2_P1_15MODE_Pos

#define PINCONNECT_PINMODE2_P1_15MODE_Pos (30UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P1_15MODE (Bit 30)

◆ PINCONNECT_PINMODE3_P1_16MODE_Msk

#define PINCONNECT_PINMODE3_P1_16MODE_Msk (0x3UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P1_16MODE (Bitfield-Mask: 0x03)

◆ PINCONNECT_PINMODE3_P1_16MODE_Pos

#define PINCONNECT_PINMODE3_P1_16MODE_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P1_16MODE (Bit 0)

◆ PINCONNECT_PINMODE3_P1_17MODE_Msk

#define PINCONNECT_PINMODE3_P1_17MODE_Msk (0xcUL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P1_17MODE (Bitfield-Mask: 0x03)

◆ PINCONNECT_PINMODE3_P1_17MODE_Pos

#define PINCONNECT_PINMODE3_P1_17MODE_Pos (2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P1_17MODE (Bit 2)

◆ PINCONNECT_PINMODE3_P1_18MODE_Msk

#define PINCONNECT_PINMODE3_P1_18MODE_Msk (0x30UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P1_18MODE (Bitfield-Mask: 0x03)

◆ PINCONNECT_PINMODE3_P1_18MODE_Pos

#define PINCONNECT_PINMODE3_P1_18MODE_Pos (4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P1_18MODE (Bit 4)

◆ PINCONNECT_PINMODE3_P1_19MODE_Msk

#define PINCONNECT_PINMODE3_P1_19MODE_Msk (0xc0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P1_19MODE (Bitfield-Mask: 0x03)

◆ PINCONNECT_PINMODE3_P1_19MODE_Pos

#define PINCONNECT_PINMODE3_P1_19MODE_Pos (6UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P1_19MODE (Bit 6)

◆ PINCONNECT_PINMODE3_P1_20MODE_Msk

#define PINCONNECT_PINMODE3_P1_20MODE_Msk (0x300UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P1_20MODE (Bitfield-Mask: 0x03)

◆ PINCONNECT_PINMODE3_P1_20MODE_Pos

#define PINCONNECT_PINMODE3_P1_20MODE_Pos (8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P1_20MODE (Bit 8)

◆ PINCONNECT_PINMODE3_P1_21MODE_Msk

#define PINCONNECT_PINMODE3_P1_21MODE_Msk (0xc00UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P1_21MODE (Bitfield-Mask: 0x03)

◆ PINCONNECT_PINMODE3_P1_21MODE_Pos

#define PINCONNECT_PINMODE3_P1_21MODE_Pos (10UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P1_21MODE (Bit 10)

◆ PINCONNECT_PINMODE3_P1_22MODE_Msk

#define PINCONNECT_PINMODE3_P1_22MODE_Msk (0x3000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P1_22MODE (Bitfield-Mask: 0x03)

◆ PINCONNECT_PINMODE3_P1_22MODE_Pos

#define PINCONNECT_PINMODE3_P1_22MODE_Pos (12UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P1_22MODE (Bit 12)

◆ PINCONNECT_PINMODE3_P1_23MODE_Msk

#define PINCONNECT_PINMODE3_P1_23MODE_Msk (0xc000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P1_23MODE (Bitfield-Mask: 0x03)

◆ PINCONNECT_PINMODE3_P1_23MODE_Pos

#define PINCONNECT_PINMODE3_P1_23MODE_Pos (14UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P1_23MODE (Bit 14)

◆ PINCONNECT_PINMODE3_P1_24MODE_Msk

#define PINCONNECT_PINMODE3_P1_24MODE_Msk (0x30000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P1_24MODE (Bitfield-Mask: 0x03)

◆ PINCONNECT_PINMODE3_P1_24MODE_Pos

#define PINCONNECT_PINMODE3_P1_24MODE_Pos (16UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P1_24MODE (Bit 16)

◆ PINCONNECT_PINMODE3_P1_25MODE_Msk

#define PINCONNECT_PINMODE3_P1_25MODE_Msk (0xc0000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P1_25MODE (Bitfield-Mask: 0x03)

◆ PINCONNECT_PINMODE3_P1_25MODE_Pos

#define PINCONNECT_PINMODE3_P1_25MODE_Pos (18UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P1_25MODE (Bit 18)

◆ PINCONNECT_PINMODE3_P1_26MODE_Msk

#define PINCONNECT_PINMODE3_P1_26MODE_Msk (0x300000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P1_26MODE (Bitfield-Mask: 0x03)

◆ PINCONNECT_PINMODE3_P1_26MODE_Pos

#define PINCONNECT_PINMODE3_P1_26MODE_Pos (20UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P1_26MODE (Bit 20)

◆ PINCONNECT_PINMODE3_P1_27MODE_Msk

#define PINCONNECT_PINMODE3_P1_27MODE_Msk (0xc00000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P1_27MODE (Bitfield-Mask: 0x03)

◆ PINCONNECT_PINMODE3_P1_27MODE_Pos

#define PINCONNECT_PINMODE3_P1_27MODE_Pos (22UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P1_27MODE (Bit 22)

◆ PINCONNECT_PINMODE3_P1_28MODE_Msk

#define PINCONNECT_PINMODE3_P1_28MODE_Msk (0x3000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P1_28MODE (Bitfield-Mask: 0x03)

◆ PINCONNECT_PINMODE3_P1_28MODE_Pos

#define PINCONNECT_PINMODE3_P1_28MODE_Pos (24UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P1_28MODE (Bit 24)

◆ PINCONNECT_PINMODE3_P1_29MODE_Msk

#define PINCONNECT_PINMODE3_P1_29MODE_Msk (0xc000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P1_29MODE (Bitfield-Mask: 0x03)

◆ PINCONNECT_PINMODE3_P1_29MODE_Pos

#define PINCONNECT_PINMODE3_P1_29MODE_Pos (26UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P1_29MODE (Bit 26)

◆ PINCONNECT_PINMODE3_P1_30MODE_Msk

#define PINCONNECT_PINMODE3_P1_30MODE_Msk (0x30000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P1_30MODE (Bitfield-Mask: 0x03)

◆ PINCONNECT_PINMODE3_P1_30MODE_Pos

#define PINCONNECT_PINMODE3_P1_30MODE_Pos (28UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P1_30MODE (Bit 28)

◆ PINCONNECT_PINMODE3_P1_31MODE_Msk

#define PINCONNECT_PINMODE3_P1_31MODE_Msk (0xc0000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P1_31MODE (Bitfield-Mask: 0x03)

◆ PINCONNECT_PINMODE3_P1_31MODE_Pos

#define PINCONNECT_PINMODE3_P1_31MODE_Pos (30UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P1_31MODE (Bit 30)

◆ PINCONNECT_PINMODE4_P2_00MODE_Msk

#define PINCONNECT_PINMODE4_P2_00MODE_Msk (0x3UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P2_00MODE (Bitfield-Mask: 0x03)

◆ PINCONNECT_PINMODE4_P2_00MODE_Pos

#define PINCONNECT_PINMODE4_P2_00MODE_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P2_00MODE (Bit 0)

◆ PINCONNECT_PINMODE4_P2_01MODE_Msk

#define PINCONNECT_PINMODE4_P2_01MODE_Msk (0xcUL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P2_01MODE (Bitfield-Mask: 0x03)

◆ PINCONNECT_PINMODE4_P2_01MODE_Pos

#define PINCONNECT_PINMODE4_P2_01MODE_Pos (2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P2_01MODE (Bit 2)

◆ PINCONNECT_PINMODE4_P2_02MODE_Msk

#define PINCONNECT_PINMODE4_P2_02MODE_Msk (0x30UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P2_02MODE (Bitfield-Mask: 0x03)

◆ PINCONNECT_PINMODE4_P2_02MODE_Pos

#define PINCONNECT_PINMODE4_P2_02MODE_Pos (4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P2_02MODE (Bit 4)

◆ PINCONNECT_PINMODE4_P2_03MODE_Msk

#define PINCONNECT_PINMODE4_P2_03MODE_Msk (0xc0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P2_03MODE (Bitfield-Mask: 0x03)

◆ PINCONNECT_PINMODE4_P2_03MODE_Pos

#define PINCONNECT_PINMODE4_P2_03MODE_Pos (6UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P2_03MODE (Bit 6)

◆ PINCONNECT_PINMODE4_P2_04MODE_Msk

#define PINCONNECT_PINMODE4_P2_04MODE_Msk (0x300UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P2_04MODE (Bitfield-Mask: 0x03)

◆ PINCONNECT_PINMODE4_P2_04MODE_Pos

#define PINCONNECT_PINMODE4_P2_04MODE_Pos (8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P2_04MODE (Bit 8)

◆ PINCONNECT_PINMODE4_P2_05MODE_Msk

#define PINCONNECT_PINMODE4_P2_05MODE_Msk (0xc00UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P2_05MODE (Bitfield-Mask: 0x03)

◆ PINCONNECT_PINMODE4_P2_05MODE_Pos

#define PINCONNECT_PINMODE4_P2_05MODE_Pos (10UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P2_05MODE (Bit 10)

◆ PINCONNECT_PINMODE4_P2_06MODE_Msk

#define PINCONNECT_PINMODE4_P2_06MODE_Msk (0x3000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P2_06MODE (Bitfield-Mask: 0x03)

◆ PINCONNECT_PINMODE4_P2_06MODE_Pos

#define PINCONNECT_PINMODE4_P2_06MODE_Pos (12UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P2_06MODE (Bit 12)

◆ PINCONNECT_PINMODE4_P2_07MODE_Msk

#define PINCONNECT_PINMODE4_P2_07MODE_Msk (0xc000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P2_07MODE (Bitfield-Mask: 0x03)

◆ PINCONNECT_PINMODE4_P2_07MODE_Pos

#define PINCONNECT_PINMODE4_P2_07MODE_Pos (14UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P2_07MODE (Bit 14)

◆ PINCONNECT_PINMODE4_P2_08MODE_Msk

#define PINCONNECT_PINMODE4_P2_08MODE_Msk (0x30000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P2_08MODE (Bitfield-Mask: 0x03)

◆ PINCONNECT_PINMODE4_P2_08MODE_Pos

#define PINCONNECT_PINMODE4_P2_08MODE_Pos (16UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P2_08MODE (Bit 16)

◆ PINCONNECT_PINMODE4_P2_09MODE_Msk

#define PINCONNECT_PINMODE4_P2_09MODE_Msk (0xc0000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P2_09MODE (Bitfield-Mask: 0x03)

◆ PINCONNECT_PINMODE4_P2_09MODE_Pos

#define PINCONNECT_PINMODE4_P2_09MODE_Pos (18UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P2_09MODE (Bit 18)

◆ PINCONNECT_PINMODE4_P2_10MODE_Msk

#define PINCONNECT_PINMODE4_P2_10MODE_Msk (0x300000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P2_10MODE (Bitfield-Mask: 0x03)

◆ PINCONNECT_PINMODE4_P2_10MODE_Pos

#define PINCONNECT_PINMODE4_P2_10MODE_Pos (20UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P2_10MODE (Bit 20)

◆ PINCONNECT_PINMODE4_P2_11MODE_Msk

#define PINCONNECT_PINMODE4_P2_11MODE_Msk (0xc00000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P2_11MODE (Bitfield-Mask: 0x03)

◆ PINCONNECT_PINMODE4_P2_11MODE_Pos

#define PINCONNECT_PINMODE4_P2_11MODE_Pos (22UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P2_11MODE (Bit 22)

◆ PINCONNECT_PINMODE4_P2_12MODE_Msk

#define PINCONNECT_PINMODE4_P2_12MODE_Msk (0x3000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P2_12MODE (Bitfield-Mask: 0x03)

◆ PINCONNECT_PINMODE4_P2_12MODE_Pos

#define PINCONNECT_PINMODE4_P2_12MODE_Pos (24UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P2_12MODE (Bit 24)

◆ PINCONNECT_PINMODE4_P2_13MODE_Msk

#define PINCONNECT_PINMODE4_P2_13MODE_Msk (0xc000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P2_13MODE (Bitfield-Mask: 0x03)

◆ PINCONNECT_PINMODE4_P2_13MODE_Pos

#define PINCONNECT_PINMODE4_P2_13MODE_Pos (26UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P2_13MODE (Bit 26)

◆ PINCONNECT_PINMODE7_P3_25MODE_Msk

#define PINCONNECT_PINMODE7_P3_25MODE_Msk (0xc0000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P3_25MODE (Bitfield-Mask: 0x03)

◆ PINCONNECT_PINMODE7_P3_25MODE_Pos

#define PINCONNECT_PINMODE7_P3_25MODE_Pos (18UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P3_25MODE (Bit 18)

◆ PINCONNECT_PINMODE7_P3_26MODE_Msk

#define PINCONNECT_PINMODE7_P3_26MODE_Msk (0x300000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P3_26MODE (Bitfield-Mask: 0x03)

◆ PINCONNECT_PINMODE7_P3_26MODE_Pos

#define PINCONNECT_PINMODE7_P3_26MODE_Pos (20UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P3_26MODE (Bit 20)

◆ PINCONNECT_PINMODE9_P4_28MODE_Msk

#define PINCONNECT_PINMODE9_P4_28MODE_Msk (0x3000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P4_28MODE (Bitfield-Mask: 0x03)

◆ PINCONNECT_PINMODE9_P4_28MODE_Pos

#define PINCONNECT_PINMODE9_P4_28MODE_Pos (24UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P4_28MODE (Bit 24)

◆ PINCONNECT_PINMODE9_P4_29MODE_Msk

#define PINCONNECT_PINMODE9_P4_29MODE_Msk (0xc000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P4_29MODE (Bitfield-Mask: 0x03)

◆ PINCONNECT_PINMODE9_P4_29MODE_Pos

#define PINCONNECT_PINMODE9_P4_29MODE_Pos (26UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P4_29MODE (Bit 26)

◆ PINCONNECT_PINMODE_OD0_P0_00OD_Msk

#define PINCONNECT_PINMODE_OD0_P0_00OD_Msk (0x1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_00OD (Bitfield-Mask: 0x01)

◆ PINCONNECT_PINMODE_OD0_P0_00OD_Pos

#define PINCONNECT_PINMODE_OD0_P0_00OD_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_00OD (Bit 0)

◆ PINCONNECT_PINMODE_OD0_P0_01OD_Msk

#define PINCONNECT_PINMODE_OD0_P0_01OD_Msk (0x2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_01OD (Bitfield-Mask: 0x01)

◆ PINCONNECT_PINMODE_OD0_P0_01OD_Pos

#define PINCONNECT_PINMODE_OD0_P0_01OD_Pos (1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_01OD (Bit 1)

◆ PINCONNECT_PINMODE_OD0_P0_02OD_Msk

#define PINCONNECT_PINMODE_OD0_P0_02OD_Msk (0x4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_02OD (Bitfield-Mask: 0x01)

◆ PINCONNECT_PINMODE_OD0_P0_02OD_Pos

#define PINCONNECT_PINMODE_OD0_P0_02OD_Pos (2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_02OD (Bit 2)

◆ PINCONNECT_PINMODE_OD0_P0_03OD_Msk

#define PINCONNECT_PINMODE_OD0_P0_03OD_Msk (0x8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_03OD (Bitfield-Mask: 0x01)

◆ PINCONNECT_PINMODE_OD0_P0_03OD_Pos

#define PINCONNECT_PINMODE_OD0_P0_03OD_Pos (3UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_03OD (Bit 3)

◆ PINCONNECT_PINMODE_OD0_P0_04OD_Msk

#define PINCONNECT_PINMODE_OD0_P0_04OD_Msk (0x10UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_04OD (Bitfield-Mask: 0x01)

◆ PINCONNECT_PINMODE_OD0_P0_04OD_Pos

#define PINCONNECT_PINMODE_OD0_P0_04OD_Pos (4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_04OD (Bit 4)

◆ PINCONNECT_PINMODE_OD0_P0_05OD_Msk

#define PINCONNECT_PINMODE_OD0_P0_05OD_Msk (0x20UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_05OD (Bitfield-Mask: 0x01)

◆ PINCONNECT_PINMODE_OD0_P0_05OD_Pos

#define PINCONNECT_PINMODE_OD0_P0_05OD_Pos (5UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_05OD (Bit 5)

◆ PINCONNECT_PINMODE_OD0_P0_06OD_Msk

#define PINCONNECT_PINMODE_OD0_P0_06OD_Msk (0x40UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_06OD (Bitfield-Mask: 0x01)

◆ PINCONNECT_PINMODE_OD0_P0_06OD_Pos

#define PINCONNECT_PINMODE_OD0_P0_06OD_Pos (6UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_06OD (Bit 6)

◆ PINCONNECT_PINMODE_OD0_P0_07OD_Msk

#define PINCONNECT_PINMODE_OD0_P0_07OD_Msk (0x80UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_07OD (Bitfield-Mask: 0x01)

◆ PINCONNECT_PINMODE_OD0_P0_07OD_Pos

#define PINCONNECT_PINMODE_OD0_P0_07OD_Pos (7UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_07OD (Bit 7)

◆ PINCONNECT_PINMODE_OD0_P0_08OD_Msk

#define PINCONNECT_PINMODE_OD0_P0_08OD_Msk (0x100UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_08OD (Bitfield-Mask: 0x01)

◆ PINCONNECT_PINMODE_OD0_P0_08OD_Pos

#define PINCONNECT_PINMODE_OD0_P0_08OD_Pos (8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_08OD (Bit 8)

◆ PINCONNECT_PINMODE_OD0_P0_09OD_Msk

#define PINCONNECT_PINMODE_OD0_P0_09OD_Msk (0x200UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_09OD (Bitfield-Mask: 0x01)

◆ PINCONNECT_PINMODE_OD0_P0_09OD_Pos

#define PINCONNECT_PINMODE_OD0_P0_09OD_Pos (9UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_09OD (Bit 9)

◆ PINCONNECT_PINMODE_OD0_P0_10OD_Msk

#define PINCONNECT_PINMODE_OD0_P0_10OD_Msk (0x400UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_10OD (Bitfield-Mask: 0x01)

◆ PINCONNECT_PINMODE_OD0_P0_10OD_Pos

#define PINCONNECT_PINMODE_OD0_P0_10OD_Pos (10UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_10OD (Bit 10)

◆ PINCONNECT_PINMODE_OD0_P0_11OD_Msk

#define PINCONNECT_PINMODE_OD0_P0_11OD_Msk (0x800UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_11OD (Bitfield-Mask: 0x01)

◆ PINCONNECT_PINMODE_OD0_P0_11OD_Pos

#define PINCONNECT_PINMODE_OD0_P0_11OD_Pos (11UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_11OD (Bit 11)

◆ PINCONNECT_PINMODE_OD0_P0_15OD_Msk

#define PINCONNECT_PINMODE_OD0_P0_15OD_Msk (0x8000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_15OD (Bitfield-Mask: 0x01)

◆ PINCONNECT_PINMODE_OD0_P0_15OD_Pos

#define PINCONNECT_PINMODE_OD0_P0_15OD_Pos (15UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_15OD (Bit 15)

◆ PINCONNECT_PINMODE_OD0_P0_16OD_Msk

#define PINCONNECT_PINMODE_OD0_P0_16OD_Msk (0x10000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_16OD (Bitfield-Mask: 0x01)

◆ PINCONNECT_PINMODE_OD0_P0_16OD_Pos

#define PINCONNECT_PINMODE_OD0_P0_16OD_Pos (16UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_16OD (Bit 16)

◆ PINCONNECT_PINMODE_OD0_P0_17OD_Msk

#define PINCONNECT_PINMODE_OD0_P0_17OD_Msk (0x20000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_17OD (Bitfield-Mask: 0x01)

◆ PINCONNECT_PINMODE_OD0_P0_17OD_Pos

#define PINCONNECT_PINMODE_OD0_P0_17OD_Pos (17UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_17OD (Bit 17)

◆ PINCONNECT_PINMODE_OD0_P0_18OD_Msk

#define PINCONNECT_PINMODE_OD0_P0_18OD_Msk (0x40000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_18OD (Bitfield-Mask: 0x01)

◆ PINCONNECT_PINMODE_OD0_P0_18OD_Pos

#define PINCONNECT_PINMODE_OD0_P0_18OD_Pos (18UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_18OD (Bit 18)

◆ PINCONNECT_PINMODE_OD0_P0_19OD_Msk

#define PINCONNECT_PINMODE_OD0_P0_19OD_Msk (0x80000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_19OD (Bitfield-Mask: 0x01)

◆ PINCONNECT_PINMODE_OD0_P0_19OD_Pos

#define PINCONNECT_PINMODE_OD0_P0_19OD_Pos (19UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_19OD (Bit 19)

◆ PINCONNECT_PINMODE_OD0_P0_20OD_Msk

#define PINCONNECT_PINMODE_OD0_P0_20OD_Msk (0x100000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_20OD (Bitfield-Mask: 0x01)

◆ PINCONNECT_PINMODE_OD0_P0_20OD_Pos

#define PINCONNECT_PINMODE_OD0_P0_20OD_Pos (20UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_20OD (Bit 20)

◆ PINCONNECT_PINMODE_OD0_P0_21OD_Msk

#define PINCONNECT_PINMODE_OD0_P0_21OD_Msk (0x200000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_21OD (Bitfield-Mask: 0x01)

◆ PINCONNECT_PINMODE_OD0_P0_21OD_Pos

#define PINCONNECT_PINMODE_OD0_P0_21OD_Pos (21UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_21OD (Bit 21)

◆ PINCONNECT_PINMODE_OD0_P0_22OD_Msk

#define PINCONNECT_PINMODE_OD0_P0_22OD_Msk (0x400000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_22OD (Bitfield-Mask: 0x01)

◆ PINCONNECT_PINMODE_OD0_P0_22OD_Pos

#define PINCONNECT_PINMODE_OD0_P0_22OD_Pos (22UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_22OD (Bit 22)

◆ PINCONNECT_PINMODE_OD0_P0_23OD_Msk

#define PINCONNECT_PINMODE_OD0_P0_23OD_Msk (0x800000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_23OD (Bitfield-Mask: 0x01)

◆ PINCONNECT_PINMODE_OD0_P0_23OD_Pos

#define PINCONNECT_PINMODE_OD0_P0_23OD_Pos (23UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_23OD (Bit 23)

◆ PINCONNECT_PINMODE_OD0_P0_24OD_Msk

#define PINCONNECT_PINMODE_OD0_P0_24OD_Msk (0x1000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_24OD (Bitfield-Mask: 0x01)

◆ PINCONNECT_PINMODE_OD0_P0_24OD_Pos

#define PINCONNECT_PINMODE_OD0_P0_24OD_Pos (24UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_24OD (Bit 24)

◆ PINCONNECT_PINMODE_OD0_P0_25OD_Msk

#define PINCONNECT_PINMODE_OD0_P0_25OD_Msk (0x2000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_25OD (Bitfield-Mask: 0x01)

◆ PINCONNECT_PINMODE_OD0_P0_25OD_Pos

#define PINCONNECT_PINMODE_OD0_P0_25OD_Pos (25UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_25OD (Bit 25)

◆ PINCONNECT_PINMODE_OD0_P0_26OD_Msk

#define PINCONNECT_PINMODE_OD0_P0_26OD_Msk (0x4000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_26OD (Bitfield-Mask: 0x01)

◆ PINCONNECT_PINMODE_OD0_P0_26OD_Pos

#define PINCONNECT_PINMODE_OD0_P0_26OD_Pos (26UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_26OD (Bit 26)

◆ PINCONNECT_PINMODE_OD0_P0_29OD_Msk

#define PINCONNECT_PINMODE_OD0_P0_29OD_Msk (0x20000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_29OD (Bitfield-Mask: 0x01)

◆ PINCONNECT_PINMODE_OD0_P0_29OD_Pos

#define PINCONNECT_PINMODE_OD0_P0_29OD_Pos (29UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_29OD (Bit 29)

◆ PINCONNECT_PINMODE_OD0_P0_30OD_Msk

#define PINCONNECT_PINMODE_OD0_P0_30OD_Msk (0x40000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_30OD (Bitfield-Mask: 0x01)

◆ PINCONNECT_PINMODE_OD0_P0_30OD_Pos

#define PINCONNECT_PINMODE_OD0_P0_30OD_Pos (30UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_30OD (Bit 30)

◆ PINCONNECT_PINMODE_OD1_P1_00OD_Msk

#define PINCONNECT_PINMODE_OD1_P1_00OD_Msk (0x1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P1_00OD (Bitfield-Mask: 0x01)

◆ PINCONNECT_PINMODE_OD1_P1_00OD_Pos

#define PINCONNECT_PINMODE_OD1_P1_00OD_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P1_00OD (Bit 0)

◆ PINCONNECT_PINMODE_OD1_P1_01OD_Msk

#define PINCONNECT_PINMODE_OD1_P1_01OD_Msk (0x2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P1_01OD (Bitfield-Mask: 0x01)

◆ PINCONNECT_PINMODE_OD1_P1_01OD_Pos

#define PINCONNECT_PINMODE_OD1_P1_01OD_Pos (1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P1_01OD (Bit 1)

◆ PINCONNECT_PINMODE_OD1_P1_04OD_Msk

#define PINCONNECT_PINMODE_OD1_P1_04OD_Msk (0x10UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P1_04OD (Bitfield-Mask: 0x01)

◆ PINCONNECT_PINMODE_OD1_P1_04OD_Pos

#define PINCONNECT_PINMODE_OD1_P1_04OD_Pos (4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P1_04OD (Bit 4)

◆ PINCONNECT_PINMODE_OD1_P1_08OD_Msk

#define PINCONNECT_PINMODE_OD1_P1_08OD_Msk (0x100UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P1_08OD (Bitfield-Mask: 0x01)

◆ PINCONNECT_PINMODE_OD1_P1_08OD_Pos

#define PINCONNECT_PINMODE_OD1_P1_08OD_Pos (8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P1_08OD (Bit 8)

◆ PINCONNECT_PINMODE_OD1_P1_09OD_Msk

#define PINCONNECT_PINMODE_OD1_P1_09OD_Msk (0x200UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P1_09OD (Bitfield-Mask: 0x01)

◆ PINCONNECT_PINMODE_OD1_P1_09OD_Pos

#define PINCONNECT_PINMODE_OD1_P1_09OD_Pos (9UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P1_09OD (Bit 9)

◆ PINCONNECT_PINMODE_OD1_P1_10OD_Msk

#define PINCONNECT_PINMODE_OD1_P1_10OD_Msk (0x400UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P1_10OD (Bitfield-Mask: 0x01)

◆ PINCONNECT_PINMODE_OD1_P1_10OD_Pos

#define PINCONNECT_PINMODE_OD1_P1_10OD_Pos (10UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P1_10OD (Bit 10)

◆ PINCONNECT_PINMODE_OD1_P1_14OD_Msk

#define PINCONNECT_PINMODE_OD1_P1_14OD_Msk (0x4000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P1_14OD (Bitfield-Mask: 0x01)

◆ PINCONNECT_PINMODE_OD1_P1_14OD_Pos

#define PINCONNECT_PINMODE_OD1_P1_14OD_Pos (14UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P1_14OD (Bit 14)

◆ PINCONNECT_PINMODE_OD1_P1_15OD_Msk

#define PINCONNECT_PINMODE_OD1_P1_15OD_Msk (0x8000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P1_15OD (Bitfield-Mask: 0x01)

◆ PINCONNECT_PINMODE_OD1_P1_15OD_Pos

#define PINCONNECT_PINMODE_OD1_P1_15OD_Pos (15UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P1_15OD (Bit 15)

◆ PINCONNECT_PINMODE_OD1_P1_16OD_Msk

#define PINCONNECT_PINMODE_OD1_P1_16OD_Msk (0x10000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P1_16OD (Bitfield-Mask: 0x01)

◆ PINCONNECT_PINMODE_OD1_P1_16OD_Pos

#define PINCONNECT_PINMODE_OD1_P1_16OD_Pos (16UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P1_16OD (Bit 16)

◆ PINCONNECT_PINMODE_OD1_P1_17OD_Msk

#define PINCONNECT_PINMODE_OD1_P1_17OD_Msk (0x20000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P1_17OD (Bitfield-Mask: 0x01)

◆ PINCONNECT_PINMODE_OD1_P1_17OD_Pos

#define PINCONNECT_PINMODE_OD1_P1_17OD_Pos (17UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P1_17OD (Bit 17)

◆ PINCONNECT_PINMODE_OD1_P1_18OD_Msk

#define PINCONNECT_PINMODE_OD1_P1_18OD_Msk (0x40000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P1_18OD (Bitfield-Mask: 0x01)

◆ PINCONNECT_PINMODE_OD1_P1_18OD_Pos

#define PINCONNECT_PINMODE_OD1_P1_18OD_Pos (18UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P1_18OD (Bit 18)

◆ PINCONNECT_PINMODE_OD1_P1_19OD_Msk

#define PINCONNECT_PINMODE_OD1_P1_19OD_Msk (0x80000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P1_19OD (Bitfield-Mask: 0x01)

◆ PINCONNECT_PINMODE_OD1_P1_19OD_Pos

#define PINCONNECT_PINMODE_OD1_P1_19OD_Pos (19UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P1_19OD (Bit 19)

◆ PINCONNECT_PINMODE_OD1_P1_20OD_Msk

#define PINCONNECT_PINMODE_OD1_P1_20OD_Msk (0x100000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P1_20OD (Bitfield-Mask: 0x01)

◆ PINCONNECT_PINMODE_OD1_P1_20OD_Pos

#define PINCONNECT_PINMODE_OD1_P1_20OD_Pos (20UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P1_20OD (Bit 20)

◆ PINCONNECT_PINMODE_OD1_P1_21OD_Msk

#define PINCONNECT_PINMODE_OD1_P1_21OD_Msk (0x200000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P1_21OD (Bitfield-Mask: 0x01)

◆ PINCONNECT_PINMODE_OD1_P1_21OD_Pos

#define PINCONNECT_PINMODE_OD1_P1_21OD_Pos (21UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P1_21OD (Bit 21)

◆ PINCONNECT_PINMODE_OD1_P1_22OD_Msk

#define PINCONNECT_PINMODE_OD1_P1_22OD_Msk (0x400000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P1_22OD (Bitfield-Mask: 0x01)

◆ PINCONNECT_PINMODE_OD1_P1_22OD_Pos

#define PINCONNECT_PINMODE_OD1_P1_22OD_Pos (22UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P1_22OD (Bit 22)

◆ PINCONNECT_PINMODE_OD1_P1_23OD_Msk

#define PINCONNECT_PINMODE_OD1_P1_23OD_Msk (0x800000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P1_23OD (Bitfield-Mask: 0x01)

◆ PINCONNECT_PINMODE_OD1_P1_23OD_Pos

#define PINCONNECT_PINMODE_OD1_P1_23OD_Pos (23UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P1_23OD (Bit 23)

◆ PINCONNECT_PINMODE_OD1_P1_24OD_Msk

#define PINCONNECT_PINMODE_OD1_P1_24OD_Msk (0x1000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P1_24OD (Bitfield-Mask: 0x01)

◆ PINCONNECT_PINMODE_OD1_P1_24OD_Pos

#define PINCONNECT_PINMODE_OD1_P1_24OD_Pos (24UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P1_24OD (Bit 24)

◆ PINCONNECT_PINMODE_OD1_P1_25OD_Msk

#define PINCONNECT_PINMODE_OD1_P1_25OD_Msk (0x2000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P1_25OD (Bitfield-Mask: 0x01)

◆ PINCONNECT_PINMODE_OD1_P1_25OD_Pos

#define PINCONNECT_PINMODE_OD1_P1_25OD_Pos (25UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P1_25OD (Bit 25)

◆ PINCONNECT_PINMODE_OD1_P1_26OD_Msk

#define PINCONNECT_PINMODE_OD1_P1_26OD_Msk (0x4000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P1_26OD (Bitfield-Mask: 0x01)

◆ PINCONNECT_PINMODE_OD1_P1_26OD_Pos

#define PINCONNECT_PINMODE_OD1_P1_26OD_Pos (26UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P1_26OD (Bit 26)

◆ PINCONNECT_PINMODE_OD1_P1_27OD_Msk

#define PINCONNECT_PINMODE_OD1_P1_27OD_Msk (0x8000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P1_27OD (Bitfield-Mask: 0x01)

◆ PINCONNECT_PINMODE_OD1_P1_27OD_Pos

#define PINCONNECT_PINMODE_OD1_P1_27OD_Pos (27UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P1_27OD (Bit 27)

◆ PINCONNECT_PINMODE_OD1_P1_28OD_Msk

#define PINCONNECT_PINMODE_OD1_P1_28OD_Msk (0x10000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P1_28OD (Bitfield-Mask: 0x01)

◆ PINCONNECT_PINMODE_OD1_P1_28OD_Pos

#define PINCONNECT_PINMODE_OD1_P1_28OD_Pos (28UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P1_28OD (Bit 28)

◆ PINCONNECT_PINMODE_OD1_P1_29OD_Msk

#define PINCONNECT_PINMODE_OD1_P1_29OD_Msk (0x20000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P1_29OD (Bitfield-Mask: 0x01)

◆ PINCONNECT_PINMODE_OD1_P1_29OD_Pos

#define PINCONNECT_PINMODE_OD1_P1_29OD_Pos (29UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P1_29OD (Bit 29)

◆ PINCONNECT_PINMODE_OD1_P1_30OD_Msk

#define PINCONNECT_PINMODE_OD1_P1_30OD_Msk (0x40000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P1_30OD (Bitfield-Mask: 0x01)

◆ PINCONNECT_PINMODE_OD1_P1_30OD_Pos

#define PINCONNECT_PINMODE_OD1_P1_30OD_Pos (30UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P1_30OD (Bit 30)

◆ PINCONNECT_PINMODE_OD1_P1_31OD_Msk

#define PINCONNECT_PINMODE_OD1_P1_31OD_Msk (0x80000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P1_31OD (Bitfield-Mask: 0x01)

◆ PINCONNECT_PINMODE_OD1_P1_31OD_Pos

#define PINCONNECT_PINMODE_OD1_P1_31OD_Pos (31UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P1_31OD (Bit 31)

◆ PINCONNECT_PINMODE_OD2_P2_00OD_Msk

#define PINCONNECT_PINMODE_OD2_P2_00OD_Msk (0x1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P2_00OD (Bitfield-Mask: 0x01)

◆ PINCONNECT_PINMODE_OD2_P2_00OD_Pos

#define PINCONNECT_PINMODE_OD2_P2_00OD_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P2_00OD (Bit 0)

◆ PINCONNECT_PINMODE_OD2_P2_01OD_Msk

#define PINCONNECT_PINMODE_OD2_P2_01OD_Msk (0x2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P2_01OD (Bitfield-Mask: 0x01)

◆ PINCONNECT_PINMODE_OD2_P2_01OD_Pos

#define PINCONNECT_PINMODE_OD2_P2_01OD_Pos (1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P2_01OD (Bit 1)

◆ PINCONNECT_PINMODE_OD2_P2_02OD_Msk

#define PINCONNECT_PINMODE_OD2_P2_02OD_Msk (0x4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P2_02OD (Bitfield-Mask: 0x01)

◆ PINCONNECT_PINMODE_OD2_P2_02OD_Pos

#define PINCONNECT_PINMODE_OD2_P2_02OD_Pos (2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P2_02OD (Bit 2)

◆ PINCONNECT_PINMODE_OD2_P2_03OD_Msk

#define PINCONNECT_PINMODE_OD2_P2_03OD_Msk (0x8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P2_03OD (Bitfield-Mask: 0x01)

◆ PINCONNECT_PINMODE_OD2_P2_03OD_Pos

#define PINCONNECT_PINMODE_OD2_P2_03OD_Pos (3UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P2_03OD (Bit 3)

◆ PINCONNECT_PINMODE_OD2_P2_04OD_Msk

#define PINCONNECT_PINMODE_OD2_P2_04OD_Msk (0x10UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P2_04OD (Bitfield-Mask: 0x01)

◆ PINCONNECT_PINMODE_OD2_P2_04OD_Pos

#define PINCONNECT_PINMODE_OD2_P2_04OD_Pos (4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P2_04OD (Bit 4)

◆ PINCONNECT_PINMODE_OD2_P2_05OD_Msk

#define PINCONNECT_PINMODE_OD2_P2_05OD_Msk (0x20UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P2_05OD (Bitfield-Mask: 0x01)

◆ PINCONNECT_PINMODE_OD2_P2_05OD_Pos

#define PINCONNECT_PINMODE_OD2_P2_05OD_Pos (5UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P2_05OD (Bit 5)

◆ PINCONNECT_PINMODE_OD2_P2_06OD_Msk

#define PINCONNECT_PINMODE_OD2_P2_06OD_Msk (0x40UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P2_06OD (Bitfield-Mask: 0x01)

◆ PINCONNECT_PINMODE_OD2_P2_06OD_Pos

#define PINCONNECT_PINMODE_OD2_P2_06OD_Pos (6UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P2_06OD (Bit 6)

◆ PINCONNECT_PINMODE_OD2_P2_07OD_Msk

#define PINCONNECT_PINMODE_OD2_P2_07OD_Msk (0x80UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P2_07OD (Bitfield-Mask: 0x01)

◆ PINCONNECT_PINMODE_OD2_P2_07OD_Pos

#define PINCONNECT_PINMODE_OD2_P2_07OD_Pos (7UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P2_07OD (Bit 7)

◆ PINCONNECT_PINMODE_OD2_P2_08OD_Msk

#define PINCONNECT_PINMODE_OD2_P2_08OD_Msk (0x100UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P2_08OD (Bitfield-Mask: 0x01)

◆ PINCONNECT_PINMODE_OD2_P2_08OD_Pos

#define PINCONNECT_PINMODE_OD2_P2_08OD_Pos (8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P2_08OD (Bit 8)

◆ PINCONNECT_PINMODE_OD2_P2_09OD_Msk

#define PINCONNECT_PINMODE_OD2_P2_09OD_Msk (0x200UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P2_09OD (Bitfield-Mask: 0x01)

◆ PINCONNECT_PINMODE_OD2_P2_09OD_Pos

#define PINCONNECT_PINMODE_OD2_P2_09OD_Pos (9UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P2_09OD (Bit 9)

◆ PINCONNECT_PINMODE_OD2_P2_10OD_Msk

#define PINCONNECT_PINMODE_OD2_P2_10OD_Msk (0x400UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P2_10OD (Bitfield-Mask: 0x01)

◆ PINCONNECT_PINMODE_OD2_P2_10OD_Pos

#define PINCONNECT_PINMODE_OD2_P2_10OD_Pos (10UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P2_10OD (Bit 10)

◆ PINCONNECT_PINMODE_OD2_P2_11OD_Msk

#define PINCONNECT_PINMODE_OD2_P2_11OD_Msk (0x800UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P2_11OD (Bitfield-Mask: 0x01)

◆ PINCONNECT_PINMODE_OD2_P2_11OD_Pos

#define PINCONNECT_PINMODE_OD2_P2_11OD_Pos (11UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P2_11OD (Bit 11)

◆ PINCONNECT_PINMODE_OD2_P2_12OD_Msk

#define PINCONNECT_PINMODE_OD2_P2_12OD_Msk (0x1000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P2_12OD (Bitfield-Mask: 0x01)

◆ PINCONNECT_PINMODE_OD2_P2_12OD_Pos

#define PINCONNECT_PINMODE_OD2_P2_12OD_Pos (12UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P2_12OD (Bit 12)

◆ PINCONNECT_PINMODE_OD2_P2_13OD_Msk

#define PINCONNECT_PINMODE_OD2_P2_13OD_Msk (0x2000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P2_13OD (Bitfield-Mask: 0x01)

◆ PINCONNECT_PINMODE_OD2_P2_13OD_Pos

#define PINCONNECT_PINMODE_OD2_P2_13OD_Pos (13UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P2_13OD (Bit 13)

◆ PINCONNECT_PINMODE_OD3_P3_25OD_Msk

#define PINCONNECT_PINMODE_OD3_P3_25OD_Msk (0x2000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P3_25OD (Bitfield-Mask: 0x01)

◆ PINCONNECT_PINMODE_OD3_P3_25OD_Pos

#define PINCONNECT_PINMODE_OD3_P3_25OD_Pos (25UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P3_25OD (Bit 25)

◆ PINCONNECT_PINMODE_OD3_P3_26OD_Msk

#define PINCONNECT_PINMODE_OD3_P3_26OD_Msk (0x4000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P3_26OD (Bitfield-Mask: 0x01)

◆ PINCONNECT_PINMODE_OD3_P3_26OD_Pos

#define PINCONNECT_PINMODE_OD3_P3_26OD_Pos (26UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P3_26OD (Bit 26)

◆ PINCONNECT_PINMODE_OD4_P4_28OD_Msk

#define PINCONNECT_PINMODE_OD4_P4_28OD_Msk (0x10000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P4_28OD (Bitfield-Mask: 0x01)

◆ PINCONNECT_PINMODE_OD4_P4_28OD_Pos

#define PINCONNECT_PINMODE_OD4_P4_28OD_Pos (28UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P4_28OD (Bit 28)

◆ PINCONNECT_PINMODE_OD4_P4_29OD_Msk

#define PINCONNECT_PINMODE_OD4_P4_29OD_Msk (0x20000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P4_29OD (Bitfield-Mask: 0x01)

◆ PINCONNECT_PINMODE_OD4_P4_29OD_Pos

#define PINCONNECT_PINMODE_OD4_P4_29OD_Pos (29UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P4_29OD (Bit 29)

◆ PINCONNECT_PINSEL0_P0_0_Msk

#define PINCONNECT_PINSEL0_P0_0_Msk (0x3UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_0 (Bitfield-Mask: 0x03)

◆ PINCONNECT_PINSEL0_P0_0_Pos

#define PINCONNECT_PINSEL0_P0_0_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_0 (Bit 0)

◆ PINCONNECT_PINSEL0_P0_10_Msk

#define PINCONNECT_PINSEL0_P0_10_Msk (0x300000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_10 (Bitfield-Mask: 0x03)

◆ PINCONNECT_PINSEL0_P0_10_Pos

#define PINCONNECT_PINSEL0_P0_10_Pos (20UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_10 (Bit 20)

◆ PINCONNECT_PINSEL0_P0_11_Msk

#define PINCONNECT_PINSEL0_P0_11_Msk (0xc00000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_11 (Bitfield-Mask: 0x03)

◆ PINCONNECT_PINSEL0_P0_11_Pos

#define PINCONNECT_PINSEL0_P0_11_Pos (22UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_11 (Bit 22)

◆ PINCONNECT_PINSEL0_P0_15_Msk

#define PINCONNECT_PINSEL0_P0_15_Msk (0xc0000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_15 (Bitfield-Mask: 0x03)

◆ PINCONNECT_PINSEL0_P0_15_Pos

#define PINCONNECT_PINSEL0_P0_15_Pos (30UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_15 (Bit 30)

◆ PINCONNECT_PINSEL0_P0_1_Msk

#define PINCONNECT_PINSEL0_P0_1_Msk (0xcUL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_1 (Bitfield-Mask: 0x03)

◆ PINCONNECT_PINSEL0_P0_1_Pos

#define PINCONNECT_PINSEL0_P0_1_Pos (2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_1 (Bit 2)

◆ PINCONNECT_PINSEL0_P0_2_Msk

#define PINCONNECT_PINSEL0_P0_2_Msk (0x30UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_2 (Bitfield-Mask: 0x03)

◆ PINCONNECT_PINSEL0_P0_2_Pos

#define PINCONNECT_PINSEL0_P0_2_Pos (4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_2 (Bit 4)

◆ PINCONNECT_PINSEL0_P0_3_Msk

#define PINCONNECT_PINSEL0_P0_3_Msk (0xc0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_3 (Bitfield-Mask: 0x03)

◆ PINCONNECT_PINSEL0_P0_3_Pos

#define PINCONNECT_PINSEL0_P0_3_Pos (6UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_3 (Bit 6)

◆ PINCONNECT_PINSEL0_P0_4_Msk

#define PINCONNECT_PINSEL0_P0_4_Msk (0x300UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_4 (Bitfield-Mask: 0x03)

◆ PINCONNECT_PINSEL0_P0_4_Pos

#define PINCONNECT_PINSEL0_P0_4_Pos (8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_4 (Bit 8)

◆ PINCONNECT_PINSEL0_P0_5_Msk

#define PINCONNECT_PINSEL0_P0_5_Msk (0xc00UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_5 (Bitfield-Mask: 0x03)

◆ PINCONNECT_PINSEL0_P0_5_Pos

#define PINCONNECT_PINSEL0_P0_5_Pos (10UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_5 (Bit 10)

◆ PINCONNECT_PINSEL0_P0_6_Msk

#define PINCONNECT_PINSEL0_P0_6_Msk (0x3000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_6 (Bitfield-Mask: 0x03)

◆ PINCONNECT_PINSEL0_P0_6_Pos

#define PINCONNECT_PINSEL0_P0_6_Pos (12UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_6 (Bit 12)

◆ PINCONNECT_PINSEL0_P0_7_Msk

#define PINCONNECT_PINSEL0_P0_7_Msk (0xc000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_7 (Bitfield-Mask: 0x03)

◆ PINCONNECT_PINSEL0_P0_7_Pos

#define PINCONNECT_PINSEL0_P0_7_Pos (14UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_7 (Bit 14)

◆ PINCONNECT_PINSEL0_P0_8_Msk

#define PINCONNECT_PINSEL0_P0_8_Msk (0x30000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_8 (Bitfield-Mask: 0x03)

◆ PINCONNECT_PINSEL0_P0_8_Pos

#define PINCONNECT_PINSEL0_P0_8_Pos (16UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_8 (Bit 16)

◆ PINCONNECT_PINSEL0_P0_9_Msk

#define PINCONNECT_PINSEL0_P0_9_Msk (0xc0000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_9 (Bitfield-Mask: 0x03)

◆ PINCONNECT_PINSEL0_P0_9_Pos

#define PINCONNECT_PINSEL0_P0_9_Pos (18UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_9 (Bit 18)

◆ PINCONNECT_PINSEL10_TPIUCTRL_Msk

#define PINCONNECT_PINSEL10_TPIUCTRL_Msk (0x8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TPIUCTRL (Bitfield-Mask: 0x01)

◆ PINCONNECT_PINSEL10_TPIUCTRL_Pos

#define PINCONNECT_PINSEL10_TPIUCTRL_Pos (3UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TPIUCTRL (Bit 3)

◆ PINCONNECT_PINSEL1_P0_16_Msk

#define PINCONNECT_PINSEL1_P0_16_Msk (0x3UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_16 (Bitfield-Mask: 0x03)

◆ PINCONNECT_PINSEL1_P0_16_Pos

#define PINCONNECT_PINSEL1_P0_16_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_16 (Bit 0)

◆ PINCONNECT_PINSEL1_P0_17_Msk

#define PINCONNECT_PINSEL1_P0_17_Msk (0xcUL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_17 (Bitfield-Mask: 0x03)

◆ PINCONNECT_PINSEL1_P0_17_Pos

#define PINCONNECT_PINSEL1_P0_17_Pos (2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_17 (Bit 2)

◆ PINCONNECT_PINSEL1_P0_18_Msk

#define PINCONNECT_PINSEL1_P0_18_Msk (0x30UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_18 (Bitfield-Mask: 0x03)

◆ PINCONNECT_PINSEL1_P0_18_Pos

#define PINCONNECT_PINSEL1_P0_18_Pos (4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_18 (Bit 4)

◆ PINCONNECT_PINSEL1_P0_19_Msk

#define PINCONNECT_PINSEL1_P0_19_Msk (0xc0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_19 (Bitfield-Mask: 0x03)

◆ PINCONNECT_PINSEL1_P0_19_Pos

#define PINCONNECT_PINSEL1_P0_19_Pos (6UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_19 (Bit 6)

◆ PINCONNECT_PINSEL1_P0_20_Msk

#define PINCONNECT_PINSEL1_P0_20_Msk (0x300UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_20 (Bitfield-Mask: 0x03)

◆ PINCONNECT_PINSEL1_P0_20_Pos

#define PINCONNECT_PINSEL1_P0_20_Pos (8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_20 (Bit 8)

◆ PINCONNECT_PINSEL1_P0_21_Msk

#define PINCONNECT_PINSEL1_P0_21_Msk (0xc00UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_21 (Bitfield-Mask: 0x03)

◆ PINCONNECT_PINSEL1_P0_21_Pos

#define PINCONNECT_PINSEL1_P0_21_Pos (10UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_21 (Bit 10)

◆ PINCONNECT_PINSEL1_P0_22_Msk

#define PINCONNECT_PINSEL1_P0_22_Msk (0x3000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_22 (Bitfield-Mask: 0x03)

◆ PINCONNECT_PINSEL1_P0_22_Pos

#define PINCONNECT_PINSEL1_P0_22_Pos (12UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_22 (Bit 12)

◆ PINCONNECT_PINSEL1_P0_23_Msk

#define PINCONNECT_PINSEL1_P0_23_Msk (0xc000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_23 (Bitfield-Mask: 0x03)

◆ PINCONNECT_PINSEL1_P0_23_Pos

#define PINCONNECT_PINSEL1_P0_23_Pos (14UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_23 (Bit 14)

◆ PINCONNECT_PINSEL1_P0_24_Msk

#define PINCONNECT_PINSEL1_P0_24_Msk (0x30000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_24 (Bitfield-Mask: 0x03)

◆ PINCONNECT_PINSEL1_P0_24_Pos

#define PINCONNECT_PINSEL1_P0_24_Pos (16UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_24 (Bit 16)

◆ PINCONNECT_PINSEL1_P0_25_Msk

#define PINCONNECT_PINSEL1_P0_25_Msk (0xc0000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_25 (Bitfield-Mask: 0x03)

◆ PINCONNECT_PINSEL1_P0_25_Pos

#define PINCONNECT_PINSEL1_P0_25_Pos (18UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_25 (Bit 18)

◆ PINCONNECT_PINSEL1_P0_26_Msk

#define PINCONNECT_PINSEL1_P0_26_Msk (0x300000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_26 (Bitfield-Mask: 0x03)

◆ PINCONNECT_PINSEL1_P0_26_Pos

#define PINCONNECT_PINSEL1_P0_26_Pos (20UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_26 (Bit 20)

◆ PINCONNECT_PINSEL1_P0_27_Msk

#define PINCONNECT_PINSEL1_P0_27_Msk (0xc00000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_27 (Bitfield-Mask: 0x03)

◆ PINCONNECT_PINSEL1_P0_27_Pos

#define PINCONNECT_PINSEL1_P0_27_Pos (22UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_27 (Bit 22)

◆ PINCONNECT_PINSEL1_P0_28_Msk

#define PINCONNECT_PINSEL1_P0_28_Msk (0x3000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_28 (Bitfield-Mask: 0x03)

◆ PINCONNECT_PINSEL1_P0_28_Pos

#define PINCONNECT_PINSEL1_P0_28_Pos (24UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_28 (Bit 24)

◆ PINCONNECT_PINSEL1_P0_29_Msk

#define PINCONNECT_PINSEL1_P0_29_Msk (0xc000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_29 (Bitfield-Mask: 0x03)

◆ PINCONNECT_PINSEL1_P0_29_Pos

#define PINCONNECT_PINSEL1_P0_29_Pos (26UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_29 (Bit 26)

◆ PINCONNECT_PINSEL1_P0_30_Msk

#define PINCONNECT_PINSEL1_P0_30_Msk (0x30000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_30 (Bitfield-Mask: 0x03)

◆ PINCONNECT_PINSEL1_P0_30_Pos

#define PINCONNECT_PINSEL1_P0_30_Pos (28UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P0_30 (Bit 28)

◆ PINCONNECT_PINSEL2_P1_0_Msk

#define PINCONNECT_PINSEL2_P1_0_Msk (0x3UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P1_0 (Bitfield-Mask: 0x03)

◆ PINCONNECT_PINSEL2_P1_0_Pos

#define PINCONNECT_PINSEL2_P1_0_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P1_0 (Bit 0)

◆ PINCONNECT_PINSEL2_P1_10_Msk

#define PINCONNECT_PINSEL2_P1_10_Msk (0x300000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P1_10 (Bitfield-Mask: 0x03)

◆ PINCONNECT_PINSEL2_P1_10_Pos

#define PINCONNECT_PINSEL2_P1_10_Pos (20UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P1_10 (Bit 20)

◆ PINCONNECT_PINSEL2_P1_14_Msk

#define PINCONNECT_PINSEL2_P1_14_Msk (0xc00000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P1_14 (Bitfield-Mask: 0x03)

◆ PINCONNECT_PINSEL2_P1_14_Pos

#define PINCONNECT_PINSEL2_P1_14_Pos (22UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P1_14 (Bit 22)

◆ PINCONNECT_PINSEL2_P1_15_Msk

#define PINCONNECT_PINSEL2_P1_15_Msk (0xc0000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P1_15 (Bitfield-Mask: 0x03)

◆ PINCONNECT_PINSEL2_P1_15_Pos

#define PINCONNECT_PINSEL2_P1_15_Pos (30UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P1_15 (Bit 30)

◆ PINCONNECT_PINSEL2_P1_1_Msk

#define PINCONNECT_PINSEL2_P1_1_Msk (0xcUL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P1_1 (Bitfield-Mask: 0x03)

◆ PINCONNECT_PINSEL2_P1_1_Pos

#define PINCONNECT_PINSEL2_P1_1_Pos (2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P1_1 (Bit 2)

◆ PINCONNECT_PINSEL2_P1_4_Msk

#define PINCONNECT_PINSEL2_P1_4_Msk (0x300UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P1_4 (Bitfield-Mask: 0x03)

◆ PINCONNECT_PINSEL2_P1_4_Pos

#define PINCONNECT_PINSEL2_P1_4_Pos (8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P1_4 (Bit 8)

◆ PINCONNECT_PINSEL2_P1_8_Msk

#define PINCONNECT_PINSEL2_P1_8_Msk (0x30000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P1_8 (Bitfield-Mask: 0x03)

◆ PINCONNECT_PINSEL2_P1_8_Pos

#define PINCONNECT_PINSEL2_P1_8_Pos (16UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P1_8 (Bit 16)

◆ PINCONNECT_PINSEL2_P1_9_Msk

#define PINCONNECT_PINSEL2_P1_9_Msk (0xc0000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P1_9 (Bitfield-Mask: 0x03)

◆ PINCONNECT_PINSEL2_P1_9_Pos

#define PINCONNECT_PINSEL2_P1_9_Pos (18UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P1_9 (Bit 18)

◆ PINCONNECT_PINSEL3_P1_16_Msk

#define PINCONNECT_PINSEL3_P1_16_Msk (0x3UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P1_16 (Bitfield-Mask: 0x03)

◆ PINCONNECT_PINSEL3_P1_16_Pos

#define PINCONNECT_PINSEL3_P1_16_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P1_16 (Bit 0)

◆ PINCONNECT_PINSEL3_P1_17_Msk

#define PINCONNECT_PINSEL3_P1_17_Msk (0xcUL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P1_17 (Bitfield-Mask: 0x03)

◆ PINCONNECT_PINSEL3_P1_17_Pos

#define PINCONNECT_PINSEL3_P1_17_Pos (2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P1_17 (Bit 2)

◆ PINCONNECT_PINSEL3_P1_18_Msk

#define PINCONNECT_PINSEL3_P1_18_Msk (0x30UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P1_18 (Bitfield-Mask: 0x03)

◆ PINCONNECT_PINSEL3_P1_18_Pos

#define PINCONNECT_PINSEL3_P1_18_Pos (4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P1_18 (Bit 4)

◆ PINCONNECT_PINSEL3_P1_19_Msk

#define PINCONNECT_PINSEL3_P1_19_Msk (0xc0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P1_19 (Bitfield-Mask: 0x03)

◆ PINCONNECT_PINSEL3_P1_19_Pos

#define PINCONNECT_PINSEL3_P1_19_Pos (6UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P1_19 (Bit 6)

◆ PINCONNECT_PINSEL3_P1_20_Msk

#define PINCONNECT_PINSEL3_P1_20_Msk (0x300UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P1_20 (Bitfield-Mask: 0x03)

◆ PINCONNECT_PINSEL3_P1_20_Pos

#define PINCONNECT_PINSEL3_P1_20_Pos (8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P1_20 (Bit 8)

◆ PINCONNECT_PINSEL3_P1_21_Msk

#define PINCONNECT_PINSEL3_P1_21_Msk (0xc00UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P1_21 (Bitfield-Mask: 0x03)

◆ PINCONNECT_PINSEL3_P1_21_Pos

#define PINCONNECT_PINSEL3_P1_21_Pos (10UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P1_21 (Bit 10)

◆ PINCONNECT_PINSEL3_P1_22_Msk

#define PINCONNECT_PINSEL3_P1_22_Msk (0x3000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P1_22 (Bitfield-Mask: 0x03)

◆ PINCONNECT_PINSEL3_P1_22_Pos

#define PINCONNECT_PINSEL3_P1_22_Pos (12UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P1_22 (Bit 12)

◆ PINCONNECT_PINSEL3_P1_23_Msk

#define PINCONNECT_PINSEL3_P1_23_Msk (0xc000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P1_23 (Bitfield-Mask: 0x03)

◆ PINCONNECT_PINSEL3_P1_23_Pos

#define PINCONNECT_PINSEL3_P1_23_Pos (14UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P1_23 (Bit 14)

◆ PINCONNECT_PINSEL3_P1_24_Msk

#define PINCONNECT_PINSEL3_P1_24_Msk (0x30000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P1_24 (Bitfield-Mask: 0x03)

◆ PINCONNECT_PINSEL3_P1_24_Pos

#define PINCONNECT_PINSEL3_P1_24_Pos (16UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P1_24 (Bit 16)

◆ PINCONNECT_PINSEL3_P1_25_Msk

#define PINCONNECT_PINSEL3_P1_25_Msk (0xc0000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P1_25 (Bitfield-Mask: 0x03)

◆ PINCONNECT_PINSEL3_P1_25_Pos

#define PINCONNECT_PINSEL3_P1_25_Pos (18UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P1_25 (Bit 18)

◆ PINCONNECT_PINSEL3_P1_26_Msk

#define PINCONNECT_PINSEL3_P1_26_Msk (0x300000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P1_26 (Bitfield-Mask: 0x03)

◆ PINCONNECT_PINSEL3_P1_26_Pos

#define PINCONNECT_PINSEL3_P1_26_Pos (20UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P1_26 (Bit 20)

◆ PINCONNECT_PINSEL3_P1_27_Msk

#define PINCONNECT_PINSEL3_P1_27_Msk (0xc00000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P1_27 (Bitfield-Mask: 0x03)

◆ PINCONNECT_PINSEL3_P1_27_Pos

#define PINCONNECT_PINSEL3_P1_27_Pos (22UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P1_27 (Bit 22)

◆ PINCONNECT_PINSEL3_P1_28_Msk

#define PINCONNECT_PINSEL3_P1_28_Msk (0x3000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P1_28 (Bitfield-Mask: 0x03)

◆ PINCONNECT_PINSEL3_P1_28_Pos

#define PINCONNECT_PINSEL3_P1_28_Pos (24UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P1_28 (Bit 24)

◆ PINCONNECT_PINSEL3_P1_29_Msk

#define PINCONNECT_PINSEL3_P1_29_Msk (0xc000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P1_29 (Bitfield-Mask: 0x03)

◆ PINCONNECT_PINSEL3_P1_29_Pos

#define PINCONNECT_PINSEL3_P1_29_Pos (26UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P1_29 (Bit 26)

◆ PINCONNECT_PINSEL3_P1_30_Msk

#define PINCONNECT_PINSEL3_P1_30_Msk (0x30000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P1_30 (Bitfield-Mask: 0x03)

◆ PINCONNECT_PINSEL3_P1_30_Pos

#define PINCONNECT_PINSEL3_P1_30_Pos (28UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P1_30 (Bit 28)

◆ PINCONNECT_PINSEL3_P1_31_Msk

#define PINCONNECT_PINSEL3_P1_31_Msk (0xc0000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P1_31 (Bitfield-Mask: 0x03)

◆ PINCONNECT_PINSEL3_P1_31_Pos

#define PINCONNECT_PINSEL3_P1_31_Pos (30UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P1_31 (Bit 30)

◆ PINCONNECT_PINSEL4_P2_0_Msk

#define PINCONNECT_PINSEL4_P2_0_Msk (0x3UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P2_0 (Bitfield-Mask: 0x03)

◆ PINCONNECT_PINSEL4_P2_0_Pos

#define PINCONNECT_PINSEL4_P2_0_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P2_0 (Bit 0)

◆ PINCONNECT_PINSEL4_P2_10_Msk

#define PINCONNECT_PINSEL4_P2_10_Msk (0x300000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P2_10 (Bitfield-Mask: 0x03)

◆ PINCONNECT_PINSEL4_P2_10_Pos

#define PINCONNECT_PINSEL4_P2_10_Pos (20UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P2_10 (Bit 20)

◆ PINCONNECT_PINSEL4_P2_11_Msk

#define PINCONNECT_PINSEL4_P2_11_Msk (0xc00000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P2_11 (Bitfield-Mask: 0x03)

◆ PINCONNECT_PINSEL4_P2_11_Pos

#define PINCONNECT_PINSEL4_P2_11_Pos (22UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P2_11 (Bit 22)

◆ PINCONNECT_PINSEL4_P2_12_Msk

#define PINCONNECT_PINSEL4_P2_12_Msk (0x3000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P2_12 (Bitfield-Mask: 0x03)

◆ PINCONNECT_PINSEL4_P2_12_Pos

#define PINCONNECT_PINSEL4_P2_12_Pos (24UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P2_12 (Bit 24)

◆ PINCONNECT_PINSEL4_P2_13_Msk

#define PINCONNECT_PINSEL4_P2_13_Msk (0xc000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P2_13 (Bitfield-Mask: 0x03)

◆ PINCONNECT_PINSEL4_P2_13_Pos

#define PINCONNECT_PINSEL4_P2_13_Pos (26UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P2_13 (Bit 26)

◆ PINCONNECT_PINSEL4_P2_1_Msk

#define PINCONNECT_PINSEL4_P2_1_Msk (0xcUL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P2_1 (Bitfield-Mask: 0x03)

◆ PINCONNECT_PINSEL4_P2_1_Pos

#define PINCONNECT_PINSEL4_P2_1_Pos (2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P2_1 (Bit 2)

◆ PINCONNECT_PINSEL4_P2_2_Msk

#define PINCONNECT_PINSEL4_P2_2_Msk (0x30UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P2_2 (Bitfield-Mask: 0x03)

◆ PINCONNECT_PINSEL4_P2_2_Pos

#define PINCONNECT_PINSEL4_P2_2_Pos (4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P2_2 (Bit 4)

◆ PINCONNECT_PINSEL4_P2_3_Msk

#define PINCONNECT_PINSEL4_P2_3_Msk (0xc0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P2_3 (Bitfield-Mask: 0x03)

◆ PINCONNECT_PINSEL4_P2_3_Pos

#define PINCONNECT_PINSEL4_P2_3_Pos (6UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P2_3 (Bit 6)

◆ PINCONNECT_PINSEL4_P2_4_Msk

#define PINCONNECT_PINSEL4_P2_4_Msk (0x300UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P2_4 (Bitfield-Mask: 0x03)

◆ PINCONNECT_PINSEL4_P2_4_Pos

#define PINCONNECT_PINSEL4_P2_4_Pos (8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P2_4 (Bit 8)

◆ PINCONNECT_PINSEL4_P2_5_Msk

#define PINCONNECT_PINSEL4_P2_5_Msk (0xc00UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P2_5 (Bitfield-Mask: 0x03)

◆ PINCONNECT_PINSEL4_P2_5_Pos

#define PINCONNECT_PINSEL4_P2_5_Pos (10UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P2_5 (Bit 10)

◆ PINCONNECT_PINSEL4_P2_6_Msk

#define PINCONNECT_PINSEL4_P2_6_Msk (0x3000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P2_6 (Bitfield-Mask: 0x03)

◆ PINCONNECT_PINSEL4_P2_6_Pos

#define PINCONNECT_PINSEL4_P2_6_Pos (12UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P2_6 (Bit 12)

◆ PINCONNECT_PINSEL4_P2_7_Msk

#define PINCONNECT_PINSEL4_P2_7_Msk (0xc000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P2_7 (Bitfield-Mask: 0x03)

◆ PINCONNECT_PINSEL4_P2_7_Pos

#define PINCONNECT_PINSEL4_P2_7_Pos (14UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P2_7 (Bit 14)

◆ PINCONNECT_PINSEL4_P2_8_Msk

#define PINCONNECT_PINSEL4_P2_8_Msk (0x30000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P2_8 (Bitfield-Mask: 0x03)

◆ PINCONNECT_PINSEL4_P2_8_Pos

#define PINCONNECT_PINSEL4_P2_8_Pos (16UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P2_8 (Bit 16)

◆ PINCONNECT_PINSEL4_P2_9_Msk

#define PINCONNECT_PINSEL4_P2_9_Msk (0xc0000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P2_9 (Bitfield-Mask: 0x03)

◆ PINCONNECT_PINSEL4_P2_9_Pos

#define PINCONNECT_PINSEL4_P2_9_Pos (18UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P2_9 (Bit 18)

◆ PINCONNECT_PINSEL7_P3_25_Msk

#define PINCONNECT_PINSEL7_P3_25_Msk (0xc0000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P3_25 (Bitfield-Mask: 0x03)

◆ PINCONNECT_PINSEL7_P3_25_Pos

#define PINCONNECT_PINSEL7_P3_25_Pos (18UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P3_25 (Bit 18)

◆ PINCONNECT_PINSEL7_P3_26_Msk

#define PINCONNECT_PINSEL7_P3_26_Msk (0x300000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P3_26 (Bitfield-Mask: 0x03)

◆ PINCONNECT_PINSEL7_P3_26_Pos

#define PINCONNECT_PINSEL7_P3_26_Pos (20UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P3_26 (Bit 20)

◆ PINCONNECT_PINSEL9_P4_28_Msk

#define PINCONNECT_PINSEL9_P4_28_Msk (0x3000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P4_28 (Bitfield-Mask: 0x03)

◆ PINCONNECT_PINSEL9_P4_28_Pos

#define PINCONNECT_PINSEL9_P4_28_Pos (24UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P4_28 (Bit 24)

◆ PINCONNECT_PINSEL9_P4_29_Msk

#define PINCONNECT_PINSEL9_P4_29_Msk (0xc000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P4_29 (Bitfield-Mask: 0x03)

◆ PINCONNECT_PINSEL9_P4_29_Pos

#define PINCONNECT_PINSEL9_P4_29_Pos (26UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

P4_29 (Bit 26)

◆ PWM1_CCR_CAP0_F_Msk

#define PWM1_CCR_CAP0_F_Msk (0x2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CAP0_F (Bitfield-Mask: 0x01)

◆ PWM1_CCR_CAP0_F_Pos

#define PWM1_CCR_CAP0_F_Pos (1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CAP0_F (Bit 1)

◆ PWM1_CCR_CAP0_I_Msk

#define PWM1_CCR_CAP0_I_Msk (0x4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CAP0_I (Bitfield-Mask: 0x01)

◆ PWM1_CCR_CAP0_I_Pos

#define PWM1_CCR_CAP0_I_Pos (2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CAP0_I (Bit 2)

◆ PWM1_CCR_CAP0_R_Msk

#define PWM1_CCR_CAP0_R_Msk (0x1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CAP0_R (Bitfield-Mask: 0x01)

◆ PWM1_CCR_CAP0_R_Pos

#define PWM1_CCR_CAP0_R_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CAP0_R (Bit 0)

◆ PWM1_CCR_CAP1_F_Msk

#define PWM1_CCR_CAP1_F_Msk (0x10UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CAP1_F (Bitfield-Mask: 0x01)

◆ PWM1_CCR_CAP1_F_Pos

#define PWM1_CCR_CAP1_F_Pos (4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CAP1_F (Bit 4)

◆ PWM1_CCR_CAP1_I_Msk

#define PWM1_CCR_CAP1_I_Msk (0x20UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CAP1_I (Bitfield-Mask: 0x01)

◆ PWM1_CCR_CAP1_I_Pos

#define PWM1_CCR_CAP1_I_Pos (5UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CAP1_I (Bit 5)

◆ PWM1_CCR_CAP1_R_Msk

#define PWM1_CCR_CAP1_R_Msk (0x8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CAP1_R (Bitfield-Mask: 0x01)

◆ PWM1_CCR_CAP1_R_Pos

#define PWM1_CCR_CAP1_R_Pos (3UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CAP1_R (Bit 3)

◆ PWM1_CTCR_CIS_Msk

#define PWM1_CTCR_CIS_Msk (0xcUL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CIS (Bitfield-Mask: 0x03)

◆ PWM1_CTCR_CIS_Pos

#define PWM1_CTCR_CIS_Pos (2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CIS (Bit 2)

◆ PWM1_CTCR_MOD_Msk

#define PWM1_CTCR_MOD_Msk (0x3UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

MOD (Bitfield-Mask: 0x03)

◆ PWM1_CTCR_MOD_Pos

#define PWM1_CTCR_MOD_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

MOD (Bit 0)

◆ PWM1_IR_PWMCAP0INT_Msk

#define PWM1_IR_PWMCAP0INT_Msk (0x10UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PWMCAP0INT (Bitfield-Mask: 0x01)

◆ PWM1_IR_PWMCAP0INT_Pos

#define PWM1_IR_PWMCAP0INT_Pos (4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PWMCAP0INT (Bit 4)

◆ PWM1_IR_PWMCAP1INT_Msk

#define PWM1_IR_PWMCAP1INT_Msk (0x20UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PWMCAP1INT (Bitfield-Mask: 0x01)

◆ PWM1_IR_PWMCAP1INT_Pos

#define PWM1_IR_PWMCAP1INT_Pos (5UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PWMCAP1INT (Bit 5)

◆ PWM1_IR_PWMMR0INT_Msk

#define PWM1_IR_PWMMR0INT_Msk (0x1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PWMMR0INT (Bitfield-Mask: 0x01)

◆ PWM1_IR_PWMMR0INT_Pos

#define PWM1_IR_PWMMR0INT_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PWMMR0INT (Bit 0)

◆ PWM1_IR_PWMMR1INT_Msk

#define PWM1_IR_PWMMR1INT_Msk (0x2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PWMMR1INT (Bitfield-Mask: 0x01)

◆ PWM1_IR_PWMMR1INT_Pos

#define PWM1_IR_PWMMR1INT_Pos (1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PWMMR1INT (Bit 1)

◆ PWM1_IR_PWMMR2INT_Msk

#define PWM1_IR_PWMMR2INT_Msk (0x4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PWMMR2INT (Bitfield-Mask: 0x01)

◆ PWM1_IR_PWMMR2INT_Pos

#define PWM1_IR_PWMMR2INT_Pos (2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PWMMR2INT (Bit 2)

◆ PWM1_IR_PWMMR3INT_Msk

#define PWM1_IR_PWMMR3INT_Msk (0x8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PWMMR3INT (Bitfield-Mask: 0x01)

◆ PWM1_IR_PWMMR3INT_Pos

#define PWM1_IR_PWMMR3INT_Pos (3UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PWMMR3INT (Bit 3)

◆ PWM1_IR_PWMMR4INT_Msk

#define PWM1_IR_PWMMR4INT_Msk (0x100UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PWMMR4INT (Bitfield-Mask: 0x01)

◆ PWM1_IR_PWMMR4INT_Pos

#define PWM1_IR_PWMMR4INT_Pos (8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PWMMR4INT (Bit 8)

◆ PWM1_IR_PWMMR5INT_Msk

#define PWM1_IR_PWMMR5INT_Msk (0x200UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PWMMR5INT (Bitfield-Mask: 0x01)

◆ PWM1_IR_PWMMR5INT_Pos

#define PWM1_IR_PWMMR5INT_Pos (9UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PWMMR5INT (Bit 9)

◆ PWM1_IR_PWMMR6INT_Msk

#define PWM1_IR_PWMMR6INT_Msk (0x400UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PWMMR6INT (Bitfield-Mask: 0x01)

◆ PWM1_IR_PWMMR6INT_Pos

#define PWM1_IR_PWMMR6INT_Pos (10UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PWMMR6INT (Bit 10)

◆ PWM1_LER_MAT0LATCHEN_Msk

#define PWM1_LER_MAT0LATCHEN_Msk (0x1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

MAT0LATCHEN (Bitfield-Mask: 0x01)

◆ PWM1_LER_MAT0LATCHEN_Pos

#define PWM1_LER_MAT0LATCHEN_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

MAT0LATCHEN (Bit 0)

◆ PWM1_LER_MAT1LATCHEN_Msk

#define PWM1_LER_MAT1LATCHEN_Msk (0x2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

MAT1LATCHEN (Bitfield-Mask: 0x01)

◆ PWM1_LER_MAT1LATCHEN_Pos

#define PWM1_LER_MAT1LATCHEN_Pos (1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

MAT1LATCHEN (Bit 1)

◆ PWM1_LER_MAT2LATCHEN_Msk

#define PWM1_LER_MAT2LATCHEN_Msk (0x4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

MAT2LATCHEN (Bitfield-Mask: 0x01)

◆ PWM1_LER_MAT2LATCHEN_Pos

#define PWM1_LER_MAT2LATCHEN_Pos (2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

MAT2LATCHEN (Bit 2)

◆ PWM1_LER_MAT3LATCHEN_Msk

#define PWM1_LER_MAT3LATCHEN_Msk (0x8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

MAT3LATCHEN (Bitfield-Mask: 0x01)

◆ PWM1_LER_MAT3LATCHEN_Pos

#define PWM1_LER_MAT3LATCHEN_Pos (3UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

MAT3LATCHEN (Bit 3)

◆ PWM1_LER_MAT4LATCHEN_Msk

#define PWM1_LER_MAT4LATCHEN_Msk (0x10UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

MAT4LATCHEN (Bitfield-Mask: 0x01)

◆ PWM1_LER_MAT4LATCHEN_Pos

#define PWM1_LER_MAT4LATCHEN_Pos (4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

MAT4LATCHEN (Bit 4)

◆ PWM1_LER_MAT5LATCHEN_Msk

#define PWM1_LER_MAT5LATCHEN_Msk (0x20UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

MAT5LATCHEN (Bitfield-Mask: 0x01)

◆ PWM1_LER_MAT5LATCHEN_Pos

#define PWM1_LER_MAT5LATCHEN_Pos (5UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

MAT5LATCHEN (Bit 5)

◆ PWM1_LER_MAT6LATCHEN_Msk

#define PWM1_LER_MAT6LATCHEN_Msk (0x40UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

MAT6LATCHEN (Bitfield-Mask: 0x01)

◆ PWM1_LER_MAT6LATCHEN_Pos

#define PWM1_LER_MAT6LATCHEN_Pos (6UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

MAT6LATCHEN (Bit 6)

◆ PWM1_MCR_PWMMR0I_Msk

#define PWM1_MCR_PWMMR0I_Msk (0x1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PWMMR0I (Bitfield-Mask: 0x01)

◆ PWM1_MCR_PWMMR0I_Pos

#define PWM1_MCR_PWMMR0I_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PWMMR0I (Bit 0)

◆ PWM1_MCR_PWMMR0R_Msk

#define PWM1_MCR_PWMMR0R_Msk (0x2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PWMMR0R (Bitfield-Mask: 0x01)

◆ PWM1_MCR_PWMMR0R_Pos

#define PWM1_MCR_PWMMR0R_Pos (1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PWMMR0R (Bit 1)

◆ PWM1_MCR_PWMMR0S_Msk

#define PWM1_MCR_PWMMR0S_Msk (0x4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PWMMR0S (Bitfield-Mask: 0x01)

◆ PWM1_MCR_PWMMR0S_Pos

#define PWM1_MCR_PWMMR0S_Pos (2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PWMMR0S (Bit 2)

◆ PWM1_MCR_PWMMR1I_Msk

#define PWM1_MCR_PWMMR1I_Msk (0x8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PWMMR1I (Bitfield-Mask: 0x01)

◆ PWM1_MCR_PWMMR1I_Pos

#define PWM1_MCR_PWMMR1I_Pos (3UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PWMMR1I (Bit 3)

◆ PWM1_MCR_PWMMR1R_Msk

#define PWM1_MCR_PWMMR1R_Msk (0x10UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PWMMR1R (Bitfield-Mask: 0x01)

◆ PWM1_MCR_PWMMR1R_Pos

#define PWM1_MCR_PWMMR1R_Pos (4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PWMMR1R (Bit 4)

◆ PWM1_MCR_PWMMR1S_Msk

#define PWM1_MCR_PWMMR1S_Msk (0x20UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PWMMR1S (Bitfield-Mask: 0x01)

◆ PWM1_MCR_PWMMR1S_Pos

#define PWM1_MCR_PWMMR1S_Pos (5UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PWMMR1S (Bit 5)

◆ PWM1_MCR_PWMMR2I_Msk

#define PWM1_MCR_PWMMR2I_Msk (0x40UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PWMMR2I (Bitfield-Mask: 0x01)

◆ PWM1_MCR_PWMMR2I_Pos

#define PWM1_MCR_PWMMR2I_Pos (6UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PWMMR2I (Bit 6)

◆ PWM1_MCR_PWMMR2R_Msk

#define PWM1_MCR_PWMMR2R_Msk (0x80UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PWMMR2R (Bitfield-Mask: 0x01)

◆ PWM1_MCR_PWMMR2R_Pos

#define PWM1_MCR_PWMMR2R_Pos (7UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PWMMR2R (Bit 7)

◆ PWM1_MCR_PWMMR2S_Msk

#define PWM1_MCR_PWMMR2S_Msk (0x100UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PWMMR2S (Bitfield-Mask: 0x01)

◆ PWM1_MCR_PWMMR2S_Pos

#define PWM1_MCR_PWMMR2S_Pos (8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PWMMR2S (Bit 8)

◆ PWM1_MCR_PWMMR3I_Msk

#define PWM1_MCR_PWMMR3I_Msk (0x200UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PWMMR3I (Bitfield-Mask: 0x01)

◆ PWM1_MCR_PWMMR3I_Pos

#define PWM1_MCR_PWMMR3I_Pos (9UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PWMMR3I (Bit 9)

◆ PWM1_MCR_PWMMR3R_Msk

#define PWM1_MCR_PWMMR3R_Msk (0x400UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PWMMR3R (Bitfield-Mask: 0x01)

◆ PWM1_MCR_PWMMR3R_Pos

#define PWM1_MCR_PWMMR3R_Pos (10UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PWMMR3R (Bit 10)

◆ PWM1_MCR_PWMMR3S_Msk

#define PWM1_MCR_PWMMR3S_Msk (0x800UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PWMMR3S (Bitfield-Mask: 0x01)

◆ PWM1_MCR_PWMMR3S_Pos

#define PWM1_MCR_PWMMR3S_Pos (11UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PWMMR3S (Bit 11)

◆ PWM1_MCR_PWMMR4I_Msk

#define PWM1_MCR_PWMMR4I_Msk (0x1000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PWMMR4I (Bitfield-Mask: 0x01)

◆ PWM1_MCR_PWMMR4I_Pos

#define PWM1_MCR_PWMMR4I_Pos (12UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PWMMR4I (Bit 12)

◆ PWM1_MCR_PWMMR4R_Msk

#define PWM1_MCR_PWMMR4R_Msk (0x2000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PWMMR4R (Bitfield-Mask: 0x01)

◆ PWM1_MCR_PWMMR4R_Pos

#define PWM1_MCR_PWMMR4R_Pos (13UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PWMMR4R (Bit 13)

◆ PWM1_MCR_PWMMR4S_Msk

#define PWM1_MCR_PWMMR4S_Msk (0x4000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PWMMR4S (Bitfield-Mask: 0x01)

◆ PWM1_MCR_PWMMR4S_Pos

#define PWM1_MCR_PWMMR4S_Pos (14UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PWMMR4S (Bit 14)

◆ PWM1_MCR_PWMMR5I_Msk

#define PWM1_MCR_PWMMR5I_Msk (0x8000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PWMMR5I (Bitfield-Mask: 0x01)

◆ PWM1_MCR_PWMMR5I_Pos

#define PWM1_MCR_PWMMR5I_Pos (15UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PWMMR5I (Bit 15)

◆ PWM1_MCR_PWMMR5R_Msk

#define PWM1_MCR_PWMMR5R_Msk (0x10000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PWMMR5R (Bitfield-Mask: 0x01)

◆ PWM1_MCR_PWMMR5R_Pos

#define PWM1_MCR_PWMMR5R_Pos (16UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PWMMR5R (Bit 16)

◆ PWM1_MCR_PWMMR5S_Msk

#define PWM1_MCR_PWMMR5S_Msk (0x20000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PWMMR5S (Bitfield-Mask: 0x01)

◆ PWM1_MCR_PWMMR5S_Pos

#define PWM1_MCR_PWMMR5S_Pos (17UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PWMMR5S (Bit 17)

◆ PWM1_MCR_PWMMR6I_Msk

#define PWM1_MCR_PWMMR6I_Msk (0x40000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PWMMR6I (Bitfield-Mask: 0x01)

◆ PWM1_MCR_PWMMR6I_Pos

#define PWM1_MCR_PWMMR6I_Pos (18UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PWMMR6I (Bit 18)

◆ PWM1_MCR_PWMMR6R_Msk

#define PWM1_MCR_PWMMR6R_Msk (0x80000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PWMMR6R (Bitfield-Mask: 0x01)

◆ PWM1_MCR_PWMMR6R_Pos

#define PWM1_MCR_PWMMR6R_Pos (19UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PWMMR6R (Bit 19)

◆ PWM1_MCR_PWMMR6S_Msk

#define PWM1_MCR_PWMMR6S_Msk (0x100000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PWMMR6S (Bitfield-Mask: 0x01)

◆ PWM1_MCR_PWMMR6S_Pos

#define PWM1_MCR_PWMMR6S_Pos (20UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PWMMR6S (Bit 20)

◆ PWM1_MR0_MATCH_Msk

#define PWM1_MR0_MATCH_Msk (0xffffffffUL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

MATCH (Bitfield-Mask: 0xffffffff)

◆ PWM1_MR0_MATCH_Pos

#define PWM1_MR0_MATCH_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

MATCH (Bit 0)

◆ PWM1_MR1_MATCH_Msk

#define PWM1_MR1_MATCH_Msk (0xffffffffUL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

MATCH (Bitfield-Mask: 0xffffffff)

◆ PWM1_MR1_MATCH_Pos

#define PWM1_MR1_MATCH_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

MATCH (Bit 0)

◆ PWM1_MR2_MATCH_Msk

#define PWM1_MR2_MATCH_Msk (0xffffffffUL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

MATCH (Bitfield-Mask: 0xffffffff)

◆ PWM1_MR2_MATCH_Pos

#define PWM1_MR2_MATCH_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

MATCH (Bit 0)

◆ PWM1_MR3_MATCH_Msk

#define PWM1_MR3_MATCH_Msk (0xffffffffUL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

MATCH (Bitfield-Mask: 0xffffffff)

◆ PWM1_MR3_MATCH_Pos

#define PWM1_MR3_MATCH_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

MATCH (Bit 0)

◆ PWM1_MR4_MATCH_Msk

#define PWM1_MR4_MATCH_Msk (0xffffffffUL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

MATCH (Bitfield-Mask: 0xffffffff)

◆ PWM1_MR4_MATCH_Pos

#define PWM1_MR4_MATCH_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

MATCH (Bit 0)

◆ PWM1_MR5_MATCH_Msk

#define PWM1_MR5_MATCH_Msk (0xffffffffUL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

MATCH (Bitfield-Mask: 0xffffffff)

◆ PWM1_MR5_MATCH_Pos

#define PWM1_MR5_MATCH_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

MATCH (Bit 0)

◆ PWM1_MR6_MATCH_Msk

#define PWM1_MR6_MATCH_Msk (0xffffffffUL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

MATCH (Bitfield-Mask: 0xffffffff)

◆ PWM1_MR6_MATCH_Pos

#define PWM1_MR6_MATCH_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

MATCH (Bit 0)

◆ PWM1_PC_PC_Msk

#define PWM1_PC_PC_Msk (0xffffffffUL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PC (Bitfield-Mask: 0xffffffff)

◆ PWM1_PC_PC_Pos

#define PWM1_PC_PC_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PC (Bit 0)

◆ PWM1_PCR_PWMENA1_Msk

#define PWM1_PCR_PWMENA1_Msk (0x200UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PWMENA1 (Bitfield-Mask: 0x01)

◆ PWM1_PCR_PWMENA1_Pos

#define PWM1_PCR_PWMENA1_Pos (9UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PWMENA1 (Bit 9)

◆ PWM1_PCR_PWMENA2_Msk

#define PWM1_PCR_PWMENA2_Msk (0x400UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PWMENA2 (Bitfield-Mask: 0x01)

◆ PWM1_PCR_PWMENA2_Pos

#define PWM1_PCR_PWMENA2_Pos (10UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PWMENA2 (Bit 10)

◆ PWM1_PCR_PWMENA3_Msk

#define PWM1_PCR_PWMENA3_Msk (0x800UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PWMENA3 (Bitfield-Mask: 0x01)

◆ PWM1_PCR_PWMENA3_Pos

#define PWM1_PCR_PWMENA3_Pos (11UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PWMENA3 (Bit 11)

◆ PWM1_PCR_PWMENA4_Msk

#define PWM1_PCR_PWMENA4_Msk (0x1000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PWMENA4 (Bitfield-Mask: 0x01)

◆ PWM1_PCR_PWMENA4_Pos

#define PWM1_PCR_PWMENA4_Pos (12UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PWMENA4 (Bit 12)

◆ PWM1_PCR_PWMENA5_Msk

#define PWM1_PCR_PWMENA5_Msk (0x2000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PWMENA5 (Bitfield-Mask: 0x01)

◆ PWM1_PCR_PWMENA5_Pos

#define PWM1_PCR_PWMENA5_Pos (13UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PWMENA5 (Bit 13)

◆ PWM1_PCR_PWMENA6_Msk

#define PWM1_PCR_PWMENA6_Msk (0x4000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PWMENA6 (Bitfield-Mask: 0x01)

◆ PWM1_PCR_PWMENA6_Pos

#define PWM1_PCR_PWMENA6_Pos (14UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PWMENA6 (Bit 14)

◆ PWM1_PCR_PWMSEL2_Msk

#define PWM1_PCR_PWMSEL2_Msk (0x4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PWMSEL2 (Bitfield-Mask: 0x01)

◆ PWM1_PCR_PWMSEL2_Pos

#define PWM1_PCR_PWMSEL2_Pos (2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PWMSEL2 (Bit 2)

◆ PWM1_PCR_PWMSEL3_Msk

#define PWM1_PCR_PWMSEL3_Msk (0x8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PWMSEL3 (Bitfield-Mask: 0x01)

◆ PWM1_PCR_PWMSEL3_Pos

#define PWM1_PCR_PWMSEL3_Pos (3UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PWMSEL3 (Bit 3)

◆ PWM1_PCR_PWMSEL4_Msk

#define PWM1_PCR_PWMSEL4_Msk (0x10UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PWMSEL4 (Bitfield-Mask: 0x01)

◆ PWM1_PCR_PWMSEL4_Pos

#define PWM1_PCR_PWMSEL4_Pos (4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PWMSEL4 (Bit 4)

◆ PWM1_PCR_PWMSEL5_Msk

#define PWM1_PCR_PWMSEL5_Msk (0x20UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PWMSEL5 (Bitfield-Mask: 0x01)

◆ PWM1_PCR_PWMSEL5_Pos

#define PWM1_PCR_PWMSEL5_Pos (5UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PWMSEL5 (Bit 5)

◆ PWM1_PCR_PWMSEL6_Msk

#define PWM1_PCR_PWMSEL6_Msk (0x40UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PWMSEL6 (Bitfield-Mask: 0x01)

◆ PWM1_PCR_PWMSEL6_Pos

#define PWM1_PCR_PWMSEL6_Pos (6UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PWMSEL6 (Bit 6)

◆ PWM1_PR_PM_Msk

#define PWM1_PR_PM_Msk (0xffffffffUL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PM (Bitfield-Mask: 0xffffffff)

◆ PWM1_PR_PM_Pos

#define PWM1_PR_PM_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PM (Bit 0)

◆ PWM1_TC_TC_Msk

#define PWM1_TC_TC_Msk (0xffffffffUL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TC (Bitfield-Mask: 0xffffffff)

◆ PWM1_TC_TC_Pos

#define PWM1_TC_TC_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TC (Bit 0)

◆ PWM1_TCR_CE_Msk

#define PWM1_TCR_CE_Msk (0x1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CE (Bitfield-Mask: 0x01)

◆ PWM1_TCR_CE_Pos

#define PWM1_TCR_CE_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CE (Bit 0)

◆ PWM1_TCR_CR_Msk

#define PWM1_TCR_CR_Msk (0x2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CR (Bitfield-Mask: 0x01)

◆ PWM1_TCR_CR_Pos

#define PWM1_TCR_CR_Pos (1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CR (Bit 1)

◆ PWM1_TCR_MDIS_Msk

#define PWM1_TCR_MDIS_Msk (0x10UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

MDIS (Bitfield-Mask: 0x01)

◆ PWM1_TCR_MDIS_Pos

#define PWM1_TCR_MDIS_Pos (4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

MDIS (Bit 4)

◆ PWM1_TCR_PWMEN_Msk

#define PWM1_TCR_PWMEN_Msk (0x8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PWMEN (Bitfield-Mask: 0x01)

◆ PWM1_TCR_PWMEN_Pos

#define PWM1_TCR_PWMEN_Pos (3UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PWMEN (Bit 3)

◆ QEI_CAP_VELCAP_Msk

#define QEI_CAP_VELCAP_Msk (0xffffffffUL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

VELCAP (Bitfield-Mask: 0xffffffff)

◆ QEI_CAP_VELCAP_Pos

#define QEI_CAP_VELCAP_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

VELCAP (Bit 0)

◆ QEI_CLR_DIR_INT_Msk

#define QEI_CLR_DIR_INT_Msk (0x8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DIR_INT (Bitfield-Mask: 0x01)

◆ QEI_CLR_DIR_INT_Pos

#define QEI_CLR_DIR_INT_Pos (3UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DIR_INT (Bit 3)

◆ QEI_CLR_ENCLK_INT_Msk

#define QEI_CLR_ENCLK_INT_Msk (0x20UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

ENCLK_INT (Bitfield-Mask: 0x01)

◆ QEI_CLR_ENCLK_INT_Pos

#define QEI_CLR_ENCLK_INT_Pos (5UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

ENCLK_INT (Bit 5)

◆ QEI_CLR_ERR_INT_Msk

#define QEI_CLR_ERR_INT_Msk (0x10UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

ERR_INT (Bitfield-Mask: 0x01)

◆ QEI_CLR_ERR_INT_Pos

#define QEI_CLR_ERR_INT_Pos (4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

ERR_INT (Bit 4)

◆ QEI_CLR_INX_INT_Msk

#define QEI_CLR_INX_INT_Msk (0x1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

INX_INT (Bitfield-Mask: 0x01)

◆ QEI_CLR_INX_INT_Pos

#define QEI_CLR_INX_INT_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

INX_INT (Bit 0)

◆ QEI_CLR_MAXPOS_INT_Msk

#define QEI_CLR_MAXPOS_INT_Msk (0x8000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

MAXPOS_INT (Bitfield-Mask: 0x01)

◆ QEI_CLR_MAXPOS_INT_Pos

#define QEI_CLR_MAXPOS_INT_Pos (15UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

MAXPOS_INT (Bit 15)

◆ QEI_CLR_POS0_INT_Msk

#define QEI_CLR_POS0_INT_Msk (0x40UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

POS0_INT (Bitfield-Mask: 0x01)

◆ QEI_CLR_POS0_INT_Pos

#define QEI_CLR_POS0_INT_Pos (6UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

POS0_INT (Bit 6)

◆ QEI_CLR_POS0REV_INT_Msk

#define QEI_CLR_POS0REV_INT_Msk (0x400UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

POS0REV_INT (Bitfield-Mask: 0x01)

◆ QEI_CLR_POS0REV_INT_Pos

#define QEI_CLR_POS0REV_INT_Pos (10UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

POS0REV_INT (Bit 10)

◆ QEI_CLR_POS1_INT_Msk

#define QEI_CLR_POS1_INT_Msk (0x80UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

POS1_INT (Bitfield-Mask: 0x01)

◆ QEI_CLR_POS1_INT_Pos

#define QEI_CLR_POS1_INT_Pos (7UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

POS1_INT (Bit 7)

◆ QEI_CLR_POS1REV_INT_Msk

#define QEI_CLR_POS1REV_INT_Msk (0x800UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

POS1REV_INT (Bitfield-Mask: 0x01)

◆ QEI_CLR_POS1REV_INT_Pos

#define QEI_CLR_POS1REV_INT_Pos (11UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

POS1REV_INT (Bit 11)

◆ QEI_CLR_POS2_INT_Msk

#define QEI_CLR_POS2_INT_Msk (0x100UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

POS2_INT (Bitfield-Mask: 0x01)

◆ QEI_CLR_POS2_INT_Pos

#define QEI_CLR_POS2_INT_Pos (8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

POS2_INT (Bit 8)

◆ QEI_CLR_POS2REV_INT_Msk

#define QEI_CLR_POS2REV_INT_Msk (0x1000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

POS2REV_INT (Bitfield-Mask: 0x01)

◆ QEI_CLR_POS2REV_INT_Pos

#define QEI_CLR_POS2REV_INT_Pos (12UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

POS2REV_INT (Bit 12)

◆ QEI_CLR_REV0_INT_Msk

#define QEI_CLR_REV0_INT_Msk (0x200UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

REV0_INT (Bitfield-Mask: 0x01)

◆ QEI_CLR_REV0_INT_Pos

#define QEI_CLR_REV0_INT_Pos (9UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

REV0_INT (Bit 9)

◆ QEI_CLR_REV1_INT_Msk

#define QEI_CLR_REV1_INT_Msk (0x2000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

REV1_INT (Bitfield-Mask: 0x01)

◆ QEI_CLR_REV1_INT_Pos

#define QEI_CLR_REV1_INT_Pos (13UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

REV1_INT (Bit 13)

◆ QEI_CLR_REV2_INT_Msk

#define QEI_CLR_REV2_INT_Msk (0x4000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

REV2_INT (Bitfield-Mask: 0x01)

◆ QEI_CLR_REV2_INT_Pos

#define QEI_CLR_REV2_INT_Pos (14UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

REV2_INT (Bit 14)

◆ QEI_CLR_TIM_INT_Msk

#define QEI_CLR_TIM_INT_Msk (0x2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TIM_INT (Bitfield-Mask: 0x01)

◆ QEI_CLR_TIM_INT_Pos

#define QEI_CLR_TIM_INT_Pos (1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TIM_INT (Bit 1)

◆ QEI_CLR_VELC_INT_Msk

#define QEI_CLR_VELC_INT_Msk (0x4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

VELC_INT (Bitfield-Mask: 0x01)

◆ QEI_CLR_VELC_INT_Pos

#define QEI_CLR_VELC_INT_Pos (2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

VELC_INT (Bit 2)

◆ QEI_CMPOS0_PCMP0_Msk

#define QEI_CMPOS0_PCMP0_Msk (0xffffffffUL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PCMP0 (Bitfield-Mask: 0xffffffff)

◆ QEI_CMPOS0_PCMP0_Pos

#define QEI_CMPOS0_PCMP0_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PCMP0 (Bit 0)

◆ QEI_CMPOS1_PCMP1_Msk

#define QEI_CMPOS1_PCMP1_Msk (0xffffffffUL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PCMP1 (Bitfield-Mask: 0xffffffff)

◆ QEI_CMPOS1_PCMP1_Pos

#define QEI_CMPOS1_PCMP1_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PCMP1 (Bit 0)

◆ QEI_CMPOS2_PCMP2_Msk

#define QEI_CMPOS2_PCMP2_Msk (0xffffffffUL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PCMP2 (Bitfield-Mask: 0xffffffff)

◆ QEI_CMPOS2_PCMP2_Pos

#define QEI_CMPOS2_PCMP2_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PCMP2 (Bit 0)

◆ QEI_CON_RESI_Msk

#define QEI_CON_RESI_Msk (0x8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RESI (Bitfield-Mask: 0x01)

◆ QEI_CON_RESI_Pos

#define QEI_CON_RESI_Pos (3UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RESI (Bit 3)

◆ QEI_CON_RESP_Msk

#define QEI_CON_RESP_Msk (0x1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RESP (Bitfield-Mask: 0x01)

◆ QEI_CON_RESP_Pos

#define QEI_CON_RESP_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RESP (Bit 0)

◆ QEI_CON_RESPI_Msk

#define QEI_CON_RESPI_Msk (0x2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RESPI (Bitfield-Mask: 0x01)

◆ QEI_CON_RESPI_Pos

#define QEI_CON_RESPI_Pos (1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RESPI (Bit 1)

◆ QEI_CON_RESV_Msk

#define QEI_CON_RESV_Msk (0x4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RESV (Bitfield-Mask: 0x01)

◆ QEI_CON_RESV_Pos

#define QEI_CON_RESV_Pos (2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RESV (Bit 2)

◆ QEI_CONF_CAPMODE_Msk

#define QEI_CONF_CAPMODE_Msk (0x4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CAPMODE (Bitfield-Mask: 0x01)

◆ QEI_CONF_CAPMODE_Pos

#define QEI_CONF_CAPMODE_Pos (2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CAPMODE (Bit 2)

◆ QEI_CONF_CRESPI_Msk

#define QEI_CONF_CRESPI_Msk (0x10UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CRESPI (Bitfield-Mask: 0x01)

◆ QEI_CONF_CRESPI_Pos

#define QEI_CONF_CRESPI_Pos (4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CRESPI (Bit 4)

◆ QEI_CONF_DIRINV_Msk

#define QEI_CONF_DIRINV_Msk (0x1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DIRINV (Bitfield-Mask: 0x01)

◆ QEI_CONF_DIRINV_Pos

#define QEI_CONF_DIRINV_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DIRINV (Bit 0)

◆ QEI_CONF_INVINX_Msk

#define QEI_CONF_INVINX_Msk (0x8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

INVINX (Bitfield-Mask: 0x01)

◆ QEI_CONF_INVINX_Pos

#define QEI_CONF_INVINX_Pos (3UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

INVINX (Bit 3)

◆ QEI_CONF_INXGATE_Msk

#define QEI_CONF_INXGATE_Msk (0xf0000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

INXGATE (Bitfield-Mask: 0x0f)

◆ QEI_CONF_INXGATE_Pos

#define QEI_CONF_INXGATE_Pos (16UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

INXGATE (Bit 16)

◆ QEI_CONF_SIGMODE_Msk

#define QEI_CONF_SIGMODE_Msk (0x2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

SIGMODE (Bitfield-Mask: 0x01)

◆ QEI_CONF_SIGMODE_Pos

#define QEI_CONF_SIGMODE_Pos (1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

SIGMODE (Bit 1)

◆ QEI_FILTER_FILTA_Msk

#define QEI_FILTER_FILTA_Msk (0xffffffffUL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

FILTA (Bitfield-Mask: 0xffffffff)

◆ QEI_FILTER_FILTA_Pos

#define QEI_FILTER_FILTA_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

FILTA (Bit 0)

◆ QEI_IE_DIR_INT_Msk

#define QEI_IE_DIR_INT_Msk (0x8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DIR_INT (Bitfield-Mask: 0x01)

◆ QEI_IE_DIR_INT_Pos

#define QEI_IE_DIR_INT_Pos (3UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DIR_INT (Bit 3)

◆ QEI_IE_ENCLK_INT_Msk

#define QEI_IE_ENCLK_INT_Msk (0x20UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

ENCLK_INT (Bitfield-Mask: 0x01)

◆ QEI_IE_ENCLK_INT_Pos

#define QEI_IE_ENCLK_INT_Pos (5UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

ENCLK_INT (Bit 5)

◆ QEI_IE_ERR_INT_Msk

#define QEI_IE_ERR_INT_Msk (0x10UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

ERR_INT (Bitfield-Mask: 0x01)

◆ QEI_IE_ERR_INT_Pos

#define QEI_IE_ERR_INT_Pos (4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

ERR_INT (Bit 4)

◆ QEI_IE_INX_INT_Msk

#define QEI_IE_INX_INT_Msk (0x1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

INX_INT (Bitfield-Mask: 0x01)

◆ QEI_IE_INX_INT_Pos

#define QEI_IE_INX_INT_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

INX_INT (Bit 0)

◆ QEI_IE_MAXPOS_INT_Msk

#define QEI_IE_MAXPOS_INT_Msk (0x8000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

MAXPOS_INT (Bitfield-Mask: 0x01)

◆ QEI_IE_MAXPOS_INT_Pos

#define QEI_IE_MAXPOS_INT_Pos (15UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

MAXPOS_INT (Bit 15)

◆ QEI_IE_POS0_INT_Msk

#define QEI_IE_POS0_INT_Msk (0x40UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

POS0_INT (Bitfield-Mask: 0x01)

◆ QEI_IE_POS0_INT_Pos

#define QEI_IE_POS0_INT_Pos (6UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

POS0_INT (Bit 6)

◆ QEI_IE_POS0REV_INT_Msk

#define QEI_IE_POS0REV_INT_Msk (0x400UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

POS0REV_INT (Bitfield-Mask: 0x01)

◆ QEI_IE_POS0REV_INT_Pos

#define QEI_IE_POS0REV_INT_Pos (10UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

POS0REV_INT (Bit 10)

◆ QEI_IE_POS1_INT_Msk

#define QEI_IE_POS1_INT_Msk (0x80UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

POS1_INT (Bitfield-Mask: 0x01)

◆ QEI_IE_POS1_INT_Pos

#define QEI_IE_POS1_INT_Pos (7UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

POS1_INT (Bit 7)

◆ QEI_IE_POS1REV_INT_Msk

#define QEI_IE_POS1REV_INT_Msk (0x800UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

POS1REV_INT (Bitfield-Mask: 0x01)

◆ QEI_IE_POS1REV_INT_Pos

#define QEI_IE_POS1REV_INT_Pos (11UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

POS1REV_INT (Bit 11)

◆ QEI_IE_POS2_INT_Msk

#define QEI_IE_POS2_INT_Msk (0x100UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

POS2_INT (Bitfield-Mask: 0x01)

◆ QEI_IE_POS2_INT_Pos

#define QEI_IE_POS2_INT_Pos (8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

POS2_INT (Bit 8)

◆ QEI_IE_POS2REV_INT_Msk

#define QEI_IE_POS2REV_INT_Msk (0x1000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

POS2REV_INT (Bitfield-Mask: 0x01)

◆ QEI_IE_POS2REV_INT_Pos

#define QEI_IE_POS2REV_INT_Pos (12UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

POS2REV_INT (Bit 12)

◆ QEI_IE_REV0_INT_Msk

#define QEI_IE_REV0_INT_Msk (0x200UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

REV0_INT (Bitfield-Mask: 0x01)

◆ QEI_IE_REV0_INT_Pos

#define QEI_IE_REV0_INT_Pos (9UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

REV0_INT (Bit 9)

◆ QEI_IE_REV1_INT_Msk

#define QEI_IE_REV1_INT_Msk (0x2000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

REV1_INT (Bitfield-Mask: 0x01)

◆ QEI_IE_REV1_INT_Pos

#define QEI_IE_REV1_INT_Pos (13UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

REV1_INT (Bit 13)

◆ QEI_IE_REV2_INT_Msk

#define QEI_IE_REV2_INT_Msk (0x4000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

REV2_INT (Bitfield-Mask: 0x01)

◆ QEI_IE_REV2_INT_Pos

#define QEI_IE_REV2_INT_Pos (14UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

REV2_INT (Bit 14)

◆ QEI_IE_TIM_INT_Msk

#define QEI_IE_TIM_INT_Msk (0x2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TIM_INT (Bitfield-Mask: 0x01)

◆ QEI_IE_TIM_INT_Pos

#define QEI_IE_TIM_INT_Pos (1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TIM_INT (Bit 1)

◆ QEI_IE_VELC_INT_Msk

#define QEI_IE_VELC_INT_Msk (0x4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

VELC_INT (Bitfield-Mask: 0x01)

◆ QEI_IE_VELC_INT_Pos

#define QEI_IE_VELC_INT_Pos (2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

VELC_INT (Bit 2)

◆ QEI_IEC_DIR_INT_Msk

#define QEI_IEC_DIR_INT_Msk (0x8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DIR_INT (Bitfield-Mask: 0x01)

◆ QEI_IEC_DIR_INT_Pos

#define QEI_IEC_DIR_INT_Pos (3UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DIR_INT (Bit 3)

◆ QEI_IEC_ENCLK_INT_Msk

#define QEI_IEC_ENCLK_INT_Msk (0x20UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

ENCLK_INT (Bitfield-Mask: 0x01)

◆ QEI_IEC_ENCLK_INT_Pos

#define QEI_IEC_ENCLK_INT_Pos (5UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

ENCLK_INT (Bit 5)

◆ QEI_IEC_ERR_INT_Msk

#define QEI_IEC_ERR_INT_Msk (0x10UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

ERR_INT (Bitfield-Mask: 0x01)

◆ QEI_IEC_ERR_INT_Pos

#define QEI_IEC_ERR_INT_Pos (4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

ERR_INT (Bit 4)

◆ QEI_IEC_INX_INT_Msk

#define QEI_IEC_INX_INT_Msk (0x1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

INX_INT (Bitfield-Mask: 0x01)

◆ QEI_IEC_INX_INT_Pos

#define QEI_IEC_INX_INT_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

INX_INT (Bit 0)

◆ QEI_IEC_MAXPOS_INT_Msk

#define QEI_IEC_MAXPOS_INT_Msk (0x8000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

MAXPOS_INT (Bitfield-Mask: 0x01)

◆ QEI_IEC_MAXPOS_INT_Pos

#define QEI_IEC_MAXPOS_INT_Pos (15UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

MAXPOS_INT (Bit 15)

◆ QEI_IEC_POS0_INT_Msk

#define QEI_IEC_POS0_INT_Msk (0x40UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

POS0_INT (Bitfield-Mask: 0x01)

◆ QEI_IEC_POS0_INT_Pos

#define QEI_IEC_POS0_INT_Pos (6UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

POS0_INT (Bit 6)

◆ QEI_IEC_POS0REV_INT_Msk

#define QEI_IEC_POS0REV_INT_Msk (0x400UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

POS0REV_INT (Bitfield-Mask: 0x01)

◆ QEI_IEC_POS0REV_INT_Pos

#define QEI_IEC_POS0REV_INT_Pos (10UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

POS0REV_INT (Bit 10)

◆ QEI_IEC_POS1_INT_Msk

#define QEI_IEC_POS1_INT_Msk (0x80UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

POS1_INT (Bitfield-Mask: 0x01)

◆ QEI_IEC_POS1_INT_Pos

#define QEI_IEC_POS1_INT_Pos (7UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

POS1_INT (Bit 7)

◆ QEI_IEC_POS1REV_INT_Msk

#define QEI_IEC_POS1REV_INT_Msk (0x800UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

POS1REV_INT (Bitfield-Mask: 0x01)

◆ QEI_IEC_POS1REV_INT_Pos

#define QEI_IEC_POS1REV_INT_Pos (11UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

POS1REV_INT (Bit 11)

◆ QEI_IEC_POS2_INT_Msk

#define QEI_IEC_POS2_INT_Msk (0x100UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

POS2_INT (Bitfield-Mask: 0x01)

◆ QEI_IEC_POS2_INT_Pos

#define QEI_IEC_POS2_INT_Pos (8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

POS2_INT (Bit 8)

◆ QEI_IEC_POS2REV_INT_Msk

#define QEI_IEC_POS2REV_INT_Msk (0x1000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

POS2REV_INT (Bitfield-Mask: 0x01)

◆ QEI_IEC_POS2REV_INT_Pos

#define QEI_IEC_POS2REV_INT_Pos (12UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

POS2REV_INT (Bit 12)

◆ QEI_IEC_REV0_INT_Msk

#define QEI_IEC_REV0_INT_Msk (0x200UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

REV0_INT (Bitfield-Mask: 0x01)

◆ QEI_IEC_REV0_INT_Pos

#define QEI_IEC_REV0_INT_Pos (9UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

REV0_INT (Bit 9)

◆ QEI_IEC_REV1_INT_Msk

#define QEI_IEC_REV1_INT_Msk (0x2000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

REV1_INT (Bitfield-Mask: 0x01)

◆ QEI_IEC_REV1_INT_Pos

#define QEI_IEC_REV1_INT_Pos (13UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

REV1_INT (Bit 13)

◆ QEI_IEC_REV2_INT_Msk

#define QEI_IEC_REV2_INT_Msk (0x4000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

REV2_INT (Bitfield-Mask: 0x01)

◆ QEI_IEC_REV2_INT_Pos

#define QEI_IEC_REV2_INT_Pos (14UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

REV2_INT (Bit 14)

◆ QEI_IEC_TIM_INT_Msk

#define QEI_IEC_TIM_INT_Msk (0x2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TIM_INT (Bitfield-Mask: 0x01)

◆ QEI_IEC_TIM_INT_Pos

#define QEI_IEC_TIM_INT_Pos (1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TIM_INT (Bit 1)

◆ QEI_IEC_VELC_INT_Msk

#define QEI_IEC_VELC_INT_Msk (0x4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

VELC_INT (Bitfield-Mask: 0x01)

◆ QEI_IEC_VELC_INT_Pos

#define QEI_IEC_VELC_INT_Pos (2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

VELC_INT (Bit 2)

◆ QEI_IES_DIR_INT_Msk

#define QEI_IES_DIR_INT_Msk (0x8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DIR_INT (Bitfield-Mask: 0x01)

◆ QEI_IES_DIR_INT_Pos

#define QEI_IES_DIR_INT_Pos (3UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DIR_INT (Bit 3)

◆ QEI_IES_ENCLK_INT_Msk

#define QEI_IES_ENCLK_INT_Msk (0x20UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

ENCLK_INT (Bitfield-Mask: 0x01)

◆ QEI_IES_ENCLK_INT_Pos

#define QEI_IES_ENCLK_INT_Pos (5UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

ENCLK_INT (Bit 5)

◆ QEI_IES_ERR_INT_Msk

#define QEI_IES_ERR_INT_Msk (0x10UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

ERR_INT (Bitfield-Mask: 0x01)

◆ QEI_IES_ERR_INT_Pos

#define QEI_IES_ERR_INT_Pos (4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

ERR_INT (Bit 4)

◆ QEI_IES_INX_INT_Msk

#define QEI_IES_INX_INT_Msk (0x1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

INX_INT (Bitfield-Mask: 0x01)

◆ QEI_IES_INX_INT_Pos

#define QEI_IES_INX_INT_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

INX_INT (Bit 0)

◆ QEI_IES_MAXPOS_INT_Msk

#define QEI_IES_MAXPOS_INT_Msk (0x8000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

MAXPOS_INT (Bitfield-Mask: 0x01)

◆ QEI_IES_MAXPOS_INT_Pos

#define QEI_IES_MAXPOS_INT_Pos (15UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

MAXPOS_INT (Bit 15)

◆ QEI_IES_POS0_INT_Msk

#define QEI_IES_POS0_INT_Msk (0x40UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

POS0_INT (Bitfield-Mask: 0x01)

◆ QEI_IES_POS0_INT_Pos

#define QEI_IES_POS0_INT_Pos (6UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

POS0_INT (Bit 6)

◆ QEI_IES_POS0REV_INT_Msk

#define QEI_IES_POS0REV_INT_Msk (0x400UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

POS0REV_INT (Bitfield-Mask: 0x01)

◆ QEI_IES_POS0REV_INT_Pos

#define QEI_IES_POS0REV_INT_Pos (10UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

POS0REV_INT (Bit 10)

◆ QEI_IES_POS1_INT_Msk

#define QEI_IES_POS1_INT_Msk (0x80UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

POS1_INT (Bitfield-Mask: 0x01)

◆ QEI_IES_POS1_INT_Pos

#define QEI_IES_POS1_INT_Pos (7UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

POS1_INT (Bit 7)

◆ QEI_IES_POS1REV_INT_Msk

#define QEI_IES_POS1REV_INT_Msk (0x800UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

POS1REV_INT (Bitfield-Mask: 0x01)

◆ QEI_IES_POS1REV_INT_Pos

#define QEI_IES_POS1REV_INT_Pos (11UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

POS1REV_INT (Bit 11)

◆ QEI_IES_POS2_INT_Msk

#define QEI_IES_POS2_INT_Msk (0x100UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

POS2_INT (Bitfield-Mask: 0x01)

◆ QEI_IES_POS2_INT_Pos

#define QEI_IES_POS2_INT_Pos (8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

POS2_INT (Bit 8)

◆ QEI_IES_POS2REV_INT_Msk

#define QEI_IES_POS2REV_INT_Msk (0x1000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

POS2REV_INT (Bitfield-Mask: 0x01)

◆ QEI_IES_POS2REV_INT_Pos

#define QEI_IES_POS2REV_INT_Pos (12UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

POS2REV_INT (Bit 12)

◆ QEI_IES_REV0_INT_Msk

#define QEI_IES_REV0_INT_Msk (0x200UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

REV0_INT (Bitfield-Mask: 0x01)

◆ QEI_IES_REV0_INT_Pos

#define QEI_IES_REV0_INT_Pos (9UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

REV0_INT (Bit 9)

◆ QEI_IES_REV1_INT_Msk

#define QEI_IES_REV1_INT_Msk (0x2000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

REV1_INT (Bitfield-Mask: 0x01)

◆ QEI_IES_REV1_INT_Pos

#define QEI_IES_REV1_INT_Pos (13UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

REV1_INT (Bit 13)

◆ QEI_IES_REV2_INT_Msk

#define QEI_IES_REV2_INT_Msk (0x4000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

REV2_INT (Bitfield-Mask: 0x01)

◆ QEI_IES_REV2_INT_Pos

#define QEI_IES_REV2_INT_Pos (14UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

REV2_INT (Bit 14)

◆ QEI_IES_TIM_INT_Msk

#define QEI_IES_TIM_INT_Msk (0x2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TIM_INT (Bitfield-Mask: 0x01)

◆ QEI_IES_TIM_INT_Pos

#define QEI_IES_TIM_INT_Pos (1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TIM_INT (Bit 1)

◆ QEI_IES_VELC_INT_Msk

#define QEI_IES_VELC_INT_Msk (0x4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

VELC_INT (Bitfield-Mask: 0x01)

◆ QEI_IES_VELC_INT_Pos

#define QEI_IES_VELC_INT_Pos (2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

VELC_INT (Bit 2)

◆ QEI_INTSTAT_DIR_INT_Msk

#define QEI_INTSTAT_DIR_INT_Msk (0x8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DIR_INT (Bitfield-Mask: 0x01)

◆ QEI_INTSTAT_DIR_INT_Pos

#define QEI_INTSTAT_DIR_INT_Pos (3UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DIR_INT (Bit 3)

◆ QEI_INTSTAT_ENCLK_INT_Msk

#define QEI_INTSTAT_ENCLK_INT_Msk (0x20UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

ENCLK_INT (Bitfield-Mask: 0x01)

◆ QEI_INTSTAT_ENCLK_INT_Pos

#define QEI_INTSTAT_ENCLK_INT_Pos (5UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

ENCLK_INT (Bit 5)

◆ QEI_INTSTAT_ERR_INT_Msk

#define QEI_INTSTAT_ERR_INT_Msk (0x10UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

ERR_INT (Bitfield-Mask: 0x01)

◆ QEI_INTSTAT_ERR_INT_Pos

#define QEI_INTSTAT_ERR_INT_Pos (4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

ERR_INT (Bit 4)

◆ QEI_INTSTAT_INX_INT_Msk

#define QEI_INTSTAT_INX_INT_Msk (0x1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

INX_INT (Bitfield-Mask: 0x01)

◆ QEI_INTSTAT_INX_INT_Pos

#define QEI_INTSTAT_INX_INT_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

INX_INT (Bit 0)

◆ QEI_INTSTAT_MAXPOS_INT_Msk

#define QEI_INTSTAT_MAXPOS_INT_Msk (0x8000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

MAXPOS_INT (Bitfield-Mask: 0x01)

◆ QEI_INTSTAT_MAXPOS_INT_Pos

#define QEI_INTSTAT_MAXPOS_INT_Pos (15UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

MAXPOS_INT (Bit 15)

◆ QEI_INTSTAT_POS0_INT_Msk

#define QEI_INTSTAT_POS0_INT_Msk (0x40UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

POS0_INT (Bitfield-Mask: 0x01)

◆ QEI_INTSTAT_POS0_INT_Pos

#define QEI_INTSTAT_POS0_INT_Pos (6UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

POS0_INT (Bit 6)

◆ QEI_INTSTAT_POS0REV_INT_Msk

#define QEI_INTSTAT_POS0REV_INT_Msk (0x400UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

POS0REV_INT (Bitfield-Mask: 0x01)

◆ QEI_INTSTAT_POS0REV_INT_Pos

#define QEI_INTSTAT_POS0REV_INT_Pos (10UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

POS0REV_INT (Bit 10)

◆ QEI_INTSTAT_POS1_INT_Msk

#define QEI_INTSTAT_POS1_INT_Msk (0x80UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

POS1_INT (Bitfield-Mask: 0x01)

◆ QEI_INTSTAT_POS1_INT_Pos

#define QEI_INTSTAT_POS1_INT_Pos (7UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

POS1_INT (Bit 7)

◆ QEI_INTSTAT_POS1REV_INT_Msk

#define QEI_INTSTAT_POS1REV_INT_Msk (0x800UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

POS1REV_INT (Bitfield-Mask: 0x01)

◆ QEI_INTSTAT_POS1REV_INT_Pos

#define QEI_INTSTAT_POS1REV_INT_Pos (11UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

POS1REV_INT (Bit 11)

◆ QEI_INTSTAT_POS2_INT_Msk

#define QEI_INTSTAT_POS2_INT_Msk (0x100UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

POS2_INT (Bitfield-Mask: 0x01)

◆ QEI_INTSTAT_POS2_INT_Pos

#define QEI_INTSTAT_POS2_INT_Pos (8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

POS2_INT (Bit 8)

◆ QEI_INTSTAT_POS2REV_INT_Msk

#define QEI_INTSTAT_POS2REV_INT_Msk (0x1000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

POS2REV_INT (Bitfield-Mask: 0x01)

◆ QEI_INTSTAT_POS2REV_INT_Pos

#define QEI_INTSTAT_POS2REV_INT_Pos (12UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

POS2REV_INT (Bit 12)

◆ QEI_INTSTAT_REV0_INT_Msk

#define QEI_INTSTAT_REV0_INT_Msk (0x200UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

REV0_INT (Bitfield-Mask: 0x01)

◆ QEI_INTSTAT_REV0_INT_Pos

#define QEI_INTSTAT_REV0_INT_Pos (9UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

REV0_INT (Bit 9)

◆ QEI_INTSTAT_REV1_INT_Msk

#define QEI_INTSTAT_REV1_INT_Msk (0x2000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

REV1_INT (Bitfield-Mask: 0x01)

◆ QEI_INTSTAT_REV1_INT_Pos

#define QEI_INTSTAT_REV1_INT_Pos (13UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

REV1_INT (Bit 13)

◆ QEI_INTSTAT_REV2_INT_Msk

#define QEI_INTSTAT_REV2_INT_Msk (0x4000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

REV2_INT (Bitfield-Mask: 0x01)

◆ QEI_INTSTAT_REV2_INT_Pos

#define QEI_INTSTAT_REV2_INT_Pos (14UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

REV2_INT (Bit 14)

◆ QEI_INTSTAT_TIM_INT_Msk

#define QEI_INTSTAT_TIM_INT_Msk (0x2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TIM_INT (Bitfield-Mask: 0x01)

◆ QEI_INTSTAT_TIM_INT_Pos

#define QEI_INTSTAT_TIM_INT_Pos (1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TIM_INT (Bit 1)

◆ QEI_INTSTAT_VELC_INT_Msk

#define QEI_INTSTAT_VELC_INT_Msk (0x4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

VELC_INT (Bitfield-Mask: 0x01)

◆ QEI_INTSTAT_VELC_INT_Pos

#define QEI_INTSTAT_VELC_INT_Pos (2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

VELC_INT (Bit 2)

◆ QEI_INXCMP0_ICMP0_Msk

#define QEI_INXCMP0_ICMP0_Msk (0xffffffffUL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

ICMP0 (Bitfield-Mask: 0xffffffff)

◆ QEI_INXCMP0_ICMP0_Pos

#define QEI_INXCMP0_ICMP0_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

ICMP0 (Bit 0)

◆ QEI_INXCNT_ENCPOS_Msk

#define QEI_INXCNT_ENCPOS_Msk (0xffffffffUL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

ENCPOS (Bitfield-Mask: 0xffffffff)

◆ QEI_INXCNT_ENCPOS_Pos

#define QEI_INXCNT_ENCPOS_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

ENCPOS (Bit 0)

◆ QEI_LOAD_VELLOAD_Msk

#define QEI_LOAD_VELLOAD_Msk (0xffffffffUL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

VELLOAD (Bitfield-Mask: 0xffffffff)

◆ QEI_LOAD_VELLOAD_Pos

#define QEI_LOAD_VELLOAD_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

VELLOAD (Bit 0)

◆ QEI_MAXPOS_MAXPOS_Msk

#define QEI_MAXPOS_MAXPOS_Msk (0xffffffffUL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

MAXPOS (Bitfield-Mask: 0xffffffff)

◆ QEI_MAXPOS_MAXPOS_Pos

#define QEI_MAXPOS_MAXPOS_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

MAXPOS (Bit 0)

◆ QEI_POS_POS_Msk

#define QEI_POS_POS_Msk (0xffffffffUL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

POS (Bitfield-Mask: 0xffffffff)

◆ QEI_POS_POS_Pos

#define QEI_POS_POS_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

POS (Bit 0)

◆ QEI_SET_DIR_INT_Msk

#define QEI_SET_DIR_INT_Msk (0x8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DIR_INT (Bitfield-Mask: 0x01)

◆ QEI_SET_DIR_INT_Pos

#define QEI_SET_DIR_INT_Pos (3UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DIR_INT (Bit 3)

◆ QEI_SET_ENCLK_INT_Msk

#define QEI_SET_ENCLK_INT_Msk (0x20UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

ENCLK_INT (Bitfield-Mask: 0x01)

◆ QEI_SET_ENCLK_INT_Pos

#define QEI_SET_ENCLK_INT_Pos (5UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

ENCLK_INT (Bit 5)

◆ QEI_SET_ERR_INT_Msk

#define QEI_SET_ERR_INT_Msk (0x10UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

ERR_INT (Bitfield-Mask: 0x01)

◆ QEI_SET_ERR_INT_Pos

#define QEI_SET_ERR_INT_Pos (4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

ERR_INT (Bit 4)

◆ QEI_SET_INX_INT_Msk

#define QEI_SET_INX_INT_Msk (0x1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

INX_INT (Bitfield-Mask: 0x01)

◆ QEI_SET_INX_INT_Pos

#define QEI_SET_INX_INT_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

INX_INT (Bit 0)

◆ QEI_SET_MAXPOS_INT_Msk

#define QEI_SET_MAXPOS_INT_Msk (0x8000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

MAXPOS_INT (Bitfield-Mask: 0x01)

◆ QEI_SET_MAXPOS_INT_Pos

#define QEI_SET_MAXPOS_INT_Pos (15UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

MAXPOS_INT (Bit 15)

◆ QEI_SET_POS0_INT_Msk

#define QEI_SET_POS0_INT_Msk (0x40UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

POS0_INT (Bitfield-Mask: 0x01)

◆ QEI_SET_POS0_INT_Pos

#define QEI_SET_POS0_INT_Pos (6UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

POS0_INT (Bit 6)

◆ QEI_SET_POS0REV_INT_Msk

#define QEI_SET_POS0REV_INT_Msk (0x400UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

POS0REV_INT (Bitfield-Mask: 0x01)

◆ QEI_SET_POS0REV_INT_Pos

#define QEI_SET_POS0REV_INT_Pos (10UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

POS0REV_INT (Bit 10)

◆ QEI_SET_POS1_INT_Msk

#define QEI_SET_POS1_INT_Msk (0x80UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

POS1_INT (Bitfield-Mask: 0x01)

◆ QEI_SET_POS1_INT_Pos

#define QEI_SET_POS1_INT_Pos (7UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

POS1_INT (Bit 7)

◆ QEI_SET_POS1REV_INT_Msk

#define QEI_SET_POS1REV_INT_Msk (0x800UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

POS1REV_INT (Bitfield-Mask: 0x01)

◆ QEI_SET_POS1REV_INT_Pos

#define QEI_SET_POS1REV_INT_Pos (11UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

POS1REV_INT (Bit 11)

◆ QEI_SET_POS2_INT_Msk

#define QEI_SET_POS2_INT_Msk (0x100UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

POS2_INT (Bitfield-Mask: 0x01)

◆ QEI_SET_POS2_INT_Pos

#define QEI_SET_POS2_INT_Pos (8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

POS2_INT (Bit 8)

◆ QEI_SET_POS2REV_INT_Msk

#define QEI_SET_POS2REV_INT_Msk (0x1000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

POS2REV_INT (Bitfield-Mask: 0x01)

◆ QEI_SET_POS2REV_INT_Pos

#define QEI_SET_POS2REV_INT_Pos (12UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

POS2REV_INT (Bit 12)

◆ QEI_SET_REV0_INT_Msk

#define QEI_SET_REV0_INT_Msk (0x200UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

REV0_INT (Bitfield-Mask: 0x01)

◆ QEI_SET_REV0_INT_Pos

#define QEI_SET_REV0_INT_Pos (9UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

REV0_INT (Bit 9)

◆ QEI_SET_REV1_INT_Msk

#define QEI_SET_REV1_INT_Msk (0x2000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

REV1_INT (Bitfield-Mask: 0x01)

◆ QEI_SET_REV1_INT_Pos

#define QEI_SET_REV1_INT_Pos (13UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

REV1_INT (Bit 13)

◆ QEI_SET_REV2_INT_Msk

#define QEI_SET_REV2_INT_Msk (0x4000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

REV2_INT (Bitfield-Mask: 0x01)

◆ QEI_SET_REV2_INT_Pos

#define QEI_SET_REV2_INT_Pos (14UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

REV2_INT (Bit 14)

◆ QEI_SET_TIM_INT_Msk

#define QEI_SET_TIM_INT_Msk (0x2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TIM_INT (Bitfield-Mask: 0x01)

◆ QEI_SET_TIM_INT_Pos

#define QEI_SET_TIM_INT_Pos (1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TIM_INT (Bit 1)

◆ QEI_SET_VELC_INT_Msk

#define QEI_SET_VELC_INT_Msk (0x4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

VELC_INT (Bitfield-Mask: 0x01)

◆ QEI_SET_VELC_INT_Pos

#define QEI_SET_VELC_INT_Pos (2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

VELC_INT (Bit 2)

◆ QEI_STAT_DIR_Msk

#define QEI_STAT_DIR_Msk (0x1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DIR (Bitfield-Mask: 0x01)

◆ QEI_STAT_DIR_Pos

#define QEI_STAT_DIR_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DIR (Bit 0)

◆ QEI_TIME_VELVAL_Msk

#define QEI_TIME_VELVAL_Msk (0xffffffffUL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

VELVAL (Bitfield-Mask: 0xffffffff)

◆ QEI_TIME_VELVAL_Pos

#define QEI_TIME_VELVAL_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

VELVAL (Bit 0)

◆ QEI_VEL_VELPC_Msk

#define QEI_VEL_VELPC_Msk (0xffffffffUL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

VELPC (Bitfield-Mask: 0xffffffff)

◆ QEI_VEL_VELPC_Pos

#define QEI_VEL_VELPC_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

VELPC (Bit 0)

◆ QEI_VELCOMP_VELPC_Msk

#define QEI_VELCOMP_VELPC_Msk (0xffffffffUL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

VELPC (Bitfield-Mask: 0xffffffff)

◆ QEI_VELCOMP_VELPC_Pos

#define QEI_VELCOMP_VELPC_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

VELPC (Bit 0)

◆ RITIMER_COMPVAL_RICOMP_Msk

#define RITIMER_COMPVAL_RICOMP_Msk (0xffffffffUL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RICOMP (Bitfield-Mask: 0xffffffff)

◆ RITIMER_COMPVAL_RICOMP_Pos

#define RITIMER_COMPVAL_RICOMP_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RICOMP (Bit 0)

◆ RITIMER_COUNTER_RICOUNTER_Msk

#define RITIMER_COUNTER_RICOUNTER_Msk (0xffffffffUL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RICOUNTER (Bitfield-Mask: 0xffffffff)

◆ RITIMER_COUNTER_RICOUNTER_Pos

#define RITIMER_COUNTER_RICOUNTER_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RICOUNTER (Bit 0)

◆ RITIMER_CTRL_RITEN_Msk

#define RITIMER_CTRL_RITEN_Msk (0x8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RITEN (Bitfield-Mask: 0x01)

◆ RITIMER_CTRL_RITEN_Pos

#define RITIMER_CTRL_RITEN_Pos (3UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RITEN (Bit 3)

◆ RITIMER_CTRL_RITENBR_Msk

#define RITIMER_CTRL_RITENBR_Msk (0x4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RITENBR (Bitfield-Mask: 0x01)

◆ RITIMER_CTRL_RITENBR_Pos

#define RITIMER_CTRL_RITENBR_Pos (2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RITENBR (Bit 2)

◆ RITIMER_CTRL_RITENCLR_Msk

#define RITIMER_CTRL_RITENCLR_Msk (0x2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RITENCLR (Bitfield-Mask: 0x01)

◆ RITIMER_CTRL_RITENCLR_Pos

#define RITIMER_CTRL_RITENCLR_Pos (1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RITENCLR (Bit 1)

◆ RITIMER_CTRL_RITINT_Msk

#define RITIMER_CTRL_RITINT_Msk (0x1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RITINT (Bitfield-Mask: 0x01)

◆ RITIMER_CTRL_RITINT_Pos

#define RITIMER_CTRL_RITINT_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RITINT (Bit 0)

◆ RITIMER_MASK_RIMASK_Msk

#define RITIMER_MASK_RIMASK_Msk (0xffffffffUL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RIMASK (Bitfield-Mask: 0xffffffff)

◆ RITIMER_MASK_RIMASK_Pos

#define RITIMER_MASK_RIMASK_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RIMASK (Bit 0)

◆ RTC_ADOM_DOM_Msk

#define RTC_ADOM_DOM_Msk (0x1fUL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DOM (Bitfield-Mask: 0x1f)

◆ RTC_ADOM_DOM_Pos

#define RTC_ADOM_DOM_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DOM (Bit 0)

◆ RTC_ADOW_DOW_Msk

#define RTC_ADOW_DOW_Msk (0x7UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DOW (Bitfield-Mask: 0x07)

◆ RTC_ADOW_DOW_Pos

#define RTC_ADOW_DOW_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DOW (Bit 0)

◆ RTC_ADOY_DOY_Msk

#define RTC_ADOY_DOY_Msk (0x1ffUL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DOY (Bitfield-Mask: 0x1ff)

◆ RTC_ADOY_DOY_Pos

#define RTC_ADOY_DOY_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DOY (Bit 0)

◆ RTC_AHRS_HOURS_Msk

#define RTC_AHRS_HOURS_Msk (0x1fUL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

HOURS (Bitfield-Mask: 0x1f)

◆ RTC_AHRS_HOURS_Pos

#define RTC_AHRS_HOURS_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

HOURS (Bit 0)

◆ RTC_AMIN_MINUTES_Msk

#define RTC_AMIN_MINUTES_Msk (0x3fUL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

MINUTES (Bitfield-Mask: 0x3f)

◆ RTC_AMIN_MINUTES_Pos

#define RTC_AMIN_MINUTES_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

MINUTES (Bit 0)

◆ RTC_AMON_MONTH_Msk

#define RTC_AMON_MONTH_Msk (0xfUL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

MONTH (Bitfield-Mask: 0x0f)

◆ RTC_AMON_MONTH_Pos

#define RTC_AMON_MONTH_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

MONTH (Bit 0)

◆ RTC_AMR_AMRDOM_Msk

#define RTC_AMR_AMRDOM_Msk (0x8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

AMRDOM (Bitfield-Mask: 0x01)

◆ RTC_AMR_AMRDOM_Pos

#define RTC_AMR_AMRDOM_Pos (3UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

AMRDOM (Bit 3)

◆ RTC_AMR_AMRDOW_Msk

#define RTC_AMR_AMRDOW_Msk (0x10UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

AMRDOW (Bitfield-Mask: 0x01)

◆ RTC_AMR_AMRDOW_Pos

#define RTC_AMR_AMRDOW_Pos (4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

AMRDOW (Bit 4)

◆ RTC_AMR_AMRDOY_Msk

#define RTC_AMR_AMRDOY_Msk (0x20UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

AMRDOY (Bitfield-Mask: 0x01)

◆ RTC_AMR_AMRDOY_Pos

#define RTC_AMR_AMRDOY_Pos (5UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

AMRDOY (Bit 5)

◆ RTC_AMR_AMRHOUR_Msk

#define RTC_AMR_AMRHOUR_Msk (0x4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

AMRHOUR (Bitfield-Mask: 0x01)

◆ RTC_AMR_AMRHOUR_Pos

#define RTC_AMR_AMRHOUR_Pos (2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

AMRHOUR (Bit 2)

◆ RTC_AMR_AMRMIN_Msk

#define RTC_AMR_AMRMIN_Msk (0x2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

AMRMIN (Bitfield-Mask: 0x01)

◆ RTC_AMR_AMRMIN_Pos

#define RTC_AMR_AMRMIN_Pos (1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

AMRMIN (Bit 1)

◆ RTC_AMR_AMRMON_Msk

#define RTC_AMR_AMRMON_Msk (0x40UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

AMRMON (Bitfield-Mask: 0x01)

◆ RTC_AMR_AMRMON_Pos

#define RTC_AMR_AMRMON_Pos (6UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

AMRMON (Bit 6)

◆ RTC_AMR_AMRSEC_Msk

#define RTC_AMR_AMRSEC_Msk (0x1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

AMRSEC (Bitfield-Mask: 0x01)

◆ RTC_AMR_AMRSEC_Pos

#define RTC_AMR_AMRSEC_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

AMRSEC (Bit 0)

◆ RTC_AMR_AMRYEAR_Msk

#define RTC_AMR_AMRYEAR_Msk (0x80UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

AMRYEAR (Bitfield-Mask: 0x01)

◆ RTC_AMR_AMRYEAR_Pos

#define RTC_AMR_AMRYEAR_Pos (7UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

AMRYEAR (Bit 7)

◆ RTC_ASEC_SECONDS_Msk

#define RTC_ASEC_SECONDS_Msk (0x3fUL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

SECONDS (Bitfield-Mask: 0x3f)

◆ RTC_ASEC_SECONDS_Pos

#define RTC_ASEC_SECONDS_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

SECONDS (Bit 0)

◆ RTC_AYRS_YEAR_Msk

#define RTC_AYRS_YEAR_Msk (0xfffUL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

YEAR (Bitfield-Mask: 0xfff)

◆ RTC_AYRS_YEAR_Pos

#define RTC_AYRS_YEAR_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

YEAR (Bit 0)

◆ RTC_CALIBRATION_CALDIR_Msk

#define RTC_CALIBRATION_CALDIR_Msk (0x20000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CALDIR (Bitfield-Mask: 0x01)

◆ RTC_CALIBRATION_CALDIR_Pos

#define RTC_CALIBRATION_CALDIR_Pos (17UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CALDIR (Bit 17)

◆ RTC_CALIBRATION_CALVAL_Msk

#define RTC_CALIBRATION_CALVAL_Msk (0x1ffffUL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CALVAL (Bitfield-Mask: 0x1ffff)

◆ RTC_CALIBRATION_CALVAL_Pos

#define RTC_CALIBRATION_CALVAL_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CALVAL (Bit 0)

◆ RTC_CCR_CCALEN_Msk

#define RTC_CCR_CCALEN_Msk (0x10UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CCALEN (Bitfield-Mask: 0x01)

◆ RTC_CCR_CCALEN_Pos

#define RTC_CCR_CCALEN_Pos (4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CCALEN (Bit 4)

◆ RTC_CCR_CLKEN_Msk

#define RTC_CCR_CLKEN_Msk (0x1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CLKEN (Bitfield-Mask: 0x01)

◆ RTC_CCR_CLKEN_Pos

#define RTC_CCR_CLKEN_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CLKEN (Bit 0)

◆ RTC_CCR_CTCRST_Msk

#define RTC_CCR_CTCRST_Msk (0x2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CTCRST (Bitfield-Mask: 0x01)

◆ RTC_CCR_CTCRST_Pos

#define RTC_CCR_CTCRST_Pos (1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CTCRST (Bit 1)

◆ RTC_CIIR_IMDOM_Msk

#define RTC_CIIR_IMDOM_Msk (0x8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

IMDOM (Bitfield-Mask: 0x01)

◆ RTC_CIIR_IMDOM_Pos

#define RTC_CIIR_IMDOM_Pos (3UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

IMDOM (Bit 3)

◆ RTC_CIIR_IMDOW_Msk

#define RTC_CIIR_IMDOW_Msk (0x10UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

IMDOW (Bitfield-Mask: 0x01)

◆ RTC_CIIR_IMDOW_Pos

#define RTC_CIIR_IMDOW_Pos (4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

IMDOW (Bit 4)

◆ RTC_CIIR_IMDOY_Msk

#define RTC_CIIR_IMDOY_Msk (0x20UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

IMDOY (Bitfield-Mask: 0x01)

◆ RTC_CIIR_IMDOY_Pos

#define RTC_CIIR_IMDOY_Pos (5UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

IMDOY (Bit 5)

◆ RTC_CIIR_IMHOUR_Msk

#define RTC_CIIR_IMHOUR_Msk (0x4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

IMHOUR (Bitfield-Mask: 0x01)

◆ RTC_CIIR_IMHOUR_Pos

#define RTC_CIIR_IMHOUR_Pos (2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

IMHOUR (Bit 2)

◆ RTC_CIIR_IMMIN_Msk

#define RTC_CIIR_IMMIN_Msk (0x2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

IMMIN (Bitfield-Mask: 0x01)

◆ RTC_CIIR_IMMIN_Pos

#define RTC_CIIR_IMMIN_Pos (1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

IMMIN (Bit 1)

◆ RTC_CIIR_IMMON_Msk

#define RTC_CIIR_IMMON_Msk (0x40UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

IMMON (Bitfield-Mask: 0x01)

◆ RTC_CIIR_IMMON_Pos

#define RTC_CIIR_IMMON_Pos (6UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

IMMON (Bit 6)

◆ RTC_CIIR_IMSEC_Msk

#define RTC_CIIR_IMSEC_Msk (0x1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

IMSEC (Bitfield-Mask: 0x01)

◆ RTC_CIIR_IMSEC_Pos

#define RTC_CIIR_IMSEC_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

IMSEC (Bit 0)

◆ RTC_CIIR_IMYEAR_Msk

#define RTC_CIIR_IMYEAR_Msk (0x80UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

IMYEAR (Bitfield-Mask: 0x01)

◆ RTC_CIIR_IMYEAR_Pos

#define RTC_CIIR_IMYEAR_Pos (7UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

IMYEAR (Bit 7)

◆ RTC_CTIME0_DOW_Msk

#define RTC_CTIME0_DOW_Msk (0x7000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DOW (Bitfield-Mask: 0x07)

◆ RTC_CTIME0_DOW_Pos

#define RTC_CTIME0_DOW_Pos (24UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DOW (Bit 24)

◆ RTC_CTIME0_HOURS_Msk

#define RTC_CTIME0_HOURS_Msk (0x1f0000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

HOURS (Bitfield-Mask: 0x1f)

◆ RTC_CTIME0_HOURS_Pos

#define RTC_CTIME0_HOURS_Pos (16UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

HOURS (Bit 16)

◆ RTC_CTIME0_MINUTES_Msk

#define RTC_CTIME0_MINUTES_Msk (0x3f00UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

MINUTES (Bitfield-Mask: 0x3f)

◆ RTC_CTIME0_MINUTES_Pos

#define RTC_CTIME0_MINUTES_Pos (8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

MINUTES (Bit 8)

◆ RTC_CTIME0_SECONDS_Msk

#define RTC_CTIME0_SECONDS_Msk (0x3fUL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

SECONDS (Bitfield-Mask: 0x3f)

◆ RTC_CTIME0_SECONDS_Pos

#define RTC_CTIME0_SECONDS_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

SECONDS (Bit 0)

◆ RTC_CTIME1_DOM_Msk

#define RTC_CTIME1_DOM_Msk (0x1fUL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DOM (Bitfield-Mask: 0x1f)

◆ RTC_CTIME1_DOM_Pos

#define RTC_CTIME1_DOM_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DOM (Bit 0)

◆ RTC_CTIME1_MONTH_Msk

#define RTC_CTIME1_MONTH_Msk (0xf00UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

MONTH (Bitfield-Mask: 0x0f)

◆ RTC_CTIME1_MONTH_Pos

#define RTC_CTIME1_MONTH_Pos (8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

MONTH (Bit 8)

◆ RTC_CTIME1_YEAR_Msk

#define RTC_CTIME1_YEAR_Msk (0xfff0000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

YEAR (Bitfield-Mask: 0xfff)

◆ RTC_CTIME1_YEAR_Pos

#define RTC_CTIME1_YEAR_Pos (16UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

YEAR (Bit 16)

◆ RTC_CTIME2_DOY_Msk

#define RTC_CTIME2_DOY_Msk (0xfffUL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DOY (Bitfield-Mask: 0xfff)

◆ RTC_CTIME2_DOY_Pos

#define RTC_CTIME2_DOY_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DOY (Bit 0)

◆ RTC_DOM_DOM_Msk

#define RTC_DOM_DOM_Msk (0x1fUL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DOM (Bitfield-Mask: 0x1f)

◆ RTC_DOM_DOM_Pos

#define RTC_DOM_DOM_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DOM (Bit 0)

◆ RTC_DOW_DOW_Msk

#define RTC_DOW_DOW_Msk (0x7UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DOW (Bitfield-Mask: 0x07)

◆ RTC_DOW_DOW_Pos

#define RTC_DOW_DOW_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DOW (Bit 0)

◆ RTC_DOY_DOY_Msk

#define RTC_DOY_DOY_Msk (0x1ffUL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DOY (Bitfield-Mask: 0x1ff)

◆ RTC_DOY_DOY_Pos

#define RTC_DOY_DOY_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DOY (Bit 0)

◆ RTC_GPREG0_GP_Msk

#define RTC_GPREG0_GP_Msk (0xffffffffUL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

GP (Bitfield-Mask: 0xffffffff)

◆ RTC_GPREG0_GP_Pos

#define RTC_GPREG0_GP_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

GP (Bit 0)

◆ RTC_GPREG1_GP_Msk

#define RTC_GPREG1_GP_Msk (0xffffffffUL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

GP (Bitfield-Mask: 0xffffffff)

◆ RTC_GPREG1_GP_Pos

#define RTC_GPREG1_GP_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

GP (Bit 0)

◆ RTC_GPREG2_GP_Msk

#define RTC_GPREG2_GP_Msk (0xffffffffUL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

GP (Bitfield-Mask: 0xffffffff)

◆ RTC_GPREG2_GP_Pos

#define RTC_GPREG2_GP_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

GP (Bit 0)

◆ RTC_GPREG3_GP_Msk

#define RTC_GPREG3_GP_Msk (0xffffffffUL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

GP (Bitfield-Mask: 0xffffffff)

◆ RTC_GPREG3_GP_Pos

#define RTC_GPREG3_GP_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

GP (Bit 0)

◆ RTC_GPREG4_GP_Msk

#define RTC_GPREG4_GP_Msk (0xffffffffUL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

GP (Bitfield-Mask: 0xffffffff)

◆ RTC_GPREG4_GP_Pos

#define RTC_GPREG4_GP_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

GP (Bit 0)

◆ RTC_HRS_HOURS_Msk

#define RTC_HRS_HOURS_Msk (0x1fUL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

HOURS (Bitfield-Mask: 0x1f)

◆ RTC_HRS_HOURS_Pos

#define RTC_HRS_HOURS_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

HOURS (Bit 0)

◆ RTC_ILR_RTCALF_Msk

#define RTC_ILR_RTCALF_Msk (0x2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RTCALF (Bitfield-Mask: 0x01)

◆ RTC_ILR_RTCALF_Pos

#define RTC_ILR_RTCALF_Pos (1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RTCALF (Bit 1)

◆ RTC_ILR_RTCCIF_Msk

#define RTC_ILR_RTCCIF_Msk (0x1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RTCCIF (Bitfield-Mask: 0x01)

◆ RTC_ILR_RTCCIF_Pos

#define RTC_ILR_RTCCIF_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RTCCIF (Bit 0)

◆ RTC_MIN_MINUTES_Msk

#define RTC_MIN_MINUTES_Msk (0x3fUL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

MINUTES (Bitfield-Mask: 0x3f)

◆ RTC_MIN_MINUTES_Pos

#define RTC_MIN_MINUTES_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

MINUTES (Bit 0)

◆ RTC_MONTH_MONTH_Msk

#define RTC_MONTH_MONTH_Msk (0xfUL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

MONTH (Bitfield-Mask: 0x0f)

◆ RTC_MONTH_MONTH_Pos

#define RTC_MONTH_MONTH_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

MONTH (Bit 0)

◆ RTC_RTC_AUX_RTC_OSCF_Msk

#define RTC_RTC_AUX_RTC_OSCF_Msk (0x10UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RTC_OSCF (Bitfield-Mask: 0x01)

◆ RTC_RTC_AUX_RTC_OSCF_Pos

#define RTC_RTC_AUX_RTC_OSCF_Pos (4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RTC_OSCF (Bit 4)

◆ RTC_RTC_AUX_RTC_PDOUT_Msk

#define RTC_RTC_AUX_RTC_PDOUT_Msk (0x40UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RTC_PDOUT (Bitfield-Mask: 0x01)

◆ RTC_RTC_AUX_RTC_PDOUT_Pos

#define RTC_RTC_AUX_RTC_PDOUT_Pos (6UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RTC_PDOUT (Bit 6)

◆ RTC_RTC_AUXEN_RTC_OSCFEN_Msk

#define RTC_RTC_AUXEN_RTC_OSCFEN_Msk (0x10UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RTC_OSCFEN (Bitfield-Mask: 0x01)

◆ RTC_RTC_AUXEN_RTC_OSCFEN_Pos

#define RTC_RTC_AUXEN_RTC_OSCFEN_Pos (4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RTC_OSCFEN (Bit 4)

◆ RTC_SEC_SECONDS_Msk

#define RTC_SEC_SECONDS_Msk (0x3fUL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

SECONDS (Bitfield-Mask: 0x3f)

◆ RTC_SEC_SECONDS_Pos

#define RTC_SEC_SECONDS_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

SECONDS (Bit 0)

◆ RTC_YEAR_YEAR_Msk

#define RTC_YEAR_YEAR_Msk (0xfffUL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

YEAR (Bitfield-Mask: 0xfff)

◆ RTC_YEAR_YEAR_Pos

#define RTC_YEAR_YEAR_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

YEAR (Bit 0)

◆ SPI_CCR_COUNTER_Msk

#define SPI_CCR_COUNTER_Msk (0xffUL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

COUNTER (Bitfield-Mask: 0xff)

◆ SPI_CCR_COUNTER_Pos

#define SPI_CCR_COUNTER_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

COUNTER (Bit 0)

◆ SPI_CR_BITENABLE_Msk

#define SPI_CR_BITENABLE_Msk (0x4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

BITENABLE (Bitfield-Mask: 0x01)

◆ SPI_CR_BITENABLE_Pos

#define SPI_CR_BITENABLE_Pos (2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

BITENABLE (Bit 2)

◆ SPI_CR_BITS_Msk

#define SPI_CR_BITS_Msk (0xf00UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

BITS (Bitfield-Mask: 0x0f)

◆ SPI_CR_BITS_Pos

#define SPI_CR_BITS_Pos (8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

BITS (Bit 8)

◆ SPI_CR_CPHA_Msk

#define SPI_CR_CPHA_Msk (0x8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CPHA (Bitfield-Mask: 0x01)

◆ SPI_CR_CPHA_Pos

#define SPI_CR_CPHA_Pos (3UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CPHA (Bit 3)

◆ SPI_CR_CPOL_Msk

#define SPI_CR_CPOL_Msk (0x10UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CPOL (Bitfield-Mask: 0x01)

◆ SPI_CR_CPOL_Pos

#define SPI_CR_CPOL_Pos (4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CPOL (Bit 4)

◆ SPI_CR_LSBF_Msk

#define SPI_CR_LSBF_Msk (0x40UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

LSBF (Bitfield-Mask: 0x01)

◆ SPI_CR_LSBF_Pos

#define SPI_CR_LSBF_Pos (6UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

LSBF (Bit 6)

◆ SPI_CR_MSTR_Msk

#define SPI_CR_MSTR_Msk (0x20UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

MSTR (Bitfield-Mask: 0x01)

◆ SPI_CR_MSTR_Pos

#define SPI_CR_MSTR_Pos (5UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

MSTR (Bit 5)

◆ SPI_CR_SPIE_Msk

#define SPI_CR_SPIE_Msk (0x80UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

SPIE (Bitfield-Mask: 0x01)

◆ SPI_CR_SPIE_Pos

#define SPI_CR_SPIE_Pos (7UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

SPIE (Bit 7)

◆ SPI_DR_DATAHIGH_Msk

#define SPI_DR_DATAHIGH_Msk (0xff00UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DATAHIGH (Bitfield-Mask: 0xff)

◆ SPI_DR_DATAHIGH_Pos

#define SPI_DR_DATAHIGH_Pos (8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DATAHIGH (Bit 8)

◆ SPI_DR_DATALOW_Msk

#define SPI_DR_DATALOW_Msk (0xffUL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DATALOW (Bitfield-Mask: 0xff)

◆ SPI_DR_DATALOW_Pos

#define SPI_DR_DATALOW_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DATALOW (Bit 0)

◆ SPI_INT_SPIF_Msk

#define SPI_INT_SPIF_Msk (0x1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

SPIF (Bitfield-Mask: 0x01)

◆ SPI_INT_SPIF_Pos

#define SPI_INT_SPIF_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

SPIF (Bit 0)

◆ SPI_SR_ABRT_Msk

#define SPI_SR_ABRT_Msk (0x8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

ABRT (Bitfield-Mask: 0x01)

◆ SPI_SR_ABRT_Pos

#define SPI_SR_ABRT_Pos (3UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

ABRT (Bit 3)

◆ SPI_SR_MODF_Msk

#define SPI_SR_MODF_Msk (0x10UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

MODF (Bitfield-Mask: 0x01)

◆ SPI_SR_MODF_Pos

#define SPI_SR_MODF_Pos (4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

MODF (Bit 4)

◆ SPI_SR_ROVR_Msk

#define SPI_SR_ROVR_Msk (0x20UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

ROVR (Bitfield-Mask: 0x01)

◆ SPI_SR_ROVR_Pos

#define SPI_SR_ROVR_Pos (5UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

ROVR (Bit 5)

◆ SPI_SR_SPIF_Msk

#define SPI_SR_SPIF_Msk (0x80UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

SPIF (Bitfield-Mask: 0x01)

◆ SPI_SR_SPIF_Pos

#define SPI_SR_SPIF_Pos (7UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

SPIF (Bit 7)

◆ SPI_SR_WCOL_Msk

#define SPI_SR_WCOL_Msk (0x40UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

WCOL (Bitfield-Mask: 0x01)

◆ SPI_SR_WCOL_Pos

#define SPI_SR_WCOL_Pos (6UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

WCOL (Bit 6)

◆ SSP0_CPSR_CPSDVSR_Msk

#define SSP0_CPSR_CPSDVSR_Msk (0xffUL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CPSDVSR (Bitfield-Mask: 0xff)

◆ SSP0_CPSR_CPSDVSR_Pos

#define SSP0_CPSR_CPSDVSR_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CPSDVSR (Bit 0)

◆ SSP0_CR0_CPHA_Msk

#define SSP0_CR0_CPHA_Msk (0x80UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CPHA (Bitfield-Mask: 0x01)

◆ SSP0_CR0_CPHA_Pos

#define SSP0_CR0_CPHA_Pos (7UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CPHA (Bit 7)

◆ SSP0_CR0_CPOL_Msk

#define SSP0_CR0_CPOL_Msk (0x40UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CPOL (Bitfield-Mask: 0x01)

◆ SSP0_CR0_CPOL_Pos

#define SSP0_CR0_CPOL_Pos (6UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CPOL (Bit 6)

◆ SSP0_CR0_DSS_Msk

#define SSP0_CR0_DSS_Msk (0xfUL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DSS (Bitfield-Mask: 0x0f)

◆ SSP0_CR0_DSS_Pos

#define SSP0_CR0_DSS_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DSS (Bit 0)

◆ SSP0_CR0_FRF_Msk

#define SSP0_CR0_FRF_Msk (0x30UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

FRF (Bitfield-Mask: 0x03)

◆ SSP0_CR0_FRF_Pos

#define SSP0_CR0_FRF_Pos (4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

FRF (Bit 4)

◆ SSP0_CR0_SCR_Msk

#define SSP0_CR0_SCR_Msk (0xff00UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

SCR (Bitfield-Mask: 0xff)

◆ SSP0_CR0_SCR_Pos

#define SSP0_CR0_SCR_Pos (8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

SCR (Bit 8)

◆ SSP0_CR1_LBM_Msk

#define SSP0_CR1_LBM_Msk (0x1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

LBM (Bitfield-Mask: 0x01)

◆ SSP0_CR1_LBM_Pos

#define SSP0_CR1_LBM_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

LBM (Bit 0)

◆ SSP0_CR1_MS_Msk

#define SSP0_CR1_MS_Msk (0x4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

MS (Bitfield-Mask: 0x01)

◆ SSP0_CR1_MS_Pos

#define SSP0_CR1_MS_Pos (2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

MS (Bit 2)

◆ SSP0_CR1_SOD_Msk

#define SSP0_CR1_SOD_Msk (0x8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

SOD (Bitfield-Mask: 0x01)

◆ SSP0_CR1_SOD_Pos

#define SSP0_CR1_SOD_Pos (3UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

SOD (Bit 3)

◆ SSP0_CR1_SSE_Msk

#define SSP0_CR1_SSE_Msk (0x2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

SSE (Bitfield-Mask: 0x01)

◆ SSP0_CR1_SSE_Pos

#define SSP0_CR1_SSE_Pos (1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

SSE (Bit 1)

◆ SSP0_DMACR_RXDMAE_Msk

#define SSP0_DMACR_RXDMAE_Msk (0x1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RXDMAE (Bitfield-Mask: 0x01)

◆ SSP0_DMACR_RXDMAE_Pos

#define SSP0_DMACR_RXDMAE_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RXDMAE (Bit 0)

◆ SSP0_DMACR_TXDMAE_Msk

#define SSP0_DMACR_TXDMAE_Msk (0x2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TXDMAE (Bitfield-Mask: 0x01)

◆ SSP0_DMACR_TXDMAE_Pos

#define SSP0_DMACR_TXDMAE_Pos (1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TXDMAE (Bit 1)

◆ SSP0_DR_DATA_Msk

#define SSP0_DR_DATA_Msk (0xffffUL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DATA (Bitfield-Mask: 0xffff)

◆ SSP0_DR_DATA_Pos

#define SSP0_DR_DATA_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DATA (Bit 0)

◆ SSP0_ICR_RORIC_Msk

#define SSP0_ICR_RORIC_Msk (0x1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RORIC (Bitfield-Mask: 0x01)

◆ SSP0_ICR_RORIC_Pos

#define SSP0_ICR_RORIC_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RORIC (Bit 0)

◆ SSP0_ICR_RTIC_Msk

#define SSP0_ICR_RTIC_Msk (0x2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RTIC (Bitfield-Mask: 0x01)

◆ SSP0_ICR_RTIC_Pos

#define SSP0_ICR_RTIC_Pos (1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RTIC (Bit 1)

◆ SSP0_IMSC_RORIM_Msk

#define SSP0_IMSC_RORIM_Msk (0x1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RORIM (Bitfield-Mask: 0x01)

◆ SSP0_IMSC_RORIM_Pos

#define SSP0_IMSC_RORIM_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RORIM (Bit 0)

◆ SSP0_IMSC_RTIM_Msk

#define SSP0_IMSC_RTIM_Msk (0x2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RTIM (Bitfield-Mask: 0x01)

◆ SSP0_IMSC_RTIM_Pos

#define SSP0_IMSC_RTIM_Pos (1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RTIM (Bit 1)

◆ SSP0_IMSC_RXIM_Msk

#define SSP0_IMSC_RXIM_Msk (0x4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RXIM (Bitfield-Mask: 0x01)

◆ SSP0_IMSC_RXIM_Pos

#define SSP0_IMSC_RXIM_Pos (2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RXIM (Bit 2)

◆ SSP0_IMSC_TXIM_Msk

#define SSP0_IMSC_TXIM_Msk (0x8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TXIM (Bitfield-Mask: 0x01)

◆ SSP0_IMSC_TXIM_Pos

#define SSP0_IMSC_TXIM_Pos (3UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TXIM (Bit 3)

◆ SSP0_MIS_RORMIS_Msk

#define SSP0_MIS_RORMIS_Msk (0x1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RORMIS (Bitfield-Mask: 0x01)

◆ SSP0_MIS_RORMIS_Pos

#define SSP0_MIS_RORMIS_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RORMIS (Bit 0)

◆ SSP0_MIS_RTMIS_Msk

#define SSP0_MIS_RTMIS_Msk (0x2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RTMIS (Bitfield-Mask: 0x01)

◆ SSP0_MIS_RTMIS_Pos

#define SSP0_MIS_RTMIS_Pos (1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RTMIS (Bit 1)

◆ SSP0_MIS_RXMIS_Msk

#define SSP0_MIS_RXMIS_Msk (0x4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RXMIS (Bitfield-Mask: 0x01)

◆ SSP0_MIS_RXMIS_Pos

#define SSP0_MIS_RXMIS_Pos (2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RXMIS (Bit 2)

◆ SSP0_MIS_TXMIS_Msk

#define SSP0_MIS_TXMIS_Msk (0x8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TXMIS (Bitfield-Mask: 0x01)

◆ SSP0_MIS_TXMIS_Pos

#define SSP0_MIS_TXMIS_Pos (3UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TXMIS (Bit 3)

◆ SSP0_RIS_RORRIS_Msk

#define SSP0_RIS_RORRIS_Msk (0x1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RORRIS (Bitfield-Mask: 0x01)

◆ SSP0_RIS_RORRIS_Pos

#define SSP0_RIS_RORRIS_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RORRIS (Bit 0)

◆ SSP0_RIS_RTRIS_Msk

#define SSP0_RIS_RTRIS_Msk (0x2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RTRIS (Bitfield-Mask: 0x01)

◆ SSP0_RIS_RTRIS_Pos

#define SSP0_RIS_RTRIS_Pos (1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RTRIS (Bit 1)

◆ SSP0_RIS_RXRIS_Msk

#define SSP0_RIS_RXRIS_Msk (0x4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RXRIS (Bitfield-Mask: 0x01)

◆ SSP0_RIS_RXRIS_Pos

#define SSP0_RIS_RXRIS_Pos (2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RXRIS (Bit 2)

◆ SSP0_RIS_TXRIS_Msk

#define SSP0_RIS_TXRIS_Msk (0x8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TXRIS (Bitfield-Mask: 0x01)

◆ SSP0_RIS_TXRIS_Pos

#define SSP0_RIS_TXRIS_Pos (3UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TXRIS (Bit 3)

◆ SSP0_SR_BSY_Msk

#define SSP0_SR_BSY_Msk (0x10UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

BSY (Bitfield-Mask: 0x01)

◆ SSP0_SR_BSY_Pos

#define SSP0_SR_BSY_Pos (4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

BSY (Bit 4)

◆ SSP0_SR_RFF_Msk

#define SSP0_SR_RFF_Msk (0x8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RFF (Bitfield-Mask: 0x01)

◆ SSP0_SR_RFF_Pos

#define SSP0_SR_RFF_Pos (3UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RFF (Bit 3)

◆ SSP0_SR_RNE_Msk

#define SSP0_SR_RNE_Msk (0x4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RNE (Bitfield-Mask: 0x01)

◆ SSP0_SR_RNE_Pos

#define SSP0_SR_RNE_Pos (2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RNE (Bit 2)

◆ SSP0_SR_TFE_Msk

#define SSP0_SR_TFE_Msk (0x1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TFE (Bitfield-Mask: 0x01)

◆ SSP0_SR_TFE_Pos

#define SSP0_SR_TFE_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TFE (Bit 0)

◆ SSP0_SR_TNF_Msk

#define SSP0_SR_TNF_Msk (0x2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TNF (Bitfield-Mask: 0x01)

◆ SSP0_SR_TNF_Pos

#define SSP0_SR_TNF_Pos (1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TNF (Bit 1)

◆ SSP1_CPSR_CPSDVSR_Msk

#define SSP1_CPSR_CPSDVSR_Msk (0xffUL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CPSDVSR (Bitfield-Mask: 0xff)

◆ SSP1_CPSR_CPSDVSR_Pos

#define SSP1_CPSR_CPSDVSR_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CPSDVSR (Bit 0)

◆ SSP1_CR0_CPHA_Msk

#define SSP1_CR0_CPHA_Msk (0x80UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CPHA (Bitfield-Mask: 0x01)

◆ SSP1_CR0_CPHA_Pos

#define SSP1_CR0_CPHA_Pos (7UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CPHA (Bit 7)

◆ SSP1_CR0_CPOL_Msk

#define SSP1_CR0_CPOL_Msk (0x40UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CPOL (Bitfield-Mask: 0x01)

◆ SSP1_CR0_CPOL_Pos

#define SSP1_CR0_CPOL_Pos (6UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CPOL (Bit 6)

◆ SSP1_CR0_DSS_Msk

#define SSP1_CR0_DSS_Msk (0xfUL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DSS (Bitfield-Mask: 0x0f)

◆ SSP1_CR0_DSS_Pos

#define SSP1_CR0_DSS_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DSS (Bit 0)

◆ SSP1_CR0_FRF_Msk

#define SSP1_CR0_FRF_Msk (0x30UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

FRF (Bitfield-Mask: 0x03)

◆ SSP1_CR0_FRF_Pos

#define SSP1_CR0_FRF_Pos (4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

FRF (Bit 4)

◆ SSP1_CR0_SCR_Msk

#define SSP1_CR0_SCR_Msk (0xff00UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

SCR (Bitfield-Mask: 0xff)

◆ SSP1_CR0_SCR_Pos

#define SSP1_CR0_SCR_Pos (8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

SCR (Bit 8)

◆ SSP1_CR1_LBM_Msk

#define SSP1_CR1_LBM_Msk (0x1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

LBM (Bitfield-Mask: 0x01)

◆ SSP1_CR1_LBM_Pos

#define SSP1_CR1_LBM_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

LBM (Bit 0)

◆ SSP1_CR1_MS_Msk

#define SSP1_CR1_MS_Msk (0x4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

MS (Bitfield-Mask: 0x01)

◆ SSP1_CR1_MS_Pos

#define SSP1_CR1_MS_Pos (2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

MS (Bit 2)

◆ SSP1_CR1_SOD_Msk

#define SSP1_CR1_SOD_Msk (0x8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

SOD (Bitfield-Mask: 0x01)

◆ SSP1_CR1_SOD_Pos

#define SSP1_CR1_SOD_Pos (3UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

SOD (Bit 3)

◆ SSP1_CR1_SSE_Msk

#define SSP1_CR1_SSE_Msk (0x2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

SSE (Bitfield-Mask: 0x01)

◆ SSP1_CR1_SSE_Pos

#define SSP1_CR1_SSE_Pos (1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

SSE (Bit 1)

◆ SSP1_DMACR_RXDMAE_Msk

#define SSP1_DMACR_RXDMAE_Msk (0x1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RXDMAE (Bitfield-Mask: 0x01)

◆ SSP1_DMACR_RXDMAE_Pos

#define SSP1_DMACR_RXDMAE_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RXDMAE (Bit 0)

◆ SSP1_DMACR_TXDMAE_Msk

#define SSP1_DMACR_TXDMAE_Msk (0x2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TXDMAE (Bitfield-Mask: 0x01)

◆ SSP1_DMACR_TXDMAE_Pos

#define SSP1_DMACR_TXDMAE_Pos (1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TXDMAE (Bit 1)

◆ SSP1_DR_DATA_Msk

#define SSP1_DR_DATA_Msk (0xffffUL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DATA (Bitfield-Mask: 0xffff)

◆ SSP1_DR_DATA_Pos

#define SSP1_DR_DATA_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DATA (Bit 0)

◆ SSP1_ICR_RORIC_Msk

#define SSP1_ICR_RORIC_Msk (0x1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RORIC (Bitfield-Mask: 0x01)

◆ SSP1_ICR_RORIC_Pos

#define SSP1_ICR_RORIC_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RORIC (Bit 0)

◆ SSP1_ICR_RTIC_Msk

#define SSP1_ICR_RTIC_Msk (0x2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RTIC (Bitfield-Mask: 0x01)

◆ SSP1_ICR_RTIC_Pos

#define SSP1_ICR_RTIC_Pos (1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RTIC (Bit 1)

◆ SSP1_IMSC_RORIM_Msk

#define SSP1_IMSC_RORIM_Msk (0x1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RORIM (Bitfield-Mask: 0x01)

◆ SSP1_IMSC_RORIM_Pos

#define SSP1_IMSC_RORIM_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RORIM (Bit 0)

◆ SSP1_IMSC_RTIM_Msk

#define SSP1_IMSC_RTIM_Msk (0x2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RTIM (Bitfield-Mask: 0x01)

◆ SSP1_IMSC_RTIM_Pos

#define SSP1_IMSC_RTIM_Pos (1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RTIM (Bit 1)

◆ SSP1_IMSC_RXIM_Msk

#define SSP1_IMSC_RXIM_Msk (0x4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RXIM (Bitfield-Mask: 0x01)

◆ SSP1_IMSC_RXIM_Pos

#define SSP1_IMSC_RXIM_Pos (2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RXIM (Bit 2)

◆ SSP1_IMSC_TXIM_Msk

#define SSP1_IMSC_TXIM_Msk (0x8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TXIM (Bitfield-Mask: 0x01)

◆ SSP1_IMSC_TXIM_Pos

#define SSP1_IMSC_TXIM_Pos (3UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TXIM (Bit 3)

◆ SSP1_MIS_RORMIS_Msk

#define SSP1_MIS_RORMIS_Msk (0x1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RORMIS (Bitfield-Mask: 0x01)

◆ SSP1_MIS_RORMIS_Pos

#define SSP1_MIS_RORMIS_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RORMIS (Bit 0)

◆ SSP1_MIS_RTMIS_Msk

#define SSP1_MIS_RTMIS_Msk (0x2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RTMIS (Bitfield-Mask: 0x01)

◆ SSP1_MIS_RTMIS_Pos

#define SSP1_MIS_RTMIS_Pos (1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RTMIS (Bit 1)

◆ SSP1_MIS_RXMIS_Msk

#define SSP1_MIS_RXMIS_Msk (0x4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RXMIS (Bitfield-Mask: 0x01)

◆ SSP1_MIS_RXMIS_Pos

#define SSP1_MIS_RXMIS_Pos (2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RXMIS (Bit 2)

◆ SSP1_MIS_TXMIS_Msk

#define SSP1_MIS_TXMIS_Msk (0x8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TXMIS (Bitfield-Mask: 0x01)

◆ SSP1_MIS_TXMIS_Pos

#define SSP1_MIS_TXMIS_Pos (3UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TXMIS (Bit 3)

◆ SSP1_RIS_RORRIS_Msk

#define SSP1_RIS_RORRIS_Msk (0x1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RORRIS (Bitfield-Mask: 0x01)

◆ SSP1_RIS_RORRIS_Pos

#define SSP1_RIS_RORRIS_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RORRIS (Bit 0)

◆ SSP1_RIS_RTRIS_Msk

#define SSP1_RIS_RTRIS_Msk (0x2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RTRIS (Bitfield-Mask: 0x01)

◆ SSP1_RIS_RTRIS_Pos

#define SSP1_RIS_RTRIS_Pos (1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RTRIS (Bit 1)

◆ SSP1_RIS_RXRIS_Msk

#define SSP1_RIS_RXRIS_Msk (0x4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RXRIS (Bitfield-Mask: 0x01)

◆ SSP1_RIS_RXRIS_Pos

#define SSP1_RIS_RXRIS_Pos (2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RXRIS (Bit 2)

◆ SSP1_RIS_TXRIS_Msk

#define SSP1_RIS_TXRIS_Msk (0x8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TXRIS (Bitfield-Mask: 0x01)

◆ SSP1_RIS_TXRIS_Pos

#define SSP1_RIS_TXRIS_Pos (3UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TXRIS (Bit 3)

◆ SSP1_SR_BSY_Msk

#define SSP1_SR_BSY_Msk (0x10UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

BSY (Bitfield-Mask: 0x01)

◆ SSP1_SR_BSY_Pos

#define SSP1_SR_BSY_Pos (4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

BSY (Bit 4)

◆ SSP1_SR_RFF_Msk

#define SSP1_SR_RFF_Msk (0x8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RFF (Bitfield-Mask: 0x01)

◆ SSP1_SR_RFF_Pos

#define SSP1_SR_RFF_Pos (3UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RFF (Bit 3)

◆ SSP1_SR_RNE_Msk

#define SSP1_SR_RNE_Msk (0x4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RNE (Bitfield-Mask: 0x01)

◆ SSP1_SR_RNE_Pos

#define SSP1_SR_RNE_Pos (2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RNE (Bit 2)

◆ SSP1_SR_TFE_Msk

#define SSP1_SR_TFE_Msk (0x1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TFE (Bitfield-Mask: 0x01)

◆ SSP1_SR_TFE_Pos

#define SSP1_SR_TFE_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TFE (Bit 0)

◆ SSP1_SR_TNF_Msk

#define SSP1_SR_TNF_Msk (0x2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TNF (Bitfield-Mask: 0x01)

◆ SSP1_SR_TNF_Pos

#define SSP1_SR_TNF_Pos (1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TNF (Bit 1)

◆ SYSCON_CANSLEEPCLR_CAN1SLEEP_Msk

#define SYSCON_CANSLEEPCLR_CAN1SLEEP_Msk (0x2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CAN1SLEEP (Bitfield-Mask: 0x01)

◆ SYSCON_CANSLEEPCLR_CAN1SLEEP_Pos

#define SYSCON_CANSLEEPCLR_CAN1SLEEP_Pos (1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CAN1SLEEP (Bit 1)

◆ SYSCON_CANSLEEPCLR_CAN2SLEEP_Msk

#define SYSCON_CANSLEEPCLR_CAN2SLEEP_Msk (0x4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CAN2SLEEP (Bitfield-Mask: 0x01)

◆ SYSCON_CANSLEEPCLR_CAN2SLEEP_Pos

#define SYSCON_CANSLEEPCLR_CAN2SLEEP_Pos (2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CAN2SLEEP (Bit 2)

◆ SYSCON_CANWAKEFLAGS_CAN1WAKE_Msk

#define SYSCON_CANWAKEFLAGS_CAN1WAKE_Msk (0x2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CAN1WAKE (Bitfield-Mask: 0x01)

◆ SYSCON_CANWAKEFLAGS_CAN1WAKE_Pos

#define SYSCON_CANWAKEFLAGS_CAN1WAKE_Pos (1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CAN1WAKE (Bit 1)

◆ SYSCON_CANWAKEFLAGS_CAN2WAKE_Msk

#define SYSCON_CANWAKEFLAGS_CAN2WAKE_Msk (0x4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CAN2WAKE (Bitfield-Mask: 0x01)

◆ SYSCON_CANWAKEFLAGS_CAN2WAKE_Pos

#define SYSCON_CANWAKEFLAGS_CAN2WAKE_Pos (2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CAN2WAKE (Bit 2)

◆ SYSCON_CCLKCFG_CCLKSEL_Msk

#define SYSCON_CCLKCFG_CCLKSEL_Msk (0xffUL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CCLKSEL (Bitfield-Mask: 0xff)

◆ SYSCON_CCLKCFG_CCLKSEL_Pos

#define SYSCON_CCLKCFG_CCLKSEL_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CCLKSEL (Bit 0)

◆ SYSCON_CLKOUTCFG_CLKOUT_ACT_Msk

#define SYSCON_CLKOUTCFG_CLKOUT_ACT_Msk (0x200UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CLKOUT_ACT (Bitfield-Mask: 0x01)

◆ SYSCON_CLKOUTCFG_CLKOUT_ACT_Pos

#define SYSCON_CLKOUTCFG_CLKOUT_ACT_Pos (9UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CLKOUT_ACT (Bit 9)

◆ SYSCON_CLKOUTCFG_CLKOUT_EN_Msk

#define SYSCON_CLKOUTCFG_CLKOUT_EN_Msk (0x100UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CLKOUT_EN (Bitfield-Mask: 0x01)

◆ SYSCON_CLKOUTCFG_CLKOUT_EN_Pos

#define SYSCON_CLKOUTCFG_CLKOUT_EN_Pos (8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CLKOUT_EN (Bit 8)

◆ SYSCON_CLKOUTCFG_CLKOUTDIV_Msk

#define SYSCON_CLKOUTCFG_CLKOUTDIV_Msk (0xf0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CLKOUTDIV (Bitfield-Mask: 0x0f)

◆ SYSCON_CLKOUTCFG_CLKOUTDIV_Pos

#define SYSCON_CLKOUTCFG_CLKOUTDIV_Pos (4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CLKOUTDIV (Bit 4)

◆ SYSCON_CLKOUTCFG_CLKOUTSEL_Msk

#define SYSCON_CLKOUTCFG_CLKOUTSEL_Msk (0xfUL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CLKOUTSEL (Bitfield-Mask: 0x0f)

◆ SYSCON_CLKOUTCFG_CLKOUTSEL_Pos

#define SYSCON_CLKOUTCFG_CLKOUTSEL_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CLKOUTSEL (Bit 0)

◆ SYSCON_CLKSRCSEL_CLKSRC_Msk

#define SYSCON_CLKSRCSEL_CLKSRC_Msk (0x3UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CLKSRC (Bitfield-Mask: 0x03)

◆ SYSCON_CLKSRCSEL_CLKSRC_Pos

#define SYSCON_CLKSRCSEL_CLKSRC_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CLKSRC (Bit 0)

◆ SYSCON_DMACREQSEL_DMASEL08_Msk

#define SYSCON_DMACREQSEL_DMASEL08_Msk (0x1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DMASEL08 (Bitfield-Mask: 0x01)

◆ SYSCON_DMACREQSEL_DMASEL08_Pos

#define SYSCON_DMACREQSEL_DMASEL08_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DMASEL08 (Bit 0)

◆ SYSCON_DMACREQSEL_DMASEL09_Msk

#define SYSCON_DMACREQSEL_DMASEL09_Msk (0x2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DMASEL09 (Bitfield-Mask: 0x01)

◆ SYSCON_DMACREQSEL_DMASEL09_Pos

#define SYSCON_DMACREQSEL_DMASEL09_Pos (1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DMASEL09 (Bit 1)

◆ SYSCON_DMACREQSEL_DMASEL10_Msk

#define SYSCON_DMACREQSEL_DMASEL10_Msk (0x4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DMASEL10 (Bitfield-Mask: 0x01)

◆ SYSCON_DMACREQSEL_DMASEL10_Pos

#define SYSCON_DMACREQSEL_DMASEL10_Pos (2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DMASEL10 (Bit 2)

◆ SYSCON_DMACREQSEL_DMASEL11_Msk

#define SYSCON_DMACREQSEL_DMASEL11_Msk (0x8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DMASEL11 (Bitfield-Mask: 0x01)

◆ SYSCON_DMACREQSEL_DMASEL11_Pos

#define SYSCON_DMACREQSEL_DMASEL11_Pos (3UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DMASEL11 (Bit 3)

◆ SYSCON_DMACREQSEL_DMASEL12_Msk

#define SYSCON_DMACREQSEL_DMASEL12_Msk (0x10UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DMASEL12 (Bitfield-Mask: 0x01)

◆ SYSCON_DMACREQSEL_DMASEL12_Pos

#define SYSCON_DMACREQSEL_DMASEL12_Pos (4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DMASEL12 (Bit 4)

◆ SYSCON_DMACREQSEL_DMASEL13_Msk

#define SYSCON_DMACREQSEL_DMASEL13_Msk (0x20UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DMASEL13 (Bitfield-Mask: 0x01)

◆ SYSCON_DMACREQSEL_DMASEL13_Pos

#define SYSCON_DMACREQSEL_DMASEL13_Pos (5UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DMASEL13 (Bit 5)

◆ SYSCON_DMACREQSEL_DMASEL14_Msk

#define SYSCON_DMACREQSEL_DMASEL14_Msk (0x40UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DMASEL14 (Bitfield-Mask: 0x01)

◆ SYSCON_DMACREQSEL_DMASEL14_Pos

#define SYSCON_DMACREQSEL_DMASEL14_Pos (6UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DMASEL14 (Bit 6)

◆ SYSCON_DMACREQSEL_DMASEL15_Msk

#define SYSCON_DMACREQSEL_DMASEL15_Msk (0x80UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DMASEL15 (Bitfield-Mask: 0x01)

◆ SYSCON_DMACREQSEL_DMASEL15_Pos

#define SYSCON_DMACREQSEL_DMASEL15_Pos (7UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DMASEL15 (Bit 7)

◆ SYSCON_EXTINT_EINT0_Msk

#define SYSCON_EXTINT_EINT0_Msk (0x1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EINT0 (Bitfield-Mask: 0x01)

◆ SYSCON_EXTINT_EINT0_Pos

#define SYSCON_EXTINT_EINT0_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EINT0 (Bit 0)

◆ SYSCON_EXTINT_EINT1_Msk

#define SYSCON_EXTINT_EINT1_Msk (0x2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EINT1 (Bitfield-Mask: 0x01)

◆ SYSCON_EXTINT_EINT1_Pos

#define SYSCON_EXTINT_EINT1_Pos (1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EINT1 (Bit 1)

◆ SYSCON_EXTINT_EINT2_Msk

#define SYSCON_EXTINT_EINT2_Msk (0x4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EINT2 (Bitfield-Mask: 0x01)

◆ SYSCON_EXTINT_EINT2_Pos

#define SYSCON_EXTINT_EINT2_Pos (2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EINT2 (Bit 2)

◆ SYSCON_EXTINT_EINT3_Msk

#define SYSCON_EXTINT_EINT3_Msk (0x8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EINT3 (Bitfield-Mask: 0x01)

◆ SYSCON_EXTINT_EINT3_Pos

#define SYSCON_EXTINT_EINT3_Pos (3UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EINT3 (Bit 3)

◆ SYSCON_EXTMODE_EXTMODE0_Msk

#define SYSCON_EXTMODE_EXTMODE0_Msk (0x1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EXTMODE0 (Bitfield-Mask: 0x01)

◆ SYSCON_EXTMODE_EXTMODE0_Pos

#define SYSCON_EXTMODE_EXTMODE0_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EXTMODE0 (Bit 0)

◆ SYSCON_EXTMODE_EXTMODE1_Msk

#define SYSCON_EXTMODE_EXTMODE1_Msk (0x2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EXTMODE1 (Bitfield-Mask: 0x01)

◆ SYSCON_EXTMODE_EXTMODE1_Pos

#define SYSCON_EXTMODE_EXTMODE1_Pos (1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EXTMODE1 (Bit 1)

◆ SYSCON_EXTMODE_EXTMODE2_Msk

#define SYSCON_EXTMODE_EXTMODE2_Msk (0x4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EXTMODE2 (Bitfield-Mask: 0x01)

◆ SYSCON_EXTMODE_EXTMODE2_Pos

#define SYSCON_EXTMODE_EXTMODE2_Pos (2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EXTMODE2 (Bit 2)

◆ SYSCON_EXTMODE_EXTMODE3_Msk

#define SYSCON_EXTMODE_EXTMODE3_Msk (0x8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EXTMODE3 (Bitfield-Mask: 0x01)

◆ SYSCON_EXTMODE_EXTMODE3_Pos

#define SYSCON_EXTMODE_EXTMODE3_Pos (3UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EXTMODE3 (Bit 3)

◆ SYSCON_EXTPOLAR_EXTPOLAR0_Msk

#define SYSCON_EXTPOLAR_EXTPOLAR0_Msk (0x1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EXTPOLAR0 (Bitfield-Mask: 0x01)

◆ SYSCON_EXTPOLAR_EXTPOLAR0_Pos

#define SYSCON_EXTPOLAR_EXTPOLAR0_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EXTPOLAR0 (Bit 0)

◆ SYSCON_EXTPOLAR_EXTPOLAR1_Msk

#define SYSCON_EXTPOLAR_EXTPOLAR1_Msk (0x2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EXTPOLAR1 (Bitfield-Mask: 0x01)

◆ SYSCON_EXTPOLAR_EXTPOLAR1_Pos

#define SYSCON_EXTPOLAR_EXTPOLAR1_Pos (1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EXTPOLAR1 (Bit 1)

◆ SYSCON_EXTPOLAR_EXTPOLAR2_Msk

#define SYSCON_EXTPOLAR_EXTPOLAR2_Msk (0x4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EXTPOLAR2 (Bitfield-Mask: 0x01)

◆ SYSCON_EXTPOLAR_EXTPOLAR2_Pos

#define SYSCON_EXTPOLAR_EXTPOLAR2_Pos (2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EXTPOLAR2 (Bit 2)

◆ SYSCON_EXTPOLAR_EXTPOLAR3_Msk

#define SYSCON_EXTPOLAR_EXTPOLAR3_Msk (0x8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EXTPOLAR3 (Bitfield-Mask: 0x01)

◆ SYSCON_EXTPOLAR_EXTPOLAR3_Pos

#define SYSCON_EXTPOLAR_EXTPOLAR3_Pos (3UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EXTPOLAR3 (Bit 3)

◆ SYSCON_FLASHCFG_FLASHTIM_Msk

#define SYSCON_FLASHCFG_FLASHTIM_Msk (0xf000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

FLASHTIM (Bitfield-Mask: 0x0f)

◆ SYSCON_FLASHCFG_FLASHTIM_Pos

#define SYSCON_FLASHCFG_FLASHTIM_Pos (12UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

FLASHTIM (Bit 12)

◆ SYSCON_PCLKSEL0_PCLK_ACF_Msk

#define SYSCON_PCLKSEL0_PCLK_ACF_Msk (0xc0000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PCLK_ACF (Bitfield-Mask: 0x03)

◆ SYSCON_PCLKSEL0_PCLK_ACF_Pos

#define SYSCON_PCLKSEL0_PCLK_ACF_Pos (30UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PCLK_ACF (Bit 30)

◆ SYSCON_PCLKSEL0_PCLK_ADC_Msk

#define SYSCON_PCLKSEL0_PCLK_ADC_Msk (0x3000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PCLK_ADC (Bitfield-Mask: 0x03)

◆ SYSCON_PCLKSEL0_PCLK_ADC_Pos

#define SYSCON_PCLKSEL0_PCLK_ADC_Pos (24UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PCLK_ADC (Bit 24)

◆ SYSCON_PCLKSEL0_PCLK_CAN1_Msk

#define SYSCON_PCLKSEL0_PCLK_CAN1_Msk (0xc000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PCLK_CAN1 (Bitfield-Mask: 0x03)

◆ SYSCON_PCLKSEL0_PCLK_CAN1_Pos

#define SYSCON_PCLKSEL0_PCLK_CAN1_Pos (26UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PCLK_CAN1 (Bit 26)

◆ SYSCON_PCLKSEL0_PCLK_CAN2_Msk

#define SYSCON_PCLKSEL0_PCLK_CAN2_Msk (0x30000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PCLK_CAN2 (Bitfield-Mask: 0x03)

◆ SYSCON_PCLKSEL0_PCLK_CAN2_Pos

#define SYSCON_PCLKSEL0_PCLK_CAN2_Pos (28UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PCLK_CAN2 (Bit 28)

◆ SYSCON_PCLKSEL0_PCLK_DAC_Msk

#define SYSCON_PCLKSEL0_PCLK_DAC_Msk (0xc00000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PCLK_DAC (Bitfield-Mask: 0x03)

◆ SYSCON_PCLKSEL0_PCLK_DAC_Pos

#define SYSCON_PCLKSEL0_PCLK_DAC_Pos (22UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PCLK_DAC (Bit 22)

◆ SYSCON_PCLKSEL0_PCLK_I2C0_Msk

#define SYSCON_PCLKSEL0_PCLK_I2C0_Msk (0xc000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PCLK_I2C0 (Bitfield-Mask: 0x03)

◆ SYSCON_PCLKSEL0_PCLK_I2C0_Pos

#define SYSCON_PCLKSEL0_PCLK_I2C0_Pos (14UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PCLK_I2C0 (Bit 14)

◆ SYSCON_PCLKSEL0_PCLK_PWM1_Msk

#define SYSCON_PCLKSEL0_PCLK_PWM1_Msk (0x3000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PCLK_PWM1 (Bitfield-Mask: 0x03)

◆ SYSCON_PCLKSEL0_PCLK_PWM1_Pos

#define SYSCON_PCLKSEL0_PCLK_PWM1_Pos (12UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PCLK_PWM1 (Bit 12)

◆ SYSCON_PCLKSEL0_PCLK_SPI_Msk

#define SYSCON_PCLKSEL0_PCLK_SPI_Msk (0x30000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PCLK_SPI (Bitfield-Mask: 0x03)

◆ SYSCON_PCLKSEL0_PCLK_SPI_Pos

#define SYSCON_PCLKSEL0_PCLK_SPI_Pos (16UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PCLK_SPI (Bit 16)

◆ SYSCON_PCLKSEL0_PCLK_SSP1_Msk

#define SYSCON_PCLKSEL0_PCLK_SSP1_Msk (0x300000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PCLK_SSP1 (Bitfield-Mask: 0x03)

◆ SYSCON_PCLKSEL0_PCLK_SSP1_Pos

#define SYSCON_PCLKSEL0_PCLK_SSP1_Pos (20UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PCLK_SSP1 (Bit 20)

◆ SYSCON_PCLKSEL0_PCLK_TIMER0_Msk

#define SYSCON_PCLKSEL0_PCLK_TIMER0_Msk (0xcUL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PCLK_TIMER0 (Bitfield-Mask: 0x03)

◆ SYSCON_PCLKSEL0_PCLK_TIMER0_Pos

#define SYSCON_PCLKSEL0_PCLK_TIMER0_Pos (2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PCLK_TIMER0 (Bit 2)

◆ SYSCON_PCLKSEL0_PCLK_TIMER1_Msk

#define SYSCON_PCLKSEL0_PCLK_TIMER1_Msk (0x30UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PCLK_TIMER1 (Bitfield-Mask: 0x03)

◆ SYSCON_PCLKSEL0_PCLK_TIMER1_Pos

#define SYSCON_PCLKSEL0_PCLK_TIMER1_Pos (4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PCLK_TIMER1 (Bit 4)

◆ SYSCON_PCLKSEL0_PCLK_UART0_Msk

#define SYSCON_PCLKSEL0_PCLK_UART0_Msk (0xc0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PCLK_UART0 (Bitfield-Mask: 0x03)

◆ SYSCON_PCLKSEL0_PCLK_UART0_Pos

#define SYSCON_PCLKSEL0_PCLK_UART0_Pos (6UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PCLK_UART0 (Bit 6)

◆ SYSCON_PCLKSEL0_PCLK_UART1_Msk

#define SYSCON_PCLKSEL0_PCLK_UART1_Msk (0x300UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PCLK_UART1 (Bitfield-Mask: 0x03)

◆ SYSCON_PCLKSEL0_PCLK_UART1_Pos

#define SYSCON_PCLKSEL0_PCLK_UART1_Pos (8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PCLK_UART1 (Bit 8)

◆ SYSCON_PCLKSEL0_PCLK_WDT_Msk

#define SYSCON_PCLKSEL0_PCLK_WDT_Msk (0x3UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PCLK_WDT (Bitfield-Mask: 0x03)

◆ SYSCON_PCLKSEL0_PCLK_WDT_Pos

#define SYSCON_PCLKSEL0_PCLK_WDT_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PCLK_WDT (Bit 0)

◆ SYSCON_PCLKSEL1_PCLK_GPIOINT_Msk

#define SYSCON_PCLKSEL1_PCLK_GPIOINT_Msk (0xcUL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PCLK_GPIOINT (Bitfield-Mask: 0x03)

◆ SYSCON_PCLKSEL1_PCLK_GPIOINT_Pos

#define SYSCON_PCLKSEL1_PCLK_GPIOINT_Pos (2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PCLK_GPIOINT (Bit 2)

◆ SYSCON_PCLKSEL1_PCLK_I2C1_Msk

#define SYSCON_PCLKSEL1_PCLK_I2C1_Msk (0xc0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PCLK_I2C1 (Bitfield-Mask: 0x03)

◆ SYSCON_PCLKSEL1_PCLK_I2C1_Pos

#define SYSCON_PCLKSEL1_PCLK_I2C1_Pos (6UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PCLK_I2C1 (Bit 6)

◆ SYSCON_PCLKSEL1_PCLK_I2C2_Msk

#define SYSCON_PCLKSEL1_PCLK_I2C2_Msk (0x300000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PCLK_I2C2 (Bitfield-Mask: 0x03)

◆ SYSCON_PCLKSEL1_PCLK_I2C2_Pos

#define SYSCON_PCLKSEL1_PCLK_I2C2_Pos (20UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PCLK_I2C2 (Bit 20)

◆ SYSCON_PCLKSEL1_PCLK_I2S_Msk

#define SYSCON_PCLKSEL1_PCLK_I2S_Msk (0xc00000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PCLK_I2S (Bitfield-Mask: 0x03)

◆ SYSCON_PCLKSEL1_PCLK_I2S_Pos

#define SYSCON_PCLKSEL1_PCLK_I2S_Pos (22UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PCLK_I2S (Bit 22)

◆ SYSCON_PCLKSEL1_PCLK_MC_Msk

#define SYSCON_PCLKSEL1_PCLK_MC_Msk (0xc0000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PCLK_MC (Bitfield-Mask: 0x03)

◆ SYSCON_PCLKSEL1_PCLK_MC_Pos

#define SYSCON_PCLKSEL1_PCLK_MC_Pos (30UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PCLK_MC (Bit 30)

◆ SYSCON_PCLKSEL1_PCLK_PCB_Msk

#define SYSCON_PCLKSEL1_PCLK_PCB_Msk (0x30UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PCLK_PCB (Bitfield-Mask: 0x03)

◆ SYSCON_PCLKSEL1_PCLK_PCB_Pos

#define SYSCON_PCLKSEL1_PCLK_PCB_Pos (4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PCLK_PCB (Bit 4)

◆ SYSCON_PCLKSEL1_PCLK_QEI_Msk

#define SYSCON_PCLKSEL1_PCLK_QEI_Msk (0x3UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PCLK_QEI (Bitfield-Mask: 0x03)

◆ SYSCON_PCLKSEL1_PCLK_QEI_Pos

#define SYSCON_PCLKSEL1_PCLK_QEI_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PCLK_QEI (Bit 0)

◆ SYSCON_PCLKSEL1_PCLK_RIT_Msk

#define SYSCON_PCLKSEL1_PCLK_RIT_Msk (0xc000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PCLK_RIT (Bitfield-Mask: 0x03)

◆ SYSCON_PCLKSEL1_PCLK_RIT_Pos

#define SYSCON_PCLKSEL1_PCLK_RIT_Pos (26UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PCLK_RIT (Bit 26)

◆ SYSCON_PCLKSEL1_PCLK_SSP0_Msk

#define SYSCON_PCLKSEL1_PCLK_SSP0_Msk (0xc00UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PCLK_SSP0 (Bitfield-Mask: 0x03)

◆ SYSCON_PCLKSEL1_PCLK_SSP0_Pos

#define SYSCON_PCLKSEL1_PCLK_SSP0_Pos (10UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PCLK_SSP0 (Bit 10)

◆ SYSCON_PCLKSEL1_PCLK_SYSCON_Msk

#define SYSCON_PCLKSEL1_PCLK_SYSCON_Msk (0x30000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PCLK_SYSCON (Bitfield-Mask: 0x03)

◆ SYSCON_PCLKSEL1_PCLK_SYSCON_Pos

#define SYSCON_PCLKSEL1_PCLK_SYSCON_Pos (28UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PCLK_SYSCON (Bit 28)

◆ SYSCON_PCLKSEL1_PCLK_TIMER2_Msk

#define SYSCON_PCLKSEL1_PCLK_TIMER2_Msk (0x3000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PCLK_TIMER2 (Bitfield-Mask: 0x03)

◆ SYSCON_PCLKSEL1_PCLK_TIMER2_Pos

#define SYSCON_PCLKSEL1_PCLK_TIMER2_Pos (12UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PCLK_TIMER2 (Bit 12)

◆ SYSCON_PCLKSEL1_PCLK_TIMER3_Msk

#define SYSCON_PCLKSEL1_PCLK_TIMER3_Msk (0xc000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PCLK_TIMER3 (Bitfield-Mask: 0x03)

◆ SYSCON_PCLKSEL1_PCLK_TIMER3_Pos

#define SYSCON_PCLKSEL1_PCLK_TIMER3_Pos (14UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PCLK_TIMER3 (Bit 14)

◆ SYSCON_PCLKSEL1_PCLK_UART2_Msk

#define SYSCON_PCLKSEL1_PCLK_UART2_Msk (0x30000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PCLK_UART2 (Bitfield-Mask: 0x03)

◆ SYSCON_PCLKSEL1_PCLK_UART2_Pos

#define SYSCON_PCLKSEL1_PCLK_UART2_Pos (16UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PCLK_UART2 (Bit 16)

◆ SYSCON_PCLKSEL1_PCLK_UART3_Msk

#define SYSCON_PCLKSEL1_PCLK_UART3_Msk (0xc0000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PCLK_UART3 (Bitfield-Mask: 0x03)

◆ SYSCON_PCLKSEL1_PCLK_UART3_Pos

#define SYSCON_PCLKSEL1_PCLK_UART3_Pos (18UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PCLK_UART3 (Bit 18)

◆ SYSCON_PCON_BODRPM_Msk

#define SYSCON_PCON_BODRPM_Msk (0x4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

BODRPM (Bitfield-Mask: 0x01)

◆ SYSCON_PCON_BODRPM_Pos

#define SYSCON_PCON_BODRPM_Pos (2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

BODRPM (Bit 2)

◆ SYSCON_PCON_BOGD_Msk

#define SYSCON_PCON_BOGD_Msk (0x8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

BOGD (Bitfield-Mask: 0x01)

◆ SYSCON_PCON_BOGD_Pos

#define SYSCON_PCON_BOGD_Pos (3UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

BOGD (Bit 3)

◆ SYSCON_PCON_BORD_Msk

#define SYSCON_PCON_BORD_Msk (0x10UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

BORD (Bitfield-Mask: 0x01)

◆ SYSCON_PCON_BORD_Pos

#define SYSCON_PCON_BORD_Pos (4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

BORD (Bit 4)

◆ SYSCON_PCON_DPDFLAG_Msk

#define SYSCON_PCON_DPDFLAG_Msk (0x800UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DPDFLAG (Bitfield-Mask: 0x01)

◆ SYSCON_PCON_DPDFLAG_Pos

#define SYSCON_PCON_DPDFLAG_Pos (11UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DPDFLAG (Bit 11)

◆ SYSCON_PCON_DSFLAG_Msk

#define SYSCON_PCON_DSFLAG_Msk (0x200UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DSFLAG (Bitfield-Mask: 0x01)

◆ SYSCON_PCON_DSFLAG_Pos

#define SYSCON_PCON_DSFLAG_Pos (9UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DSFLAG (Bit 9)

◆ SYSCON_PCON_PDFLAG_Msk

#define SYSCON_PCON_PDFLAG_Msk (0x400UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PDFLAG (Bitfield-Mask: 0x01)

◆ SYSCON_PCON_PDFLAG_Pos

#define SYSCON_PCON_PDFLAG_Pos (10UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PDFLAG (Bit 10)

◆ SYSCON_PCON_PM0_Msk

#define SYSCON_PCON_PM0_Msk (0x1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PM0 (Bitfield-Mask: 0x01)

◆ SYSCON_PCON_PM0_Pos

#define SYSCON_PCON_PM0_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PM0 (Bit 0)

◆ SYSCON_PCON_PM1_Msk

#define SYSCON_PCON_PM1_Msk (0x2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PM1 (Bitfield-Mask: 0x01)

◆ SYSCON_PCON_PM1_Pos

#define SYSCON_PCON_PM1_Pos (1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PM1 (Bit 1)

◆ SYSCON_PCON_SMFLAG_Msk

#define SYSCON_PCON_SMFLAG_Msk (0x100UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

SMFLAG (Bitfield-Mask: 0x01)

◆ SYSCON_PCON_SMFLAG_Pos

#define SYSCON_PCON_SMFLAG_Pos (8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

SMFLAG (Bit 8)

◆ SYSCON_PCONP_PCADC_Msk

#define SYSCON_PCONP_PCADC_Msk (0x1000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PCADC (Bitfield-Mask: 0x01)

◆ SYSCON_PCONP_PCADC_Pos

#define SYSCON_PCONP_PCADC_Pos (12UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PCADC (Bit 12)

◆ SYSCON_PCONP_PCCAN1_Msk

#define SYSCON_PCONP_PCCAN1_Msk (0x2000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PCCAN1 (Bitfield-Mask: 0x01)

◆ SYSCON_PCONP_PCCAN1_Pos

#define SYSCON_PCONP_PCCAN1_Pos (13UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PCCAN1 (Bit 13)

◆ SYSCON_PCONP_PCCAN2_Msk

#define SYSCON_PCONP_PCCAN2_Msk (0x4000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PCCAN2 (Bitfield-Mask: 0x01)

◆ SYSCON_PCONP_PCCAN2_Pos

#define SYSCON_PCONP_PCCAN2_Pos (14UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PCCAN2 (Bit 14)

◆ SYSCON_PCONP_PCENET_Msk

#define SYSCON_PCONP_PCENET_Msk (0x40000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PCENET (Bitfield-Mask: 0x01)

◆ SYSCON_PCONP_PCENET_Pos

#define SYSCON_PCONP_PCENET_Pos (30UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PCENET (Bit 30)

◆ SYSCON_PCONP_PCGPDMA_Msk

#define SYSCON_PCONP_PCGPDMA_Msk (0x20000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PCGPDMA (Bitfield-Mask: 0x01)

◆ SYSCON_PCONP_PCGPDMA_Pos

#define SYSCON_PCONP_PCGPDMA_Pos (29UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PCGPDMA (Bit 29)

◆ SYSCON_PCONP_PCGPIO_Msk

#define SYSCON_PCONP_PCGPIO_Msk (0x8000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PCGPIO (Bitfield-Mask: 0x01)

◆ SYSCON_PCONP_PCGPIO_Pos

#define SYSCON_PCONP_PCGPIO_Pos (15UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PCGPIO (Bit 15)

◆ SYSCON_PCONP_PCI2C0_Msk

#define SYSCON_PCONP_PCI2C0_Msk (0x80UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PCI2C0 (Bitfield-Mask: 0x01)

◆ SYSCON_PCONP_PCI2C0_Pos

#define SYSCON_PCONP_PCI2C0_Pos (7UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PCI2C0 (Bit 7)

◆ SYSCON_PCONP_PCI2C1_Msk

#define SYSCON_PCONP_PCI2C1_Msk (0x80000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PCI2C1 (Bitfield-Mask: 0x01)

◆ SYSCON_PCONP_PCI2C1_Pos

#define SYSCON_PCONP_PCI2C1_Pos (19UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PCI2C1 (Bit 19)

◆ SYSCON_PCONP_PCI2C2_Msk

#define SYSCON_PCONP_PCI2C2_Msk (0x4000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PCI2C2 (Bitfield-Mask: 0x01)

◆ SYSCON_PCONP_PCI2C2_Pos

#define SYSCON_PCONP_PCI2C2_Pos (26UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PCI2C2 (Bit 26)

◆ SYSCON_PCONP_PCI2S_Msk

#define SYSCON_PCONP_PCI2S_Msk (0x8000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PCI2S (Bitfield-Mask: 0x01)

◆ SYSCON_PCONP_PCI2S_Pos

#define SYSCON_PCONP_PCI2S_Pos (27UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PCI2S (Bit 27)

◆ SYSCON_PCONP_PCMCPWM_Msk

#define SYSCON_PCONP_PCMCPWM_Msk (0x20000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PCMCPWM (Bitfield-Mask: 0x01)

◆ SYSCON_PCONP_PCMCPWM_Pos

#define SYSCON_PCONP_PCMCPWM_Pos (17UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PCMCPWM (Bit 17)

◆ SYSCON_PCONP_PCPWM1_Msk

#define SYSCON_PCONP_PCPWM1_Msk (0x40UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PCPWM1 (Bitfield-Mask: 0x01)

◆ SYSCON_PCONP_PCPWM1_Pos

#define SYSCON_PCONP_PCPWM1_Pos (6UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PCPWM1 (Bit 6)

◆ SYSCON_PCONP_PCQEI_Msk

#define SYSCON_PCONP_PCQEI_Msk (0x40000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PCQEI (Bitfield-Mask: 0x01)

◆ SYSCON_PCONP_PCQEI_Pos

#define SYSCON_PCONP_PCQEI_Pos (18UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PCQEI (Bit 18)

◆ SYSCON_PCONP_PCRIT_Msk

#define SYSCON_PCONP_PCRIT_Msk (0x10000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PCRIT (Bitfield-Mask: 0x01)

◆ SYSCON_PCONP_PCRIT_Pos

#define SYSCON_PCONP_PCRIT_Pos (16UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PCRIT (Bit 16)

◆ SYSCON_PCONP_PCRTC_Msk

#define SYSCON_PCONP_PCRTC_Msk (0x200UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PCRTC (Bitfield-Mask: 0x01)

◆ SYSCON_PCONP_PCRTC_Pos

#define SYSCON_PCONP_PCRTC_Pos (9UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PCRTC (Bit 9)

◆ SYSCON_PCONP_PCSPI_Msk

#define SYSCON_PCONP_PCSPI_Msk (0x100UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PCSPI (Bitfield-Mask: 0x01)

◆ SYSCON_PCONP_PCSPI_Pos

#define SYSCON_PCONP_PCSPI_Pos (8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PCSPI (Bit 8)

◆ SYSCON_PCONP_PCSSP0_Msk

#define SYSCON_PCONP_PCSSP0_Msk (0x200000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PCSSP0 (Bitfield-Mask: 0x01)

◆ SYSCON_PCONP_PCSSP0_Pos

#define SYSCON_PCONP_PCSSP0_Pos (21UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PCSSP0 (Bit 21)

◆ SYSCON_PCONP_PCSSP1_Msk

#define SYSCON_PCONP_PCSSP1_Msk (0x400UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PCSSP1 (Bitfield-Mask: 0x01)

◆ SYSCON_PCONP_PCSSP1_Pos

#define SYSCON_PCONP_PCSSP1_Pos (10UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PCSSP1 (Bit 10)

◆ SYSCON_PCONP_PCTIM0_Msk

#define SYSCON_PCONP_PCTIM0_Msk (0x2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PCTIM0 (Bitfield-Mask: 0x01)

◆ SYSCON_PCONP_PCTIM0_Pos

#define SYSCON_PCONP_PCTIM0_Pos (1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PCTIM0 (Bit 1)

◆ SYSCON_PCONP_PCTIM1_Msk

#define SYSCON_PCONP_PCTIM1_Msk (0x4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PCTIM1 (Bitfield-Mask: 0x01)

◆ SYSCON_PCONP_PCTIM1_Pos

#define SYSCON_PCONP_PCTIM1_Pos (2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PCTIM1 (Bit 2)

◆ SYSCON_PCONP_PCTIM2_Msk

#define SYSCON_PCONP_PCTIM2_Msk (0x400000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PCTIM2 (Bitfield-Mask: 0x01)

◆ SYSCON_PCONP_PCTIM2_Pos

#define SYSCON_PCONP_PCTIM2_Pos (22UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PCTIM2 (Bit 22)

◆ SYSCON_PCONP_PCTIM3_Msk

#define SYSCON_PCONP_PCTIM3_Msk (0x800000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PCTIM3 (Bitfield-Mask: 0x01)

◆ SYSCON_PCONP_PCTIM3_Pos

#define SYSCON_PCONP_PCTIM3_Pos (23UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PCTIM3 (Bit 23)

◆ SYSCON_PCONP_PCUART0_Msk

#define SYSCON_PCONP_PCUART0_Msk (0x8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PCUART0 (Bitfield-Mask: 0x01)

◆ SYSCON_PCONP_PCUART0_Pos

#define SYSCON_PCONP_PCUART0_Pos (3UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PCUART0 (Bit 3)

◆ SYSCON_PCONP_PCUART1_Msk

#define SYSCON_PCONP_PCUART1_Msk (0x10UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PCUART1 (Bitfield-Mask: 0x01)

◆ SYSCON_PCONP_PCUART1_Pos

#define SYSCON_PCONP_PCUART1_Pos (4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PCUART1 (Bit 4)

◆ SYSCON_PCONP_PCUART2_Msk

#define SYSCON_PCONP_PCUART2_Msk (0x1000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PCUART2 (Bitfield-Mask: 0x01)

◆ SYSCON_PCONP_PCUART2_Pos

#define SYSCON_PCONP_PCUART2_Pos (24UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PCUART2 (Bit 24)

◆ SYSCON_PCONP_PCUART3_Msk

#define SYSCON_PCONP_PCUART3_Msk (0x2000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PCUART3 (Bitfield-Mask: 0x01)

◆ SYSCON_PCONP_PCUART3_Pos

#define SYSCON_PCONP_PCUART3_Pos (25UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PCUART3 (Bit 25)

◆ SYSCON_PCONP_PCUSB_Msk

#define SYSCON_PCONP_PCUSB_Msk (0x80000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PCUSB (Bitfield-Mask: 0x01)

◆ SYSCON_PCONP_PCUSB_Pos

#define SYSCON_PCONP_PCUSB_Pos (31UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PCUSB (Bit 31)

◆ SYSCON_PLL0CFG_MSEL0_Msk

#define SYSCON_PLL0CFG_MSEL0_Msk (0x7fffUL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

MSEL0 (Bitfield-Mask: 0x7fff)

◆ SYSCON_PLL0CFG_MSEL0_Pos

#define SYSCON_PLL0CFG_MSEL0_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

MSEL0 (Bit 0)

◆ SYSCON_PLL0CFG_NSEL0_Msk

#define SYSCON_PLL0CFG_NSEL0_Msk (0xff0000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

NSEL0 (Bitfield-Mask: 0xff)

◆ SYSCON_PLL0CFG_NSEL0_Pos

#define SYSCON_PLL0CFG_NSEL0_Pos (16UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

NSEL0 (Bit 16)

◆ SYSCON_PLL0CON_PLLC0_Msk

#define SYSCON_PLL0CON_PLLC0_Msk (0x2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PLLC0 (Bitfield-Mask: 0x01)

◆ SYSCON_PLL0CON_PLLC0_Pos

#define SYSCON_PLL0CON_PLLC0_Pos (1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PLLC0 (Bit 1)

◆ SYSCON_PLL0CON_PLLE0_Msk

#define SYSCON_PLL0CON_PLLE0_Msk (0x1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PLLE0 (Bitfield-Mask: 0x01)

◆ SYSCON_PLL0CON_PLLE0_Pos

#define SYSCON_PLL0CON_PLLE0_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PLLE0 (Bit 0)

◆ SYSCON_PLL0FEED_PLL0FEED_Msk

#define SYSCON_PLL0FEED_PLL0FEED_Msk (0xffUL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PLL0FEED (Bitfield-Mask: 0xff)

◆ SYSCON_PLL0FEED_PLL0FEED_Pos

#define SYSCON_PLL0FEED_PLL0FEED_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PLL0FEED (Bit 0)

◆ SYSCON_PLL0STAT_MSEL0_Msk

#define SYSCON_PLL0STAT_MSEL0_Msk (0x7fffUL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

MSEL0 (Bitfield-Mask: 0x7fff)

◆ SYSCON_PLL0STAT_MSEL0_Pos

#define SYSCON_PLL0STAT_MSEL0_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

MSEL0 (Bit 0)

◆ SYSCON_PLL0STAT_NSEL0_Msk

#define SYSCON_PLL0STAT_NSEL0_Msk (0xff0000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

NSEL0 (Bitfield-Mask: 0xff)

◆ SYSCON_PLL0STAT_NSEL0_Pos

#define SYSCON_PLL0STAT_NSEL0_Pos (16UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

NSEL0 (Bit 16)

◆ SYSCON_PLL0STAT_PLLC0_STAT_Msk

#define SYSCON_PLL0STAT_PLLC0_STAT_Msk (0x2000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PLLC0_STAT (Bitfield-Mask: 0x01)

◆ SYSCON_PLL0STAT_PLLC0_STAT_Pos

#define SYSCON_PLL0STAT_PLLC0_STAT_Pos (25UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PLLC0_STAT (Bit 25)

◆ SYSCON_PLL0STAT_PLLE0_STAT_Msk

#define SYSCON_PLL0STAT_PLLE0_STAT_Msk (0x1000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PLLE0_STAT (Bitfield-Mask: 0x01)

◆ SYSCON_PLL0STAT_PLLE0_STAT_Pos

#define SYSCON_PLL0STAT_PLLE0_STAT_Pos (24UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PLLE0_STAT (Bit 24)

◆ SYSCON_PLL0STAT_PLOCK0_Msk

#define SYSCON_PLL0STAT_PLOCK0_Msk (0x4000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PLOCK0 (Bitfield-Mask: 0x01)

◆ SYSCON_PLL0STAT_PLOCK0_Pos

#define SYSCON_PLL0STAT_PLOCK0_Pos (26UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PLOCK0 (Bit 26)

◆ SYSCON_PLL1CFG_MSEL1_Msk

#define SYSCON_PLL1CFG_MSEL1_Msk (0x1fUL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

MSEL1 (Bitfield-Mask: 0x1f)

◆ SYSCON_PLL1CFG_MSEL1_Pos

#define SYSCON_PLL1CFG_MSEL1_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

MSEL1 (Bit 0)

◆ SYSCON_PLL1CFG_PSEL1_Msk

#define SYSCON_PLL1CFG_PSEL1_Msk (0x60UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PSEL1 (Bitfield-Mask: 0x03)

◆ SYSCON_PLL1CFG_PSEL1_Pos

#define SYSCON_PLL1CFG_PSEL1_Pos (5UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PSEL1 (Bit 5)

◆ SYSCON_PLL1CON_PLLC1_Msk

#define SYSCON_PLL1CON_PLLC1_Msk (0x2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PLLC1 (Bitfield-Mask: 0x01)

◆ SYSCON_PLL1CON_PLLC1_Pos

#define SYSCON_PLL1CON_PLLC1_Pos (1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PLLC1 (Bit 1)

◆ SYSCON_PLL1CON_PLLE1_Msk

#define SYSCON_PLL1CON_PLLE1_Msk (0x1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PLLE1 (Bitfield-Mask: 0x01)

◆ SYSCON_PLL1CON_PLLE1_Pos

#define SYSCON_PLL1CON_PLLE1_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PLLE1 (Bit 0)

◆ SYSCON_PLL1FEED_PLL1FEED_Msk

#define SYSCON_PLL1FEED_PLL1FEED_Msk (0xffUL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PLL1FEED (Bitfield-Mask: 0xff)

◆ SYSCON_PLL1FEED_PLL1FEED_Pos

#define SYSCON_PLL1FEED_PLL1FEED_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PLL1FEED (Bit 0)

◆ SYSCON_PLL1STAT_MSEL1_Msk

#define SYSCON_PLL1STAT_MSEL1_Msk (0x1fUL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

MSEL1 (Bitfield-Mask: 0x1f)

◆ SYSCON_PLL1STAT_MSEL1_Pos

#define SYSCON_PLL1STAT_MSEL1_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

MSEL1 (Bit 0)

◆ SYSCON_PLL1STAT_PLLC1_STAT_Msk

#define SYSCON_PLL1STAT_PLLC1_STAT_Msk (0x200UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PLLC1_STAT (Bitfield-Mask: 0x01)

◆ SYSCON_PLL1STAT_PLLC1_STAT_Pos

#define SYSCON_PLL1STAT_PLLC1_STAT_Pos (9UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PLLC1_STAT (Bit 9)

◆ SYSCON_PLL1STAT_PLLE1_STAT_Msk

#define SYSCON_PLL1STAT_PLLE1_STAT_Msk (0x100UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PLLE1_STAT (Bitfield-Mask: 0x01)

◆ SYSCON_PLL1STAT_PLLE1_STAT_Pos

#define SYSCON_PLL1STAT_PLLE1_STAT_Pos (8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PLLE1_STAT (Bit 8)

◆ SYSCON_PLL1STAT_PLOCK1_Msk

#define SYSCON_PLL1STAT_PLOCK1_Msk (0x400UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PLOCK1 (Bitfield-Mask: 0x01)

◆ SYSCON_PLL1STAT_PLOCK1_Pos

#define SYSCON_PLL1STAT_PLOCK1_Pos (10UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PLOCK1 (Bit 10)

◆ SYSCON_PLL1STAT_PSEL1_Msk

#define SYSCON_PLL1STAT_PSEL1_Msk (0x60UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PSEL1 (Bitfield-Mask: 0x03)

◆ SYSCON_PLL1STAT_PSEL1_Pos

#define SYSCON_PLL1STAT_PSEL1_Pos (5UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PSEL1 (Bit 5)

◆ SYSCON_RSID_BODR_Msk

#define SYSCON_RSID_BODR_Msk (0x8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

BODR (Bitfield-Mask: 0x01)

◆ SYSCON_RSID_BODR_Pos

#define SYSCON_RSID_BODR_Pos (3UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

BODR (Bit 3)

◆ SYSCON_RSID_EXTR_Msk

#define SYSCON_RSID_EXTR_Msk (0x2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EXTR (Bitfield-Mask: 0x01)

◆ SYSCON_RSID_EXTR_Pos

#define SYSCON_RSID_EXTR_Pos (1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EXTR (Bit 1)

◆ SYSCON_RSID_POR_Msk

#define SYSCON_RSID_POR_Msk (0x1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

POR (Bitfield-Mask: 0x01)

◆ SYSCON_RSID_POR_Pos

#define SYSCON_RSID_POR_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

POR (Bit 0)

◆ SYSCON_RSID_WDTR_Msk

#define SYSCON_RSID_WDTR_Msk (0x4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

WDTR (Bitfield-Mask: 0x01)

◆ SYSCON_RSID_WDTR_Pos

#define SYSCON_RSID_WDTR_Pos (2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

WDTR (Bit 2)

◆ SYSCON_SCS_OSCEN_Msk

#define SYSCON_SCS_OSCEN_Msk (0x20UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

OSCEN (Bitfield-Mask: 0x01)

◆ SYSCON_SCS_OSCEN_Pos

#define SYSCON_SCS_OSCEN_Pos (5UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

OSCEN (Bit 5)

◆ SYSCON_SCS_OSCRANGE_Msk

#define SYSCON_SCS_OSCRANGE_Msk (0x10UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

OSCRANGE (Bitfield-Mask: 0x01)

◆ SYSCON_SCS_OSCRANGE_Pos

#define SYSCON_SCS_OSCRANGE_Pos (4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

OSCRANGE (Bit 4)

◆ SYSCON_SCS_OSCSTAT_Msk

#define SYSCON_SCS_OSCSTAT_Msk (0x40UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

OSCSTAT (Bitfield-Mask: 0x01)

◆ SYSCON_SCS_OSCSTAT_Pos

#define SYSCON_SCS_OSCSTAT_Pos (6UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

OSCSTAT (Bit 6)

◆ SYSCON_USBCLKCFG_USBSEL_Msk

#define SYSCON_USBCLKCFG_USBSEL_Msk (0xfUL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

USBSEL (Bitfield-Mask: 0x0f)

◆ SYSCON_USBCLKCFG_USBSEL_Pos

#define SYSCON_USBCLKCFG_USBSEL_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

USBSEL (Bit 0)

◆ SYSCON_USBINTST_EN_USB_INTS_Msk

#define SYSCON_USBINTST_EN_USB_INTS_Msk (0x80000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EN_USB_INTS (Bitfield-Mask: 0x01)

◆ SYSCON_USBINTST_EN_USB_INTS_Pos

#define SYSCON_USBINTST_EN_USB_INTS_Pos (31UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EN_USB_INTS (Bit 31)

◆ SYSCON_USBINTST_USB_ATX_INT_Msk

#define SYSCON_USBINTST_USB_ATX_INT_Msk (0x10UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

USB_ATX_INT (Bitfield-Mask: 0x01)

◆ SYSCON_USBINTST_USB_ATX_INT_Pos

#define SYSCON_USBINTST_USB_ATX_INT_Pos (4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

USB_ATX_INT (Bit 4)

◆ SYSCON_USBINTST_USB_HOST_INT_Msk

#define SYSCON_USBINTST_USB_HOST_INT_Msk (0x8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

USB_HOST_INT (Bitfield-Mask: 0x01)

◆ SYSCON_USBINTST_USB_HOST_INT_Pos

#define SYSCON_USBINTST_USB_HOST_INT_Pos (3UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

USB_HOST_INT (Bit 3)

◆ SYSCON_USBINTST_USB_I2C_INT_Msk

#define SYSCON_USBINTST_USB_I2C_INT_Msk (0x40UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

USB_I2C_INT (Bitfield-Mask: 0x01)

◆ SYSCON_USBINTST_USB_I2C_INT_Pos

#define SYSCON_USBINTST_USB_I2C_INT_Pos (6UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

USB_I2C_INT (Bit 6)

◆ SYSCON_USBINTST_USB_INT_REQ_DMA_Msk

#define SYSCON_USBINTST_USB_INT_REQ_DMA_Msk (0x4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

USB_INT_REQ_DMA (Bitfield-Mask: 0x01)

◆ SYSCON_USBINTST_USB_INT_REQ_DMA_Pos

#define SYSCON_USBINTST_USB_INT_REQ_DMA_Pos (2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

USB_INT_REQ_DMA (Bit 2)

◆ SYSCON_USBINTST_USB_INT_REQ_HP_Msk

#define SYSCON_USBINTST_USB_INT_REQ_HP_Msk (0x2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

USB_INT_REQ_HP (Bitfield-Mask: 0x01)

◆ SYSCON_USBINTST_USB_INT_REQ_HP_Pos

#define SYSCON_USBINTST_USB_INT_REQ_HP_Pos (1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

USB_INT_REQ_HP (Bit 1)

◆ SYSCON_USBINTST_USB_INT_REQ_LP_Msk

#define SYSCON_USBINTST_USB_INT_REQ_LP_Msk (0x1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

USB_INT_REQ_LP (Bitfield-Mask: 0x01)

◆ SYSCON_USBINTST_USB_INT_REQ_LP_Pos

#define SYSCON_USBINTST_USB_INT_REQ_LP_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

USB_INT_REQ_LP (Bit 0)

◆ SYSCON_USBINTST_USB_NEED_CLK_Msk

#define SYSCON_USBINTST_USB_NEED_CLK_Msk (0x100UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

USB_NEED_CLK (Bitfield-Mask: 0x01)

◆ SYSCON_USBINTST_USB_NEED_CLK_Pos

#define SYSCON_USBINTST_USB_NEED_CLK_Pos (8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

USB_NEED_CLK (Bit 8)

◆ SYSCON_USBINTST_USB_OTG_INT_Msk

#define SYSCON_USBINTST_USB_OTG_INT_Msk (0x20UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

USB_OTG_INT (Bitfield-Mask: 0x01)

◆ SYSCON_USBINTST_USB_OTG_INT_Pos

#define SYSCON_USBINTST_USB_OTG_INT_Pos (5UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

USB_OTG_INT (Bit 5)

◆ TIMER0_CCR_CAP0FE_Msk

#define TIMER0_CCR_CAP0FE_Msk (0x2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CAP0FE (Bitfield-Mask: 0x01)

◆ TIMER0_CCR_CAP0FE_Pos

#define TIMER0_CCR_CAP0FE_Pos (1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CAP0FE (Bit 1)

◆ TIMER0_CCR_CAP0I_Msk

#define TIMER0_CCR_CAP0I_Msk (0x4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CAP0I (Bitfield-Mask: 0x01)

◆ TIMER0_CCR_CAP0I_Pos

#define TIMER0_CCR_CAP0I_Pos (2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CAP0I (Bit 2)

◆ TIMER0_CCR_CAP0RE_Msk

#define TIMER0_CCR_CAP0RE_Msk (0x1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CAP0RE (Bitfield-Mask: 0x01)

◆ TIMER0_CCR_CAP0RE_Pos

#define TIMER0_CCR_CAP0RE_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CAP0RE (Bit 0)

◆ TIMER0_CCR_CAP1FE_Msk

#define TIMER0_CCR_CAP1FE_Msk (0x10UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CAP1FE (Bitfield-Mask: 0x01)

◆ TIMER0_CCR_CAP1FE_Pos

#define TIMER0_CCR_CAP1FE_Pos (4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CAP1FE (Bit 4)

◆ TIMER0_CCR_CAP1I_Msk

#define TIMER0_CCR_CAP1I_Msk (0x20UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CAP1I (Bitfield-Mask: 0x01)

◆ TIMER0_CCR_CAP1I_Pos

#define TIMER0_CCR_CAP1I_Pos (5UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CAP1I (Bit 5)

◆ TIMER0_CCR_CAP1RE_Msk

#define TIMER0_CCR_CAP1RE_Msk (0x8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CAP1RE (Bitfield-Mask: 0x01)

◆ TIMER0_CCR_CAP1RE_Pos

#define TIMER0_CCR_CAP1RE_Pos (3UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CAP1RE (Bit 3)

◆ TIMER0_CTCR_CINSEL_Msk

#define TIMER0_CTCR_CINSEL_Msk (0xcUL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CINSEL (Bitfield-Mask: 0x03)

◆ TIMER0_CTCR_CINSEL_Pos

#define TIMER0_CTCR_CINSEL_Pos (2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CINSEL (Bit 2)

◆ TIMER0_CTCR_CTMODE_Msk

#define TIMER0_CTCR_CTMODE_Msk (0x3UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CTMODE (Bitfield-Mask: 0x03)

◆ TIMER0_CTCR_CTMODE_Pos

#define TIMER0_CTCR_CTMODE_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CTMODE (Bit 0)

◆ TIMER0_EMR_EM0_Msk

#define TIMER0_EMR_EM0_Msk (0x1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EM0 (Bitfield-Mask: 0x01)

◆ TIMER0_EMR_EM0_Pos

#define TIMER0_EMR_EM0_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EM0 (Bit 0)

◆ TIMER0_EMR_EM1_Msk

#define TIMER0_EMR_EM1_Msk (0x2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EM1 (Bitfield-Mask: 0x01)

◆ TIMER0_EMR_EM1_Pos

#define TIMER0_EMR_EM1_Pos (1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EM1 (Bit 1)

◆ TIMER0_EMR_EM2_Msk

#define TIMER0_EMR_EM2_Msk (0x4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EM2 (Bitfield-Mask: 0x01)

◆ TIMER0_EMR_EM2_Pos

#define TIMER0_EMR_EM2_Pos (2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EM2 (Bit 2)

◆ TIMER0_EMR_EM3_Msk

#define TIMER0_EMR_EM3_Msk (0x8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EM3 (Bitfield-Mask: 0x01)

◆ TIMER0_EMR_EM3_Pos

#define TIMER0_EMR_EM3_Pos (3UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EM3 (Bit 3)

◆ TIMER0_EMR_EMC0_Msk

#define TIMER0_EMR_EMC0_Msk (0x30UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EMC0 (Bitfield-Mask: 0x03)

◆ TIMER0_EMR_EMC0_Pos

#define TIMER0_EMR_EMC0_Pos (4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EMC0 (Bit 4)

◆ TIMER0_EMR_EMC1_Msk

#define TIMER0_EMR_EMC1_Msk (0xc0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EMC1 (Bitfield-Mask: 0x03)

◆ TIMER0_EMR_EMC1_Pos

#define TIMER0_EMR_EMC1_Pos (6UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EMC1 (Bit 6)

◆ TIMER0_EMR_EMC2_Msk

#define TIMER0_EMR_EMC2_Msk (0x300UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EMC2 (Bitfield-Mask: 0x03)

◆ TIMER0_EMR_EMC2_Pos

#define TIMER0_EMR_EMC2_Pos (8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EMC2 (Bit 8)

◆ TIMER0_EMR_EMC3_Msk

#define TIMER0_EMR_EMC3_Msk (0xc00UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EMC3 (Bitfield-Mask: 0x03)

◆ TIMER0_EMR_EMC3_Pos

#define TIMER0_EMR_EMC3_Pos (10UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EMC3 (Bit 10)

◆ TIMER0_IR_CR0INT_Msk

#define TIMER0_IR_CR0INT_Msk (0x10UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CR0INT (Bitfield-Mask: 0x01)

◆ TIMER0_IR_CR0INT_Pos

#define TIMER0_IR_CR0INT_Pos (4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CR0INT (Bit 4)

◆ TIMER0_IR_CR1INT_Msk

#define TIMER0_IR_CR1INT_Msk (0x20UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CR1INT (Bitfield-Mask: 0x01)

◆ TIMER0_IR_CR1INT_Pos

#define TIMER0_IR_CR1INT_Pos (5UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CR1INT (Bit 5)

◆ TIMER0_IR_MR0INT_Msk

#define TIMER0_IR_MR0INT_Msk (0x1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

MR0INT (Bitfield-Mask: 0x01)

◆ TIMER0_IR_MR0INT_Pos

#define TIMER0_IR_MR0INT_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

MR0INT (Bit 0)

◆ TIMER0_IR_MR1INT_Msk

#define TIMER0_IR_MR1INT_Msk (0x2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

MR1INT (Bitfield-Mask: 0x01)

◆ TIMER0_IR_MR1INT_Pos

#define TIMER0_IR_MR1INT_Pos (1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

MR1INT (Bit 1)

◆ TIMER0_IR_MR2INT_Msk

#define TIMER0_IR_MR2INT_Msk (0x4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

MR2INT (Bitfield-Mask: 0x01)

◆ TIMER0_IR_MR2INT_Pos

#define TIMER0_IR_MR2INT_Pos (2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

MR2INT (Bit 2)

◆ TIMER0_IR_MR3INT_Msk

#define TIMER0_IR_MR3INT_Msk (0x8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

MR3INT (Bitfield-Mask: 0x01)

◆ TIMER0_IR_MR3INT_Pos

#define TIMER0_IR_MR3INT_Pos (3UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

MR3INT (Bit 3)

◆ TIMER0_MCR_MR0I_Msk

#define TIMER0_MCR_MR0I_Msk (0x1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

MR0I (Bitfield-Mask: 0x01)

◆ TIMER0_MCR_MR0I_Pos

#define TIMER0_MCR_MR0I_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

MR0I (Bit 0)

◆ TIMER0_MCR_MR0R_Msk

#define TIMER0_MCR_MR0R_Msk (0x2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

MR0R (Bitfield-Mask: 0x01)

◆ TIMER0_MCR_MR0R_Pos

#define TIMER0_MCR_MR0R_Pos (1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

MR0R (Bit 1)

◆ TIMER0_MCR_MR0S_Msk

#define TIMER0_MCR_MR0S_Msk (0x4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

MR0S (Bitfield-Mask: 0x01)

◆ TIMER0_MCR_MR0S_Pos

#define TIMER0_MCR_MR0S_Pos (2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

MR0S (Bit 2)

◆ TIMER0_MCR_MR1I_Msk

#define TIMER0_MCR_MR1I_Msk (0x8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

MR1I (Bitfield-Mask: 0x01)

◆ TIMER0_MCR_MR1I_Pos

#define TIMER0_MCR_MR1I_Pos (3UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

MR1I (Bit 3)

◆ TIMER0_MCR_MR1R_Msk

#define TIMER0_MCR_MR1R_Msk (0x10UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

MR1R (Bitfield-Mask: 0x01)

◆ TIMER0_MCR_MR1R_Pos

#define TIMER0_MCR_MR1R_Pos (4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

MR1R (Bit 4)

◆ TIMER0_MCR_MR1S_Msk

#define TIMER0_MCR_MR1S_Msk (0x20UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

MR1S (Bitfield-Mask: 0x01)

◆ TIMER0_MCR_MR1S_Pos

#define TIMER0_MCR_MR1S_Pos (5UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

MR1S (Bit 5)

◆ TIMER0_MCR_MR2I_Msk

#define TIMER0_MCR_MR2I_Msk (0x40UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

MR2I (Bitfield-Mask: 0x01)

◆ TIMER0_MCR_MR2I_Pos

#define TIMER0_MCR_MR2I_Pos (6UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

MR2I (Bit 6)

◆ TIMER0_MCR_MR2R_Msk

#define TIMER0_MCR_MR2R_Msk (0x80UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

MR2R (Bitfield-Mask: 0x01)

◆ TIMER0_MCR_MR2R_Pos

#define TIMER0_MCR_MR2R_Pos (7UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

MR2R (Bit 7)

◆ TIMER0_MCR_MR2S_Msk

#define TIMER0_MCR_MR2S_Msk (0x100UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

MR2S (Bitfield-Mask: 0x01)

◆ TIMER0_MCR_MR2S_Pos

#define TIMER0_MCR_MR2S_Pos (8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

MR2S (Bit 8)

◆ TIMER0_MCR_MR3I_Msk

#define TIMER0_MCR_MR3I_Msk (0x200UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

MR3I (Bitfield-Mask: 0x01)

◆ TIMER0_MCR_MR3I_Pos

#define TIMER0_MCR_MR3I_Pos (9UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

MR3I (Bit 9)

◆ TIMER0_MCR_MR3R_Msk

#define TIMER0_MCR_MR3R_Msk (0x400UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

MR3R (Bitfield-Mask: 0x01)

◆ TIMER0_MCR_MR3R_Pos

#define TIMER0_MCR_MR3R_Pos (10UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

MR3R (Bit 10)

◆ TIMER0_MCR_MR3S_Msk

#define TIMER0_MCR_MR3S_Msk (0x800UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

MR3S (Bitfield-Mask: 0x01)

◆ TIMER0_MCR_MR3S_Pos

#define TIMER0_MCR_MR3S_Pos (11UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

MR3S (Bit 11)

◆ TIMER0_PC_PC_Msk

#define TIMER0_PC_PC_Msk (0xffffffffUL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PC (Bitfield-Mask: 0xffffffff)

◆ TIMER0_PC_PC_Pos

#define TIMER0_PC_PC_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PC (Bit 0)

◆ TIMER0_PR_PM_Msk

#define TIMER0_PR_PM_Msk (0xffffffffUL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PM (Bitfield-Mask: 0xffffffff)

◆ TIMER0_PR_PM_Pos

#define TIMER0_PR_PM_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PM (Bit 0)

◆ TIMER0_TC_TC_Msk

#define TIMER0_TC_TC_Msk (0xffffffffUL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TC (Bitfield-Mask: 0xffffffff)

◆ TIMER0_TC_TC_Pos

#define TIMER0_TC_TC_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TC (Bit 0)

◆ TIMER0_TCR_CEN_Msk

#define TIMER0_TCR_CEN_Msk (0x1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CEN (Bitfield-Mask: 0x01)

◆ TIMER0_TCR_CEN_Pos

#define TIMER0_TCR_CEN_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CEN (Bit 0)

◆ TIMER0_TCR_CRST_Msk

#define TIMER0_TCR_CRST_Msk (0x2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CRST (Bitfield-Mask: 0x01)

◆ TIMER0_TCR_CRST_Pos

#define TIMER0_TCR_CRST_Pos (1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CRST (Bit 1)

◆ TIMER1_CCR_CAP0FE_Msk

#define TIMER1_CCR_CAP0FE_Msk (0x2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CAP0FE (Bitfield-Mask: 0x01)

◆ TIMER1_CCR_CAP0FE_Pos

#define TIMER1_CCR_CAP0FE_Pos (1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CAP0FE (Bit 1)

◆ TIMER1_CCR_CAP0I_Msk

#define TIMER1_CCR_CAP0I_Msk (0x4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CAP0I (Bitfield-Mask: 0x01)

◆ TIMER1_CCR_CAP0I_Pos

#define TIMER1_CCR_CAP0I_Pos (2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CAP0I (Bit 2)

◆ TIMER1_CCR_CAP0RE_Msk

#define TIMER1_CCR_CAP0RE_Msk (0x1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CAP0RE (Bitfield-Mask: 0x01)

◆ TIMER1_CCR_CAP0RE_Pos

#define TIMER1_CCR_CAP0RE_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CAP0RE (Bit 0)

◆ TIMER1_CCR_CAP1FE_Msk

#define TIMER1_CCR_CAP1FE_Msk (0x10UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CAP1FE (Bitfield-Mask: 0x01)

◆ TIMER1_CCR_CAP1FE_Pos

#define TIMER1_CCR_CAP1FE_Pos (4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CAP1FE (Bit 4)

◆ TIMER1_CCR_CAP1I_Msk

#define TIMER1_CCR_CAP1I_Msk (0x20UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CAP1I (Bitfield-Mask: 0x01)

◆ TIMER1_CCR_CAP1I_Pos

#define TIMER1_CCR_CAP1I_Pos (5UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CAP1I (Bit 5)

◆ TIMER1_CCR_CAP1RE_Msk

#define TIMER1_CCR_CAP1RE_Msk (0x8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CAP1RE (Bitfield-Mask: 0x01)

◆ TIMER1_CCR_CAP1RE_Pos

#define TIMER1_CCR_CAP1RE_Pos (3UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CAP1RE (Bit 3)

◆ TIMER1_CTCR_CINSEL_Msk

#define TIMER1_CTCR_CINSEL_Msk (0xcUL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CINSEL (Bitfield-Mask: 0x03)

◆ TIMER1_CTCR_CINSEL_Pos

#define TIMER1_CTCR_CINSEL_Pos (2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CINSEL (Bit 2)

◆ TIMER1_CTCR_CTMODE_Msk

#define TIMER1_CTCR_CTMODE_Msk (0x3UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CTMODE (Bitfield-Mask: 0x03)

◆ TIMER1_CTCR_CTMODE_Pos

#define TIMER1_CTCR_CTMODE_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CTMODE (Bit 0)

◆ TIMER1_EMR_EM0_Msk

#define TIMER1_EMR_EM0_Msk (0x1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EM0 (Bitfield-Mask: 0x01)

◆ TIMER1_EMR_EM0_Pos

#define TIMER1_EMR_EM0_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EM0 (Bit 0)

◆ TIMER1_EMR_EM1_Msk

#define TIMER1_EMR_EM1_Msk (0x2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EM1 (Bitfield-Mask: 0x01)

◆ TIMER1_EMR_EM1_Pos

#define TIMER1_EMR_EM1_Pos (1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EM1 (Bit 1)

◆ TIMER1_EMR_EM2_Msk

#define TIMER1_EMR_EM2_Msk (0x4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EM2 (Bitfield-Mask: 0x01)

◆ TIMER1_EMR_EM2_Pos

#define TIMER1_EMR_EM2_Pos (2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EM2 (Bit 2)

◆ TIMER1_EMR_EM3_Msk

#define TIMER1_EMR_EM3_Msk (0x8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EM3 (Bitfield-Mask: 0x01)

◆ TIMER1_EMR_EM3_Pos

#define TIMER1_EMR_EM3_Pos (3UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EM3 (Bit 3)

◆ TIMER1_EMR_EMC0_Msk

#define TIMER1_EMR_EMC0_Msk (0x30UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EMC0 (Bitfield-Mask: 0x03)

◆ TIMER1_EMR_EMC0_Pos

#define TIMER1_EMR_EMC0_Pos (4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EMC0 (Bit 4)

◆ TIMER1_EMR_EMC1_Msk

#define TIMER1_EMR_EMC1_Msk (0xc0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EMC1 (Bitfield-Mask: 0x03)

◆ TIMER1_EMR_EMC1_Pos

#define TIMER1_EMR_EMC1_Pos (6UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EMC1 (Bit 6)

◆ TIMER1_EMR_EMC2_Msk

#define TIMER1_EMR_EMC2_Msk (0x300UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EMC2 (Bitfield-Mask: 0x03)

◆ TIMER1_EMR_EMC2_Pos

#define TIMER1_EMR_EMC2_Pos (8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EMC2 (Bit 8)

◆ TIMER1_EMR_EMC3_Msk

#define TIMER1_EMR_EMC3_Msk (0xc00UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EMC3 (Bitfield-Mask: 0x03)

◆ TIMER1_EMR_EMC3_Pos

#define TIMER1_EMR_EMC3_Pos (10UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EMC3 (Bit 10)

◆ TIMER1_IR_CR0INT_Msk

#define TIMER1_IR_CR0INT_Msk (0x10UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CR0INT (Bitfield-Mask: 0x01)

◆ TIMER1_IR_CR0INT_Pos

#define TIMER1_IR_CR0INT_Pos (4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CR0INT (Bit 4)

◆ TIMER1_IR_CR1INT_Msk

#define TIMER1_IR_CR1INT_Msk (0x20UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CR1INT (Bitfield-Mask: 0x01)

◆ TIMER1_IR_CR1INT_Pos

#define TIMER1_IR_CR1INT_Pos (5UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CR1INT (Bit 5)

◆ TIMER1_IR_MR0INT_Msk

#define TIMER1_IR_MR0INT_Msk (0x1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

MR0INT (Bitfield-Mask: 0x01)

◆ TIMER1_IR_MR0INT_Pos

#define TIMER1_IR_MR0INT_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

MR0INT (Bit 0)

◆ TIMER1_IR_MR1INT_Msk

#define TIMER1_IR_MR1INT_Msk (0x2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

MR1INT (Bitfield-Mask: 0x01)

◆ TIMER1_IR_MR1INT_Pos

#define TIMER1_IR_MR1INT_Pos (1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

MR1INT (Bit 1)

◆ TIMER1_IR_MR2INT_Msk

#define TIMER1_IR_MR2INT_Msk (0x4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

MR2INT (Bitfield-Mask: 0x01)

◆ TIMER1_IR_MR2INT_Pos

#define TIMER1_IR_MR2INT_Pos (2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

MR2INT (Bit 2)

◆ TIMER1_IR_MR3INT_Msk

#define TIMER1_IR_MR3INT_Msk (0x8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

MR3INT (Bitfield-Mask: 0x01)

◆ TIMER1_IR_MR3INT_Pos

#define TIMER1_IR_MR3INT_Pos (3UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

MR3INT (Bit 3)

◆ TIMER1_MCR_MR0I_Msk

#define TIMER1_MCR_MR0I_Msk (0x1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

MR0I (Bitfield-Mask: 0x01)

◆ TIMER1_MCR_MR0I_Pos

#define TIMER1_MCR_MR0I_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

MR0I (Bit 0)

◆ TIMER1_MCR_MR0R_Msk

#define TIMER1_MCR_MR0R_Msk (0x2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

MR0R (Bitfield-Mask: 0x01)

◆ TIMER1_MCR_MR0R_Pos

#define TIMER1_MCR_MR0R_Pos (1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

MR0R (Bit 1)

◆ TIMER1_MCR_MR0S_Msk

#define TIMER1_MCR_MR0S_Msk (0x4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

MR0S (Bitfield-Mask: 0x01)

◆ TIMER1_MCR_MR0S_Pos

#define TIMER1_MCR_MR0S_Pos (2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

MR0S (Bit 2)

◆ TIMER1_MCR_MR1I_Msk

#define TIMER1_MCR_MR1I_Msk (0x8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

MR1I (Bitfield-Mask: 0x01)

◆ TIMER1_MCR_MR1I_Pos

#define TIMER1_MCR_MR1I_Pos (3UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

MR1I (Bit 3)

◆ TIMER1_MCR_MR1R_Msk

#define TIMER1_MCR_MR1R_Msk (0x10UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

MR1R (Bitfield-Mask: 0x01)

◆ TIMER1_MCR_MR1R_Pos

#define TIMER1_MCR_MR1R_Pos (4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

MR1R (Bit 4)

◆ TIMER1_MCR_MR1S_Msk

#define TIMER1_MCR_MR1S_Msk (0x20UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

MR1S (Bitfield-Mask: 0x01)

◆ TIMER1_MCR_MR1S_Pos

#define TIMER1_MCR_MR1S_Pos (5UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

MR1S (Bit 5)

◆ TIMER1_MCR_MR2I_Msk

#define TIMER1_MCR_MR2I_Msk (0x40UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

MR2I (Bitfield-Mask: 0x01)

◆ TIMER1_MCR_MR2I_Pos

#define TIMER1_MCR_MR2I_Pos (6UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

MR2I (Bit 6)

◆ TIMER1_MCR_MR2R_Msk

#define TIMER1_MCR_MR2R_Msk (0x80UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

MR2R (Bitfield-Mask: 0x01)

◆ TIMER1_MCR_MR2R_Pos

#define TIMER1_MCR_MR2R_Pos (7UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

MR2R (Bit 7)

◆ TIMER1_MCR_MR2S_Msk

#define TIMER1_MCR_MR2S_Msk (0x100UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

MR2S (Bitfield-Mask: 0x01)

◆ TIMER1_MCR_MR2S_Pos

#define TIMER1_MCR_MR2S_Pos (8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

MR2S (Bit 8)

◆ TIMER1_MCR_MR3I_Msk

#define TIMER1_MCR_MR3I_Msk (0x200UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

MR3I (Bitfield-Mask: 0x01)

◆ TIMER1_MCR_MR3I_Pos

#define TIMER1_MCR_MR3I_Pos (9UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

MR3I (Bit 9)

◆ TIMER1_MCR_MR3R_Msk

#define TIMER1_MCR_MR3R_Msk (0x400UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

MR3R (Bitfield-Mask: 0x01)

◆ TIMER1_MCR_MR3R_Pos

#define TIMER1_MCR_MR3R_Pos (10UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

MR3R (Bit 10)

◆ TIMER1_MCR_MR3S_Msk

#define TIMER1_MCR_MR3S_Msk (0x800UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

MR3S (Bitfield-Mask: 0x01)

◆ TIMER1_MCR_MR3S_Pos

#define TIMER1_MCR_MR3S_Pos (11UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

MR3S (Bit 11)

◆ TIMER1_PC_PC_Msk

#define TIMER1_PC_PC_Msk (0xffffffffUL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PC (Bitfield-Mask: 0xffffffff)

◆ TIMER1_PC_PC_Pos

#define TIMER1_PC_PC_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PC (Bit 0)

◆ TIMER1_PR_PM_Msk

#define TIMER1_PR_PM_Msk (0xffffffffUL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PM (Bitfield-Mask: 0xffffffff)

◆ TIMER1_PR_PM_Pos

#define TIMER1_PR_PM_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PM (Bit 0)

◆ TIMER1_TC_TC_Msk

#define TIMER1_TC_TC_Msk (0xffffffffUL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TC (Bitfield-Mask: 0xffffffff)

◆ TIMER1_TC_TC_Pos

#define TIMER1_TC_TC_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TC (Bit 0)

◆ TIMER1_TCR_CEN_Msk

#define TIMER1_TCR_CEN_Msk (0x1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CEN (Bitfield-Mask: 0x01)

◆ TIMER1_TCR_CEN_Pos

#define TIMER1_TCR_CEN_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CEN (Bit 0)

◆ TIMER1_TCR_CRST_Msk

#define TIMER1_TCR_CRST_Msk (0x2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CRST (Bitfield-Mask: 0x01)

◆ TIMER1_TCR_CRST_Pos

#define TIMER1_TCR_CRST_Pos (1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CRST (Bit 1)

◆ TIMER2_CCR_CAP0FE_Msk

#define TIMER2_CCR_CAP0FE_Msk (0x2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CAP0FE (Bitfield-Mask: 0x01)

◆ TIMER2_CCR_CAP0FE_Pos

#define TIMER2_CCR_CAP0FE_Pos (1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CAP0FE (Bit 1)

◆ TIMER2_CCR_CAP0I_Msk

#define TIMER2_CCR_CAP0I_Msk (0x4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CAP0I (Bitfield-Mask: 0x01)

◆ TIMER2_CCR_CAP0I_Pos

#define TIMER2_CCR_CAP0I_Pos (2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CAP0I (Bit 2)

◆ TIMER2_CCR_CAP0RE_Msk

#define TIMER2_CCR_CAP0RE_Msk (0x1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CAP0RE (Bitfield-Mask: 0x01)

◆ TIMER2_CCR_CAP0RE_Pos

#define TIMER2_CCR_CAP0RE_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CAP0RE (Bit 0)

◆ TIMER2_CCR_CAP1FE_Msk

#define TIMER2_CCR_CAP1FE_Msk (0x10UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CAP1FE (Bitfield-Mask: 0x01)

◆ TIMER2_CCR_CAP1FE_Pos

#define TIMER2_CCR_CAP1FE_Pos (4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CAP1FE (Bit 4)

◆ TIMER2_CCR_CAP1I_Msk

#define TIMER2_CCR_CAP1I_Msk (0x20UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CAP1I (Bitfield-Mask: 0x01)

◆ TIMER2_CCR_CAP1I_Pos

#define TIMER2_CCR_CAP1I_Pos (5UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CAP1I (Bit 5)

◆ TIMER2_CCR_CAP1RE_Msk

#define TIMER2_CCR_CAP1RE_Msk (0x8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CAP1RE (Bitfield-Mask: 0x01)

◆ TIMER2_CCR_CAP1RE_Pos

#define TIMER2_CCR_CAP1RE_Pos (3UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CAP1RE (Bit 3)

◆ TIMER2_CTCR_CINSEL_Msk

#define TIMER2_CTCR_CINSEL_Msk (0xcUL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CINSEL (Bitfield-Mask: 0x03)

◆ TIMER2_CTCR_CINSEL_Pos

#define TIMER2_CTCR_CINSEL_Pos (2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CINSEL (Bit 2)

◆ TIMER2_CTCR_CTMODE_Msk

#define TIMER2_CTCR_CTMODE_Msk (0x3UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CTMODE (Bitfield-Mask: 0x03)

◆ TIMER2_CTCR_CTMODE_Pos

#define TIMER2_CTCR_CTMODE_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CTMODE (Bit 0)

◆ TIMER2_EMR_EM0_Msk

#define TIMER2_EMR_EM0_Msk (0x1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EM0 (Bitfield-Mask: 0x01)

◆ TIMER2_EMR_EM0_Pos

#define TIMER2_EMR_EM0_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EM0 (Bit 0)

◆ TIMER2_EMR_EM1_Msk

#define TIMER2_EMR_EM1_Msk (0x2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EM1 (Bitfield-Mask: 0x01)

◆ TIMER2_EMR_EM1_Pos

#define TIMER2_EMR_EM1_Pos (1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EM1 (Bit 1)

◆ TIMER2_EMR_EM2_Msk

#define TIMER2_EMR_EM2_Msk (0x4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EM2 (Bitfield-Mask: 0x01)

◆ TIMER2_EMR_EM2_Pos

#define TIMER2_EMR_EM2_Pos (2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EM2 (Bit 2)

◆ TIMER2_EMR_EM3_Msk

#define TIMER2_EMR_EM3_Msk (0x8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EM3 (Bitfield-Mask: 0x01)

◆ TIMER2_EMR_EM3_Pos

#define TIMER2_EMR_EM3_Pos (3UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EM3 (Bit 3)

◆ TIMER2_EMR_EMC0_Msk

#define TIMER2_EMR_EMC0_Msk (0x30UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EMC0 (Bitfield-Mask: 0x03)

◆ TIMER2_EMR_EMC0_Pos

#define TIMER2_EMR_EMC0_Pos (4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EMC0 (Bit 4)

◆ TIMER2_EMR_EMC1_Msk

#define TIMER2_EMR_EMC1_Msk (0xc0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EMC1 (Bitfield-Mask: 0x03)

◆ TIMER2_EMR_EMC1_Pos

#define TIMER2_EMR_EMC1_Pos (6UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EMC1 (Bit 6)

◆ TIMER2_EMR_EMC2_Msk

#define TIMER2_EMR_EMC2_Msk (0x300UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EMC2 (Bitfield-Mask: 0x03)

◆ TIMER2_EMR_EMC2_Pos

#define TIMER2_EMR_EMC2_Pos (8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EMC2 (Bit 8)

◆ TIMER2_EMR_EMC3_Msk

#define TIMER2_EMR_EMC3_Msk (0xc00UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EMC3 (Bitfield-Mask: 0x03)

◆ TIMER2_EMR_EMC3_Pos

#define TIMER2_EMR_EMC3_Pos (10UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EMC3 (Bit 10)

◆ TIMER2_IR_CR0INT_Msk

#define TIMER2_IR_CR0INT_Msk (0x10UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CR0INT (Bitfield-Mask: 0x01)

◆ TIMER2_IR_CR0INT_Pos

#define TIMER2_IR_CR0INT_Pos (4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CR0INT (Bit 4)

◆ TIMER2_IR_CR1INT_Msk

#define TIMER2_IR_CR1INT_Msk (0x20UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CR1INT (Bitfield-Mask: 0x01)

◆ TIMER2_IR_CR1INT_Pos

#define TIMER2_IR_CR1INT_Pos (5UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CR1INT (Bit 5)

◆ TIMER2_IR_MR0INT_Msk

#define TIMER2_IR_MR0INT_Msk (0x1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

MR0INT (Bitfield-Mask: 0x01)

◆ TIMER2_IR_MR0INT_Pos

#define TIMER2_IR_MR0INT_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

MR0INT (Bit 0)

◆ TIMER2_IR_MR1INT_Msk

#define TIMER2_IR_MR1INT_Msk (0x2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

MR1INT (Bitfield-Mask: 0x01)

◆ TIMER2_IR_MR1INT_Pos

#define TIMER2_IR_MR1INT_Pos (1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

MR1INT (Bit 1)

◆ TIMER2_IR_MR2INT_Msk

#define TIMER2_IR_MR2INT_Msk (0x4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

MR2INT (Bitfield-Mask: 0x01)

◆ TIMER2_IR_MR2INT_Pos

#define TIMER2_IR_MR2INT_Pos (2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

MR2INT (Bit 2)

◆ TIMER2_IR_MR3INT_Msk

#define TIMER2_IR_MR3INT_Msk (0x8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

MR3INT (Bitfield-Mask: 0x01)

◆ TIMER2_IR_MR3INT_Pos

#define TIMER2_IR_MR3INT_Pos (3UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

MR3INT (Bit 3)

◆ TIMER2_MCR_MR0I_Msk

#define TIMER2_MCR_MR0I_Msk (0x1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

MR0I (Bitfield-Mask: 0x01)

◆ TIMER2_MCR_MR0I_Pos

#define TIMER2_MCR_MR0I_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

MR0I (Bit 0)

◆ TIMER2_MCR_MR0R_Msk

#define TIMER2_MCR_MR0R_Msk (0x2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

MR0R (Bitfield-Mask: 0x01)

◆ TIMER2_MCR_MR0R_Pos

#define TIMER2_MCR_MR0R_Pos (1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

MR0R (Bit 1)

◆ TIMER2_MCR_MR0S_Msk

#define TIMER2_MCR_MR0S_Msk (0x4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

MR0S (Bitfield-Mask: 0x01)

◆ TIMER2_MCR_MR0S_Pos

#define TIMER2_MCR_MR0S_Pos (2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

MR0S (Bit 2)

◆ TIMER2_MCR_MR1I_Msk

#define TIMER2_MCR_MR1I_Msk (0x8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

MR1I (Bitfield-Mask: 0x01)

◆ TIMER2_MCR_MR1I_Pos

#define TIMER2_MCR_MR1I_Pos (3UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

MR1I (Bit 3)

◆ TIMER2_MCR_MR1R_Msk

#define TIMER2_MCR_MR1R_Msk (0x10UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

MR1R (Bitfield-Mask: 0x01)

◆ TIMER2_MCR_MR1R_Pos

#define TIMER2_MCR_MR1R_Pos (4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

MR1R (Bit 4)

◆ TIMER2_MCR_MR1S_Msk

#define TIMER2_MCR_MR1S_Msk (0x20UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

MR1S (Bitfield-Mask: 0x01)

◆ TIMER2_MCR_MR1S_Pos

#define TIMER2_MCR_MR1S_Pos (5UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

MR1S (Bit 5)

◆ TIMER2_MCR_MR2I_Msk

#define TIMER2_MCR_MR2I_Msk (0x40UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

MR2I (Bitfield-Mask: 0x01)

◆ TIMER2_MCR_MR2I_Pos

#define TIMER2_MCR_MR2I_Pos (6UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

MR2I (Bit 6)

◆ TIMER2_MCR_MR2R_Msk

#define TIMER2_MCR_MR2R_Msk (0x80UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

MR2R (Bitfield-Mask: 0x01)

◆ TIMER2_MCR_MR2R_Pos

#define TIMER2_MCR_MR2R_Pos (7UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

MR2R (Bit 7)

◆ TIMER2_MCR_MR2S_Msk

#define TIMER2_MCR_MR2S_Msk (0x100UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

MR2S (Bitfield-Mask: 0x01)

◆ TIMER2_MCR_MR2S_Pos

#define TIMER2_MCR_MR2S_Pos (8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

MR2S (Bit 8)

◆ TIMER2_MCR_MR3I_Msk

#define TIMER2_MCR_MR3I_Msk (0x200UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

MR3I (Bitfield-Mask: 0x01)

◆ TIMER2_MCR_MR3I_Pos

#define TIMER2_MCR_MR3I_Pos (9UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

MR3I (Bit 9)

◆ TIMER2_MCR_MR3R_Msk

#define TIMER2_MCR_MR3R_Msk (0x400UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

MR3R (Bitfield-Mask: 0x01)

◆ TIMER2_MCR_MR3R_Pos

#define TIMER2_MCR_MR3R_Pos (10UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

MR3R (Bit 10)

◆ TIMER2_MCR_MR3S_Msk

#define TIMER2_MCR_MR3S_Msk (0x800UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

MR3S (Bitfield-Mask: 0x01)

◆ TIMER2_MCR_MR3S_Pos

#define TIMER2_MCR_MR3S_Pos (11UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

MR3S (Bit 11)

◆ TIMER2_PC_PC_Msk

#define TIMER2_PC_PC_Msk (0xffffffffUL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PC (Bitfield-Mask: 0xffffffff)

◆ TIMER2_PC_PC_Pos

#define TIMER2_PC_PC_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PC (Bit 0)

◆ TIMER2_PR_PM_Msk

#define TIMER2_PR_PM_Msk (0xffffffffUL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PM (Bitfield-Mask: 0xffffffff)

◆ TIMER2_PR_PM_Pos

#define TIMER2_PR_PM_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PM (Bit 0)

◆ TIMER2_TC_TC_Msk

#define TIMER2_TC_TC_Msk (0xffffffffUL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TC (Bitfield-Mask: 0xffffffff)

◆ TIMER2_TC_TC_Pos

#define TIMER2_TC_TC_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TC (Bit 0)

◆ TIMER2_TCR_CEN_Msk

#define TIMER2_TCR_CEN_Msk (0x1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CEN (Bitfield-Mask: 0x01)

◆ TIMER2_TCR_CEN_Pos

#define TIMER2_TCR_CEN_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CEN (Bit 0)

◆ TIMER2_TCR_CRST_Msk

#define TIMER2_TCR_CRST_Msk (0x2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CRST (Bitfield-Mask: 0x01)

◆ TIMER2_TCR_CRST_Pos

#define TIMER2_TCR_CRST_Pos (1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CRST (Bit 1)

◆ TIMER3_CCR_CAP0FE_Msk

#define TIMER3_CCR_CAP0FE_Msk (0x2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CAP0FE (Bitfield-Mask: 0x01)

◆ TIMER3_CCR_CAP0FE_Pos

#define TIMER3_CCR_CAP0FE_Pos (1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CAP0FE (Bit 1)

◆ TIMER3_CCR_CAP0I_Msk

#define TIMER3_CCR_CAP0I_Msk (0x4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CAP0I (Bitfield-Mask: 0x01)

◆ TIMER3_CCR_CAP0I_Pos

#define TIMER3_CCR_CAP0I_Pos (2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CAP0I (Bit 2)

◆ TIMER3_CCR_CAP0RE_Msk

#define TIMER3_CCR_CAP0RE_Msk (0x1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CAP0RE (Bitfield-Mask: 0x01)

◆ TIMER3_CCR_CAP0RE_Pos

#define TIMER3_CCR_CAP0RE_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CAP0RE (Bit 0)

◆ TIMER3_CCR_CAP1FE_Msk

#define TIMER3_CCR_CAP1FE_Msk (0x10UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CAP1FE (Bitfield-Mask: 0x01)

◆ TIMER3_CCR_CAP1FE_Pos

#define TIMER3_CCR_CAP1FE_Pos (4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CAP1FE (Bit 4)

◆ TIMER3_CCR_CAP1I_Msk

#define TIMER3_CCR_CAP1I_Msk (0x20UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CAP1I (Bitfield-Mask: 0x01)

◆ TIMER3_CCR_CAP1I_Pos

#define TIMER3_CCR_CAP1I_Pos (5UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CAP1I (Bit 5)

◆ TIMER3_CCR_CAP1RE_Msk

#define TIMER3_CCR_CAP1RE_Msk (0x8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CAP1RE (Bitfield-Mask: 0x01)

◆ TIMER3_CCR_CAP1RE_Pos

#define TIMER3_CCR_CAP1RE_Pos (3UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CAP1RE (Bit 3)

◆ TIMER3_CTCR_CINSEL_Msk

#define TIMER3_CTCR_CINSEL_Msk (0xcUL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CINSEL (Bitfield-Mask: 0x03)

◆ TIMER3_CTCR_CINSEL_Pos

#define TIMER3_CTCR_CINSEL_Pos (2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CINSEL (Bit 2)

◆ TIMER3_CTCR_CTMODE_Msk

#define TIMER3_CTCR_CTMODE_Msk (0x3UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CTMODE (Bitfield-Mask: 0x03)

◆ TIMER3_CTCR_CTMODE_Pos

#define TIMER3_CTCR_CTMODE_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CTMODE (Bit 0)

◆ TIMER3_EMR_EM0_Msk

#define TIMER3_EMR_EM0_Msk (0x1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EM0 (Bitfield-Mask: 0x01)

◆ TIMER3_EMR_EM0_Pos

#define TIMER3_EMR_EM0_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EM0 (Bit 0)

◆ TIMER3_EMR_EM1_Msk

#define TIMER3_EMR_EM1_Msk (0x2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EM1 (Bitfield-Mask: 0x01)

◆ TIMER3_EMR_EM1_Pos

#define TIMER3_EMR_EM1_Pos (1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EM1 (Bit 1)

◆ TIMER3_EMR_EM2_Msk

#define TIMER3_EMR_EM2_Msk (0x4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EM2 (Bitfield-Mask: 0x01)

◆ TIMER3_EMR_EM2_Pos

#define TIMER3_EMR_EM2_Pos (2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EM2 (Bit 2)

◆ TIMER3_EMR_EM3_Msk

#define TIMER3_EMR_EM3_Msk (0x8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EM3 (Bitfield-Mask: 0x01)

◆ TIMER3_EMR_EM3_Pos

#define TIMER3_EMR_EM3_Pos (3UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EM3 (Bit 3)

◆ TIMER3_EMR_EMC0_Msk

#define TIMER3_EMR_EMC0_Msk (0x30UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EMC0 (Bitfield-Mask: 0x03)

◆ TIMER3_EMR_EMC0_Pos

#define TIMER3_EMR_EMC0_Pos (4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EMC0 (Bit 4)

◆ TIMER3_EMR_EMC1_Msk

#define TIMER3_EMR_EMC1_Msk (0xc0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EMC1 (Bitfield-Mask: 0x03)

◆ TIMER3_EMR_EMC1_Pos

#define TIMER3_EMR_EMC1_Pos (6UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EMC1 (Bit 6)

◆ TIMER3_EMR_EMC2_Msk

#define TIMER3_EMR_EMC2_Msk (0x300UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EMC2 (Bitfield-Mask: 0x03)

◆ TIMER3_EMR_EMC2_Pos

#define TIMER3_EMR_EMC2_Pos (8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EMC2 (Bit 8)

◆ TIMER3_EMR_EMC3_Msk

#define TIMER3_EMR_EMC3_Msk (0xc00UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EMC3 (Bitfield-Mask: 0x03)

◆ TIMER3_EMR_EMC3_Pos

#define TIMER3_EMR_EMC3_Pos (10UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EMC3 (Bit 10)

◆ TIMER3_IR_CR0INT_Msk

#define TIMER3_IR_CR0INT_Msk (0x10UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CR0INT (Bitfield-Mask: 0x01)

◆ TIMER3_IR_CR0INT_Pos

#define TIMER3_IR_CR0INT_Pos (4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CR0INT (Bit 4)

◆ TIMER3_IR_CR1INT_Msk

#define TIMER3_IR_CR1INT_Msk (0x20UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CR1INT (Bitfield-Mask: 0x01)

◆ TIMER3_IR_CR1INT_Pos

#define TIMER3_IR_CR1INT_Pos (5UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CR1INT (Bit 5)

◆ TIMER3_IR_MR0INT_Msk

#define TIMER3_IR_MR0INT_Msk (0x1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

MR0INT (Bitfield-Mask: 0x01)

◆ TIMER3_IR_MR0INT_Pos

#define TIMER3_IR_MR0INT_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

MR0INT (Bit 0)

◆ TIMER3_IR_MR1INT_Msk

#define TIMER3_IR_MR1INT_Msk (0x2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

MR1INT (Bitfield-Mask: 0x01)

◆ TIMER3_IR_MR1INT_Pos

#define TIMER3_IR_MR1INT_Pos (1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

MR1INT (Bit 1)

◆ TIMER3_IR_MR2INT_Msk

#define TIMER3_IR_MR2INT_Msk (0x4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

MR2INT (Bitfield-Mask: 0x01)

◆ TIMER3_IR_MR2INT_Pos

#define TIMER3_IR_MR2INT_Pos (2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

MR2INT (Bit 2)

◆ TIMER3_IR_MR3INT_Msk

#define TIMER3_IR_MR3INT_Msk (0x8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

MR3INT (Bitfield-Mask: 0x01)

◆ TIMER3_IR_MR3INT_Pos

#define TIMER3_IR_MR3INT_Pos (3UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

MR3INT (Bit 3)

◆ TIMER3_MCR_MR0I_Msk

#define TIMER3_MCR_MR0I_Msk (0x1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

MR0I (Bitfield-Mask: 0x01)

◆ TIMER3_MCR_MR0I_Pos

#define TIMER3_MCR_MR0I_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

MR0I (Bit 0)

◆ TIMER3_MCR_MR0R_Msk

#define TIMER3_MCR_MR0R_Msk (0x2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

MR0R (Bitfield-Mask: 0x01)

◆ TIMER3_MCR_MR0R_Pos

#define TIMER3_MCR_MR0R_Pos (1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

MR0R (Bit 1)

◆ TIMER3_MCR_MR0S_Msk

#define TIMER3_MCR_MR0S_Msk (0x4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

MR0S (Bitfield-Mask: 0x01)

◆ TIMER3_MCR_MR0S_Pos

#define TIMER3_MCR_MR0S_Pos (2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

MR0S (Bit 2)

◆ TIMER3_MCR_MR1I_Msk

#define TIMER3_MCR_MR1I_Msk (0x8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

MR1I (Bitfield-Mask: 0x01)

◆ TIMER3_MCR_MR1I_Pos

#define TIMER3_MCR_MR1I_Pos (3UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

MR1I (Bit 3)

◆ TIMER3_MCR_MR1R_Msk

#define TIMER3_MCR_MR1R_Msk (0x10UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

MR1R (Bitfield-Mask: 0x01)

◆ TIMER3_MCR_MR1R_Pos

#define TIMER3_MCR_MR1R_Pos (4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

MR1R (Bit 4)

◆ TIMER3_MCR_MR1S_Msk

#define TIMER3_MCR_MR1S_Msk (0x20UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

MR1S (Bitfield-Mask: 0x01)

◆ TIMER3_MCR_MR1S_Pos

#define TIMER3_MCR_MR1S_Pos (5UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

MR1S (Bit 5)

◆ TIMER3_MCR_MR2I_Msk

#define TIMER3_MCR_MR2I_Msk (0x40UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

MR2I (Bitfield-Mask: 0x01)

◆ TIMER3_MCR_MR2I_Pos

#define TIMER3_MCR_MR2I_Pos (6UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

MR2I (Bit 6)

◆ TIMER3_MCR_MR2R_Msk

#define TIMER3_MCR_MR2R_Msk (0x80UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

MR2R (Bitfield-Mask: 0x01)

◆ TIMER3_MCR_MR2R_Pos

#define TIMER3_MCR_MR2R_Pos (7UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

MR2R (Bit 7)

◆ TIMER3_MCR_MR2S_Msk

#define TIMER3_MCR_MR2S_Msk (0x100UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

MR2S (Bitfield-Mask: 0x01)

◆ TIMER3_MCR_MR2S_Pos

#define TIMER3_MCR_MR2S_Pos (8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

MR2S (Bit 8)

◆ TIMER3_MCR_MR3I_Msk

#define TIMER3_MCR_MR3I_Msk (0x200UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

MR3I (Bitfield-Mask: 0x01)

◆ TIMER3_MCR_MR3I_Pos

#define TIMER3_MCR_MR3I_Pos (9UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

MR3I (Bit 9)

◆ TIMER3_MCR_MR3R_Msk

#define TIMER3_MCR_MR3R_Msk (0x400UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

MR3R (Bitfield-Mask: 0x01)

◆ TIMER3_MCR_MR3R_Pos

#define TIMER3_MCR_MR3R_Pos (10UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

MR3R (Bit 10)

◆ TIMER3_MCR_MR3S_Msk

#define TIMER3_MCR_MR3S_Msk (0x800UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

MR3S (Bitfield-Mask: 0x01)

◆ TIMER3_MCR_MR3S_Pos

#define TIMER3_MCR_MR3S_Pos (11UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

MR3S (Bit 11)

◆ TIMER3_PC_PC_Msk

#define TIMER3_PC_PC_Msk (0xffffffffUL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PC (Bitfield-Mask: 0xffffffff)

◆ TIMER3_PC_PC_Pos

#define TIMER3_PC_PC_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PC (Bit 0)

◆ TIMER3_PR_PM_Msk

#define TIMER3_PR_PM_Msk (0xffffffffUL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PM (Bitfield-Mask: 0xffffffff)

◆ TIMER3_PR_PM_Pos

#define TIMER3_PR_PM_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PM (Bit 0)

◆ TIMER3_TC_TC_Msk

#define TIMER3_TC_TC_Msk (0xffffffffUL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TC (Bitfield-Mask: 0xffffffff)

◆ TIMER3_TC_TC_Pos

#define TIMER3_TC_TC_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TC (Bit 0)

◆ TIMER3_TCR_CEN_Msk

#define TIMER3_TCR_CEN_Msk (0x1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CEN (Bitfield-Mask: 0x01)

◆ TIMER3_TCR_CEN_Pos

#define TIMER3_TCR_CEN_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CEN (Bit 0)

◆ TIMER3_TCR_CRST_Msk

#define TIMER3_TCR_CRST_Msk (0x2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CRST (Bitfield-Mask: 0x01)

◆ TIMER3_TCR_CRST_Pos

#define TIMER3_TCR_CRST_Pos (1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CRST (Bit 1)

◆ UART0_ACR_ABEOINTCLR_Msk

#define UART0_ACR_ABEOINTCLR_Msk (0x100UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

ABEOINTCLR (Bitfield-Mask: 0x01)

◆ UART0_ACR_ABEOINTCLR_Pos

#define UART0_ACR_ABEOINTCLR_Pos (8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

ABEOINTCLR (Bit 8)

◆ UART0_ACR_ABTOINTCLR_Msk

#define UART0_ACR_ABTOINTCLR_Msk (0x200UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

ABTOINTCLR (Bitfield-Mask: 0x01)

◆ UART0_ACR_ABTOINTCLR_Pos

#define UART0_ACR_ABTOINTCLR_Pos (9UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

ABTOINTCLR (Bit 9)

◆ UART0_ACR_AUTORESTART_Msk

#define UART0_ACR_AUTORESTART_Msk (0x4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

AUTORESTART (Bitfield-Mask: 0x01)

◆ UART0_ACR_AUTORESTART_Pos

#define UART0_ACR_AUTORESTART_Pos (2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

AUTORESTART (Bit 2)

◆ UART0_ACR_MODE_Msk

#define UART0_ACR_MODE_Msk (0x2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

MODE (Bitfield-Mask: 0x01)

◆ UART0_ACR_MODE_Pos

#define UART0_ACR_MODE_Pos (1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

MODE (Bit 1)

◆ UART0_ACR_START_Msk

#define UART0_ACR_START_Msk (0x1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

START (Bitfield-Mask: 0x01)

◆ UART0_ACR_START_Pos

#define UART0_ACR_START_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

START (Bit 0)

◆ UART0_DLL_DLLSB_Msk

#define UART0_DLL_DLLSB_Msk (0xffUL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DLLSB (Bitfield-Mask: 0xff)

◆ UART0_DLL_DLLSB_Pos

#define UART0_DLL_DLLSB_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DLLSB (Bit 0)

◆ UART0_DLM_DLMSB_Msk

#define UART0_DLM_DLMSB_Msk (0xffUL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DLMSB (Bitfield-Mask: 0xff)

◆ UART0_DLM_DLMSB_Pos

#define UART0_DLM_DLMSB_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DLMSB (Bit 0)

◆ UART0_FCR_DMAMODE_Msk

#define UART0_FCR_DMAMODE_Msk (0x8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DMAMODE (Bitfield-Mask: 0x01)

◆ UART0_FCR_DMAMODE_Pos

#define UART0_FCR_DMAMODE_Pos (3UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DMAMODE (Bit 3)

◆ UART0_FCR_FIFOEN_Msk

#define UART0_FCR_FIFOEN_Msk (0x1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

FIFOEN (Bitfield-Mask: 0x01)

◆ UART0_FCR_FIFOEN_Pos

#define UART0_FCR_FIFOEN_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

FIFOEN (Bit 0)

◆ UART0_FCR_RXFIFORES_Msk

#define UART0_FCR_RXFIFORES_Msk (0x2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RXFIFORES (Bitfield-Mask: 0x01)

◆ UART0_FCR_RXFIFORES_Pos

#define UART0_FCR_RXFIFORES_Pos (1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RXFIFORES (Bit 1)

◆ UART0_FCR_RXTRIGLVL_Msk

#define UART0_FCR_RXTRIGLVL_Msk (0xc0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RXTRIGLVL (Bitfield-Mask: 0x03)

◆ UART0_FCR_RXTRIGLVL_Pos

#define UART0_FCR_RXTRIGLVL_Pos (6UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RXTRIGLVL (Bit 6)

◆ UART0_FCR_TXFIFORES_Msk

#define UART0_FCR_TXFIFORES_Msk (0x4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TXFIFORES (Bitfield-Mask: 0x01)

◆ UART0_FCR_TXFIFORES_Pos

#define UART0_FCR_TXFIFORES_Pos (2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TXFIFORES (Bit 2)

◆ UART0_FDR_DIVADDVAL_Msk

#define UART0_FDR_DIVADDVAL_Msk (0xfUL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DIVADDVAL (Bitfield-Mask: 0x0f)

◆ UART0_FDR_DIVADDVAL_Pos

#define UART0_FDR_DIVADDVAL_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DIVADDVAL (Bit 0)

◆ UART0_FDR_MULVAL_Msk

#define UART0_FDR_MULVAL_Msk (0xf0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

MULVAL (Bitfield-Mask: 0x0f)

◆ UART0_FDR_MULVAL_Pos

#define UART0_FDR_MULVAL_Pos (4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

MULVAL (Bit 4)

◆ UART0_IER_ABEOINTEN_Msk

#define UART0_IER_ABEOINTEN_Msk (0x100UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

ABEOINTEN (Bitfield-Mask: 0x01)

◆ UART0_IER_ABEOINTEN_Pos

#define UART0_IER_ABEOINTEN_Pos (8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

ABEOINTEN (Bit 8)

◆ UART0_IER_ABTOINTEN_Msk

#define UART0_IER_ABTOINTEN_Msk (0x200UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

ABTOINTEN (Bitfield-Mask: 0x01)

◆ UART0_IER_ABTOINTEN_Pos

#define UART0_IER_ABTOINTEN_Pos (9UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

ABTOINTEN (Bit 9)

◆ UART0_IER_RBRIE_Msk

#define UART0_IER_RBRIE_Msk (0x1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RBRIE (Bitfield-Mask: 0x01)

◆ UART0_IER_RBRIE_Pos

#define UART0_IER_RBRIE_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RBRIE (Bit 0)

◆ UART0_IER_RXIE_Msk

#define UART0_IER_RXIE_Msk (0x4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RXIE (Bitfield-Mask: 0x01)

◆ UART0_IER_RXIE_Pos

#define UART0_IER_RXIE_Pos (2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RXIE (Bit 2)

◆ UART0_IER_THREIE_Msk

#define UART0_IER_THREIE_Msk (0x2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

THREIE (Bitfield-Mask: 0x01)

◆ UART0_IER_THREIE_Pos

#define UART0_IER_THREIE_Pos (1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

THREIE (Bit 1)

◆ UART0_IIR_ABEOINT_Msk

#define UART0_IIR_ABEOINT_Msk (0x100UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

ABEOINT (Bitfield-Mask: 0x01)

◆ UART0_IIR_ABEOINT_Pos

#define UART0_IIR_ABEOINT_Pos (8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

ABEOINT (Bit 8)

◆ UART0_IIR_ABTOINT_Msk

#define UART0_IIR_ABTOINT_Msk (0x200UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

ABTOINT (Bitfield-Mask: 0x01)

◆ UART0_IIR_ABTOINT_Pos

#define UART0_IIR_ABTOINT_Pos (9UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

ABTOINT (Bit 9)

◆ UART0_IIR_FIFOENABLE_Msk

#define UART0_IIR_FIFOENABLE_Msk (0xc0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

FIFOENABLE (Bitfield-Mask: 0x03)

◆ UART0_IIR_FIFOENABLE_Pos

#define UART0_IIR_FIFOENABLE_Pos (6UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

FIFOENABLE (Bit 6)

◆ UART0_IIR_INTID_Msk

#define UART0_IIR_INTID_Msk (0xeUL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

INTID (Bitfield-Mask: 0x07)

◆ UART0_IIR_INTID_Pos

#define UART0_IIR_INTID_Pos (1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

INTID (Bit 1)

◆ UART0_IIR_INTSTATUS_Msk

#define UART0_IIR_INTSTATUS_Msk (0x1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

INTSTATUS (Bitfield-Mask: 0x01)

◆ UART0_IIR_INTSTATUS_Pos

#define UART0_IIR_INTSTATUS_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

INTSTATUS (Bit 0)

◆ UART0_LCR_BC_Msk

#define UART0_LCR_BC_Msk (0x40UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

BC (Bitfield-Mask: 0x01)

◆ UART0_LCR_BC_Pos

#define UART0_LCR_BC_Pos (6UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

BC (Bit 6)

◆ UART0_LCR_DLAB_Msk

#define UART0_LCR_DLAB_Msk (0x80UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DLAB (Bitfield-Mask: 0x01)

◆ UART0_LCR_DLAB_Pos

#define UART0_LCR_DLAB_Pos (7UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DLAB (Bit 7)

◆ UART0_LCR_PE_Msk

#define UART0_LCR_PE_Msk (0x8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PE (Bitfield-Mask: 0x01)

◆ UART0_LCR_PE_Pos

#define UART0_LCR_PE_Pos (3UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PE (Bit 3)

◆ UART0_LCR_PS_Msk

#define UART0_LCR_PS_Msk (0x30UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PS (Bitfield-Mask: 0x03)

◆ UART0_LCR_PS_Pos

#define UART0_LCR_PS_Pos (4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PS (Bit 4)

◆ UART0_LCR_SBS_Msk

#define UART0_LCR_SBS_Msk (0x4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

SBS (Bitfield-Mask: 0x01)

◆ UART0_LCR_SBS_Pos

#define UART0_LCR_SBS_Pos (2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

SBS (Bit 2)

◆ UART0_LCR_WLS_Msk

#define UART0_LCR_WLS_Msk (0x3UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

WLS (Bitfield-Mask: 0x03)

◆ UART0_LCR_WLS_Pos

#define UART0_LCR_WLS_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

WLS (Bit 0)

◆ UART0_LSR_BI_Msk

#define UART0_LSR_BI_Msk (0x10UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

BI (Bitfield-Mask: 0x01)

◆ UART0_LSR_BI_Pos

#define UART0_LSR_BI_Pos (4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

BI (Bit 4)

◆ UART0_LSR_FE_Msk

#define UART0_LSR_FE_Msk (0x8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

FE (Bitfield-Mask: 0x01)

◆ UART0_LSR_FE_Pos

#define UART0_LSR_FE_Pos (3UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

FE (Bit 3)

◆ UART0_LSR_OE_Msk

#define UART0_LSR_OE_Msk (0x2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

OE (Bitfield-Mask: 0x01)

◆ UART0_LSR_OE_Pos

#define UART0_LSR_OE_Pos (1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

OE (Bit 1)

◆ UART0_LSR_PE_Msk

#define UART0_LSR_PE_Msk (0x4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PE (Bitfield-Mask: 0x01)

◆ UART0_LSR_PE_Pos

#define UART0_LSR_PE_Pos (2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PE (Bit 2)

◆ UART0_LSR_RDR_Msk

#define UART0_LSR_RDR_Msk (0x1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RDR (Bitfield-Mask: 0x01)

◆ UART0_LSR_RDR_Pos

#define UART0_LSR_RDR_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RDR (Bit 0)

◆ UART0_LSR_RXFE_Msk

#define UART0_LSR_RXFE_Msk (0x80UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RXFE (Bitfield-Mask: 0x01)

◆ UART0_LSR_RXFE_Pos

#define UART0_LSR_RXFE_Pos (7UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RXFE (Bit 7)

◆ UART0_LSR_TEMT_Msk

#define UART0_LSR_TEMT_Msk (0x40UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TEMT (Bitfield-Mask: 0x01)

◆ UART0_LSR_TEMT_Pos

#define UART0_LSR_TEMT_Pos (6UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TEMT (Bit 6)

◆ UART0_LSR_THRE_Msk

#define UART0_LSR_THRE_Msk (0x20UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

THRE (Bitfield-Mask: 0x01)

◆ UART0_LSR_THRE_Pos

#define UART0_LSR_THRE_Pos (5UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

THRE (Bit 5)

◆ UART0_RBR_RBR_Msk

#define UART0_RBR_RBR_Msk (0xffUL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RBR (Bitfield-Mask: 0xff)

◆ UART0_RBR_RBR_Pos

#define UART0_RBR_RBR_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RBR (Bit 0)

◆ UART0_RS485ADRMATCH_ADRMATCH_Msk

#define UART0_RS485ADRMATCH_ADRMATCH_Msk (0xffUL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

ADRMATCH (Bitfield-Mask: 0xff)

◆ UART0_RS485ADRMATCH_ADRMATCH_Pos

#define UART0_RS485ADRMATCH_ADRMATCH_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

ADRMATCH (Bit 0)

◆ UART0_RS485CTRL_AADEN_Msk

#define UART0_RS485CTRL_AADEN_Msk (0x4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

AADEN (Bitfield-Mask: 0x01)

◆ UART0_RS485CTRL_AADEN_Pos

#define UART0_RS485CTRL_AADEN_Pos (2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

AADEN (Bit 2)

◆ UART0_RS485CTRL_DCTRL_Msk

#define UART0_RS485CTRL_DCTRL_Msk (0x10UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DCTRL (Bitfield-Mask: 0x01)

◆ UART0_RS485CTRL_DCTRL_Pos

#define UART0_RS485CTRL_DCTRL_Pos (4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DCTRL (Bit 4)

◆ UART0_RS485CTRL_NMMEN_Msk

#define UART0_RS485CTRL_NMMEN_Msk (0x1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

NMMEN (Bitfield-Mask: 0x01)

◆ UART0_RS485CTRL_NMMEN_Pos

#define UART0_RS485CTRL_NMMEN_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

NMMEN (Bit 0)

◆ UART0_RS485CTRL_OINV_Msk

#define UART0_RS485CTRL_OINV_Msk (0x20UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

OINV (Bitfield-Mask: 0x01)

◆ UART0_RS485CTRL_OINV_Pos

#define UART0_RS485CTRL_OINV_Pos (5UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

OINV (Bit 5)

◆ UART0_RS485CTRL_RXDIS_Msk

#define UART0_RS485CTRL_RXDIS_Msk (0x2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RXDIS (Bitfield-Mask: 0x01)

◆ UART0_RS485CTRL_RXDIS_Pos

#define UART0_RS485CTRL_RXDIS_Pos (1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RXDIS (Bit 1)

◆ UART0_RS485DLY_DLY_Msk

#define UART0_RS485DLY_DLY_Msk (0xffUL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DLY (Bitfield-Mask: 0xff)

◆ UART0_RS485DLY_DLY_Pos

#define UART0_RS485DLY_DLY_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DLY (Bit 0)

◆ UART0_SCR_PAD_Msk

#define UART0_SCR_PAD_Msk (0xffUL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PAD (Bitfield-Mask: 0xff)

◆ UART0_SCR_PAD_Pos

#define UART0_SCR_PAD_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PAD (Bit 0)

◆ UART0_TER_TXEN_Msk

#define UART0_TER_TXEN_Msk (0x80UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TXEN (Bitfield-Mask: 0x01)

◆ UART0_TER_TXEN_Pos

#define UART0_TER_TXEN_Pos (7UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TXEN (Bit 7)

◆ UART0_THR_THR_Msk

#define UART0_THR_THR_Msk (0xffUL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

THR (Bitfield-Mask: 0xff)

◆ UART0_THR_THR_Pos

#define UART0_THR_THR_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

THR (Bit 0)

◆ UART1_ACR_ABEOINTCLR_Msk

#define UART1_ACR_ABEOINTCLR_Msk (0x100UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

ABEOINTCLR (Bitfield-Mask: 0x01)

◆ UART1_ACR_ABEOINTCLR_Pos

#define UART1_ACR_ABEOINTCLR_Pos (8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

ABEOINTCLR (Bit 8)

◆ UART1_ACR_ABTOINTCLR_Msk

#define UART1_ACR_ABTOINTCLR_Msk (0x200UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

ABTOINTCLR (Bitfield-Mask: 0x01)

◆ UART1_ACR_ABTOINTCLR_Pos

#define UART1_ACR_ABTOINTCLR_Pos (9UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

ABTOINTCLR (Bit 9)

◆ UART1_ACR_AUTORESTART_Msk

#define UART1_ACR_AUTORESTART_Msk (0x4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

AUTORESTART (Bitfield-Mask: 0x01)

◆ UART1_ACR_AUTORESTART_Pos

#define UART1_ACR_AUTORESTART_Pos (2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

AUTORESTART (Bit 2)

◆ UART1_ACR_MODE_Msk

#define UART1_ACR_MODE_Msk (0x2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

MODE (Bitfield-Mask: 0x01)

◆ UART1_ACR_MODE_Pos

#define UART1_ACR_MODE_Pos (1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

MODE (Bit 1)

◆ UART1_ACR_START_Msk

#define UART1_ACR_START_Msk (0x1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

START (Bitfield-Mask: 0x01)

◆ UART1_ACR_START_Pos

#define UART1_ACR_START_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

START (Bit 0)

◆ UART1_DLL_DLLSB_Msk

#define UART1_DLL_DLLSB_Msk (0xffUL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DLLSB (Bitfield-Mask: 0xff)

◆ UART1_DLL_DLLSB_Pos

#define UART1_DLL_DLLSB_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DLLSB (Bit 0)

◆ UART1_DLM_DLMSB_Msk

#define UART1_DLM_DLMSB_Msk (0xffUL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DLMSB (Bitfield-Mask: 0xff)

◆ UART1_DLM_DLMSB_Pos

#define UART1_DLM_DLMSB_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DLMSB (Bit 0)

◆ UART1_FCR_DMAMODE_Msk

#define UART1_FCR_DMAMODE_Msk (0x8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DMAMODE (Bitfield-Mask: 0x01)

◆ UART1_FCR_DMAMODE_Pos

#define UART1_FCR_DMAMODE_Pos (3UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DMAMODE (Bit 3)

◆ UART1_FCR_FIFOEN_Msk

#define UART1_FCR_FIFOEN_Msk (0x1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

FIFOEN (Bitfield-Mask: 0x01)

◆ UART1_FCR_FIFOEN_Pos

#define UART1_FCR_FIFOEN_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

FIFOEN (Bit 0)

◆ UART1_FCR_RXFIFORES_Msk

#define UART1_FCR_RXFIFORES_Msk (0x2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RXFIFORES (Bitfield-Mask: 0x01)

◆ UART1_FCR_RXFIFORES_Pos

#define UART1_FCR_RXFIFORES_Pos (1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RXFIFORES (Bit 1)

◆ UART1_FCR_RXTRIGLVL_Msk

#define UART1_FCR_RXTRIGLVL_Msk (0xc0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RXTRIGLVL (Bitfield-Mask: 0x03)

◆ UART1_FCR_RXTRIGLVL_Pos

#define UART1_FCR_RXTRIGLVL_Pos (6UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RXTRIGLVL (Bit 6)

◆ UART1_FCR_TXFIFORES_Msk

#define UART1_FCR_TXFIFORES_Msk (0x4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TXFIFORES (Bitfield-Mask: 0x01)

◆ UART1_FCR_TXFIFORES_Pos

#define UART1_FCR_TXFIFORES_Pos (2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TXFIFORES (Bit 2)

◆ UART1_FDR_DIVADDVAL_Msk

#define UART1_FDR_DIVADDVAL_Msk (0xfUL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DIVADDVAL (Bitfield-Mask: 0x0f)

◆ UART1_FDR_DIVADDVAL_Pos

#define UART1_FDR_DIVADDVAL_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DIVADDVAL (Bit 0)

◆ UART1_FDR_MULVAL_Msk

#define UART1_FDR_MULVAL_Msk (0xf0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

MULVAL (Bitfield-Mask: 0x0f)

◆ UART1_FDR_MULVAL_Pos

#define UART1_FDR_MULVAL_Pos (4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

MULVAL (Bit 4)

◆ UART1_IER_ABEOIE_Msk

#define UART1_IER_ABEOIE_Msk (0x100UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

ABEOIE (Bitfield-Mask: 0x01)

◆ UART1_IER_ABEOIE_Pos

#define UART1_IER_ABEOIE_Pos (8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

ABEOIE (Bit 8)

◆ UART1_IER_ABTOIE_Msk

#define UART1_IER_ABTOIE_Msk (0x200UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

ABTOIE (Bitfield-Mask: 0x01)

◆ UART1_IER_ABTOIE_Pos

#define UART1_IER_ABTOIE_Pos (9UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

ABTOIE (Bit 9)

◆ UART1_IER_CTSIE_Msk

#define UART1_IER_CTSIE_Msk (0x80UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CTSIE (Bitfield-Mask: 0x01)

◆ UART1_IER_CTSIE_Pos

#define UART1_IER_CTSIE_Pos (7UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CTSIE (Bit 7)

◆ UART1_IER_MSIE_Msk

#define UART1_IER_MSIE_Msk (0x8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

MSIE (Bitfield-Mask: 0x01)

◆ UART1_IER_MSIE_Pos

#define UART1_IER_MSIE_Pos (3UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

MSIE (Bit 3)

◆ UART1_IER_RBRIE_Msk

#define UART1_IER_RBRIE_Msk (0x1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RBRIE (Bitfield-Mask: 0x01)

◆ UART1_IER_RBRIE_Pos

#define UART1_IER_RBRIE_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RBRIE (Bit 0)

◆ UART1_IER_RXIE_Msk

#define UART1_IER_RXIE_Msk (0x4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RXIE (Bitfield-Mask: 0x01)

◆ UART1_IER_RXIE_Pos

#define UART1_IER_RXIE_Pos (2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RXIE (Bit 2)

◆ UART1_IER_THREIE_Msk

#define UART1_IER_THREIE_Msk (0x2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

THREIE (Bitfield-Mask: 0x01)

◆ UART1_IER_THREIE_Pos

#define UART1_IER_THREIE_Pos (1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

THREIE (Bit 1)

◆ UART1_IIR_ABEOINT_Msk

#define UART1_IIR_ABEOINT_Msk (0x100UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

ABEOINT (Bitfield-Mask: 0x01)

◆ UART1_IIR_ABEOINT_Pos

#define UART1_IIR_ABEOINT_Pos (8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

ABEOINT (Bit 8)

◆ UART1_IIR_ABTOINT_Msk

#define UART1_IIR_ABTOINT_Msk (0x200UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

ABTOINT (Bitfield-Mask: 0x01)

◆ UART1_IIR_ABTOINT_Pos

#define UART1_IIR_ABTOINT_Pos (9UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

ABTOINT (Bit 9)

◆ UART1_IIR_FIFOENABLE_Msk

#define UART1_IIR_FIFOENABLE_Msk (0xc0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

FIFOENABLE (Bitfield-Mask: 0x03)

◆ UART1_IIR_FIFOENABLE_Pos

#define UART1_IIR_FIFOENABLE_Pos (6UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

FIFOENABLE (Bit 6)

◆ UART1_IIR_INTID_Msk

#define UART1_IIR_INTID_Msk (0xeUL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

INTID (Bitfield-Mask: 0x07)

◆ UART1_IIR_INTID_Pos

#define UART1_IIR_INTID_Pos (1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

INTID (Bit 1)

◆ UART1_IIR_INTSTATUS_Msk

#define UART1_IIR_INTSTATUS_Msk (0x1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

INTSTATUS (Bitfield-Mask: 0x01)

◆ UART1_IIR_INTSTATUS_Pos

#define UART1_IIR_INTSTATUS_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

INTSTATUS (Bit 0)

◆ UART1_LCR_BC_Msk

#define UART1_LCR_BC_Msk (0x40UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

BC (Bitfield-Mask: 0x01)

◆ UART1_LCR_BC_Pos

#define UART1_LCR_BC_Pos (6UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

BC (Bit 6)

◆ UART1_LCR_DLAB_Msk

#define UART1_LCR_DLAB_Msk (0x80UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DLAB (Bitfield-Mask: 0x01)

◆ UART1_LCR_DLAB_Pos

#define UART1_LCR_DLAB_Pos (7UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DLAB (Bit 7)

◆ UART1_LCR_PE_Msk

#define UART1_LCR_PE_Msk (0x8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PE (Bitfield-Mask: 0x01)

◆ UART1_LCR_PE_Pos

#define UART1_LCR_PE_Pos (3UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PE (Bit 3)

◆ UART1_LCR_PS_Msk

#define UART1_LCR_PS_Msk (0x30UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PS (Bitfield-Mask: 0x03)

◆ UART1_LCR_PS_Pos

#define UART1_LCR_PS_Pos (4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PS (Bit 4)

◆ UART1_LCR_SBS_Msk

#define UART1_LCR_SBS_Msk (0x4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

SBS (Bitfield-Mask: 0x01)

◆ UART1_LCR_SBS_Pos

#define UART1_LCR_SBS_Pos (2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

SBS (Bit 2)

◆ UART1_LCR_WLS_Msk

#define UART1_LCR_WLS_Msk (0x3UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

WLS (Bitfield-Mask: 0x03)

◆ UART1_LCR_WLS_Pos

#define UART1_LCR_WLS_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

WLS (Bit 0)

◆ UART1_LSR_BI_Msk

#define UART1_LSR_BI_Msk (0x10UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

BI (Bitfield-Mask: 0x01)

◆ UART1_LSR_BI_Pos

#define UART1_LSR_BI_Pos (4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

BI (Bit 4)

◆ UART1_LSR_FE_Msk

#define UART1_LSR_FE_Msk (0x8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

FE (Bitfield-Mask: 0x01)

◆ UART1_LSR_FE_Pos

#define UART1_LSR_FE_Pos (3UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

FE (Bit 3)

◆ UART1_LSR_OE_Msk

#define UART1_LSR_OE_Msk (0x2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

OE (Bitfield-Mask: 0x01)

◆ UART1_LSR_OE_Pos

#define UART1_LSR_OE_Pos (1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

OE (Bit 1)

◆ UART1_LSR_PE_Msk

#define UART1_LSR_PE_Msk (0x4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PE (Bitfield-Mask: 0x01)

◆ UART1_LSR_PE_Pos

#define UART1_LSR_PE_Pos (2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PE (Bit 2)

◆ UART1_LSR_RDR_Msk

#define UART1_LSR_RDR_Msk (0x1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RDR (Bitfield-Mask: 0x01)

◆ UART1_LSR_RDR_Pos

#define UART1_LSR_RDR_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RDR (Bit 0)

◆ UART1_LSR_RXFE_Msk

#define UART1_LSR_RXFE_Msk (0x80UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RXFE (Bitfield-Mask: 0x01)

◆ UART1_LSR_RXFE_Pos

#define UART1_LSR_RXFE_Pos (7UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RXFE (Bit 7)

◆ UART1_LSR_TEMT_Msk

#define UART1_LSR_TEMT_Msk (0x40UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TEMT (Bitfield-Mask: 0x01)

◆ UART1_LSR_TEMT_Pos

#define UART1_LSR_TEMT_Pos (6UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TEMT (Bit 6)

◆ UART1_LSR_THRE_Msk

#define UART1_LSR_THRE_Msk (0x20UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

THRE (Bitfield-Mask: 0x01)

◆ UART1_LSR_THRE_Pos

#define UART1_LSR_THRE_Pos (5UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

THRE (Bit 5)

◆ UART1_MCR_CTSEN_Msk

#define UART1_MCR_CTSEN_Msk (0x80UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CTSEN (Bitfield-Mask: 0x01)

◆ UART1_MCR_CTSEN_Pos

#define UART1_MCR_CTSEN_Pos (7UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CTSEN (Bit 7)

◆ UART1_MCR_DTRCTRL_Msk

#define UART1_MCR_DTRCTRL_Msk (0x1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DTRCTRL (Bitfield-Mask: 0x01)

◆ UART1_MCR_DTRCTRL_Pos

#define UART1_MCR_DTRCTRL_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DTRCTRL (Bit 0)

◆ UART1_MCR_LMS_Msk

#define UART1_MCR_LMS_Msk (0x10UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

LMS (Bitfield-Mask: 0x01)

◆ UART1_MCR_LMS_Pos

#define UART1_MCR_LMS_Pos (4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

LMS (Bit 4)

◆ UART1_MCR_RTSCTRL_Msk

#define UART1_MCR_RTSCTRL_Msk (0x2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RTSCTRL (Bitfield-Mask: 0x01)

◆ UART1_MCR_RTSCTRL_Pos

#define UART1_MCR_RTSCTRL_Pos (1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RTSCTRL (Bit 1)

◆ UART1_MCR_RTSEN_Msk

#define UART1_MCR_RTSEN_Msk (0x40UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RTSEN (Bitfield-Mask: 0x01)

◆ UART1_MCR_RTSEN_Pos

#define UART1_MCR_RTSEN_Pos (6UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RTSEN (Bit 6)

◆ UART1_MSR_CTS_Msk

#define UART1_MSR_CTS_Msk (0x10UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CTS (Bitfield-Mask: 0x01)

◆ UART1_MSR_CTS_Pos

#define UART1_MSR_CTS_Pos (4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CTS (Bit 4)

◆ UART1_MSR_DCD_Msk

#define UART1_MSR_DCD_Msk (0x80UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DCD (Bitfield-Mask: 0x01)

◆ UART1_MSR_DCD_Pos

#define UART1_MSR_DCD_Pos (7UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DCD (Bit 7)

◆ UART1_MSR_DCTS_Msk

#define UART1_MSR_DCTS_Msk (0x1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DCTS (Bitfield-Mask: 0x01)

◆ UART1_MSR_DCTS_Pos

#define UART1_MSR_DCTS_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DCTS (Bit 0)

◆ UART1_MSR_DDCD_Msk

#define UART1_MSR_DDCD_Msk (0x8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DDCD (Bitfield-Mask: 0x01)

◆ UART1_MSR_DDCD_Pos

#define UART1_MSR_DDCD_Pos (3UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DDCD (Bit 3)

◆ UART1_MSR_DDSR_Msk

#define UART1_MSR_DDSR_Msk (0x2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DDSR (Bitfield-Mask: 0x01)

◆ UART1_MSR_DDSR_Pos

#define UART1_MSR_DDSR_Pos (1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DDSR (Bit 1)

◆ UART1_MSR_DSR_Msk

#define UART1_MSR_DSR_Msk (0x20UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DSR (Bitfield-Mask: 0x01)

◆ UART1_MSR_DSR_Pos

#define UART1_MSR_DSR_Pos (5UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DSR (Bit 5)

◆ UART1_MSR_RI_Msk

#define UART1_MSR_RI_Msk (0x40UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RI (Bitfield-Mask: 0x01)

◆ UART1_MSR_RI_Pos

#define UART1_MSR_RI_Pos (6UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RI (Bit 6)

◆ UART1_MSR_TERI_Msk

#define UART1_MSR_TERI_Msk (0x4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TERI (Bitfield-Mask: 0x01)

◆ UART1_MSR_TERI_Pos

#define UART1_MSR_TERI_Pos (2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TERI (Bit 2)

◆ UART1_RBR_RBR_Msk

#define UART1_RBR_RBR_Msk (0xffUL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RBR (Bitfield-Mask: 0xff)

◆ UART1_RBR_RBR_Pos

#define UART1_RBR_RBR_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RBR (Bit 0)

◆ UART1_RS485ADRMATCH_ADRMATCH_Msk

#define UART1_RS485ADRMATCH_ADRMATCH_Msk (0xffUL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

ADRMATCH (Bitfield-Mask: 0xff)

◆ UART1_RS485ADRMATCH_ADRMATCH_Pos

#define UART1_RS485ADRMATCH_ADRMATCH_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

ADRMATCH (Bit 0)

◆ UART1_RS485CTRL_AADEN_Msk

#define UART1_RS485CTRL_AADEN_Msk (0x4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

AADEN (Bitfield-Mask: 0x01)

◆ UART1_RS485CTRL_AADEN_Pos

#define UART1_RS485CTRL_AADEN_Pos (2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

AADEN (Bit 2)

◆ UART1_RS485CTRL_DCTRL_Msk

#define UART1_RS485CTRL_DCTRL_Msk (0x10UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DCTRL (Bitfield-Mask: 0x01)

◆ UART1_RS485CTRL_DCTRL_Pos

#define UART1_RS485CTRL_DCTRL_Pos (4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DCTRL (Bit 4)

◆ UART1_RS485CTRL_NMMEN_Msk

#define UART1_RS485CTRL_NMMEN_Msk (0x1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

NMMEN (Bitfield-Mask: 0x01)

◆ UART1_RS485CTRL_NMMEN_Pos

#define UART1_RS485CTRL_NMMEN_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

NMMEN (Bit 0)

◆ UART1_RS485CTRL_OINV_Msk

#define UART1_RS485CTRL_OINV_Msk (0x20UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

OINV (Bitfield-Mask: 0x01)

◆ UART1_RS485CTRL_OINV_Pos

#define UART1_RS485CTRL_OINV_Pos (5UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

OINV (Bit 5)

◆ UART1_RS485CTRL_RXDIS_Msk

#define UART1_RS485CTRL_RXDIS_Msk (0x2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RXDIS (Bitfield-Mask: 0x01)

◆ UART1_RS485CTRL_RXDIS_Pos

#define UART1_RS485CTRL_RXDIS_Pos (1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RXDIS (Bit 1)

◆ UART1_RS485CTRL_SEL_Msk

#define UART1_RS485CTRL_SEL_Msk (0x8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

SEL (Bitfield-Mask: 0x01)

◆ UART1_RS485CTRL_SEL_Pos

#define UART1_RS485CTRL_SEL_Pos (3UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

SEL (Bit 3)

◆ UART1_RS485DLY_DLY_Msk

#define UART1_RS485DLY_DLY_Msk (0xffUL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DLY (Bitfield-Mask: 0xff)

◆ UART1_RS485DLY_DLY_Pos

#define UART1_RS485DLY_DLY_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DLY (Bit 0)

◆ UART1_SCR_Pad_Msk

#define UART1_SCR_Pad_Msk (0xffUL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

Pad (Bitfield-Mask: 0xff)

◆ UART1_SCR_Pad_Pos

#define UART1_SCR_Pad_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

Pad (Bit 0)

◆ UART1_TER_TXEN_Msk

#define UART1_TER_TXEN_Msk (0x80UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TXEN (Bitfield-Mask: 0x01)

◆ UART1_TER_TXEN_Pos

#define UART1_TER_TXEN_Pos (7UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TXEN (Bit 7)

◆ UART1_THR_THR_Msk

#define UART1_THR_THR_Msk (0xffUL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

THR (Bitfield-Mask: 0xff)

◆ UART1_THR_THR_Pos

#define UART1_THR_THR_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

THR (Bit 0)

◆ UART2_ACR_ABEOINTCLR_Msk

#define UART2_ACR_ABEOINTCLR_Msk (0x100UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

ABEOINTCLR (Bitfield-Mask: 0x01)

◆ UART2_ACR_ABEOINTCLR_Pos

#define UART2_ACR_ABEOINTCLR_Pos (8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

ABEOINTCLR (Bit 8)

◆ UART2_ACR_ABTOINTCLR_Msk

#define UART2_ACR_ABTOINTCLR_Msk (0x200UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

ABTOINTCLR (Bitfield-Mask: 0x01)

◆ UART2_ACR_ABTOINTCLR_Pos

#define UART2_ACR_ABTOINTCLR_Pos (9UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

ABTOINTCLR (Bit 9)

◆ UART2_ACR_AUTORESTART_Msk

#define UART2_ACR_AUTORESTART_Msk (0x4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

AUTORESTART (Bitfield-Mask: 0x01)

◆ UART2_ACR_AUTORESTART_Pos

#define UART2_ACR_AUTORESTART_Pos (2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

AUTORESTART (Bit 2)

◆ UART2_ACR_MODE_Msk

#define UART2_ACR_MODE_Msk (0x2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

MODE (Bitfield-Mask: 0x01)

◆ UART2_ACR_MODE_Pos

#define UART2_ACR_MODE_Pos (1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

MODE (Bit 1)

◆ UART2_ACR_START_Msk

#define UART2_ACR_START_Msk (0x1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

START (Bitfield-Mask: 0x01)

◆ UART2_ACR_START_Pos

#define UART2_ACR_START_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

START (Bit 0)

◆ UART2_DLL_DLLSB_Msk

#define UART2_DLL_DLLSB_Msk (0xffUL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DLLSB (Bitfield-Mask: 0xff)

◆ UART2_DLL_DLLSB_Pos

#define UART2_DLL_DLLSB_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DLLSB (Bit 0)

◆ UART2_DLM_DLMSB_Msk

#define UART2_DLM_DLMSB_Msk (0xffUL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DLMSB (Bitfield-Mask: 0xff)

◆ UART2_DLM_DLMSB_Pos

#define UART2_DLM_DLMSB_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DLMSB (Bit 0)

◆ UART2_FCR_DMAMODE_Msk

#define UART2_FCR_DMAMODE_Msk (0x8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DMAMODE (Bitfield-Mask: 0x01)

◆ UART2_FCR_DMAMODE_Pos

#define UART2_FCR_DMAMODE_Pos (3UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DMAMODE (Bit 3)

◆ UART2_FCR_FIFOEN_Msk

#define UART2_FCR_FIFOEN_Msk (0x1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

FIFOEN (Bitfield-Mask: 0x01)

◆ UART2_FCR_FIFOEN_Pos

#define UART2_FCR_FIFOEN_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

FIFOEN (Bit 0)

◆ UART2_FCR_RXFIFORES_Msk

#define UART2_FCR_RXFIFORES_Msk (0x2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RXFIFORES (Bitfield-Mask: 0x01)

◆ UART2_FCR_RXFIFORES_Pos

#define UART2_FCR_RXFIFORES_Pos (1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RXFIFORES (Bit 1)

◆ UART2_FCR_RXTRIGLVL_Msk

#define UART2_FCR_RXTRIGLVL_Msk (0xc0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RXTRIGLVL (Bitfield-Mask: 0x03)

◆ UART2_FCR_RXTRIGLVL_Pos

#define UART2_FCR_RXTRIGLVL_Pos (6UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RXTRIGLVL (Bit 6)

◆ UART2_FCR_TXFIFORES_Msk

#define UART2_FCR_TXFIFORES_Msk (0x4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TXFIFORES (Bitfield-Mask: 0x01)

◆ UART2_FCR_TXFIFORES_Pos

#define UART2_FCR_TXFIFORES_Pos (2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TXFIFORES (Bit 2)

◆ UART2_FDR_DIVADDVAL_Msk

#define UART2_FDR_DIVADDVAL_Msk (0xfUL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DIVADDVAL (Bitfield-Mask: 0x0f)

◆ UART2_FDR_DIVADDVAL_Pos

#define UART2_FDR_DIVADDVAL_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DIVADDVAL (Bit 0)

◆ UART2_FDR_MULVAL_Msk

#define UART2_FDR_MULVAL_Msk (0xf0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

MULVAL (Bitfield-Mask: 0x0f)

◆ UART2_FDR_MULVAL_Pos

#define UART2_FDR_MULVAL_Pos (4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

MULVAL (Bit 4)

◆ UART2_IER_ABEOINTEN_Msk

#define UART2_IER_ABEOINTEN_Msk (0x100UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

ABEOINTEN (Bitfield-Mask: 0x01)

◆ UART2_IER_ABEOINTEN_Pos

#define UART2_IER_ABEOINTEN_Pos (8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

ABEOINTEN (Bit 8)

◆ UART2_IER_ABTOINTEN_Msk

#define UART2_IER_ABTOINTEN_Msk (0x200UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

ABTOINTEN (Bitfield-Mask: 0x01)

◆ UART2_IER_ABTOINTEN_Pos

#define UART2_IER_ABTOINTEN_Pos (9UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

ABTOINTEN (Bit 9)

◆ UART2_IER_RBRIE_Msk

#define UART2_IER_RBRIE_Msk (0x1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RBRIE (Bitfield-Mask: 0x01)

◆ UART2_IER_RBRIE_Pos

#define UART2_IER_RBRIE_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RBRIE (Bit 0)

◆ UART2_IER_RXIE_Msk

#define UART2_IER_RXIE_Msk (0x4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RXIE (Bitfield-Mask: 0x01)

◆ UART2_IER_RXIE_Pos

#define UART2_IER_RXIE_Pos (2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RXIE (Bit 2)

◆ UART2_IER_THREIE_Msk

#define UART2_IER_THREIE_Msk (0x2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

THREIE (Bitfield-Mask: 0x01)

◆ UART2_IER_THREIE_Pos

#define UART2_IER_THREIE_Pos (1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

THREIE (Bit 1)

◆ UART2_IIR_ABEOINT_Msk

#define UART2_IIR_ABEOINT_Msk (0x100UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

ABEOINT (Bitfield-Mask: 0x01)

◆ UART2_IIR_ABEOINT_Pos

#define UART2_IIR_ABEOINT_Pos (8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

ABEOINT (Bit 8)

◆ UART2_IIR_ABTOINT_Msk

#define UART2_IIR_ABTOINT_Msk (0x200UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

ABTOINT (Bitfield-Mask: 0x01)

◆ UART2_IIR_ABTOINT_Pos

#define UART2_IIR_ABTOINT_Pos (9UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

ABTOINT (Bit 9)

◆ UART2_IIR_FIFOENABLE_Msk

#define UART2_IIR_FIFOENABLE_Msk (0xc0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

FIFOENABLE (Bitfield-Mask: 0x03)

◆ UART2_IIR_FIFOENABLE_Pos

#define UART2_IIR_FIFOENABLE_Pos (6UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

FIFOENABLE (Bit 6)

◆ UART2_IIR_INTID_Msk

#define UART2_IIR_INTID_Msk (0xeUL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

INTID (Bitfield-Mask: 0x07)

◆ UART2_IIR_INTID_Pos

#define UART2_IIR_INTID_Pos (1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

INTID (Bit 1)

◆ UART2_IIR_INTSTATUS_Msk

#define UART2_IIR_INTSTATUS_Msk (0x1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

INTSTATUS (Bitfield-Mask: 0x01)

◆ UART2_IIR_INTSTATUS_Pos

#define UART2_IIR_INTSTATUS_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

INTSTATUS (Bit 0)

◆ UART2_LCR_BC_Msk

#define UART2_LCR_BC_Msk (0x40UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

BC (Bitfield-Mask: 0x01)

◆ UART2_LCR_BC_Pos

#define UART2_LCR_BC_Pos (6UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

BC (Bit 6)

◆ UART2_LCR_DLAB_Msk

#define UART2_LCR_DLAB_Msk (0x80UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DLAB (Bitfield-Mask: 0x01)

◆ UART2_LCR_DLAB_Pos

#define UART2_LCR_DLAB_Pos (7UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DLAB (Bit 7)

◆ UART2_LCR_PE_Msk

#define UART2_LCR_PE_Msk (0x8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PE (Bitfield-Mask: 0x01)

◆ UART2_LCR_PE_Pos

#define UART2_LCR_PE_Pos (3UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PE (Bit 3)

◆ UART2_LCR_PS_Msk

#define UART2_LCR_PS_Msk (0x30UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PS (Bitfield-Mask: 0x03)

◆ UART2_LCR_PS_Pos

#define UART2_LCR_PS_Pos (4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PS (Bit 4)

◆ UART2_LCR_SBS_Msk

#define UART2_LCR_SBS_Msk (0x4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

SBS (Bitfield-Mask: 0x01)

◆ UART2_LCR_SBS_Pos

#define UART2_LCR_SBS_Pos (2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

SBS (Bit 2)

◆ UART2_LCR_WLS_Msk

#define UART2_LCR_WLS_Msk (0x3UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

WLS (Bitfield-Mask: 0x03)

◆ UART2_LCR_WLS_Pos

#define UART2_LCR_WLS_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

WLS (Bit 0)

◆ UART2_LSR_BI_Msk

#define UART2_LSR_BI_Msk (0x10UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

BI (Bitfield-Mask: 0x01)

◆ UART2_LSR_BI_Pos

#define UART2_LSR_BI_Pos (4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

BI (Bit 4)

◆ UART2_LSR_FE_Msk

#define UART2_LSR_FE_Msk (0x8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

FE (Bitfield-Mask: 0x01)

◆ UART2_LSR_FE_Pos

#define UART2_LSR_FE_Pos (3UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

FE (Bit 3)

◆ UART2_LSR_OE_Msk

#define UART2_LSR_OE_Msk (0x2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

OE (Bitfield-Mask: 0x01)

◆ UART2_LSR_OE_Pos

#define UART2_LSR_OE_Pos (1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

OE (Bit 1)

◆ UART2_LSR_PE_Msk

#define UART2_LSR_PE_Msk (0x4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PE (Bitfield-Mask: 0x01)

◆ UART2_LSR_PE_Pos

#define UART2_LSR_PE_Pos (2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PE (Bit 2)

◆ UART2_LSR_RDR_Msk

#define UART2_LSR_RDR_Msk (0x1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RDR (Bitfield-Mask: 0x01)

◆ UART2_LSR_RDR_Pos

#define UART2_LSR_RDR_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RDR (Bit 0)

◆ UART2_LSR_RXFE_Msk

#define UART2_LSR_RXFE_Msk (0x80UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RXFE (Bitfield-Mask: 0x01)

◆ UART2_LSR_RXFE_Pos

#define UART2_LSR_RXFE_Pos (7UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RXFE (Bit 7)

◆ UART2_LSR_TEMT_Msk

#define UART2_LSR_TEMT_Msk (0x40UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TEMT (Bitfield-Mask: 0x01)

◆ UART2_LSR_TEMT_Pos

#define UART2_LSR_TEMT_Pos (6UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TEMT (Bit 6)

◆ UART2_LSR_THRE_Msk

#define UART2_LSR_THRE_Msk (0x20UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

THRE (Bitfield-Mask: 0x01)

◆ UART2_LSR_THRE_Pos

#define UART2_LSR_THRE_Pos (5UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

THRE (Bit 5)

◆ UART2_RBR_RBR_Msk

#define UART2_RBR_RBR_Msk (0xffUL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RBR (Bitfield-Mask: 0xff)

◆ UART2_RBR_RBR_Pos

#define UART2_RBR_RBR_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RBR (Bit 0)

◆ UART2_RS485ADRMATCH_ADRMATCH_Msk

#define UART2_RS485ADRMATCH_ADRMATCH_Msk (0xffUL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

ADRMATCH (Bitfield-Mask: 0xff)

◆ UART2_RS485ADRMATCH_ADRMATCH_Pos

#define UART2_RS485ADRMATCH_ADRMATCH_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

ADRMATCH (Bit 0)

◆ UART2_RS485CTRL_AADEN_Msk

#define UART2_RS485CTRL_AADEN_Msk (0x4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

AADEN (Bitfield-Mask: 0x01)

◆ UART2_RS485CTRL_AADEN_Pos

#define UART2_RS485CTRL_AADEN_Pos (2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

AADEN (Bit 2)

◆ UART2_RS485CTRL_DCTRL_Msk

#define UART2_RS485CTRL_DCTRL_Msk (0x10UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DCTRL (Bitfield-Mask: 0x01)

◆ UART2_RS485CTRL_DCTRL_Pos

#define UART2_RS485CTRL_DCTRL_Pos (4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DCTRL (Bit 4)

◆ UART2_RS485CTRL_NMMEN_Msk

#define UART2_RS485CTRL_NMMEN_Msk (0x1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

NMMEN (Bitfield-Mask: 0x01)

◆ UART2_RS485CTRL_NMMEN_Pos

#define UART2_RS485CTRL_NMMEN_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

NMMEN (Bit 0)

◆ UART2_RS485CTRL_OINV_Msk

#define UART2_RS485CTRL_OINV_Msk (0x20UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

OINV (Bitfield-Mask: 0x01)

◆ UART2_RS485CTRL_OINV_Pos

#define UART2_RS485CTRL_OINV_Pos (5UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

OINV (Bit 5)

◆ UART2_RS485CTRL_RXDIS_Msk

#define UART2_RS485CTRL_RXDIS_Msk (0x2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RXDIS (Bitfield-Mask: 0x01)

◆ UART2_RS485CTRL_RXDIS_Pos

#define UART2_RS485CTRL_RXDIS_Pos (1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RXDIS (Bit 1)

◆ UART2_RS485DLY_DLY_Msk

#define UART2_RS485DLY_DLY_Msk (0xffUL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DLY (Bitfield-Mask: 0xff)

◆ UART2_RS485DLY_DLY_Pos

#define UART2_RS485DLY_DLY_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DLY (Bit 0)

◆ UART2_SCR_PAD_Msk

#define UART2_SCR_PAD_Msk (0xffUL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PAD (Bitfield-Mask: 0xff)

◆ UART2_SCR_PAD_Pos

#define UART2_SCR_PAD_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PAD (Bit 0)

◆ UART2_TER_TXEN_Msk

#define UART2_TER_TXEN_Msk (0x80UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TXEN (Bitfield-Mask: 0x01)

◆ UART2_TER_TXEN_Pos

#define UART2_TER_TXEN_Pos (7UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TXEN (Bit 7)

◆ UART2_THR_THR_Msk

#define UART2_THR_THR_Msk (0xffUL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

THR (Bitfield-Mask: 0xff)

◆ UART2_THR_THR_Pos

#define UART2_THR_THR_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

THR (Bit 0)

◆ UART3_ACR_ABEOINTCLR_Msk

#define UART3_ACR_ABEOINTCLR_Msk (0x100UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

ABEOINTCLR (Bitfield-Mask: 0x01)

◆ UART3_ACR_ABEOINTCLR_Pos

#define UART3_ACR_ABEOINTCLR_Pos (8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

ABEOINTCLR (Bit 8)

◆ UART3_ACR_ABTOINTCLR_Msk

#define UART3_ACR_ABTOINTCLR_Msk (0x200UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

ABTOINTCLR (Bitfield-Mask: 0x01)

◆ UART3_ACR_ABTOINTCLR_Pos

#define UART3_ACR_ABTOINTCLR_Pos (9UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

ABTOINTCLR (Bit 9)

◆ UART3_ACR_AUTORESTART_Msk

#define UART3_ACR_AUTORESTART_Msk (0x4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

AUTORESTART (Bitfield-Mask: 0x01)

◆ UART3_ACR_AUTORESTART_Pos

#define UART3_ACR_AUTORESTART_Pos (2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

AUTORESTART (Bit 2)

◆ UART3_ACR_MODE_Msk

#define UART3_ACR_MODE_Msk (0x2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

MODE (Bitfield-Mask: 0x01)

◆ UART3_ACR_MODE_Pos

#define UART3_ACR_MODE_Pos (1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

MODE (Bit 1)

◆ UART3_ACR_START_Msk

#define UART3_ACR_START_Msk (0x1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

START (Bitfield-Mask: 0x01)

◆ UART3_ACR_START_Pos

#define UART3_ACR_START_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

START (Bit 0)

◆ UART3_DLL_DLLSB_Msk

#define UART3_DLL_DLLSB_Msk (0xffUL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DLLSB (Bitfield-Mask: 0xff)

◆ UART3_DLL_DLLSB_Pos

#define UART3_DLL_DLLSB_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DLLSB (Bit 0)

◆ UART3_DLM_DLMSB_Msk

#define UART3_DLM_DLMSB_Msk (0xffUL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DLMSB (Bitfield-Mask: 0xff)

◆ UART3_DLM_DLMSB_Pos

#define UART3_DLM_DLMSB_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DLMSB (Bit 0)

◆ UART3_FCR_DMAMODE_Msk

#define UART3_FCR_DMAMODE_Msk (0x8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DMAMODE (Bitfield-Mask: 0x01)

◆ UART3_FCR_DMAMODE_Pos

#define UART3_FCR_DMAMODE_Pos (3UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DMAMODE (Bit 3)

◆ UART3_FCR_FIFOEN_Msk

#define UART3_FCR_FIFOEN_Msk (0x1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

FIFOEN (Bitfield-Mask: 0x01)

◆ UART3_FCR_FIFOEN_Pos

#define UART3_FCR_FIFOEN_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

FIFOEN (Bit 0)

◆ UART3_FCR_RXFIFORES_Msk

#define UART3_FCR_RXFIFORES_Msk (0x2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RXFIFORES (Bitfield-Mask: 0x01)

◆ UART3_FCR_RXFIFORES_Pos

#define UART3_FCR_RXFIFORES_Pos (1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RXFIFORES (Bit 1)

◆ UART3_FCR_RXTRIGLVL_Msk

#define UART3_FCR_RXTRIGLVL_Msk (0xc0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RXTRIGLVL (Bitfield-Mask: 0x03)

◆ UART3_FCR_RXTRIGLVL_Pos

#define UART3_FCR_RXTRIGLVL_Pos (6UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RXTRIGLVL (Bit 6)

◆ UART3_FCR_TXFIFORES_Msk

#define UART3_FCR_TXFIFORES_Msk (0x4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TXFIFORES (Bitfield-Mask: 0x01)

◆ UART3_FCR_TXFIFORES_Pos

#define UART3_FCR_TXFIFORES_Pos (2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TXFIFORES (Bit 2)

◆ UART3_FDR_DIVADDVAL_Msk

#define UART3_FDR_DIVADDVAL_Msk (0xfUL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DIVADDVAL (Bitfield-Mask: 0x0f)

◆ UART3_FDR_DIVADDVAL_Pos

#define UART3_FDR_DIVADDVAL_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DIVADDVAL (Bit 0)

◆ UART3_FDR_MULVAL_Msk

#define UART3_FDR_MULVAL_Msk (0xf0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

MULVAL (Bitfield-Mask: 0x0f)

◆ UART3_FDR_MULVAL_Pos

#define UART3_FDR_MULVAL_Pos (4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

MULVAL (Bit 4)

◆ UART3_IER_ABEOINTEN_Msk

#define UART3_IER_ABEOINTEN_Msk (0x100UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

ABEOINTEN (Bitfield-Mask: 0x01)

◆ UART3_IER_ABEOINTEN_Pos

#define UART3_IER_ABEOINTEN_Pos (8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

ABEOINTEN (Bit 8)

◆ UART3_IER_ABTOINTEN_Msk

#define UART3_IER_ABTOINTEN_Msk (0x200UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

ABTOINTEN (Bitfield-Mask: 0x01)

◆ UART3_IER_ABTOINTEN_Pos

#define UART3_IER_ABTOINTEN_Pos (9UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

ABTOINTEN (Bit 9)

◆ UART3_IER_RBRIE_Msk

#define UART3_IER_RBRIE_Msk (0x1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RBRIE (Bitfield-Mask: 0x01)

◆ UART3_IER_RBRIE_Pos

#define UART3_IER_RBRIE_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RBRIE (Bit 0)

◆ UART3_IER_RXIE_Msk

#define UART3_IER_RXIE_Msk (0x4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RXIE (Bitfield-Mask: 0x01)

◆ UART3_IER_RXIE_Pos

#define UART3_IER_RXIE_Pos (2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RXIE (Bit 2)

◆ UART3_IER_THREIE_Msk

#define UART3_IER_THREIE_Msk (0x2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

THREIE (Bitfield-Mask: 0x01)

◆ UART3_IER_THREIE_Pos

#define UART3_IER_THREIE_Pos (1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

THREIE (Bit 1)

◆ UART3_IIR_ABEOINT_Msk

#define UART3_IIR_ABEOINT_Msk (0x100UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

ABEOINT (Bitfield-Mask: 0x01)

◆ UART3_IIR_ABEOINT_Pos

#define UART3_IIR_ABEOINT_Pos (8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

ABEOINT (Bit 8)

◆ UART3_IIR_ABTOINT_Msk

#define UART3_IIR_ABTOINT_Msk (0x200UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

ABTOINT (Bitfield-Mask: 0x01)

◆ UART3_IIR_ABTOINT_Pos

#define UART3_IIR_ABTOINT_Pos (9UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

ABTOINT (Bit 9)

◆ UART3_IIR_FIFOENABLE_Msk

#define UART3_IIR_FIFOENABLE_Msk (0xc0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

FIFOENABLE (Bitfield-Mask: 0x03)

◆ UART3_IIR_FIFOENABLE_Pos

#define UART3_IIR_FIFOENABLE_Pos (6UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

FIFOENABLE (Bit 6)

◆ UART3_IIR_INTID_Msk

#define UART3_IIR_INTID_Msk (0xeUL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

INTID (Bitfield-Mask: 0x07)

◆ UART3_IIR_INTID_Pos

#define UART3_IIR_INTID_Pos (1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

INTID (Bit 1)

◆ UART3_IIR_INTSTATUS_Msk

#define UART3_IIR_INTSTATUS_Msk (0x1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

INTSTATUS (Bitfield-Mask: 0x01)

◆ UART3_IIR_INTSTATUS_Pos

#define UART3_IIR_INTSTATUS_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

INTSTATUS (Bit 0)

◆ UART3_LCR_BC_Msk

#define UART3_LCR_BC_Msk (0x40UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

BC (Bitfield-Mask: 0x01)

◆ UART3_LCR_BC_Pos

#define UART3_LCR_BC_Pos (6UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

BC (Bit 6)

◆ UART3_LCR_DLAB_Msk

#define UART3_LCR_DLAB_Msk (0x80UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DLAB (Bitfield-Mask: 0x01)

◆ UART3_LCR_DLAB_Pos

#define UART3_LCR_DLAB_Pos (7UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DLAB (Bit 7)

◆ UART3_LCR_PE_Msk

#define UART3_LCR_PE_Msk (0x8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PE (Bitfield-Mask: 0x01)

◆ UART3_LCR_PE_Pos

#define UART3_LCR_PE_Pos (3UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PE (Bit 3)

◆ UART3_LCR_PS_Msk

#define UART3_LCR_PS_Msk (0x30UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PS (Bitfield-Mask: 0x03)

◆ UART3_LCR_PS_Pos

#define UART3_LCR_PS_Pos (4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PS (Bit 4)

◆ UART3_LCR_SBS_Msk

#define UART3_LCR_SBS_Msk (0x4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

SBS (Bitfield-Mask: 0x01)

◆ UART3_LCR_SBS_Pos

#define UART3_LCR_SBS_Pos (2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

SBS (Bit 2)

◆ UART3_LCR_WLS_Msk

#define UART3_LCR_WLS_Msk (0x3UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

WLS (Bitfield-Mask: 0x03)

◆ UART3_LCR_WLS_Pos

#define UART3_LCR_WLS_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

WLS (Bit 0)

◆ UART3_LSR_BI_Msk

#define UART3_LSR_BI_Msk (0x10UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

BI (Bitfield-Mask: 0x01)

◆ UART3_LSR_BI_Pos

#define UART3_LSR_BI_Pos (4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

BI (Bit 4)

◆ UART3_LSR_FE_Msk

#define UART3_LSR_FE_Msk (0x8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

FE (Bitfield-Mask: 0x01)

◆ UART3_LSR_FE_Pos

#define UART3_LSR_FE_Pos (3UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

FE (Bit 3)

◆ UART3_LSR_OE_Msk

#define UART3_LSR_OE_Msk (0x2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

OE (Bitfield-Mask: 0x01)

◆ UART3_LSR_OE_Pos

#define UART3_LSR_OE_Pos (1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

OE (Bit 1)

◆ UART3_LSR_PE_Msk

#define UART3_LSR_PE_Msk (0x4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PE (Bitfield-Mask: 0x01)

◆ UART3_LSR_PE_Pos

#define UART3_LSR_PE_Pos (2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PE (Bit 2)

◆ UART3_LSR_RDR_Msk

#define UART3_LSR_RDR_Msk (0x1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RDR (Bitfield-Mask: 0x01)

◆ UART3_LSR_RDR_Pos

#define UART3_LSR_RDR_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RDR (Bit 0)

◆ UART3_LSR_RXFE_Msk

#define UART3_LSR_RXFE_Msk (0x80UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RXFE (Bitfield-Mask: 0x01)

◆ UART3_LSR_RXFE_Pos

#define UART3_LSR_RXFE_Pos (7UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RXFE (Bit 7)

◆ UART3_LSR_TEMT_Msk

#define UART3_LSR_TEMT_Msk (0x40UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TEMT (Bitfield-Mask: 0x01)

◆ UART3_LSR_TEMT_Pos

#define UART3_LSR_TEMT_Pos (6UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TEMT (Bit 6)

◆ UART3_LSR_THRE_Msk

#define UART3_LSR_THRE_Msk (0x20UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

THRE (Bitfield-Mask: 0x01)

◆ UART3_LSR_THRE_Pos

#define UART3_LSR_THRE_Pos (5UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

THRE (Bit 5)

◆ UART3_RBR_RBR_Msk

#define UART3_RBR_RBR_Msk (0xffUL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RBR (Bitfield-Mask: 0xff)

◆ UART3_RBR_RBR_Pos

#define UART3_RBR_RBR_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RBR (Bit 0)

◆ UART3_RS485ADRMATCH_ADRMATCH_Msk

#define UART3_RS485ADRMATCH_ADRMATCH_Msk (0xffUL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

ADRMATCH (Bitfield-Mask: 0xff)

◆ UART3_RS485ADRMATCH_ADRMATCH_Pos

#define UART3_RS485ADRMATCH_ADRMATCH_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

ADRMATCH (Bit 0)

◆ UART3_RS485CTRL_AADEN_Msk

#define UART3_RS485CTRL_AADEN_Msk (0x4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

AADEN (Bitfield-Mask: 0x01)

◆ UART3_RS485CTRL_AADEN_Pos

#define UART3_RS485CTRL_AADEN_Pos (2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

AADEN (Bit 2)

◆ UART3_RS485CTRL_DCTRL_Msk

#define UART3_RS485CTRL_DCTRL_Msk (0x10UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DCTRL (Bitfield-Mask: 0x01)

◆ UART3_RS485CTRL_DCTRL_Pos

#define UART3_RS485CTRL_DCTRL_Pos (4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DCTRL (Bit 4)

◆ UART3_RS485CTRL_NMMEN_Msk

#define UART3_RS485CTRL_NMMEN_Msk (0x1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

NMMEN (Bitfield-Mask: 0x01)

◆ UART3_RS485CTRL_NMMEN_Pos

#define UART3_RS485CTRL_NMMEN_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

NMMEN (Bit 0)

◆ UART3_RS485CTRL_OINV_Msk

#define UART3_RS485CTRL_OINV_Msk (0x20UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

OINV (Bitfield-Mask: 0x01)

◆ UART3_RS485CTRL_OINV_Pos

#define UART3_RS485CTRL_OINV_Pos (5UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

OINV (Bit 5)

◆ UART3_RS485CTRL_RXDIS_Msk

#define UART3_RS485CTRL_RXDIS_Msk (0x2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RXDIS (Bitfield-Mask: 0x01)

◆ UART3_RS485CTRL_RXDIS_Pos

#define UART3_RS485CTRL_RXDIS_Pos (1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RXDIS (Bit 1)

◆ UART3_RS485DLY_DLY_Msk

#define UART3_RS485DLY_DLY_Msk (0xffUL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DLY (Bitfield-Mask: 0xff)

◆ UART3_RS485DLY_DLY_Pos

#define UART3_RS485DLY_DLY_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DLY (Bit 0)

◆ UART3_SCR_PAD_Msk

#define UART3_SCR_PAD_Msk (0xffUL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PAD (Bitfield-Mask: 0xff)

◆ UART3_SCR_PAD_Pos

#define UART3_SCR_PAD_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PAD (Bit 0)

◆ UART3_TER_TXEN_Msk

#define UART3_TER_TXEN_Msk (0x80UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TXEN (Bitfield-Mask: 0x01)

◆ UART3_TER_TXEN_Pos

#define UART3_TER_TXEN_Pos (7UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TXEN (Bit 7)

◆ UART3_THR_THR_Msk

#define UART3_THR_THR_Msk (0xffUL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

THR (Bitfield-Mask: 0xff)

◆ UART3_THR_THR_Pos

#define UART3_THR_THR_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

THR (Bit 0)

◆ USB_CMDCODE_CMD_CODE_WDATA_Msk

#define USB_CMDCODE_CMD_CODE_WDATA_Msk (0xff0000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CMD_CODE_WDATA (Bitfield-Mask: 0xff)

◆ USB_CMDCODE_CMD_CODE_WDATA_Pos

#define USB_CMDCODE_CMD_CODE_WDATA_Pos (16UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CMD_CODE_WDATA (Bit 16)

◆ USB_CMDCODE_CMD_PHASE_Msk

#define USB_CMDCODE_CMD_PHASE_Msk (0xff00UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CMD_PHASE (Bitfield-Mask: 0xff)

◆ USB_CMDCODE_CMD_PHASE_Pos

#define USB_CMDCODE_CMD_PHASE_Pos (8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CMD_PHASE (Bit 8)

◆ USB_CMDDATA_CMD_RDATA_Msk

#define USB_CMDDATA_CMD_RDATA_Msk (0xffUL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CMD_RDATA (Bitfield-Mask: 0xff)

◆ USB_CMDDATA_CMD_RDATA_Pos

#define USB_CMDDATA_CMD_RDATA_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CMD_RDATA (Bit 0)

◆ USB_CTRL_LOG_ENDPOINT_Msk

#define USB_CTRL_LOG_ENDPOINT_Msk (0x3cUL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

LOG_ENDPOINT (Bitfield-Mask: 0x0f)

◆ USB_CTRL_LOG_ENDPOINT_Pos

#define USB_CTRL_LOG_ENDPOINT_Pos (2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

LOG_ENDPOINT (Bit 2)

◆ USB_CTRL_RD_EN_Msk

#define USB_CTRL_RD_EN_Msk (0x1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RD_EN (Bitfield-Mask: 0x01)

◆ USB_CTRL_RD_EN_Pos

#define USB_CTRL_RD_EN_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RD_EN (Bit 0)

◆ USB_CTRL_WR_EN_Msk

#define USB_CTRL_WR_EN_Msk (0x2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

WR_EN (Bitfield-Mask: 0x01)

◆ USB_CTRL_WR_EN_Pos

#define USB_CTRL_WR_EN_Pos (1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

WR_EN (Bit 1)

◆ USB_DEVINTCLR_CCEMPTYCLR_Msk

#define USB_DEVINTCLR_CCEMPTYCLR_Msk (0x10UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CCEMPTYCLR (Bitfield-Mask: 0x01)

◆ USB_DEVINTCLR_CCEMPTYCLR_Pos

#define USB_DEVINTCLR_CCEMPTYCLR_Pos (4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CCEMPTYCLR (Bit 4)

◆ USB_DEVINTCLR_CDFULLCLR_Msk

#define USB_DEVINTCLR_CDFULLCLR_Msk (0x20UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CDFULLCLR (Bitfield-Mask: 0x01)

◆ USB_DEVINTCLR_CDFULLCLR_Pos

#define USB_DEVINTCLR_CDFULLCLR_Pos (5UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CDFULLCLR (Bit 5)

◆ USB_DEVINTCLR_DEV_STATCLR_Msk

#define USB_DEVINTCLR_DEV_STATCLR_Msk (0x8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DEV_STATCLR (Bitfield-Mask: 0x01)

◆ USB_DEVINTCLR_DEV_STATCLR_Pos

#define USB_DEVINTCLR_DEV_STATCLR_Pos (3UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DEV_STATCLR (Bit 3)

◆ USB_DEVINTCLR_EP_FASTCLR_Msk

#define USB_DEVINTCLR_EP_FASTCLR_Msk (0x2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EP_FASTCLR (Bitfield-Mask: 0x01)

◆ USB_DEVINTCLR_EP_FASTCLR_Pos

#define USB_DEVINTCLR_EP_FASTCLR_Pos (1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EP_FASTCLR (Bit 1)

◆ USB_DEVINTCLR_EP_RLZEDCLR_Msk

#define USB_DEVINTCLR_EP_RLZEDCLR_Msk (0x100UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EP_RLZEDCLR (Bitfield-Mask: 0x01)

◆ USB_DEVINTCLR_EP_RLZEDCLR_Pos

#define USB_DEVINTCLR_EP_RLZEDCLR_Pos (8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EP_RLZEDCLR (Bit 8)

◆ USB_DEVINTCLR_EP_SLOWCLR_Msk

#define USB_DEVINTCLR_EP_SLOWCLR_Msk (0x4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EP_SLOWCLR (Bitfield-Mask: 0x01)

◆ USB_DEVINTCLR_EP_SLOWCLR_Pos

#define USB_DEVINTCLR_EP_SLOWCLR_Pos (2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EP_SLOWCLR (Bit 2)

◆ USB_DEVINTCLR_ERR_INTCLR_Msk

#define USB_DEVINTCLR_ERR_INTCLR_Msk (0x200UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

ERR_INTCLR (Bitfield-Mask: 0x01)

◆ USB_DEVINTCLR_ERR_INTCLR_Pos

#define USB_DEVINTCLR_ERR_INTCLR_Pos (9UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

ERR_INTCLR (Bit 9)

◆ USB_DEVINTCLR_FRAMECLR_Msk

#define USB_DEVINTCLR_FRAMECLR_Msk (0x1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

FRAMECLR (Bitfield-Mask: 0x01)

◆ USB_DEVINTCLR_FRAMECLR_Pos

#define USB_DEVINTCLR_FRAMECLR_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

FRAMECLR (Bit 0)

◆ USB_DEVINTCLR_RxENDPKTCLR_Msk

#define USB_DEVINTCLR_RxENDPKTCLR_Msk (0x40UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RxENDPKTCLR (Bitfield-Mask: 0x01)

◆ USB_DEVINTCLR_RxENDPKTCLR_Pos

#define USB_DEVINTCLR_RxENDPKTCLR_Pos (6UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RxENDPKTCLR (Bit 6)

◆ USB_DEVINTCLR_TxENDPKTCLR_Msk

#define USB_DEVINTCLR_TxENDPKTCLR_Msk (0x80UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TxENDPKTCLR (Bitfield-Mask: 0x01)

◆ USB_DEVINTCLR_TxENDPKTCLR_Pos

#define USB_DEVINTCLR_TxENDPKTCLR_Pos (7UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TxENDPKTCLR (Bit 7)

◆ USB_DEVINTEN_CCEMPTYEN_Msk

#define USB_DEVINTEN_CCEMPTYEN_Msk (0x10UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CCEMPTYEN (Bitfield-Mask: 0x01)

◆ USB_DEVINTEN_CCEMPTYEN_Pos

#define USB_DEVINTEN_CCEMPTYEN_Pos (4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CCEMPTYEN (Bit 4)

◆ USB_DEVINTEN_CDFULLEN_Msk

#define USB_DEVINTEN_CDFULLEN_Msk (0x20UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CDFULLEN (Bitfield-Mask: 0x01)

◆ USB_DEVINTEN_CDFULLEN_Pos

#define USB_DEVINTEN_CDFULLEN_Pos (5UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CDFULLEN (Bit 5)

◆ USB_DEVINTEN_DEV_STATEN_Msk

#define USB_DEVINTEN_DEV_STATEN_Msk (0x8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DEV_STATEN (Bitfield-Mask: 0x01)

◆ USB_DEVINTEN_DEV_STATEN_Pos

#define USB_DEVINTEN_DEV_STATEN_Pos (3UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DEV_STATEN (Bit 3)

◆ USB_DEVINTEN_EP_FASTEN_Msk

#define USB_DEVINTEN_EP_FASTEN_Msk (0x2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EP_FASTEN (Bitfield-Mask: 0x01)

◆ USB_DEVINTEN_EP_FASTEN_Pos

#define USB_DEVINTEN_EP_FASTEN_Pos (1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EP_FASTEN (Bit 1)

◆ USB_DEVINTEN_EP_RLZEDEN_Msk

#define USB_DEVINTEN_EP_RLZEDEN_Msk (0x100UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EP_RLZEDEN (Bitfield-Mask: 0x01)

◆ USB_DEVINTEN_EP_RLZEDEN_Pos

#define USB_DEVINTEN_EP_RLZEDEN_Pos (8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EP_RLZEDEN (Bit 8)

◆ USB_DEVINTEN_EP_SLOWEN_Msk

#define USB_DEVINTEN_EP_SLOWEN_Msk (0x4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EP_SLOWEN (Bitfield-Mask: 0x01)

◆ USB_DEVINTEN_EP_SLOWEN_Pos

#define USB_DEVINTEN_EP_SLOWEN_Pos (2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EP_SLOWEN (Bit 2)

◆ USB_DEVINTEN_ERR_INTEN_Msk

#define USB_DEVINTEN_ERR_INTEN_Msk (0x200UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

ERR_INTEN (Bitfield-Mask: 0x01)

◆ USB_DEVINTEN_ERR_INTEN_Pos

#define USB_DEVINTEN_ERR_INTEN_Pos (9UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

ERR_INTEN (Bit 9)

◆ USB_DEVINTEN_FRAMEEN_Msk

#define USB_DEVINTEN_FRAMEEN_Msk (0x1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

FRAMEEN (Bitfield-Mask: 0x01)

◆ USB_DEVINTEN_FRAMEEN_Pos

#define USB_DEVINTEN_FRAMEEN_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

FRAMEEN (Bit 0)

◆ USB_DEVINTEN_RxENDPKTEN_Msk

#define USB_DEVINTEN_RxENDPKTEN_Msk (0x40UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RxENDPKTEN (Bitfield-Mask: 0x01)

◆ USB_DEVINTEN_RxENDPKTEN_Pos

#define USB_DEVINTEN_RxENDPKTEN_Pos (6UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RxENDPKTEN (Bit 6)

◆ USB_DEVINTEN_TxENDPKTEN_Msk

#define USB_DEVINTEN_TxENDPKTEN_Msk (0x80UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TxENDPKTEN (Bitfield-Mask: 0x01)

◆ USB_DEVINTEN_TxENDPKTEN_Pos

#define USB_DEVINTEN_TxENDPKTEN_Pos (7UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TxENDPKTEN (Bit 7)

◆ USB_DEVINTPRI_EP_FAST_Msk

#define USB_DEVINTPRI_EP_FAST_Msk (0x2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EP_FAST (Bitfield-Mask: 0x01)

◆ USB_DEVINTPRI_EP_FAST_Pos

#define USB_DEVINTPRI_EP_FAST_Pos (1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EP_FAST (Bit 1)

◆ USB_DEVINTPRI_FRAME_Msk

#define USB_DEVINTPRI_FRAME_Msk (0x1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

FRAME (Bitfield-Mask: 0x01)

◆ USB_DEVINTPRI_FRAME_Pos

#define USB_DEVINTPRI_FRAME_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

FRAME (Bit 0)

◆ USB_DEVINTSET_CCEMPTYSET_Msk

#define USB_DEVINTSET_CCEMPTYSET_Msk (0x10UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CCEMPTYSET (Bitfield-Mask: 0x01)

◆ USB_DEVINTSET_CCEMPTYSET_Pos

#define USB_DEVINTSET_CCEMPTYSET_Pos (4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CCEMPTYSET (Bit 4)

◆ USB_DEVINTSET_CDFULLSET_Msk

#define USB_DEVINTSET_CDFULLSET_Msk (0x20UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CDFULLSET (Bitfield-Mask: 0x01)

◆ USB_DEVINTSET_CDFULLSET_Pos

#define USB_DEVINTSET_CDFULLSET_Pos (5UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CDFULLSET (Bit 5)

◆ USB_DEVINTSET_DEV_STATSET_Msk

#define USB_DEVINTSET_DEV_STATSET_Msk (0x8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DEV_STATSET (Bitfield-Mask: 0x01)

◆ USB_DEVINTSET_DEV_STATSET_Pos

#define USB_DEVINTSET_DEV_STATSET_Pos (3UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DEV_STATSET (Bit 3)

◆ USB_DEVINTSET_EP_FASTSET_Msk

#define USB_DEVINTSET_EP_FASTSET_Msk (0x2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EP_FASTSET (Bitfield-Mask: 0x01)

◆ USB_DEVINTSET_EP_FASTSET_Pos

#define USB_DEVINTSET_EP_FASTSET_Pos (1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EP_FASTSET (Bit 1)

◆ USB_DEVINTSET_EP_RLZEDSET_Msk

#define USB_DEVINTSET_EP_RLZEDSET_Msk (0x100UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EP_RLZEDSET (Bitfield-Mask: 0x01)

◆ USB_DEVINTSET_EP_RLZEDSET_Pos

#define USB_DEVINTSET_EP_RLZEDSET_Pos (8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EP_RLZEDSET (Bit 8)

◆ USB_DEVINTSET_EP_SLOWSET_Msk

#define USB_DEVINTSET_EP_SLOWSET_Msk (0x4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EP_SLOWSET (Bitfield-Mask: 0x01)

◆ USB_DEVINTSET_EP_SLOWSET_Pos

#define USB_DEVINTSET_EP_SLOWSET_Pos (2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EP_SLOWSET (Bit 2)

◆ USB_DEVINTSET_ERR_INTSET_Msk

#define USB_DEVINTSET_ERR_INTSET_Msk (0x200UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

ERR_INTSET (Bitfield-Mask: 0x01)

◆ USB_DEVINTSET_ERR_INTSET_Pos

#define USB_DEVINTSET_ERR_INTSET_Pos (9UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

ERR_INTSET (Bit 9)

◆ USB_DEVINTSET_FRAMESET_Msk

#define USB_DEVINTSET_FRAMESET_Msk (0x1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

FRAMESET (Bitfield-Mask: 0x01)

◆ USB_DEVINTSET_FRAMESET_Pos

#define USB_DEVINTSET_FRAMESET_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

FRAMESET (Bit 0)

◆ USB_DEVINTSET_RxENDPKTSET_Msk

#define USB_DEVINTSET_RxENDPKTSET_Msk (0x40UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RxENDPKTSET (Bitfield-Mask: 0x01)

◆ USB_DEVINTSET_RxENDPKTSET_Pos

#define USB_DEVINTSET_RxENDPKTSET_Pos (6UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RxENDPKTSET (Bit 6)

◆ USB_DEVINTSET_TxENDPKTSET_Msk

#define USB_DEVINTSET_TxENDPKTSET_Msk (0x80UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TxENDPKTSET (Bitfield-Mask: 0x01)

◆ USB_DEVINTSET_TxENDPKTSET_Pos

#define USB_DEVINTSET_TxENDPKTSET_Pos (7UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TxENDPKTSET (Bit 7)

◆ USB_DEVINTST_CCEMPTY_Msk

#define USB_DEVINTST_CCEMPTY_Msk (0x10UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CCEMPTY (Bitfield-Mask: 0x01)

◆ USB_DEVINTST_CCEMPTY_Pos

#define USB_DEVINTST_CCEMPTY_Pos (4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CCEMPTY (Bit 4)

◆ USB_DEVINTST_CDFULL_Msk

#define USB_DEVINTST_CDFULL_Msk (0x20UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CDFULL (Bitfield-Mask: 0x01)

◆ USB_DEVINTST_CDFULL_Pos

#define USB_DEVINTST_CDFULL_Pos (5UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CDFULL (Bit 5)

◆ USB_DEVINTST_DEV_STAT_Msk

#define USB_DEVINTST_DEV_STAT_Msk (0x8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DEV_STAT (Bitfield-Mask: 0x01)

◆ USB_DEVINTST_DEV_STAT_Pos

#define USB_DEVINTST_DEV_STAT_Pos (3UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DEV_STAT (Bit 3)

◆ USB_DEVINTST_EP_FAST_Msk

#define USB_DEVINTST_EP_FAST_Msk (0x2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EP_FAST (Bitfield-Mask: 0x01)

◆ USB_DEVINTST_EP_FAST_Pos

#define USB_DEVINTST_EP_FAST_Pos (1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EP_FAST (Bit 1)

◆ USB_DEVINTST_EP_RLZED_Msk

#define USB_DEVINTST_EP_RLZED_Msk (0x100UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EP_RLZED (Bitfield-Mask: 0x01)

◆ USB_DEVINTST_EP_RLZED_Pos

#define USB_DEVINTST_EP_RLZED_Pos (8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EP_RLZED (Bit 8)

◆ USB_DEVINTST_EP_SLOW_Msk

#define USB_DEVINTST_EP_SLOW_Msk (0x4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EP_SLOW (Bitfield-Mask: 0x01)

◆ USB_DEVINTST_EP_SLOW_Pos

#define USB_DEVINTST_EP_SLOW_Pos (2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EP_SLOW (Bit 2)

◆ USB_DEVINTST_ERR_INT_Msk

#define USB_DEVINTST_ERR_INT_Msk (0x200UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

ERR_INT (Bitfield-Mask: 0x01)

◆ USB_DEVINTST_ERR_INT_Pos

#define USB_DEVINTST_ERR_INT_Pos (9UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

ERR_INT (Bit 9)

◆ USB_DEVINTST_FRAME_Msk

#define USB_DEVINTST_FRAME_Msk (0x1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

FRAME (Bitfield-Mask: 0x01)

◆ USB_DEVINTST_FRAME_Pos

#define USB_DEVINTST_FRAME_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

FRAME (Bit 0)

◆ USB_DEVINTST_RxENDPKT_Msk

#define USB_DEVINTST_RxENDPKT_Msk (0x40UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RxENDPKT (Bitfield-Mask: 0x01)

◆ USB_DEVINTST_RxENDPKT_Pos

#define USB_DEVINTST_RxENDPKT_Pos (6UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RxENDPKT (Bit 6)

◆ USB_DEVINTST_TxENDPKT_Msk

#define USB_DEVINTST_TxENDPKT_Msk (0x80UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TxENDPKT (Bitfield-Mask: 0x01)

◆ USB_DEVINTST_TxENDPKT_Pos

#define USB_DEVINTST_TxENDPKT_Pos (7UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TxENDPKT (Bit 7)

◆ USB_DMAINTEN_EOT_Msk

#define USB_DMAINTEN_EOT_Msk (0x1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EOT (Bitfield-Mask: 0x01)

◆ USB_DMAINTEN_EOT_Pos

#define USB_DMAINTEN_EOT_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EOT (Bit 0)

◆ USB_DMAINTEN_ERR_Msk

#define USB_DMAINTEN_ERR_Msk (0x4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

ERR (Bitfield-Mask: 0x01)

◆ USB_DMAINTEN_ERR_Pos

#define USB_DMAINTEN_ERR_Pos (2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

ERR (Bit 2)

◆ USB_DMAINTEN_NDDR_Msk

#define USB_DMAINTEN_NDDR_Msk (0x2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

NDDR (Bitfield-Mask: 0x01)

◆ USB_DMAINTEN_NDDR_Pos

#define USB_DMAINTEN_NDDR_Pos (1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

NDDR (Bit 1)

◆ USB_DMAINTST_EOT_Msk

#define USB_DMAINTST_EOT_Msk (0x1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EOT (Bitfield-Mask: 0x01)

◆ USB_DMAINTST_EOT_Pos

#define USB_DMAINTST_EOT_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EOT (Bit 0)

◆ USB_DMAINTST_ERR_Msk

#define USB_DMAINTST_ERR_Msk (0x4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

ERR (Bitfield-Mask: 0x01)

◆ USB_DMAINTST_ERR_Pos

#define USB_DMAINTST_ERR_Pos (2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

ERR (Bit 2)

◆ USB_DMAINTST_NDDR_Msk

#define USB_DMAINTST_NDDR_Msk (0x2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

NDDR (Bitfield-Mask: 0x01)

◆ USB_DMAINTST_NDDR_Pos

#define USB_DMAINTST_NDDR_Pos (1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

NDDR (Bit 1)

◆ USB_DMARCLR_EPRCLR0_Msk

#define USB_DMARCLR_EPRCLR0_Msk (0x1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPRCLR0 (Bitfield-Mask: 0x01)

◆ USB_DMARCLR_EPRCLR0_Pos

#define USB_DMARCLR_EPRCLR0_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPRCLR0 (Bit 0)

◆ USB_DMARCLR_EPRCLR10_Msk

#define USB_DMARCLR_EPRCLR10_Msk (0x400UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPRCLR10 (Bitfield-Mask: 0x01)

◆ USB_DMARCLR_EPRCLR10_Pos

#define USB_DMARCLR_EPRCLR10_Pos (10UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPRCLR10 (Bit 10)

◆ USB_DMARCLR_EPRCLR11_Msk

#define USB_DMARCLR_EPRCLR11_Msk (0x800UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPRCLR11 (Bitfield-Mask: 0x01)

◆ USB_DMARCLR_EPRCLR11_Pos

#define USB_DMARCLR_EPRCLR11_Pos (11UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPRCLR11 (Bit 11)

◆ USB_DMARCLR_EPRCLR12_Msk

#define USB_DMARCLR_EPRCLR12_Msk (0x1000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPRCLR12 (Bitfield-Mask: 0x01)

◆ USB_DMARCLR_EPRCLR12_Pos

#define USB_DMARCLR_EPRCLR12_Pos (12UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPRCLR12 (Bit 12)

◆ USB_DMARCLR_EPRCLR13_Msk

#define USB_DMARCLR_EPRCLR13_Msk (0x2000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPRCLR13 (Bitfield-Mask: 0x01)

◆ USB_DMARCLR_EPRCLR13_Pos

#define USB_DMARCLR_EPRCLR13_Pos (13UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPRCLR13 (Bit 13)

◆ USB_DMARCLR_EPRCLR14_Msk

#define USB_DMARCLR_EPRCLR14_Msk (0x4000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPRCLR14 (Bitfield-Mask: 0x01)

◆ USB_DMARCLR_EPRCLR14_Pos

#define USB_DMARCLR_EPRCLR14_Pos (14UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPRCLR14 (Bit 14)

◆ USB_DMARCLR_EPRCLR15_Msk

#define USB_DMARCLR_EPRCLR15_Msk (0x8000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPRCLR15 (Bitfield-Mask: 0x01)

◆ USB_DMARCLR_EPRCLR15_Pos

#define USB_DMARCLR_EPRCLR15_Pos (15UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPRCLR15 (Bit 15)

◆ USB_DMARCLR_EPRCLR16_Msk

#define USB_DMARCLR_EPRCLR16_Msk (0x10000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPRCLR16 (Bitfield-Mask: 0x01)

◆ USB_DMARCLR_EPRCLR16_Pos

#define USB_DMARCLR_EPRCLR16_Pos (16UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPRCLR16 (Bit 16)

◆ USB_DMARCLR_EPRCLR17_Msk

#define USB_DMARCLR_EPRCLR17_Msk (0x20000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPRCLR17 (Bitfield-Mask: 0x01)

◆ USB_DMARCLR_EPRCLR17_Pos

#define USB_DMARCLR_EPRCLR17_Pos (17UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPRCLR17 (Bit 17)

◆ USB_DMARCLR_EPRCLR18_Msk

#define USB_DMARCLR_EPRCLR18_Msk (0x40000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPRCLR18 (Bitfield-Mask: 0x01)

◆ USB_DMARCLR_EPRCLR18_Pos

#define USB_DMARCLR_EPRCLR18_Pos (18UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPRCLR18 (Bit 18)

◆ USB_DMARCLR_EPRCLR19_Msk

#define USB_DMARCLR_EPRCLR19_Msk (0x80000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPRCLR19 (Bitfield-Mask: 0x01)

◆ USB_DMARCLR_EPRCLR19_Pos

#define USB_DMARCLR_EPRCLR19_Pos (19UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPRCLR19 (Bit 19)

◆ USB_DMARCLR_EPRCLR1_Msk

#define USB_DMARCLR_EPRCLR1_Msk (0x2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPRCLR1 (Bitfield-Mask: 0x01)

◆ USB_DMARCLR_EPRCLR1_Pos

#define USB_DMARCLR_EPRCLR1_Pos (1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPRCLR1 (Bit 1)

◆ USB_DMARCLR_EPRCLR20_Msk

#define USB_DMARCLR_EPRCLR20_Msk (0x100000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPRCLR20 (Bitfield-Mask: 0x01)

◆ USB_DMARCLR_EPRCLR20_Pos

#define USB_DMARCLR_EPRCLR20_Pos (20UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPRCLR20 (Bit 20)

◆ USB_DMARCLR_EPRCLR21_Msk

#define USB_DMARCLR_EPRCLR21_Msk (0x200000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPRCLR21 (Bitfield-Mask: 0x01)

◆ USB_DMARCLR_EPRCLR21_Pos

#define USB_DMARCLR_EPRCLR21_Pos (21UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPRCLR21 (Bit 21)

◆ USB_DMARCLR_EPRCLR22_Msk

#define USB_DMARCLR_EPRCLR22_Msk (0x400000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPRCLR22 (Bitfield-Mask: 0x01)

◆ USB_DMARCLR_EPRCLR22_Pos

#define USB_DMARCLR_EPRCLR22_Pos (22UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPRCLR22 (Bit 22)

◆ USB_DMARCLR_EPRCLR23_Msk

#define USB_DMARCLR_EPRCLR23_Msk (0x800000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPRCLR23 (Bitfield-Mask: 0x01)

◆ USB_DMARCLR_EPRCLR23_Pos

#define USB_DMARCLR_EPRCLR23_Pos (23UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPRCLR23 (Bit 23)

◆ USB_DMARCLR_EPRCLR24_Msk

#define USB_DMARCLR_EPRCLR24_Msk (0x1000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPRCLR24 (Bitfield-Mask: 0x01)

◆ USB_DMARCLR_EPRCLR24_Pos

#define USB_DMARCLR_EPRCLR24_Pos (24UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPRCLR24 (Bit 24)

◆ USB_DMARCLR_EPRCLR25_Msk

#define USB_DMARCLR_EPRCLR25_Msk (0x2000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPRCLR25 (Bitfield-Mask: 0x01)

◆ USB_DMARCLR_EPRCLR25_Pos

#define USB_DMARCLR_EPRCLR25_Pos (25UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPRCLR25 (Bit 25)

◆ USB_DMARCLR_EPRCLR26_Msk

#define USB_DMARCLR_EPRCLR26_Msk (0x4000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPRCLR26 (Bitfield-Mask: 0x01)

◆ USB_DMARCLR_EPRCLR26_Pos

#define USB_DMARCLR_EPRCLR26_Pos (26UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPRCLR26 (Bit 26)

◆ USB_DMARCLR_EPRCLR27_Msk

#define USB_DMARCLR_EPRCLR27_Msk (0x8000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPRCLR27 (Bitfield-Mask: 0x01)

◆ USB_DMARCLR_EPRCLR27_Pos

#define USB_DMARCLR_EPRCLR27_Pos (27UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPRCLR27 (Bit 27)

◆ USB_DMARCLR_EPRCLR28_Msk

#define USB_DMARCLR_EPRCLR28_Msk (0x10000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPRCLR28 (Bitfield-Mask: 0x01)

◆ USB_DMARCLR_EPRCLR28_Pos

#define USB_DMARCLR_EPRCLR28_Pos (28UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPRCLR28 (Bit 28)

◆ USB_DMARCLR_EPRCLR29_Msk

#define USB_DMARCLR_EPRCLR29_Msk (0x20000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPRCLR29 (Bitfield-Mask: 0x01)

◆ USB_DMARCLR_EPRCLR29_Pos

#define USB_DMARCLR_EPRCLR29_Pos (29UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPRCLR29 (Bit 29)

◆ USB_DMARCLR_EPRCLR2_Msk

#define USB_DMARCLR_EPRCLR2_Msk (0x4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPRCLR2 (Bitfield-Mask: 0x01)

◆ USB_DMARCLR_EPRCLR2_Pos

#define USB_DMARCLR_EPRCLR2_Pos (2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPRCLR2 (Bit 2)

◆ USB_DMARCLR_EPRCLR30_Msk

#define USB_DMARCLR_EPRCLR30_Msk (0x40000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPRCLR30 (Bitfield-Mask: 0x01)

◆ USB_DMARCLR_EPRCLR30_Pos

#define USB_DMARCLR_EPRCLR30_Pos (30UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPRCLR30 (Bit 30)

◆ USB_DMARCLR_EPRCLR31_Msk

#define USB_DMARCLR_EPRCLR31_Msk (0x80000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPRCLR31 (Bitfield-Mask: 0x01)

◆ USB_DMARCLR_EPRCLR31_Pos

#define USB_DMARCLR_EPRCLR31_Pos (31UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPRCLR31 (Bit 31)

◆ USB_DMARCLR_EPRCLR3_Msk

#define USB_DMARCLR_EPRCLR3_Msk (0x8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPRCLR3 (Bitfield-Mask: 0x01)

◆ USB_DMARCLR_EPRCLR3_Pos

#define USB_DMARCLR_EPRCLR3_Pos (3UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPRCLR3 (Bit 3)

◆ USB_DMARCLR_EPRCLR4_Msk

#define USB_DMARCLR_EPRCLR4_Msk (0x10UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPRCLR4 (Bitfield-Mask: 0x01)

◆ USB_DMARCLR_EPRCLR4_Pos

#define USB_DMARCLR_EPRCLR4_Pos (4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPRCLR4 (Bit 4)

◆ USB_DMARCLR_EPRCLR5_Msk

#define USB_DMARCLR_EPRCLR5_Msk (0x20UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPRCLR5 (Bitfield-Mask: 0x01)

◆ USB_DMARCLR_EPRCLR5_Pos

#define USB_DMARCLR_EPRCLR5_Pos (5UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPRCLR5 (Bit 5)

◆ USB_DMARCLR_EPRCLR6_Msk

#define USB_DMARCLR_EPRCLR6_Msk (0x40UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPRCLR6 (Bitfield-Mask: 0x01)

◆ USB_DMARCLR_EPRCLR6_Pos

#define USB_DMARCLR_EPRCLR6_Pos (6UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPRCLR6 (Bit 6)

◆ USB_DMARCLR_EPRCLR7_Msk

#define USB_DMARCLR_EPRCLR7_Msk (0x80UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPRCLR7 (Bitfield-Mask: 0x01)

◆ USB_DMARCLR_EPRCLR7_Pos

#define USB_DMARCLR_EPRCLR7_Pos (7UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPRCLR7 (Bit 7)

◆ USB_DMARCLR_EPRCLR8_Msk

#define USB_DMARCLR_EPRCLR8_Msk (0x100UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPRCLR8 (Bitfield-Mask: 0x01)

◆ USB_DMARCLR_EPRCLR8_Pos

#define USB_DMARCLR_EPRCLR8_Pos (8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPRCLR8 (Bit 8)

◆ USB_DMARCLR_EPRCLR9_Msk

#define USB_DMARCLR_EPRCLR9_Msk (0x200UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPRCLR9 (Bitfield-Mask: 0x01)

◆ USB_DMARCLR_EPRCLR9_Pos

#define USB_DMARCLR_EPRCLR9_Pos (9UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPRCLR9 (Bit 9)

◆ USB_DMARSET_EPRSET0_Msk

#define USB_DMARSET_EPRSET0_Msk (0x1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPRSET0 (Bitfield-Mask: 0x01)

◆ USB_DMARSET_EPRSET0_Pos

#define USB_DMARSET_EPRSET0_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPRSET0 (Bit 0)

◆ USB_DMARSET_EPRSET10_Msk

#define USB_DMARSET_EPRSET10_Msk (0x400UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPRSET10 (Bitfield-Mask: 0x01)

◆ USB_DMARSET_EPRSET10_Pos

#define USB_DMARSET_EPRSET10_Pos (10UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPRSET10 (Bit 10)

◆ USB_DMARSET_EPRSET11_Msk

#define USB_DMARSET_EPRSET11_Msk (0x800UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPRSET11 (Bitfield-Mask: 0x01)

◆ USB_DMARSET_EPRSET11_Pos

#define USB_DMARSET_EPRSET11_Pos (11UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPRSET11 (Bit 11)

◆ USB_DMARSET_EPRSET12_Msk

#define USB_DMARSET_EPRSET12_Msk (0x1000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPRSET12 (Bitfield-Mask: 0x01)

◆ USB_DMARSET_EPRSET12_Pos

#define USB_DMARSET_EPRSET12_Pos (12UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPRSET12 (Bit 12)

◆ USB_DMARSET_EPRSET13_Msk

#define USB_DMARSET_EPRSET13_Msk (0x2000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPRSET13 (Bitfield-Mask: 0x01)

◆ USB_DMARSET_EPRSET13_Pos

#define USB_DMARSET_EPRSET13_Pos (13UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPRSET13 (Bit 13)

◆ USB_DMARSET_EPRSET14_Msk

#define USB_DMARSET_EPRSET14_Msk (0x4000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPRSET14 (Bitfield-Mask: 0x01)

◆ USB_DMARSET_EPRSET14_Pos

#define USB_DMARSET_EPRSET14_Pos (14UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPRSET14 (Bit 14)

◆ USB_DMARSET_EPRSET15_Msk

#define USB_DMARSET_EPRSET15_Msk (0x8000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPRSET15 (Bitfield-Mask: 0x01)

◆ USB_DMARSET_EPRSET15_Pos

#define USB_DMARSET_EPRSET15_Pos (15UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPRSET15 (Bit 15)

◆ USB_DMARSET_EPRSET16_Msk

#define USB_DMARSET_EPRSET16_Msk (0x10000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPRSET16 (Bitfield-Mask: 0x01)

◆ USB_DMARSET_EPRSET16_Pos

#define USB_DMARSET_EPRSET16_Pos (16UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPRSET16 (Bit 16)

◆ USB_DMARSET_EPRSET17_Msk

#define USB_DMARSET_EPRSET17_Msk (0x20000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPRSET17 (Bitfield-Mask: 0x01)

◆ USB_DMARSET_EPRSET17_Pos

#define USB_DMARSET_EPRSET17_Pos (17UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPRSET17 (Bit 17)

◆ USB_DMARSET_EPRSET18_Msk

#define USB_DMARSET_EPRSET18_Msk (0x40000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPRSET18 (Bitfield-Mask: 0x01)

◆ USB_DMARSET_EPRSET18_Pos

#define USB_DMARSET_EPRSET18_Pos (18UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPRSET18 (Bit 18)

◆ USB_DMARSET_EPRSET19_Msk

#define USB_DMARSET_EPRSET19_Msk (0x80000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPRSET19 (Bitfield-Mask: 0x01)

◆ USB_DMARSET_EPRSET19_Pos

#define USB_DMARSET_EPRSET19_Pos (19UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPRSET19 (Bit 19)

◆ USB_DMARSET_EPRSET1_Msk

#define USB_DMARSET_EPRSET1_Msk (0x2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPRSET1 (Bitfield-Mask: 0x01)

◆ USB_DMARSET_EPRSET1_Pos

#define USB_DMARSET_EPRSET1_Pos (1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPRSET1 (Bit 1)

◆ USB_DMARSET_EPRSET20_Msk

#define USB_DMARSET_EPRSET20_Msk (0x100000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPRSET20 (Bitfield-Mask: 0x01)

◆ USB_DMARSET_EPRSET20_Pos

#define USB_DMARSET_EPRSET20_Pos (20UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPRSET20 (Bit 20)

◆ USB_DMARSET_EPRSET21_Msk

#define USB_DMARSET_EPRSET21_Msk (0x200000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPRSET21 (Bitfield-Mask: 0x01)

◆ USB_DMARSET_EPRSET21_Pos

#define USB_DMARSET_EPRSET21_Pos (21UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPRSET21 (Bit 21)

◆ USB_DMARSET_EPRSET22_Msk

#define USB_DMARSET_EPRSET22_Msk (0x400000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPRSET22 (Bitfield-Mask: 0x01)

◆ USB_DMARSET_EPRSET22_Pos

#define USB_DMARSET_EPRSET22_Pos (22UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPRSET22 (Bit 22)

◆ USB_DMARSET_EPRSET23_Msk

#define USB_DMARSET_EPRSET23_Msk (0x800000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPRSET23 (Bitfield-Mask: 0x01)

◆ USB_DMARSET_EPRSET23_Pos

#define USB_DMARSET_EPRSET23_Pos (23UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPRSET23 (Bit 23)

◆ USB_DMARSET_EPRSET24_Msk

#define USB_DMARSET_EPRSET24_Msk (0x1000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPRSET24 (Bitfield-Mask: 0x01)

◆ USB_DMARSET_EPRSET24_Pos

#define USB_DMARSET_EPRSET24_Pos (24UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPRSET24 (Bit 24)

◆ USB_DMARSET_EPRSET25_Msk

#define USB_DMARSET_EPRSET25_Msk (0x2000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPRSET25 (Bitfield-Mask: 0x01)

◆ USB_DMARSET_EPRSET25_Pos

#define USB_DMARSET_EPRSET25_Pos (25UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPRSET25 (Bit 25)

◆ USB_DMARSET_EPRSET26_Msk

#define USB_DMARSET_EPRSET26_Msk (0x4000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPRSET26 (Bitfield-Mask: 0x01)

◆ USB_DMARSET_EPRSET26_Pos

#define USB_DMARSET_EPRSET26_Pos (26UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPRSET26 (Bit 26)

◆ USB_DMARSET_EPRSET27_Msk

#define USB_DMARSET_EPRSET27_Msk (0x8000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPRSET27 (Bitfield-Mask: 0x01)

◆ USB_DMARSET_EPRSET27_Pos

#define USB_DMARSET_EPRSET27_Pos (27UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPRSET27 (Bit 27)

◆ USB_DMARSET_EPRSET28_Msk

#define USB_DMARSET_EPRSET28_Msk (0x10000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPRSET28 (Bitfield-Mask: 0x01)

◆ USB_DMARSET_EPRSET28_Pos

#define USB_DMARSET_EPRSET28_Pos (28UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPRSET28 (Bit 28)

◆ USB_DMARSET_EPRSET29_Msk

#define USB_DMARSET_EPRSET29_Msk (0x20000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPRSET29 (Bitfield-Mask: 0x01)

◆ USB_DMARSET_EPRSET29_Pos

#define USB_DMARSET_EPRSET29_Pos (29UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPRSET29 (Bit 29)

◆ USB_DMARSET_EPRSET2_Msk

#define USB_DMARSET_EPRSET2_Msk (0x4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPRSET2 (Bitfield-Mask: 0x01)

◆ USB_DMARSET_EPRSET2_Pos

#define USB_DMARSET_EPRSET2_Pos (2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPRSET2 (Bit 2)

◆ USB_DMARSET_EPRSET30_Msk

#define USB_DMARSET_EPRSET30_Msk (0x40000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPRSET30 (Bitfield-Mask: 0x01)

◆ USB_DMARSET_EPRSET30_Pos

#define USB_DMARSET_EPRSET30_Pos (30UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPRSET30 (Bit 30)

◆ USB_DMARSET_EPRSET31_Msk

#define USB_DMARSET_EPRSET31_Msk (0x80000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPRSET31 (Bitfield-Mask: 0x01)

◆ USB_DMARSET_EPRSET31_Pos

#define USB_DMARSET_EPRSET31_Pos (31UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPRSET31 (Bit 31)

◆ USB_DMARSET_EPRSET3_Msk

#define USB_DMARSET_EPRSET3_Msk (0x8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPRSET3 (Bitfield-Mask: 0x01)

◆ USB_DMARSET_EPRSET3_Pos

#define USB_DMARSET_EPRSET3_Pos (3UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPRSET3 (Bit 3)

◆ USB_DMARSET_EPRSET4_Msk

#define USB_DMARSET_EPRSET4_Msk (0x10UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPRSET4 (Bitfield-Mask: 0x01)

◆ USB_DMARSET_EPRSET4_Pos

#define USB_DMARSET_EPRSET4_Pos (4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPRSET4 (Bit 4)

◆ USB_DMARSET_EPRSET5_Msk

#define USB_DMARSET_EPRSET5_Msk (0x20UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPRSET5 (Bitfield-Mask: 0x01)

◆ USB_DMARSET_EPRSET5_Pos

#define USB_DMARSET_EPRSET5_Pos (5UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPRSET5 (Bit 5)

◆ USB_DMARSET_EPRSET6_Msk

#define USB_DMARSET_EPRSET6_Msk (0x40UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPRSET6 (Bitfield-Mask: 0x01)

◆ USB_DMARSET_EPRSET6_Pos

#define USB_DMARSET_EPRSET6_Pos (6UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPRSET6 (Bit 6)

◆ USB_DMARSET_EPRSET7_Msk

#define USB_DMARSET_EPRSET7_Msk (0x80UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPRSET7 (Bitfield-Mask: 0x01)

◆ USB_DMARSET_EPRSET7_Pos

#define USB_DMARSET_EPRSET7_Pos (7UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPRSET7 (Bit 7)

◆ USB_DMARSET_EPRSET8_Msk

#define USB_DMARSET_EPRSET8_Msk (0x100UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPRSET8 (Bitfield-Mask: 0x01)

◆ USB_DMARSET_EPRSET8_Pos

#define USB_DMARSET_EPRSET8_Pos (8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPRSET8 (Bit 8)

◆ USB_DMARSET_EPRSET9_Msk

#define USB_DMARSET_EPRSET9_Msk (0x200UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPRSET9 (Bitfield-Mask: 0x01)

◆ USB_DMARSET_EPRSET9_Pos

#define USB_DMARSET_EPRSET9_Pos (9UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPRSET9 (Bit 9)

◆ USB_DMARST_EPRST0_Msk

#define USB_DMARST_EPRST0_Msk (0x1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPRST0 (Bitfield-Mask: 0x01)

◆ USB_DMARST_EPRST0_Pos

#define USB_DMARST_EPRST0_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPRST0 (Bit 0)

◆ USB_DMARST_EPRST10_Msk

#define USB_DMARST_EPRST10_Msk (0x400UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPRST10 (Bitfield-Mask: 0x01)

◆ USB_DMARST_EPRST10_Pos

#define USB_DMARST_EPRST10_Pos (10UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPRST10 (Bit 10)

◆ USB_DMARST_EPRST11_Msk

#define USB_DMARST_EPRST11_Msk (0x800UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPRST11 (Bitfield-Mask: 0x01)

◆ USB_DMARST_EPRST11_Pos

#define USB_DMARST_EPRST11_Pos (11UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPRST11 (Bit 11)

◆ USB_DMARST_EPRST12_Msk

#define USB_DMARST_EPRST12_Msk (0x1000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPRST12 (Bitfield-Mask: 0x01)

◆ USB_DMARST_EPRST12_Pos

#define USB_DMARST_EPRST12_Pos (12UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPRST12 (Bit 12)

◆ USB_DMARST_EPRST13_Msk

#define USB_DMARST_EPRST13_Msk (0x2000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPRST13 (Bitfield-Mask: 0x01)

◆ USB_DMARST_EPRST13_Pos

#define USB_DMARST_EPRST13_Pos (13UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPRST13 (Bit 13)

◆ USB_DMARST_EPRST14_Msk

#define USB_DMARST_EPRST14_Msk (0x4000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPRST14 (Bitfield-Mask: 0x01)

◆ USB_DMARST_EPRST14_Pos

#define USB_DMARST_EPRST14_Pos (14UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPRST14 (Bit 14)

◆ USB_DMARST_EPRST15_Msk

#define USB_DMARST_EPRST15_Msk (0x8000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPRST15 (Bitfield-Mask: 0x01)

◆ USB_DMARST_EPRST15_Pos

#define USB_DMARST_EPRST15_Pos (15UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPRST15 (Bit 15)

◆ USB_DMARST_EPRST16_Msk

#define USB_DMARST_EPRST16_Msk (0x10000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPRST16 (Bitfield-Mask: 0x01)

◆ USB_DMARST_EPRST16_Pos

#define USB_DMARST_EPRST16_Pos (16UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPRST16 (Bit 16)

◆ USB_DMARST_EPRST17_Msk

#define USB_DMARST_EPRST17_Msk (0x20000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPRST17 (Bitfield-Mask: 0x01)

◆ USB_DMARST_EPRST17_Pos

#define USB_DMARST_EPRST17_Pos (17UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPRST17 (Bit 17)

◆ USB_DMARST_EPRST18_Msk

#define USB_DMARST_EPRST18_Msk (0x40000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPRST18 (Bitfield-Mask: 0x01)

◆ USB_DMARST_EPRST18_Pos

#define USB_DMARST_EPRST18_Pos (18UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPRST18 (Bit 18)

◆ USB_DMARST_EPRST19_Msk

#define USB_DMARST_EPRST19_Msk (0x80000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPRST19 (Bitfield-Mask: 0x01)

◆ USB_DMARST_EPRST19_Pos

#define USB_DMARST_EPRST19_Pos (19UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPRST19 (Bit 19)

◆ USB_DMARST_EPRST1_Msk

#define USB_DMARST_EPRST1_Msk (0x2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPRST1 (Bitfield-Mask: 0x01)

◆ USB_DMARST_EPRST1_Pos

#define USB_DMARST_EPRST1_Pos (1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPRST1 (Bit 1)

◆ USB_DMARST_EPRST20_Msk

#define USB_DMARST_EPRST20_Msk (0x100000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPRST20 (Bitfield-Mask: 0x01)

◆ USB_DMARST_EPRST20_Pos

#define USB_DMARST_EPRST20_Pos (20UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPRST20 (Bit 20)

◆ USB_DMARST_EPRST21_Msk

#define USB_DMARST_EPRST21_Msk (0x200000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPRST21 (Bitfield-Mask: 0x01)

◆ USB_DMARST_EPRST21_Pos

#define USB_DMARST_EPRST21_Pos (21UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPRST21 (Bit 21)

◆ USB_DMARST_EPRST22_Msk

#define USB_DMARST_EPRST22_Msk (0x400000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPRST22 (Bitfield-Mask: 0x01)

◆ USB_DMARST_EPRST22_Pos

#define USB_DMARST_EPRST22_Pos (22UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPRST22 (Bit 22)

◆ USB_DMARST_EPRST23_Msk

#define USB_DMARST_EPRST23_Msk (0x800000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPRST23 (Bitfield-Mask: 0x01)

◆ USB_DMARST_EPRST23_Pos

#define USB_DMARST_EPRST23_Pos (23UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPRST23 (Bit 23)

◆ USB_DMARST_EPRST24_Msk

#define USB_DMARST_EPRST24_Msk (0x1000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPRST24 (Bitfield-Mask: 0x01)

◆ USB_DMARST_EPRST24_Pos

#define USB_DMARST_EPRST24_Pos (24UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPRST24 (Bit 24)

◆ USB_DMARST_EPRST25_Msk

#define USB_DMARST_EPRST25_Msk (0x2000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPRST25 (Bitfield-Mask: 0x01)

◆ USB_DMARST_EPRST25_Pos

#define USB_DMARST_EPRST25_Pos (25UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPRST25 (Bit 25)

◆ USB_DMARST_EPRST26_Msk

#define USB_DMARST_EPRST26_Msk (0x4000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPRST26 (Bitfield-Mask: 0x01)

◆ USB_DMARST_EPRST26_Pos

#define USB_DMARST_EPRST26_Pos (26UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPRST26 (Bit 26)

◆ USB_DMARST_EPRST27_Msk

#define USB_DMARST_EPRST27_Msk (0x8000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPRST27 (Bitfield-Mask: 0x01)

◆ USB_DMARST_EPRST27_Pos

#define USB_DMARST_EPRST27_Pos (27UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPRST27 (Bit 27)

◆ USB_DMARST_EPRST28_Msk

#define USB_DMARST_EPRST28_Msk (0x10000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPRST28 (Bitfield-Mask: 0x01)

◆ USB_DMARST_EPRST28_Pos

#define USB_DMARST_EPRST28_Pos (28UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPRST28 (Bit 28)

◆ USB_DMARST_EPRST29_Msk

#define USB_DMARST_EPRST29_Msk (0x20000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPRST29 (Bitfield-Mask: 0x01)

◆ USB_DMARST_EPRST29_Pos

#define USB_DMARST_EPRST29_Pos (29UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPRST29 (Bit 29)

◆ USB_DMARST_EPRST2_Msk

#define USB_DMARST_EPRST2_Msk (0x4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPRST2 (Bitfield-Mask: 0x01)

◆ USB_DMARST_EPRST2_Pos

#define USB_DMARST_EPRST2_Pos (2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPRST2 (Bit 2)

◆ USB_DMARST_EPRST30_Msk

#define USB_DMARST_EPRST30_Msk (0x40000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPRST30 (Bitfield-Mask: 0x01)

◆ USB_DMARST_EPRST30_Pos

#define USB_DMARST_EPRST30_Pos (30UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPRST30 (Bit 30)

◆ USB_DMARST_EPRST31_Msk

#define USB_DMARST_EPRST31_Msk (0x80000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPRST31 (Bitfield-Mask: 0x01)

◆ USB_DMARST_EPRST31_Pos

#define USB_DMARST_EPRST31_Pos (31UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPRST31 (Bit 31)

◆ USB_DMARST_EPRST3_Msk

#define USB_DMARST_EPRST3_Msk (0x8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPRST3 (Bitfield-Mask: 0x01)

◆ USB_DMARST_EPRST3_Pos

#define USB_DMARST_EPRST3_Pos (3UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPRST3 (Bit 3)

◆ USB_DMARST_EPRST4_Msk

#define USB_DMARST_EPRST4_Msk (0x10UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPRST4 (Bitfield-Mask: 0x01)

◆ USB_DMARST_EPRST4_Pos

#define USB_DMARST_EPRST4_Pos (4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPRST4 (Bit 4)

◆ USB_DMARST_EPRST5_Msk

#define USB_DMARST_EPRST5_Msk (0x20UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPRST5 (Bitfield-Mask: 0x01)

◆ USB_DMARST_EPRST5_Pos

#define USB_DMARST_EPRST5_Pos (5UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPRST5 (Bit 5)

◆ USB_DMARST_EPRST6_Msk

#define USB_DMARST_EPRST6_Msk (0x40UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPRST6 (Bitfield-Mask: 0x01)

◆ USB_DMARST_EPRST6_Pos

#define USB_DMARST_EPRST6_Pos (6UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPRST6 (Bit 6)

◆ USB_DMARST_EPRST7_Msk

#define USB_DMARST_EPRST7_Msk (0x80UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPRST7 (Bitfield-Mask: 0x01)

◆ USB_DMARST_EPRST7_Pos

#define USB_DMARST_EPRST7_Pos (7UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPRST7 (Bit 7)

◆ USB_DMARST_EPRST8_Msk

#define USB_DMARST_EPRST8_Msk (0x100UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPRST8 (Bitfield-Mask: 0x01)

◆ USB_DMARST_EPRST8_Pos

#define USB_DMARST_EPRST8_Pos (8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPRST8 (Bit 8)

◆ USB_DMARST_EPRST9_Msk

#define USB_DMARST_EPRST9_Msk (0x200UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPRST9 (Bitfield-Mask: 0x01)

◆ USB_DMARST_EPRST9_Pos

#define USB_DMARST_EPRST9_Pos (9UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPRST9 (Bit 9)

◆ USB_EOTINTCLR_EPTXINTCLR0_Msk

#define USB_EOTINTCLR_EPTXINTCLR0_Msk (0x1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPTXINTCLR0 (Bitfield-Mask: 0x01)

◆ USB_EOTINTCLR_EPTXINTCLR0_Pos

#define USB_EOTINTCLR_EPTXINTCLR0_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPTXINTCLR0 (Bit 0)

◆ USB_EOTINTCLR_EPTXINTCLR10_Msk

#define USB_EOTINTCLR_EPTXINTCLR10_Msk (0x400UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPTXINTCLR10 (Bitfield-Mask: 0x01)

◆ USB_EOTINTCLR_EPTXINTCLR10_Pos

#define USB_EOTINTCLR_EPTXINTCLR10_Pos (10UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPTXINTCLR10 (Bit 10)

◆ USB_EOTINTCLR_EPTXINTCLR11_Msk

#define USB_EOTINTCLR_EPTXINTCLR11_Msk (0x800UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPTXINTCLR11 (Bitfield-Mask: 0x01)

◆ USB_EOTINTCLR_EPTXINTCLR11_Pos

#define USB_EOTINTCLR_EPTXINTCLR11_Pos (11UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPTXINTCLR11 (Bit 11)

◆ USB_EOTINTCLR_EPTXINTCLR12_Msk

#define USB_EOTINTCLR_EPTXINTCLR12_Msk (0x1000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPTXINTCLR12 (Bitfield-Mask: 0x01)

◆ USB_EOTINTCLR_EPTXINTCLR12_Pos

#define USB_EOTINTCLR_EPTXINTCLR12_Pos (12UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPTXINTCLR12 (Bit 12)

◆ USB_EOTINTCLR_EPTXINTCLR13_Msk

#define USB_EOTINTCLR_EPTXINTCLR13_Msk (0x2000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPTXINTCLR13 (Bitfield-Mask: 0x01)

◆ USB_EOTINTCLR_EPTXINTCLR13_Pos

#define USB_EOTINTCLR_EPTXINTCLR13_Pos (13UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPTXINTCLR13 (Bit 13)

◆ USB_EOTINTCLR_EPTXINTCLR14_Msk

#define USB_EOTINTCLR_EPTXINTCLR14_Msk (0x4000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPTXINTCLR14 (Bitfield-Mask: 0x01)

◆ USB_EOTINTCLR_EPTXINTCLR14_Pos

#define USB_EOTINTCLR_EPTXINTCLR14_Pos (14UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPTXINTCLR14 (Bit 14)

◆ USB_EOTINTCLR_EPTXINTCLR15_Msk

#define USB_EOTINTCLR_EPTXINTCLR15_Msk (0x8000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPTXINTCLR15 (Bitfield-Mask: 0x01)

◆ USB_EOTINTCLR_EPTXINTCLR15_Pos

#define USB_EOTINTCLR_EPTXINTCLR15_Pos (15UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPTXINTCLR15 (Bit 15)

◆ USB_EOTINTCLR_EPTXINTCLR16_Msk

#define USB_EOTINTCLR_EPTXINTCLR16_Msk (0x10000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPTXINTCLR16 (Bitfield-Mask: 0x01)

◆ USB_EOTINTCLR_EPTXINTCLR16_Pos

#define USB_EOTINTCLR_EPTXINTCLR16_Pos (16UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPTXINTCLR16 (Bit 16)

◆ USB_EOTINTCLR_EPTXINTCLR17_Msk

#define USB_EOTINTCLR_EPTXINTCLR17_Msk (0x20000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPTXINTCLR17 (Bitfield-Mask: 0x01)

◆ USB_EOTINTCLR_EPTXINTCLR17_Pos

#define USB_EOTINTCLR_EPTXINTCLR17_Pos (17UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPTXINTCLR17 (Bit 17)

◆ USB_EOTINTCLR_EPTXINTCLR18_Msk

#define USB_EOTINTCLR_EPTXINTCLR18_Msk (0x40000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPTXINTCLR18 (Bitfield-Mask: 0x01)

◆ USB_EOTINTCLR_EPTXINTCLR18_Pos

#define USB_EOTINTCLR_EPTXINTCLR18_Pos (18UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPTXINTCLR18 (Bit 18)

◆ USB_EOTINTCLR_EPTXINTCLR19_Msk

#define USB_EOTINTCLR_EPTXINTCLR19_Msk (0x80000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPTXINTCLR19 (Bitfield-Mask: 0x01)

◆ USB_EOTINTCLR_EPTXINTCLR19_Pos

#define USB_EOTINTCLR_EPTXINTCLR19_Pos (19UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPTXINTCLR19 (Bit 19)

◆ USB_EOTINTCLR_EPTXINTCLR1_Msk

#define USB_EOTINTCLR_EPTXINTCLR1_Msk (0x2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPTXINTCLR1 (Bitfield-Mask: 0x01)

◆ USB_EOTINTCLR_EPTXINTCLR1_Pos

#define USB_EOTINTCLR_EPTXINTCLR1_Pos (1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPTXINTCLR1 (Bit 1)

◆ USB_EOTINTCLR_EPTXINTCLR20_Msk

#define USB_EOTINTCLR_EPTXINTCLR20_Msk (0x100000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPTXINTCLR20 (Bitfield-Mask: 0x01)

◆ USB_EOTINTCLR_EPTXINTCLR20_Pos

#define USB_EOTINTCLR_EPTXINTCLR20_Pos (20UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPTXINTCLR20 (Bit 20)

◆ USB_EOTINTCLR_EPTXINTCLR21_Msk

#define USB_EOTINTCLR_EPTXINTCLR21_Msk (0x200000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPTXINTCLR21 (Bitfield-Mask: 0x01)

◆ USB_EOTINTCLR_EPTXINTCLR21_Pos

#define USB_EOTINTCLR_EPTXINTCLR21_Pos (21UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPTXINTCLR21 (Bit 21)

◆ USB_EOTINTCLR_EPTXINTCLR22_Msk

#define USB_EOTINTCLR_EPTXINTCLR22_Msk (0x400000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPTXINTCLR22 (Bitfield-Mask: 0x01)

◆ USB_EOTINTCLR_EPTXINTCLR22_Pos

#define USB_EOTINTCLR_EPTXINTCLR22_Pos (22UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPTXINTCLR22 (Bit 22)

◆ USB_EOTINTCLR_EPTXINTCLR23_Msk

#define USB_EOTINTCLR_EPTXINTCLR23_Msk (0x800000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPTXINTCLR23 (Bitfield-Mask: 0x01)

◆ USB_EOTINTCLR_EPTXINTCLR23_Pos

#define USB_EOTINTCLR_EPTXINTCLR23_Pos (23UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPTXINTCLR23 (Bit 23)

◆ USB_EOTINTCLR_EPTXINTCLR24_Msk

#define USB_EOTINTCLR_EPTXINTCLR24_Msk (0x1000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPTXINTCLR24 (Bitfield-Mask: 0x01)

◆ USB_EOTINTCLR_EPTXINTCLR24_Pos

#define USB_EOTINTCLR_EPTXINTCLR24_Pos (24UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPTXINTCLR24 (Bit 24)

◆ USB_EOTINTCLR_EPTXINTCLR25_Msk

#define USB_EOTINTCLR_EPTXINTCLR25_Msk (0x2000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPTXINTCLR25 (Bitfield-Mask: 0x01)

◆ USB_EOTINTCLR_EPTXINTCLR25_Pos

#define USB_EOTINTCLR_EPTXINTCLR25_Pos (25UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPTXINTCLR25 (Bit 25)

◆ USB_EOTINTCLR_EPTXINTCLR26_Msk

#define USB_EOTINTCLR_EPTXINTCLR26_Msk (0x4000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPTXINTCLR26 (Bitfield-Mask: 0x01)

◆ USB_EOTINTCLR_EPTXINTCLR26_Pos

#define USB_EOTINTCLR_EPTXINTCLR26_Pos (26UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPTXINTCLR26 (Bit 26)

◆ USB_EOTINTCLR_EPTXINTCLR27_Msk

#define USB_EOTINTCLR_EPTXINTCLR27_Msk (0x8000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPTXINTCLR27 (Bitfield-Mask: 0x01)

◆ USB_EOTINTCLR_EPTXINTCLR27_Pos

#define USB_EOTINTCLR_EPTXINTCLR27_Pos (27UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPTXINTCLR27 (Bit 27)

◆ USB_EOTINTCLR_EPTXINTCLR28_Msk

#define USB_EOTINTCLR_EPTXINTCLR28_Msk (0x10000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPTXINTCLR28 (Bitfield-Mask: 0x01)

◆ USB_EOTINTCLR_EPTXINTCLR28_Pos

#define USB_EOTINTCLR_EPTXINTCLR28_Pos (28UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPTXINTCLR28 (Bit 28)

◆ USB_EOTINTCLR_EPTXINTCLR29_Msk

#define USB_EOTINTCLR_EPTXINTCLR29_Msk (0x20000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPTXINTCLR29 (Bitfield-Mask: 0x01)

◆ USB_EOTINTCLR_EPTXINTCLR29_Pos

#define USB_EOTINTCLR_EPTXINTCLR29_Pos (29UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPTXINTCLR29 (Bit 29)

◆ USB_EOTINTCLR_EPTXINTCLR2_Msk

#define USB_EOTINTCLR_EPTXINTCLR2_Msk (0x4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPTXINTCLR2 (Bitfield-Mask: 0x01)

◆ USB_EOTINTCLR_EPTXINTCLR2_Pos

#define USB_EOTINTCLR_EPTXINTCLR2_Pos (2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPTXINTCLR2 (Bit 2)

◆ USB_EOTINTCLR_EPTXINTCLR30_Msk

#define USB_EOTINTCLR_EPTXINTCLR30_Msk (0x40000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPTXINTCLR30 (Bitfield-Mask: 0x01)

◆ USB_EOTINTCLR_EPTXINTCLR30_Pos

#define USB_EOTINTCLR_EPTXINTCLR30_Pos (30UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPTXINTCLR30 (Bit 30)

◆ USB_EOTINTCLR_EPTXINTCLR31_Msk

#define USB_EOTINTCLR_EPTXINTCLR31_Msk (0x80000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPTXINTCLR31 (Bitfield-Mask: 0x01)

◆ USB_EOTINTCLR_EPTXINTCLR31_Pos

#define USB_EOTINTCLR_EPTXINTCLR31_Pos (31UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPTXINTCLR31 (Bit 31)

◆ USB_EOTINTCLR_EPTXINTCLR3_Msk

#define USB_EOTINTCLR_EPTXINTCLR3_Msk (0x8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPTXINTCLR3 (Bitfield-Mask: 0x01)

◆ USB_EOTINTCLR_EPTXINTCLR3_Pos

#define USB_EOTINTCLR_EPTXINTCLR3_Pos (3UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPTXINTCLR3 (Bit 3)

◆ USB_EOTINTCLR_EPTXINTCLR4_Msk

#define USB_EOTINTCLR_EPTXINTCLR4_Msk (0x10UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPTXINTCLR4 (Bitfield-Mask: 0x01)

◆ USB_EOTINTCLR_EPTXINTCLR4_Pos

#define USB_EOTINTCLR_EPTXINTCLR4_Pos (4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPTXINTCLR4 (Bit 4)

◆ USB_EOTINTCLR_EPTXINTCLR5_Msk

#define USB_EOTINTCLR_EPTXINTCLR5_Msk (0x20UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPTXINTCLR5 (Bitfield-Mask: 0x01)

◆ USB_EOTINTCLR_EPTXINTCLR5_Pos

#define USB_EOTINTCLR_EPTXINTCLR5_Pos (5UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPTXINTCLR5 (Bit 5)

◆ USB_EOTINTCLR_EPTXINTCLR6_Msk

#define USB_EOTINTCLR_EPTXINTCLR6_Msk (0x40UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPTXINTCLR6 (Bitfield-Mask: 0x01)

◆ USB_EOTINTCLR_EPTXINTCLR6_Pos

#define USB_EOTINTCLR_EPTXINTCLR6_Pos (6UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPTXINTCLR6 (Bit 6)

◆ USB_EOTINTCLR_EPTXINTCLR7_Msk

#define USB_EOTINTCLR_EPTXINTCLR7_Msk (0x80UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPTXINTCLR7 (Bitfield-Mask: 0x01)

◆ USB_EOTINTCLR_EPTXINTCLR7_Pos

#define USB_EOTINTCLR_EPTXINTCLR7_Pos (7UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPTXINTCLR7 (Bit 7)

◆ USB_EOTINTCLR_EPTXINTCLR8_Msk

#define USB_EOTINTCLR_EPTXINTCLR8_Msk (0x100UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPTXINTCLR8 (Bitfield-Mask: 0x01)

◆ USB_EOTINTCLR_EPTXINTCLR8_Pos

#define USB_EOTINTCLR_EPTXINTCLR8_Pos (8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPTXINTCLR8 (Bit 8)

◆ USB_EOTINTCLR_EPTXINTCLR9_Msk

#define USB_EOTINTCLR_EPTXINTCLR9_Msk (0x200UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPTXINTCLR9 (Bitfield-Mask: 0x01)

◆ USB_EOTINTCLR_EPTXINTCLR9_Pos

#define USB_EOTINTCLR_EPTXINTCLR9_Pos (9UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPTXINTCLR9 (Bit 9)

◆ USB_EOTINTSET_EPTXINTSET0_Msk

#define USB_EOTINTSET_EPTXINTSET0_Msk (0x1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPTXINTSET0 (Bitfield-Mask: 0x01)

◆ USB_EOTINTSET_EPTXINTSET0_Pos

#define USB_EOTINTSET_EPTXINTSET0_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPTXINTSET0 (Bit 0)

◆ USB_EOTINTSET_EPTXINTSET10_Msk

#define USB_EOTINTSET_EPTXINTSET10_Msk (0x400UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPTXINTSET10 (Bitfield-Mask: 0x01)

◆ USB_EOTINTSET_EPTXINTSET10_Pos

#define USB_EOTINTSET_EPTXINTSET10_Pos (10UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPTXINTSET10 (Bit 10)

◆ USB_EOTINTSET_EPTXINTSET11_Msk

#define USB_EOTINTSET_EPTXINTSET11_Msk (0x800UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPTXINTSET11 (Bitfield-Mask: 0x01)

◆ USB_EOTINTSET_EPTXINTSET11_Pos

#define USB_EOTINTSET_EPTXINTSET11_Pos (11UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPTXINTSET11 (Bit 11)

◆ USB_EOTINTSET_EPTXINTSET12_Msk

#define USB_EOTINTSET_EPTXINTSET12_Msk (0x1000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPTXINTSET12 (Bitfield-Mask: 0x01)

◆ USB_EOTINTSET_EPTXINTSET12_Pos

#define USB_EOTINTSET_EPTXINTSET12_Pos (12UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPTXINTSET12 (Bit 12)

◆ USB_EOTINTSET_EPTXINTSET13_Msk

#define USB_EOTINTSET_EPTXINTSET13_Msk (0x2000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPTXINTSET13 (Bitfield-Mask: 0x01)

◆ USB_EOTINTSET_EPTXINTSET13_Pos

#define USB_EOTINTSET_EPTXINTSET13_Pos (13UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPTXINTSET13 (Bit 13)

◆ USB_EOTINTSET_EPTXINTSET14_Msk

#define USB_EOTINTSET_EPTXINTSET14_Msk (0x4000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPTXINTSET14 (Bitfield-Mask: 0x01)

◆ USB_EOTINTSET_EPTXINTSET14_Pos

#define USB_EOTINTSET_EPTXINTSET14_Pos (14UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPTXINTSET14 (Bit 14)

◆ USB_EOTINTSET_EPTXINTSET15_Msk

#define USB_EOTINTSET_EPTXINTSET15_Msk (0x8000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPTXINTSET15 (Bitfield-Mask: 0x01)

◆ USB_EOTINTSET_EPTXINTSET15_Pos

#define USB_EOTINTSET_EPTXINTSET15_Pos (15UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPTXINTSET15 (Bit 15)

◆ USB_EOTINTSET_EPTXINTSET16_Msk

#define USB_EOTINTSET_EPTXINTSET16_Msk (0x10000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPTXINTSET16 (Bitfield-Mask: 0x01)

◆ USB_EOTINTSET_EPTXINTSET16_Pos

#define USB_EOTINTSET_EPTXINTSET16_Pos (16UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPTXINTSET16 (Bit 16)

◆ USB_EOTINTSET_EPTXINTSET17_Msk

#define USB_EOTINTSET_EPTXINTSET17_Msk (0x20000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPTXINTSET17 (Bitfield-Mask: 0x01)

◆ USB_EOTINTSET_EPTXINTSET17_Pos

#define USB_EOTINTSET_EPTXINTSET17_Pos (17UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPTXINTSET17 (Bit 17)

◆ USB_EOTINTSET_EPTXINTSET18_Msk

#define USB_EOTINTSET_EPTXINTSET18_Msk (0x40000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPTXINTSET18 (Bitfield-Mask: 0x01)

◆ USB_EOTINTSET_EPTXINTSET18_Pos

#define USB_EOTINTSET_EPTXINTSET18_Pos (18UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPTXINTSET18 (Bit 18)

◆ USB_EOTINTSET_EPTXINTSET19_Msk

#define USB_EOTINTSET_EPTXINTSET19_Msk (0x80000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPTXINTSET19 (Bitfield-Mask: 0x01)

◆ USB_EOTINTSET_EPTXINTSET19_Pos

#define USB_EOTINTSET_EPTXINTSET19_Pos (19UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPTXINTSET19 (Bit 19)

◆ USB_EOTINTSET_EPTXINTSET1_Msk

#define USB_EOTINTSET_EPTXINTSET1_Msk (0x2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPTXINTSET1 (Bitfield-Mask: 0x01)

◆ USB_EOTINTSET_EPTXINTSET1_Pos

#define USB_EOTINTSET_EPTXINTSET1_Pos (1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPTXINTSET1 (Bit 1)

◆ USB_EOTINTSET_EPTXINTSET20_Msk

#define USB_EOTINTSET_EPTXINTSET20_Msk (0x100000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPTXINTSET20 (Bitfield-Mask: 0x01)

◆ USB_EOTINTSET_EPTXINTSET20_Pos

#define USB_EOTINTSET_EPTXINTSET20_Pos (20UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPTXINTSET20 (Bit 20)

◆ USB_EOTINTSET_EPTXINTSET21_Msk

#define USB_EOTINTSET_EPTXINTSET21_Msk (0x200000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPTXINTSET21 (Bitfield-Mask: 0x01)

◆ USB_EOTINTSET_EPTXINTSET21_Pos

#define USB_EOTINTSET_EPTXINTSET21_Pos (21UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPTXINTSET21 (Bit 21)

◆ USB_EOTINTSET_EPTXINTSET22_Msk

#define USB_EOTINTSET_EPTXINTSET22_Msk (0x400000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPTXINTSET22 (Bitfield-Mask: 0x01)

◆ USB_EOTINTSET_EPTXINTSET22_Pos

#define USB_EOTINTSET_EPTXINTSET22_Pos (22UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPTXINTSET22 (Bit 22)

◆ USB_EOTINTSET_EPTXINTSET23_Msk

#define USB_EOTINTSET_EPTXINTSET23_Msk (0x800000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPTXINTSET23 (Bitfield-Mask: 0x01)

◆ USB_EOTINTSET_EPTXINTSET23_Pos

#define USB_EOTINTSET_EPTXINTSET23_Pos (23UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPTXINTSET23 (Bit 23)

◆ USB_EOTINTSET_EPTXINTSET24_Msk

#define USB_EOTINTSET_EPTXINTSET24_Msk (0x1000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPTXINTSET24 (Bitfield-Mask: 0x01)

◆ USB_EOTINTSET_EPTXINTSET24_Pos

#define USB_EOTINTSET_EPTXINTSET24_Pos (24UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPTXINTSET24 (Bit 24)

◆ USB_EOTINTSET_EPTXINTSET25_Msk

#define USB_EOTINTSET_EPTXINTSET25_Msk (0x2000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPTXINTSET25 (Bitfield-Mask: 0x01)

◆ USB_EOTINTSET_EPTXINTSET25_Pos

#define USB_EOTINTSET_EPTXINTSET25_Pos (25UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPTXINTSET25 (Bit 25)

◆ USB_EOTINTSET_EPTXINTSET26_Msk

#define USB_EOTINTSET_EPTXINTSET26_Msk (0x4000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPTXINTSET26 (Bitfield-Mask: 0x01)

◆ USB_EOTINTSET_EPTXINTSET26_Pos

#define USB_EOTINTSET_EPTXINTSET26_Pos (26UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPTXINTSET26 (Bit 26)

◆ USB_EOTINTSET_EPTXINTSET27_Msk

#define USB_EOTINTSET_EPTXINTSET27_Msk (0x8000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPTXINTSET27 (Bitfield-Mask: 0x01)

◆ USB_EOTINTSET_EPTXINTSET27_Pos

#define USB_EOTINTSET_EPTXINTSET27_Pos (27UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPTXINTSET27 (Bit 27)

◆ USB_EOTINTSET_EPTXINTSET28_Msk

#define USB_EOTINTSET_EPTXINTSET28_Msk (0x10000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPTXINTSET28 (Bitfield-Mask: 0x01)

◆ USB_EOTINTSET_EPTXINTSET28_Pos

#define USB_EOTINTSET_EPTXINTSET28_Pos (28UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPTXINTSET28 (Bit 28)

◆ USB_EOTINTSET_EPTXINTSET29_Msk

#define USB_EOTINTSET_EPTXINTSET29_Msk (0x20000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPTXINTSET29 (Bitfield-Mask: 0x01)

◆ USB_EOTINTSET_EPTXINTSET29_Pos

#define USB_EOTINTSET_EPTXINTSET29_Pos (29UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPTXINTSET29 (Bit 29)

◆ USB_EOTINTSET_EPTXINTSET2_Msk

#define USB_EOTINTSET_EPTXINTSET2_Msk (0x4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPTXINTSET2 (Bitfield-Mask: 0x01)

◆ USB_EOTINTSET_EPTXINTSET2_Pos

#define USB_EOTINTSET_EPTXINTSET2_Pos (2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPTXINTSET2 (Bit 2)

◆ USB_EOTINTSET_EPTXINTSET30_Msk

#define USB_EOTINTSET_EPTXINTSET30_Msk (0x40000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPTXINTSET30 (Bitfield-Mask: 0x01)

◆ USB_EOTINTSET_EPTXINTSET30_Pos

#define USB_EOTINTSET_EPTXINTSET30_Pos (30UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPTXINTSET30 (Bit 30)

◆ USB_EOTINTSET_EPTXINTSET31_Msk

#define USB_EOTINTSET_EPTXINTSET31_Msk (0x80000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPTXINTSET31 (Bitfield-Mask: 0x01)

◆ USB_EOTINTSET_EPTXINTSET31_Pos

#define USB_EOTINTSET_EPTXINTSET31_Pos (31UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPTXINTSET31 (Bit 31)

◆ USB_EOTINTSET_EPTXINTSET3_Msk

#define USB_EOTINTSET_EPTXINTSET3_Msk (0x8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPTXINTSET3 (Bitfield-Mask: 0x01)

◆ USB_EOTINTSET_EPTXINTSET3_Pos

#define USB_EOTINTSET_EPTXINTSET3_Pos (3UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPTXINTSET3 (Bit 3)

◆ USB_EOTINTSET_EPTXINTSET4_Msk

#define USB_EOTINTSET_EPTXINTSET4_Msk (0x10UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPTXINTSET4 (Bitfield-Mask: 0x01)

◆ USB_EOTINTSET_EPTXINTSET4_Pos

#define USB_EOTINTSET_EPTXINTSET4_Pos (4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPTXINTSET4 (Bit 4)

◆ USB_EOTINTSET_EPTXINTSET5_Msk

#define USB_EOTINTSET_EPTXINTSET5_Msk (0x20UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPTXINTSET5 (Bitfield-Mask: 0x01)

◆ USB_EOTINTSET_EPTXINTSET5_Pos

#define USB_EOTINTSET_EPTXINTSET5_Pos (5UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPTXINTSET5 (Bit 5)

◆ USB_EOTINTSET_EPTXINTSET6_Msk

#define USB_EOTINTSET_EPTXINTSET6_Msk (0x40UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPTXINTSET6 (Bitfield-Mask: 0x01)

◆ USB_EOTINTSET_EPTXINTSET6_Pos

#define USB_EOTINTSET_EPTXINTSET6_Pos (6UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPTXINTSET6 (Bit 6)

◆ USB_EOTINTSET_EPTXINTSET7_Msk

#define USB_EOTINTSET_EPTXINTSET7_Msk (0x80UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPTXINTSET7 (Bitfield-Mask: 0x01)

◆ USB_EOTINTSET_EPTXINTSET7_Pos

#define USB_EOTINTSET_EPTXINTSET7_Pos (7UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPTXINTSET7 (Bit 7)

◆ USB_EOTINTSET_EPTXINTSET8_Msk

#define USB_EOTINTSET_EPTXINTSET8_Msk (0x100UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPTXINTSET8 (Bitfield-Mask: 0x01)

◆ USB_EOTINTSET_EPTXINTSET8_Pos

#define USB_EOTINTSET_EPTXINTSET8_Pos (8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPTXINTSET8 (Bit 8)

◆ USB_EOTINTSET_EPTXINTSET9_Msk

#define USB_EOTINTSET_EPTXINTSET9_Msk (0x200UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPTXINTSET9 (Bitfield-Mask: 0x01)

◆ USB_EOTINTSET_EPTXINTSET9_Pos

#define USB_EOTINTSET_EPTXINTSET9_Pos (9UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPTXINTSET9 (Bit 9)

◆ USB_EOTINTST_EPTXINTST0_Msk

#define USB_EOTINTST_EPTXINTST0_Msk (0x1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPTXINTST0 (Bitfield-Mask: 0x01)

◆ USB_EOTINTST_EPTXINTST0_Pos

#define USB_EOTINTST_EPTXINTST0_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPTXINTST0 (Bit 0)

◆ USB_EOTINTST_EPTXINTST10_Msk

#define USB_EOTINTST_EPTXINTST10_Msk (0x400UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPTXINTST10 (Bitfield-Mask: 0x01)

◆ USB_EOTINTST_EPTXINTST10_Pos

#define USB_EOTINTST_EPTXINTST10_Pos (10UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPTXINTST10 (Bit 10)

◆ USB_EOTINTST_EPTXINTST11_Msk

#define USB_EOTINTST_EPTXINTST11_Msk (0x800UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPTXINTST11 (Bitfield-Mask: 0x01)

◆ USB_EOTINTST_EPTXINTST11_Pos

#define USB_EOTINTST_EPTXINTST11_Pos (11UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPTXINTST11 (Bit 11)

◆ USB_EOTINTST_EPTXINTST12_Msk

#define USB_EOTINTST_EPTXINTST12_Msk (0x1000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPTXINTST12 (Bitfield-Mask: 0x01)

◆ USB_EOTINTST_EPTXINTST12_Pos

#define USB_EOTINTST_EPTXINTST12_Pos (12UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPTXINTST12 (Bit 12)

◆ USB_EOTINTST_EPTXINTST13_Msk

#define USB_EOTINTST_EPTXINTST13_Msk (0x2000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPTXINTST13 (Bitfield-Mask: 0x01)

◆ USB_EOTINTST_EPTXINTST13_Pos

#define USB_EOTINTST_EPTXINTST13_Pos (13UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPTXINTST13 (Bit 13)

◆ USB_EOTINTST_EPTXINTST14_Msk

#define USB_EOTINTST_EPTXINTST14_Msk (0x4000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPTXINTST14 (Bitfield-Mask: 0x01)

◆ USB_EOTINTST_EPTXINTST14_Pos

#define USB_EOTINTST_EPTXINTST14_Pos (14UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPTXINTST14 (Bit 14)

◆ USB_EOTINTST_EPTXINTST15_Msk

#define USB_EOTINTST_EPTXINTST15_Msk (0x8000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPTXINTST15 (Bitfield-Mask: 0x01)

◆ USB_EOTINTST_EPTXINTST15_Pos

#define USB_EOTINTST_EPTXINTST15_Pos (15UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPTXINTST15 (Bit 15)

◆ USB_EOTINTST_EPTXINTST16_Msk

#define USB_EOTINTST_EPTXINTST16_Msk (0x10000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPTXINTST16 (Bitfield-Mask: 0x01)

◆ USB_EOTINTST_EPTXINTST16_Pos

#define USB_EOTINTST_EPTXINTST16_Pos (16UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPTXINTST16 (Bit 16)

◆ USB_EOTINTST_EPTXINTST17_Msk

#define USB_EOTINTST_EPTXINTST17_Msk (0x20000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPTXINTST17 (Bitfield-Mask: 0x01)

◆ USB_EOTINTST_EPTXINTST17_Pos

#define USB_EOTINTST_EPTXINTST17_Pos (17UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPTXINTST17 (Bit 17)

◆ USB_EOTINTST_EPTXINTST18_Msk

#define USB_EOTINTST_EPTXINTST18_Msk (0x40000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPTXINTST18 (Bitfield-Mask: 0x01)

◆ USB_EOTINTST_EPTXINTST18_Pos

#define USB_EOTINTST_EPTXINTST18_Pos (18UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPTXINTST18 (Bit 18)

◆ USB_EOTINTST_EPTXINTST19_Msk

#define USB_EOTINTST_EPTXINTST19_Msk (0x80000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPTXINTST19 (Bitfield-Mask: 0x01)

◆ USB_EOTINTST_EPTXINTST19_Pos

#define USB_EOTINTST_EPTXINTST19_Pos (19UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPTXINTST19 (Bit 19)

◆ USB_EOTINTST_EPTXINTST1_Msk

#define USB_EOTINTST_EPTXINTST1_Msk (0x2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPTXINTST1 (Bitfield-Mask: 0x01)

◆ USB_EOTINTST_EPTXINTST1_Pos

#define USB_EOTINTST_EPTXINTST1_Pos (1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPTXINTST1 (Bit 1)

◆ USB_EOTINTST_EPTXINTST20_Msk

#define USB_EOTINTST_EPTXINTST20_Msk (0x100000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPTXINTST20 (Bitfield-Mask: 0x01)

◆ USB_EOTINTST_EPTXINTST20_Pos

#define USB_EOTINTST_EPTXINTST20_Pos (20UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPTXINTST20 (Bit 20)

◆ USB_EOTINTST_EPTXINTST21_Msk

#define USB_EOTINTST_EPTXINTST21_Msk (0x200000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPTXINTST21 (Bitfield-Mask: 0x01)

◆ USB_EOTINTST_EPTXINTST21_Pos

#define USB_EOTINTST_EPTXINTST21_Pos (21UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPTXINTST21 (Bit 21)

◆ USB_EOTINTST_EPTXINTST22_Msk

#define USB_EOTINTST_EPTXINTST22_Msk (0x400000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPTXINTST22 (Bitfield-Mask: 0x01)

◆ USB_EOTINTST_EPTXINTST22_Pos

#define USB_EOTINTST_EPTXINTST22_Pos (22UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPTXINTST22 (Bit 22)

◆ USB_EOTINTST_EPTXINTST23_Msk

#define USB_EOTINTST_EPTXINTST23_Msk (0x800000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPTXINTST23 (Bitfield-Mask: 0x01)

◆ USB_EOTINTST_EPTXINTST23_Pos

#define USB_EOTINTST_EPTXINTST23_Pos (23UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPTXINTST23 (Bit 23)

◆ USB_EOTINTST_EPTXINTST24_Msk

#define USB_EOTINTST_EPTXINTST24_Msk (0x1000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPTXINTST24 (Bitfield-Mask: 0x01)

◆ USB_EOTINTST_EPTXINTST24_Pos

#define USB_EOTINTST_EPTXINTST24_Pos (24UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPTXINTST24 (Bit 24)

◆ USB_EOTINTST_EPTXINTST25_Msk

#define USB_EOTINTST_EPTXINTST25_Msk (0x2000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPTXINTST25 (Bitfield-Mask: 0x01)

◆ USB_EOTINTST_EPTXINTST25_Pos

#define USB_EOTINTST_EPTXINTST25_Pos (25UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPTXINTST25 (Bit 25)

◆ USB_EOTINTST_EPTXINTST26_Msk

#define USB_EOTINTST_EPTXINTST26_Msk (0x4000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPTXINTST26 (Bitfield-Mask: 0x01)

◆ USB_EOTINTST_EPTXINTST26_Pos

#define USB_EOTINTST_EPTXINTST26_Pos (26UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPTXINTST26 (Bit 26)

◆ USB_EOTINTST_EPTXINTST27_Msk

#define USB_EOTINTST_EPTXINTST27_Msk (0x8000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPTXINTST27 (Bitfield-Mask: 0x01)

◆ USB_EOTINTST_EPTXINTST27_Pos

#define USB_EOTINTST_EPTXINTST27_Pos (27UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPTXINTST27 (Bit 27)

◆ USB_EOTINTST_EPTXINTST28_Msk

#define USB_EOTINTST_EPTXINTST28_Msk (0x10000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPTXINTST28 (Bitfield-Mask: 0x01)

◆ USB_EOTINTST_EPTXINTST28_Pos

#define USB_EOTINTST_EPTXINTST28_Pos (28UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPTXINTST28 (Bit 28)

◆ USB_EOTINTST_EPTXINTST29_Msk

#define USB_EOTINTST_EPTXINTST29_Msk (0x20000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPTXINTST29 (Bitfield-Mask: 0x01)

◆ USB_EOTINTST_EPTXINTST29_Pos

#define USB_EOTINTST_EPTXINTST29_Pos (29UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPTXINTST29 (Bit 29)

◆ USB_EOTINTST_EPTXINTST2_Msk

#define USB_EOTINTST_EPTXINTST2_Msk (0x4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPTXINTST2 (Bitfield-Mask: 0x01)

◆ USB_EOTINTST_EPTXINTST2_Pos

#define USB_EOTINTST_EPTXINTST2_Pos (2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPTXINTST2 (Bit 2)

◆ USB_EOTINTST_EPTXINTST30_Msk

#define USB_EOTINTST_EPTXINTST30_Msk (0x40000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPTXINTST30 (Bitfield-Mask: 0x01)

◆ USB_EOTINTST_EPTXINTST30_Pos

#define USB_EOTINTST_EPTXINTST30_Pos (30UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPTXINTST30 (Bit 30)

◆ USB_EOTINTST_EPTXINTST31_Msk

#define USB_EOTINTST_EPTXINTST31_Msk (0x80000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPTXINTST31 (Bitfield-Mask: 0x01)

◆ USB_EOTINTST_EPTXINTST31_Pos

#define USB_EOTINTST_EPTXINTST31_Pos (31UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPTXINTST31 (Bit 31)

◆ USB_EOTINTST_EPTXINTST3_Msk

#define USB_EOTINTST_EPTXINTST3_Msk (0x8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPTXINTST3 (Bitfield-Mask: 0x01)

◆ USB_EOTINTST_EPTXINTST3_Pos

#define USB_EOTINTST_EPTXINTST3_Pos (3UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPTXINTST3 (Bit 3)

◆ USB_EOTINTST_EPTXINTST4_Msk

#define USB_EOTINTST_EPTXINTST4_Msk (0x10UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPTXINTST4 (Bitfield-Mask: 0x01)

◆ USB_EOTINTST_EPTXINTST4_Pos

#define USB_EOTINTST_EPTXINTST4_Pos (4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPTXINTST4 (Bit 4)

◆ USB_EOTINTST_EPTXINTST5_Msk

#define USB_EOTINTST_EPTXINTST5_Msk (0x20UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPTXINTST5 (Bitfield-Mask: 0x01)

◆ USB_EOTINTST_EPTXINTST5_Pos

#define USB_EOTINTST_EPTXINTST5_Pos (5UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPTXINTST5 (Bit 5)

◆ USB_EOTINTST_EPTXINTST6_Msk

#define USB_EOTINTST_EPTXINTST6_Msk (0x40UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPTXINTST6 (Bitfield-Mask: 0x01)

◆ USB_EOTINTST_EPTXINTST6_Pos

#define USB_EOTINTST_EPTXINTST6_Pos (6UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPTXINTST6 (Bit 6)

◆ USB_EOTINTST_EPTXINTST7_Msk

#define USB_EOTINTST_EPTXINTST7_Msk (0x80UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPTXINTST7 (Bitfield-Mask: 0x01)

◆ USB_EOTINTST_EPTXINTST7_Pos

#define USB_EOTINTST_EPTXINTST7_Pos (7UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPTXINTST7 (Bit 7)

◆ USB_EOTINTST_EPTXINTST8_Msk

#define USB_EOTINTST_EPTXINTST8_Msk (0x100UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPTXINTST8 (Bitfield-Mask: 0x01)

◆ USB_EOTINTST_EPTXINTST8_Pos

#define USB_EOTINTST_EPTXINTST8_Pos (8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPTXINTST8 (Bit 8)

◆ USB_EOTINTST_EPTXINTST9_Msk

#define USB_EOTINTST_EPTXINTST9_Msk (0x200UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPTXINTST9 (Bitfield-Mask: 0x01)

◆ USB_EOTINTST_EPTXINTST9_Pos

#define USB_EOTINTST_EPTXINTST9_Pos (9UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPTXINTST9 (Bit 9)

◆ USB_EPDMADIS_EP_DMA_DIS0_Msk

#define USB_EPDMADIS_EP_DMA_DIS0_Msk (0x1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EP_DMA_DIS0 (Bitfield-Mask: 0x01)

◆ USB_EPDMADIS_EP_DMA_DIS0_Pos

#define USB_EPDMADIS_EP_DMA_DIS0_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EP_DMA_DIS0 (Bit 0)

◆ USB_EPDMADIS_EP_DMA_DIS10_Msk

#define USB_EPDMADIS_EP_DMA_DIS10_Msk (0x400UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EP_DMA_DIS10 (Bitfield-Mask: 0x01)

◆ USB_EPDMADIS_EP_DMA_DIS10_Pos

#define USB_EPDMADIS_EP_DMA_DIS10_Pos (10UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EP_DMA_DIS10 (Bit 10)

◆ USB_EPDMADIS_EP_DMA_DIS11_Msk

#define USB_EPDMADIS_EP_DMA_DIS11_Msk (0x800UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EP_DMA_DIS11 (Bitfield-Mask: 0x01)

◆ USB_EPDMADIS_EP_DMA_DIS11_Pos

#define USB_EPDMADIS_EP_DMA_DIS11_Pos (11UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EP_DMA_DIS11 (Bit 11)

◆ USB_EPDMADIS_EP_DMA_DIS12_Msk

#define USB_EPDMADIS_EP_DMA_DIS12_Msk (0x1000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EP_DMA_DIS12 (Bitfield-Mask: 0x01)

◆ USB_EPDMADIS_EP_DMA_DIS12_Pos

#define USB_EPDMADIS_EP_DMA_DIS12_Pos (12UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EP_DMA_DIS12 (Bit 12)

◆ USB_EPDMADIS_EP_DMA_DIS13_Msk

#define USB_EPDMADIS_EP_DMA_DIS13_Msk (0x2000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EP_DMA_DIS13 (Bitfield-Mask: 0x01)

◆ USB_EPDMADIS_EP_DMA_DIS13_Pos

#define USB_EPDMADIS_EP_DMA_DIS13_Pos (13UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EP_DMA_DIS13 (Bit 13)

◆ USB_EPDMADIS_EP_DMA_DIS14_Msk

#define USB_EPDMADIS_EP_DMA_DIS14_Msk (0x4000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EP_DMA_DIS14 (Bitfield-Mask: 0x01)

◆ USB_EPDMADIS_EP_DMA_DIS14_Pos

#define USB_EPDMADIS_EP_DMA_DIS14_Pos (14UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EP_DMA_DIS14 (Bit 14)

◆ USB_EPDMADIS_EP_DMA_DIS15_Msk

#define USB_EPDMADIS_EP_DMA_DIS15_Msk (0x8000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EP_DMA_DIS15 (Bitfield-Mask: 0x01)

◆ USB_EPDMADIS_EP_DMA_DIS15_Pos

#define USB_EPDMADIS_EP_DMA_DIS15_Pos (15UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EP_DMA_DIS15 (Bit 15)

◆ USB_EPDMADIS_EP_DMA_DIS16_Msk

#define USB_EPDMADIS_EP_DMA_DIS16_Msk (0x10000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EP_DMA_DIS16 (Bitfield-Mask: 0x01)

◆ USB_EPDMADIS_EP_DMA_DIS16_Pos

#define USB_EPDMADIS_EP_DMA_DIS16_Pos (16UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EP_DMA_DIS16 (Bit 16)

◆ USB_EPDMADIS_EP_DMA_DIS17_Msk

#define USB_EPDMADIS_EP_DMA_DIS17_Msk (0x20000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EP_DMA_DIS17 (Bitfield-Mask: 0x01)

◆ USB_EPDMADIS_EP_DMA_DIS17_Pos

#define USB_EPDMADIS_EP_DMA_DIS17_Pos (17UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EP_DMA_DIS17 (Bit 17)

◆ USB_EPDMADIS_EP_DMA_DIS18_Msk

#define USB_EPDMADIS_EP_DMA_DIS18_Msk (0x40000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EP_DMA_DIS18 (Bitfield-Mask: 0x01)

◆ USB_EPDMADIS_EP_DMA_DIS18_Pos

#define USB_EPDMADIS_EP_DMA_DIS18_Pos (18UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EP_DMA_DIS18 (Bit 18)

◆ USB_EPDMADIS_EP_DMA_DIS19_Msk

#define USB_EPDMADIS_EP_DMA_DIS19_Msk (0x80000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EP_DMA_DIS19 (Bitfield-Mask: 0x01)

◆ USB_EPDMADIS_EP_DMA_DIS19_Pos

#define USB_EPDMADIS_EP_DMA_DIS19_Pos (19UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EP_DMA_DIS19 (Bit 19)

◆ USB_EPDMADIS_EP_DMA_DIS1_Msk

#define USB_EPDMADIS_EP_DMA_DIS1_Msk (0x2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EP_DMA_DIS1 (Bitfield-Mask: 0x01)

◆ USB_EPDMADIS_EP_DMA_DIS1_Pos

#define USB_EPDMADIS_EP_DMA_DIS1_Pos (1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EP_DMA_DIS1 (Bit 1)

◆ USB_EPDMADIS_EP_DMA_DIS20_Msk

#define USB_EPDMADIS_EP_DMA_DIS20_Msk (0x100000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EP_DMA_DIS20 (Bitfield-Mask: 0x01)

◆ USB_EPDMADIS_EP_DMA_DIS20_Pos

#define USB_EPDMADIS_EP_DMA_DIS20_Pos (20UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EP_DMA_DIS20 (Bit 20)

◆ USB_EPDMADIS_EP_DMA_DIS21_Msk

#define USB_EPDMADIS_EP_DMA_DIS21_Msk (0x200000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EP_DMA_DIS21 (Bitfield-Mask: 0x01)

◆ USB_EPDMADIS_EP_DMA_DIS21_Pos

#define USB_EPDMADIS_EP_DMA_DIS21_Pos (21UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EP_DMA_DIS21 (Bit 21)

◆ USB_EPDMADIS_EP_DMA_DIS22_Msk

#define USB_EPDMADIS_EP_DMA_DIS22_Msk (0x400000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EP_DMA_DIS22 (Bitfield-Mask: 0x01)

◆ USB_EPDMADIS_EP_DMA_DIS22_Pos

#define USB_EPDMADIS_EP_DMA_DIS22_Pos (22UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EP_DMA_DIS22 (Bit 22)

◆ USB_EPDMADIS_EP_DMA_DIS23_Msk

#define USB_EPDMADIS_EP_DMA_DIS23_Msk (0x800000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EP_DMA_DIS23 (Bitfield-Mask: 0x01)

◆ USB_EPDMADIS_EP_DMA_DIS23_Pos

#define USB_EPDMADIS_EP_DMA_DIS23_Pos (23UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EP_DMA_DIS23 (Bit 23)

◆ USB_EPDMADIS_EP_DMA_DIS24_Msk

#define USB_EPDMADIS_EP_DMA_DIS24_Msk (0x1000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EP_DMA_DIS24 (Bitfield-Mask: 0x01)

◆ USB_EPDMADIS_EP_DMA_DIS24_Pos

#define USB_EPDMADIS_EP_DMA_DIS24_Pos (24UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EP_DMA_DIS24 (Bit 24)

◆ USB_EPDMADIS_EP_DMA_DIS25_Msk

#define USB_EPDMADIS_EP_DMA_DIS25_Msk (0x2000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EP_DMA_DIS25 (Bitfield-Mask: 0x01)

◆ USB_EPDMADIS_EP_DMA_DIS25_Pos

#define USB_EPDMADIS_EP_DMA_DIS25_Pos (25UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EP_DMA_DIS25 (Bit 25)

◆ USB_EPDMADIS_EP_DMA_DIS26_Msk

#define USB_EPDMADIS_EP_DMA_DIS26_Msk (0x4000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EP_DMA_DIS26 (Bitfield-Mask: 0x01)

◆ USB_EPDMADIS_EP_DMA_DIS26_Pos

#define USB_EPDMADIS_EP_DMA_DIS26_Pos (26UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EP_DMA_DIS26 (Bit 26)

◆ USB_EPDMADIS_EP_DMA_DIS27_Msk

#define USB_EPDMADIS_EP_DMA_DIS27_Msk (0x8000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EP_DMA_DIS27 (Bitfield-Mask: 0x01)

◆ USB_EPDMADIS_EP_DMA_DIS27_Pos

#define USB_EPDMADIS_EP_DMA_DIS27_Pos (27UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EP_DMA_DIS27 (Bit 27)

◆ USB_EPDMADIS_EP_DMA_DIS28_Msk

#define USB_EPDMADIS_EP_DMA_DIS28_Msk (0x10000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EP_DMA_DIS28 (Bitfield-Mask: 0x01)

◆ USB_EPDMADIS_EP_DMA_DIS28_Pos

#define USB_EPDMADIS_EP_DMA_DIS28_Pos (28UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EP_DMA_DIS28 (Bit 28)

◆ USB_EPDMADIS_EP_DMA_DIS29_Msk

#define USB_EPDMADIS_EP_DMA_DIS29_Msk (0x20000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EP_DMA_DIS29 (Bitfield-Mask: 0x01)

◆ USB_EPDMADIS_EP_DMA_DIS29_Pos

#define USB_EPDMADIS_EP_DMA_DIS29_Pos (29UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EP_DMA_DIS29 (Bit 29)

◆ USB_EPDMADIS_EP_DMA_DIS2_Msk

#define USB_EPDMADIS_EP_DMA_DIS2_Msk (0x4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EP_DMA_DIS2 (Bitfield-Mask: 0x01)

◆ USB_EPDMADIS_EP_DMA_DIS2_Pos

#define USB_EPDMADIS_EP_DMA_DIS2_Pos (2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EP_DMA_DIS2 (Bit 2)

◆ USB_EPDMADIS_EP_DMA_DIS30_Msk

#define USB_EPDMADIS_EP_DMA_DIS30_Msk (0x40000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EP_DMA_DIS30 (Bitfield-Mask: 0x01)

◆ USB_EPDMADIS_EP_DMA_DIS30_Pos

#define USB_EPDMADIS_EP_DMA_DIS30_Pos (30UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EP_DMA_DIS30 (Bit 30)

◆ USB_EPDMADIS_EP_DMA_DIS31_Msk

#define USB_EPDMADIS_EP_DMA_DIS31_Msk (0x80000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EP_DMA_DIS31 (Bitfield-Mask: 0x01)

◆ USB_EPDMADIS_EP_DMA_DIS31_Pos

#define USB_EPDMADIS_EP_DMA_DIS31_Pos (31UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EP_DMA_DIS31 (Bit 31)

◆ USB_EPDMADIS_EP_DMA_DIS3_Msk

#define USB_EPDMADIS_EP_DMA_DIS3_Msk (0x8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EP_DMA_DIS3 (Bitfield-Mask: 0x01)

◆ USB_EPDMADIS_EP_DMA_DIS3_Pos

#define USB_EPDMADIS_EP_DMA_DIS3_Pos (3UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EP_DMA_DIS3 (Bit 3)

◆ USB_EPDMADIS_EP_DMA_DIS4_Msk

#define USB_EPDMADIS_EP_DMA_DIS4_Msk (0x10UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EP_DMA_DIS4 (Bitfield-Mask: 0x01)

◆ USB_EPDMADIS_EP_DMA_DIS4_Pos

#define USB_EPDMADIS_EP_DMA_DIS4_Pos (4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EP_DMA_DIS4 (Bit 4)

◆ USB_EPDMADIS_EP_DMA_DIS5_Msk

#define USB_EPDMADIS_EP_DMA_DIS5_Msk (0x20UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EP_DMA_DIS5 (Bitfield-Mask: 0x01)

◆ USB_EPDMADIS_EP_DMA_DIS5_Pos

#define USB_EPDMADIS_EP_DMA_DIS5_Pos (5UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EP_DMA_DIS5 (Bit 5)

◆ USB_EPDMADIS_EP_DMA_DIS6_Msk

#define USB_EPDMADIS_EP_DMA_DIS6_Msk (0x40UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EP_DMA_DIS6 (Bitfield-Mask: 0x01)

◆ USB_EPDMADIS_EP_DMA_DIS6_Pos

#define USB_EPDMADIS_EP_DMA_DIS6_Pos (6UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EP_DMA_DIS6 (Bit 6)

◆ USB_EPDMADIS_EP_DMA_DIS7_Msk

#define USB_EPDMADIS_EP_DMA_DIS7_Msk (0x80UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EP_DMA_DIS7 (Bitfield-Mask: 0x01)

◆ USB_EPDMADIS_EP_DMA_DIS7_Pos

#define USB_EPDMADIS_EP_DMA_DIS7_Pos (7UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EP_DMA_DIS7 (Bit 7)

◆ USB_EPDMADIS_EP_DMA_DIS8_Msk

#define USB_EPDMADIS_EP_DMA_DIS8_Msk (0x100UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EP_DMA_DIS8 (Bitfield-Mask: 0x01)

◆ USB_EPDMADIS_EP_DMA_DIS8_Pos

#define USB_EPDMADIS_EP_DMA_DIS8_Pos (8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EP_DMA_DIS8 (Bit 8)

◆ USB_EPDMADIS_EP_DMA_DIS9_Msk

#define USB_EPDMADIS_EP_DMA_DIS9_Msk (0x200UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EP_DMA_DIS9 (Bitfield-Mask: 0x01)

◆ USB_EPDMADIS_EP_DMA_DIS9_Pos

#define USB_EPDMADIS_EP_DMA_DIS9_Pos (9UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EP_DMA_DIS9 (Bit 9)

◆ USB_EPDMAEN_EP_DMA_EN0_Msk

#define USB_EPDMAEN_EP_DMA_EN0_Msk (0x1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EP_DMA_EN0 (Bitfield-Mask: 0x01)

◆ USB_EPDMAEN_EP_DMA_EN0_Pos

#define USB_EPDMAEN_EP_DMA_EN0_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EP_DMA_EN0 (Bit 0)

◆ USB_EPDMAEN_EP_DMA_EN1_Msk

#define USB_EPDMAEN_EP_DMA_EN1_Msk (0x2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EP_DMA_EN1 (Bitfield-Mask: 0x01)

◆ USB_EPDMAEN_EP_DMA_EN1_Pos

#define USB_EPDMAEN_EP_DMA_EN1_Pos (1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EP_DMA_EN1 (Bit 1)

◆ USB_EPDMAEN_EP_DMA_EN_Msk

#define USB_EPDMAEN_EP_DMA_EN_Msk (0xfffffffcUL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EP_DMA_EN (Bitfield-Mask: 0x3fffffff)

◆ USB_EPDMAEN_EP_DMA_EN_Pos

#define USB_EPDMAEN_EP_DMA_EN_Pos (2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EP_DMA_EN (Bit 2)

◆ USB_EPDMAST_EP_DMA_ST0_Msk

#define USB_EPDMAST_EP_DMA_ST0_Msk (0x1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EP_DMA_ST0 (Bitfield-Mask: 0x01)

◆ USB_EPDMAST_EP_DMA_ST0_Pos

#define USB_EPDMAST_EP_DMA_ST0_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EP_DMA_ST0 (Bit 0)

◆ USB_EPDMAST_EP_DMA_ST10_Msk

#define USB_EPDMAST_EP_DMA_ST10_Msk (0x400UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EP_DMA_ST10 (Bitfield-Mask: 0x01)

◆ USB_EPDMAST_EP_DMA_ST10_Pos

#define USB_EPDMAST_EP_DMA_ST10_Pos (10UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EP_DMA_ST10 (Bit 10)

◆ USB_EPDMAST_EP_DMA_ST11_Msk

#define USB_EPDMAST_EP_DMA_ST11_Msk (0x800UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EP_DMA_ST11 (Bitfield-Mask: 0x01)

◆ USB_EPDMAST_EP_DMA_ST11_Pos

#define USB_EPDMAST_EP_DMA_ST11_Pos (11UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EP_DMA_ST11 (Bit 11)

◆ USB_EPDMAST_EP_DMA_ST12_Msk

#define USB_EPDMAST_EP_DMA_ST12_Msk (0x1000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EP_DMA_ST12 (Bitfield-Mask: 0x01)

◆ USB_EPDMAST_EP_DMA_ST12_Pos

#define USB_EPDMAST_EP_DMA_ST12_Pos (12UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EP_DMA_ST12 (Bit 12)

◆ USB_EPDMAST_EP_DMA_ST13_Msk

#define USB_EPDMAST_EP_DMA_ST13_Msk (0x2000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EP_DMA_ST13 (Bitfield-Mask: 0x01)

◆ USB_EPDMAST_EP_DMA_ST13_Pos

#define USB_EPDMAST_EP_DMA_ST13_Pos (13UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EP_DMA_ST13 (Bit 13)

◆ USB_EPDMAST_EP_DMA_ST14_Msk

#define USB_EPDMAST_EP_DMA_ST14_Msk (0x4000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EP_DMA_ST14 (Bitfield-Mask: 0x01)

◆ USB_EPDMAST_EP_DMA_ST14_Pos

#define USB_EPDMAST_EP_DMA_ST14_Pos (14UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EP_DMA_ST14 (Bit 14)

◆ USB_EPDMAST_EP_DMA_ST15_Msk

#define USB_EPDMAST_EP_DMA_ST15_Msk (0x8000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EP_DMA_ST15 (Bitfield-Mask: 0x01)

◆ USB_EPDMAST_EP_DMA_ST15_Pos

#define USB_EPDMAST_EP_DMA_ST15_Pos (15UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EP_DMA_ST15 (Bit 15)

◆ USB_EPDMAST_EP_DMA_ST16_Msk

#define USB_EPDMAST_EP_DMA_ST16_Msk (0x10000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EP_DMA_ST16 (Bitfield-Mask: 0x01)

◆ USB_EPDMAST_EP_DMA_ST16_Pos

#define USB_EPDMAST_EP_DMA_ST16_Pos (16UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EP_DMA_ST16 (Bit 16)

◆ USB_EPDMAST_EP_DMA_ST17_Msk

#define USB_EPDMAST_EP_DMA_ST17_Msk (0x20000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EP_DMA_ST17 (Bitfield-Mask: 0x01)

◆ USB_EPDMAST_EP_DMA_ST17_Pos

#define USB_EPDMAST_EP_DMA_ST17_Pos (17UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EP_DMA_ST17 (Bit 17)

◆ USB_EPDMAST_EP_DMA_ST18_Msk

#define USB_EPDMAST_EP_DMA_ST18_Msk (0x40000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EP_DMA_ST18 (Bitfield-Mask: 0x01)

◆ USB_EPDMAST_EP_DMA_ST18_Pos

#define USB_EPDMAST_EP_DMA_ST18_Pos (18UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EP_DMA_ST18 (Bit 18)

◆ USB_EPDMAST_EP_DMA_ST19_Msk

#define USB_EPDMAST_EP_DMA_ST19_Msk (0x80000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EP_DMA_ST19 (Bitfield-Mask: 0x01)

◆ USB_EPDMAST_EP_DMA_ST19_Pos

#define USB_EPDMAST_EP_DMA_ST19_Pos (19UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EP_DMA_ST19 (Bit 19)

◆ USB_EPDMAST_EP_DMA_ST1_Msk

#define USB_EPDMAST_EP_DMA_ST1_Msk (0x2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EP_DMA_ST1 (Bitfield-Mask: 0x01)

◆ USB_EPDMAST_EP_DMA_ST1_Pos

#define USB_EPDMAST_EP_DMA_ST1_Pos (1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EP_DMA_ST1 (Bit 1)

◆ USB_EPDMAST_EP_DMA_ST20_Msk

#define USB_EPDMAST_EP_DMA_ST20_Msk (0x100000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EP_DMA_ST20 (Bitfield-Mask: 0x01)

◆ USB_EPDMAST_EP_DMA_ST20_Pos

#define USB_EPDMAST_EP_DMA_ST20_Pos (20UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EP_DMA_ST20 (Bit 20)

◆ USB_EPDMAST_EP_DMA_ST21_Msk

#define USB_EPDMAST_EP_DMA_ST21_Msk (0x200000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EP_DMA_ST21 (Bitfield-Mask: 0x01)

◆ USB_EPDMAST_EP_DMA_ST21_Pos

#define USB_EPDMAST_EP_DMA_ST21_Pos (21UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EP_DMA_ST21 (Bit 21)

◆ USB_EPDMAST_EP_DMA_ST22_Msk

#define USB_EPDMAST_EP_DMA_ST22_Msk (0x400000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EP_DMA_ST22 (Bitfield-Mask: 0x01)

◆ USB_EPDMAST_EP_DMA_ST22_Pos

#define USB_EPDMAST_EP_DMA_ST22_Pos (22UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EP_DMA_ST22 (Bit 22)

◆ USB_EPDMAST_EP_DMA_ST23_Msk

#define USB_EPDMAST_EP_DMA_ST23_Msk (0x800000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EP_DMA_ST23 (Bitfield-Mask: 0x01)

◆ USB_EPDMAST_EP_DMA_ST23_Pos

#define USB_EPDMAST_EP_DMA_ST23_Pos (23UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EP_DMA_ST23 (Bit 23)

◆ USB_EPDMAST_EP_DMA_ST24_Msk

#define USB_EPDMAST_EP_DMA_ST24_Msk (0x1000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EP_DMA_ST24 (Bitfield-Mask: 0x01)

◆ USB_EPDMAST_EP_DMA_ST24_Pos

#define USB_EPDMAST_EP_DMA_ST24_Pos (24UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EP_DMA_ST24 (Bit 24)

◆ USB_EPDMAST_EP_DMA_ST25_Msk

#define USB_EPDMAST_EP_DMA_ST25_Msk (0x2000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EP_DMA_ST25 (Bitfield-Mask: 0x01)

◆ USB_EPDMAST_EP_DMA_ST25_Pos

#define USB_EPDMAST_EP_DMA_ST25_Pos (25UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EP_DMA_ST25 (Bit 25)

◆ USB_EPDMAST_EP_DMA_ST26_Msk

#define USB_EPDMAST_EP_DMA_ST26_Msk (0x4000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EP_DMA_ST26 (Bitfield-Mask: 0x01)

◆ USB_EPDMAST_EP_DMA_ST26_Pos

#define USB_EPDMAST_EP_DMA_ST26_Pos (26UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EP_DMA_ST26 (Bit 26)

◆ USB_EPDMAST_EP_DMA_ST27_Msk

#define USB_EPDMAST_EP_DMA_ST27_Msk (0x8000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EP_DMA_ST27 (Bitfield-Mask: 0x01)

◆ USB_EPDMAST_EP_DMA_ST27_Pos

#define USB_EPDMAST_EP_DMA_ST27_Pos (27UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EP_DMA_ST27 (Bit 27)

◆ USB_EPDMAST_EP_DMA_ST28_Msk

#define USB_EPDMAST_EP_DMA_ST28_Msk (0x10000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EP_DMA_ST28 (Bitfield-Mask: 0x01)

◆ USB_EPDMAST_EP_DMA_ST28_Pos

#define USB_EPDMAST_EP_DMA_ST28_Pos (28UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EP_DMA_ST28 (Bit 28)

◆ USB_EPDMAST_EP_DMA_ST29_Msk

#define USB_EPDMAST_EP_DMA_ST29_Msk (0x20000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EP_DMA_ST29 (Bitfield-Mask: 0x01)

◆ USB_EPDMAST_EP_DMA_ST29_Pos

#define USB_EPDMAST_EP_DMA_ST29_Pos (29UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EP_DMA_ST29 (Bit 29)

◆ USB_EPDMAST_EP_DMA_ST2_Msk

#define USB_EPDMAST_EP_DMA_ST2_Msk (0x4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EP_DMA_ST2 (Bitfield-Mask: 0x01)

◆ USB_EPDMAST_EP_DMA_ST2_Pos

#define USB_EPDMAST_EP_DMA_ST2_Pos (2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EP_DMA_ST2 (Bit 2)

◆ USB_EPDMAST_EP_DMA_ST30_Msk

#define USB_EPDMAST_EP_DMA_ST30_Msk (0x40000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EP_DMA_ST30 (Bitfield-Mask: 0x01)

◆ USB_EPDMAST_EP_DMA_ST30_Pos

#define USB_EPDMAST_EP_DMA_ST30_Pos (30UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EP_DMA_ST30 (Bit 30)

◆ USB_EPDMAST_EP_DMA_ST31_Msk

#define USB_EPDMAST_EP_DMA_ST31_Msk (0x80000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EP_DMA_ST31 (Bitfield-Mask: 0x01)

◆ USB_EPDMAST_EP_DMA_ST31_Pos

#define USB_EPDMAST_EP_DMA_ST31_Pos (31UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EP_DMA_ST31 (Bit 31)

◆ USB_EPDMAST_EP_DMA_ST3_Msk

#define USB_EPDMAST_EP_DMA_ST3_Msk (0x8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EP_DMA_ST3 (Bitfield-Mask: 0x01)

◆ USB_EPDMAST_EP_DMA_ST3_Pos

#define USB_EPDMAST_EP_DMA_ST3_Pos (3UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EP_DMA_ST3 (Bit 3)

◆ USB_EPDMAST_EP_DMA_ST4_Msk

#define USB_EPDMAST_EP_DMA_ST4_Msk (0x10UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EP_DMA_ST4 (Bitfield-Mask: 0x01)

◆ USB_EPDMAST_EP_DMA_ST4_Pos

#define USB_EPDMAST_EP_DMA_ST4_Pos (4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EP_DMA_ST4 (Bit 4)

◆ USB_EPDMAST_EP_DMA_ST5_Msk

#define USB_EPDMAST_EP_DMA_ST5_Msk (0x20UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EP_DMA_ST5 (Bitfield-Mask: 0x01)

◆ USB_EPDMAST_EP_DMA_ST5_Pos

#define USB_EPDMAST_EP_DMA_ST5_Pos (5UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EP_DMA_ST5 (Bit 5)

◆ USB_EPDMAST_EP_DMA_ST6_Msk

#define USB_EPDMAST_EP_DMA_ST6_Msk (0x40UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EP_DMA_ST6 (Bitfield-Mask: 0x01)

◆ USB_EPDMAST_EP_DMA_ST6_Pos

#define USB_EPDMAST_EP_DMA_ST6_Pos (6UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EP_DMA_ST6 (Bit 6)

◆ USB_EPDMAST_EP_DMA_ST7_Msk

#define USB_EPDMAST_EP_DMA_ST7_Msk (0x80UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EP_DMA_ST7 (Bitfield-Mask: 0x01)

◆ USB_EPDMAST_EP_DMA_ST7_Pos

#define USB_EPDMAST_EP_DMA_ST7_Pos (7UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EP_DMA_ST7 (Bit 7)

◆ USB_EPDMAST_EP_DMA_ST8_Msk

#define USB_EPDMAST_EP_DMA_ST8_Msk (0x100UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EP_DMA_ST8 (Bitfield-Mask: 0x01)

◆ USB_EPDMAST_EP_DMA_ST8_Pos

#define USB_EPDMAST_EP_DMA_ST8_Pos (8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EP_DMA_ST8 (Bit 8)

◆ USB_EPDMAST_EP_DMA_ST9_Msk

#define USB_EPDMAST_EP_DMA_ST9_Msk (0x200UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EP_DMA_ST9 (Bitfield-Mask: 0x01)

◆ USB_EPDMAST_EP_DMA_ST9_Pos

#define USB_EPDMAST_EP_DMA_ST9_Pos (9UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EP_DMA_ST9 (Bit 9)

◆ USB_EPIND_PHY_EP_Msk

#define USB_EPIND_PHY_EP_Msk (0x1fUL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PHY_EP (Bitfield-Mask: 0x1f)

◆ USB_EPIND_PHY_EP_Pos

#define USB_EPIND_PHY_EP_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PHY_EP (Bit 0)

◆ USB_EPINTCLR_EPCLR0_Msk

#define USB_EPINTCLR_EPCLR0_Msk (0x1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPCLR0 (Bitfield-Mask: 0x01)

◆ USB_EPINTCLR_EPCLR0_Pos

#define USB_EPINTCLR_EPCLR0_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPCLR0 (Bit 0)

◆ USB_EPINTCLR_EPCLR10_Msk

#define USB_EPINTCLR_EPCLR10_Msk (0x400UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPCLR10 (Bitfield-Mask: 0x01)

◆ USB_EPINTCLR_EPCLR10_Pos

#define USB_EPINTCLR_EPCLR10_Pos (10UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPCLR10 (Bit 10)

◆ USB_EPINTCLR_EPCLR11_Msk

#define USB_EPINTCLR_EPCLR11_Msk (0x800UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPCLR11 (Bitfield-Mask: 0x01)

◆ USB_EPINTCLR_EPCLR11_Pos

#define USB_EPINTCLR_EPCLR11_Pos (11UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPCLR11 (Bit 11)

◆ USB_EPINTCLR_EPCLR12_Msk

#define USB_EPINTCLR_EPCLR12_Msk (0x1000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPCLR12 (Bitfield-Mask: 0x01)

◆ USB_EPINTCLR_EPCLR12_Pos

#define USB_EPINTCLR_EPCLR12_Pos (12UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPCLR12 (Bit 12)

◆ USB_EPINTCLR_EPCLR13_Msk

#define USB_EPINTCLR_EPCLR13_Msk (0x2000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPCLR13 (Bitfield-Mask: 0x01)

◆ USB_EPINTCLR_EPCLR13_Pos

#define USB_EPINTCLR_EPCLR13_Pos (13UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPCLR13 (Bit 13)

◆ USB_EPINTCLR_EPCLR14_Msk

#define USB_EPINTCLR_EPCLR14_Msk (0x4000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPCLR14 (Bitfield-Mask: 0x01)

◆ USB_EPINTCLR_EPCLR14_Pos

#define USB_EPINTCLR_EPCLR14_Pos (14UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPCLR14 (Bit 14)

◆ USB_EPINTCLR_EPCLR15_Msk

#define USB_EPINTCLR_EPCLR15_Msk (0x8000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPCLR15 (Bitfield-Mask: 0x01)

◆ USB_EPINTCLR_EPCLR15_Pos

#define USB_EPINTCLR_EPCLR15_Pos (15UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPCLR15 (Bit 15)

◆ USB_EPINTCLR_EPCLR16_Msk

#define USB_EPINTCLR_EPCLR16_Msk (0x10000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPCLR16 (Bitfield-Mask: 0x01)

◆ USB_EPINTCLR_EPCLR16_Pos

#define USB_EPINTCLR_EPCLR16_Pos (16UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPCLR16 (Bit 16)

◆ USB_EPINTCLR_EPCLR17_Msk

#define USB_EPINTCLR_EPCLR17_Msk (0x20000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPCLR17 (Bitfield-Mask: 0x01)

◆ USB_EPINTCLR_EPCLR17_Pos

#define USB_EPINTCLR_EPCLR17_Pos (17UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPCLR17 (Bit 17)

◆ USB_EPINTCLR_EPCLR18_Msk

#define USB_EPINTCLR_EPCLR18_Msk (0x40000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPCLR18 (Bitfield-Mask: 0x01)

◆ USB_EPINTCLR_EPCLR18_Pos

#define USB_EPINTCLR_EPCLR18_Pos (18UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPCLR18 (Bit 18)

◆ USB_EPINTCLR_EPCLR19_Msk

#define USB_EPINTCLR_EPCLR19_Msk (0x80000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPCLR19 (Bitfield-Mask: 0x01)

◆ USB_EPINTCLR_EPCLR19_Pos

#define USB_EPINTCLR_EPCLR19_Pos (19UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPCLR19 (Bit 19)

◆ USB_EPINTCLR_EPCLR1_Msk

#define USB_EPINTCLR_EPCLR1_Msk (0x2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPCLR1 (Bitfield-Mask: 0x01)

◆ USB_EPINTCLR_EPCLR1_Pos

#define USB_EPINTCLR_EPCLR1_Pos (1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPCLR1 (Bit 1)

◆ USB_EPINTCLR_EPCLR20_Msk

#define USB_EPINTCLR_EPCLR20_Msk (0x100000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPCLR20 (Bitfield-Mask: 0x01)

◆ USB_EPINTCLR_EPCLR20_Pos

#define USB_EPINTCLR_EPCLR20_Pos (20UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPCLR20 (Bit 20)

◆ USB_EPINTCLR_EPCLR21_Msk

#define USB_EPINTCLR_EPCLR21_Msk (0x200000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPCLR21 (Bitfield-Mask: 0x01)

◆ USB_EPINTCLR_EPCLR21_Pos

#define USB_EPINTCLR_EPCLR21_Pos (21UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPCLR21 (Bit 21)

◆ USB_EPINTCLR_EPCLR22_Msk

#define USB_EPINTCLR_EPCLR22_Msk (0x400000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPCLR22 (Bitfield-Mask: 0x01)

◆ USB_EPINTCLR_EPCLR22_Pos

#define USB_EPINTCLR_EPCLR22_Pos (22UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPCLR22 (Bit 22)

◆ USB_EPINTCLR_EPCLR23_Msk

#define USB_EPINTCLR_EPCLR23_Msk (0x800000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPCLR23 (Bitfield-Mask: 0x01)

◆ USB_EPINTCLR_EPCLR23_Pos

#define USB_EPINTCLR_EPCLR23_Pos (23UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPCLR23 (Bit 23)

◆ USB_EPINTCLR_EPCLR24_Msk

#define USB_EPINTCLR_EPCLR24_Msk (0x1000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPCLR24 (Bitfield-Mask: 0x01)

◆ USB_EPINTCLR_EPCLR24_Pos

#define USB_EPINTCLR_EPCLR24_Pos (24UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPCLR24 (Bit 24)

◆ USB_EPINTCLR_EPCLR25_Msk

#define USB_EPINTCLR_EPCLR25_Msk (0x2000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPCLR25 (Bitfield-Mask: 0x01)

◆ USB_EPINTCLR_EPCLR25_Pos

#define USB_EPINTCLR_EPCLR25_Pos (25UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPCLR25 (Bit 25)

◆ USB_EPINTCLR_EPCLR26_Msk

#define USB_EPINTCLR_EPCLR26_Msk (0x4000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPCLR26 (Bitfield-Mask: 0x01)

◆ USB_EPINTCLR_EPCLR26_Pos

#define USB_EPINTCLR_EPCLR26_Pos (26UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPCLR26 (Bit 26)

◆ USB_EPINTCLR_EPCLR27_Msk

#define USB_EPINTCLR_EPCLR27_Msk (0x8000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPCLR27 (Bitfield-Mask: 0x01)

◆ USB_EPINTCLR_EPCLR27_Pos

#define USB_EPINTCLR_EPCLR27_Pos (27UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPCLR27 (Bit 27)

◆ USB_EPINTCLR_EPCLR28_Msk

#define USB_EPINTCLR_EPCLR28_Msk (0x10000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPCLR28 (Bitfield-Mask: 0x01)

◆ USB_EPINTCLR_EPCLR28_Pos

#define USB_EPINTCLR_EPCLR28_Pos (28UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPCLR28 (Bit 28)

◆ USB_EPINTCLR_EPCLR29_Msk

#define USB_EPINTCLR_EPCLR29_Msk (0x20000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPCLR29 (Bitfield-Mask: 0x01)

◆ USB_EPINTCLR_EPCLR29_Pos

#define USB_EPINTCLR_EPCLR29_Pos (29UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPCLR29 (Bit 29)

◆ USB_EPINTCLR_EPCLR2_Msk

#define USB_EPINTCLR_EPCLR2_Msk (0x4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPCLR2 (Bitfield-Mask: 0x01)

◆ USB_EPINTCLR_EPCLR2_Pos

#define USB_EPINTCLR_EPCLR2_Pos (2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPCLR2 (Bit 2)

◆ USB_EPINTCLR_EPCLR30_Msk

#define USB_EPINTCLR_EPCLR30_Msk (0x40000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPCLR30 (Bitfield-Mask: 0x01)

◆ USB_EPINTCLR_EPCLR30_Pos

#define USB_EPINTCLR_EPCLR30_Pos (30UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPCLR30 (Bit 30)

◆ USB_EPINTCLR_EPCLR31_Msk

#define USB_EPINTCLR_EPCLR31_Msk (0x80000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPCLR31 (Bitfield-Mask: 0x01)

◆ USB_EPINTCLR_EPCLR31_Pos

#define USB_EPINTCLR_EPCLR31_Pos (31UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPCLR31 (Bit 31)

◆ USB_EPINTCLR_EPCLR3_Msk

#define USB_EPINTCLR_EPCLR3_Msk (0x8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPCLR3 (Bitfield-Mask: 0x01)

◆ USB_EPINTCLR_EPCLR3_Pos

#define USB_EPINTCLR_EPCLR3_Pos (3UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPCLR3 (Bit 3)

◆ USB_EPINTCLR_EPCLR4_Msk

#define USB_EPINTCLR_EPCLR4_Msk (0x10UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPCLR4 (Bitfield-Mask: 0x01)

◆ USB_EPINTCLR_EPCLR4_Pos

#define USB_EPINTCLR_EPCLR4_Pos (4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPCLR4 (Bit 4)

◆ USB_EPINTCLR_EPCLR5_Msk

#define USB_EPINTCLR_EPCLR5_Msk (0x20UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPCLR5 (Bitfield-Mask: 0x01)

◆ USB_EPINTCLR_EPCLR5_Pos

#define USB_EPINTCLR_EPCLR5_Pos (5UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPCLR5 (Bit 5)

◆ USB_EPINTCLR_EPCLR6_Msk

#define USB_EPINTCLR_EPCLR6_Msk (0x40UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPCLR6 (Bitfield-Mask: 0x01)

◆ USB_EPINTCLR_EPCLR6_Pos

#define USB_EPINTCLR_EPCLR6_Pos (6UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPCLR6 (Bit 6)

◆ USB_EPINTCLR_EPCLR7_Msk

#define USB_EPINTCLR_EPCLR7_Msk (0x80UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPCLR7 (Bitfield-Mask: 0x01)

◆ USB_EPINTCLR_EPCLR7_Pos

#define USB_EPINTCLR_EPCLR7_Pos (7UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPCLR7 (Bit 7)

◆ USB_EPINTCLR_EPCLR8_Msk

#define USB_EPINTCLR_EPCLR8_Msk (0x100UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPCLR8 (Bitfield-Mask: 0x01)

◆ USB_EPINTCLR_EPCLR8_Pos

#define USB_EPINTCLR_EPCLR8_Pos (8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPCLR8 (Bit 8)

◆ USB_EPINTCLR_EPCLR9_Msk

#define USB_EPINTCLR_EPCLR9_Msk (0x200UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPCLR9 (Bitfield-Mask: 0x01)

◆ USB_EPINTCLR_EPCLR9_Pos

#define USB_EPINTCLR_EPCLR9_Pos (9UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPCLR9 (Bit 9)

◆ USB_EPINTEN_EPEN0_Msk

#define USB_EPINTEN_EPEN0_Msk (0x1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPEN0 (Bitfield-Mask: 0x01)

◆ USB_EPINTEN_EPEN0_Pos

#define USB_EPINTEN_EPEN0_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPEN0 (Bit 0)

◆ USB_EPINTEN_EPEN10_Msk

#define USB_EPINTEN_EPEN10_Msk (0x400UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPEN10 (Bitfield-Mask: 0x01)

◆ USB_EPINTEN_EPEN10_Pos

#define USB_EPINTEN_EPEN10_Pos (10UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPEN10 (Bit 10)

◆ USB_EPINTEN_EPEN11_Msk

#define USB_EPINTEN_EPEN11_Msk (0x800UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPEN11 (Bitfield-Mask: 0x01)

◆ USB_EPINTEN_EPEN11_Pos

#define USB_EPINTEN_EPEN11_Pos (11UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPEN11 (Bit 11)

◆ USB_EPINTEN_EPEN12_Msk

#define USB_EPINTEN_EPEN12_Msk (0x1000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPEN12 (Bitfield-Mask: 0x01)

◆ USB_EPINTEN_EPEN12_Pos

#define USB_EPINTEN_EPEN12_Pos (12UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPEN12 (Bit 12)

◆ USB_EPINTEN_EPEN13_Msk

#define USB_EPINTEN_EPEN13_Msk (0x2000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPEN13 (Bitfield-Mask: 0x01)

◆ USB_EPINTEN_EPEN13_Pos

#define USB_EPINTEN_EPEN13_Pos (13UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPEN13 (Bit 13)

◆ USB_EPINTEN_EPEN14_Msk

#define USB_EPINTEN_EPEN14_Msk (0x4000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPEN14 (Bitfield-Mask: 0x01)

◆ USB_EPINTEN_EPEN14_Pos

#define USB_EPINTEN_EPEN14_Pos (14UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPEN14 (Bit 14)

◆ USB_EPINTEN_EPEN15_Msk

#define USB_EPINTEN_EPEN15_Msk (0x8000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPEN15 (Bitfield-Mask: 0x01)

◆ USB_EPINTEN_EPEN15_Pos

#define USB_EPINTEN_EPEN15_Pos (15UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPEN15 (Bit 15)

◆ USB_EPINTEN_EPEN16_Msk

#define USB_EPINTEN_EPEN16_Msk (0x10000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPEN16 (Bitfield-Mask: 0x01)

◆ USB_EPINTEN_EPEN16_Pos

#define USB_EPINTEN_EPEN16_Pos (16UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPEN16 (Bit 16)

◆ USB_EPINTEN_EPEN17_Msk

#define USB_EPINTEN_EPEN17_Msk (0x20000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPEN17 (Bitfield-Mask: 0x01)

◆ USB_EPINTEN_EPEN17_Pos

#define USB_EPINTEN_EPEN17_Pos (17UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPEN17 (Bit 17)

◆ USB_EPINTEN_EPEN18_Msk

#define USB_EPINTEN_EPEN18_Msk (0x40000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPEN18 (Bitfield-Mask: 0x01)

◆ USB_EPINTEN_EPEN18_Pos

#define USB_EPINTEN_EPEN18_Pos (18UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPEN18 (Bit 18)

◆ USB_EPINTEN_EPEN19_Msk

#define USB_EPINTEN_EPEN19_Msk (0x80000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPEN19 (Bitfield-Mask: 0x01)

◆ USB_EPINTEN_EPEN19_Pos

#define USB_EPINTEN_EPEN19_Pos (19UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPEN19 (Bit 19)

◆ USB_EPINTEN_EPEN1_Msk

#define USB_EPINTEN_EPEN1_Msk (0x2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPEN1 (Bitfield-Mask: 0x01)

◆ USB_EPINTEN_EPEN1_Pos

#define USB_EPINTEN_EPEN1_Pos (1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPEN1 (Bit 1)

◆ USB_EPINTEN_EPEN20_Msk

#define USB_EPINTEN_EPEN20_Msk (0x100000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPEN20 (Bitfield-Mask: 0x01)

◆ USB_EPINTEN_EPEN20_Pos

#define USB_EPINTEN_EPEN20_Pos (20UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPEN20 (Bit 20)

◆ USB_EPINTEN_EPEN21_Msk

#define USB_EPINTEN_EPEN21_Msk (0x200000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPEN21 (Bitfield-Mask: 0x01)

◆ USB_EPINTEN_EPEN21_Pos

#define USB_EPINTEN_EPEN21_Pos (21UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPEN21 (Bit 21)

◆ USB_EPINTEN_EPEN22_Msk

#define USB_EPINTEN_EPEN22_Msk (0x400000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPEN22 (Bitfield-Mask: 0x01)

◆ USB_EPINTEN_EPEN22_Pos

#define USB_EPINTEN_EPEN22_Pos (22UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPEN22 (Bit 22)

◆ USB_EPINTEN_EPEN23_Msk

#define USB_EPINTEN_EPEN23_Msk (0x800000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPEN23 (Bitfield-Mask: 0x01)

◆ USB_EPINTEN_EPEN23_Pos

#define USB_EPINTEN_EPEN23_Pos (23UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPEN23 (Bit 23)

◆ USB_EPINTEN_EPEN24_Msk

#define USB_EPINTEN_EPEN24_Msk (0x1000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPEN24 (Bitfield-Mask: 0x01)

◆ USB_EPINTEN_EPEN24_Pos

#define USB_EPINTEN_EPEN24_Pos (24UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPEN24 (Bit 24)

◆ USB_EPINTEN_EPEN25_Msk

#define USB_EPINTEN_EPEN25_Msk (0x2000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPEN25 (Bitfield-Mask: 0x01)

◆ USB_EPINTEN_EPEN25_Pos

#define USB_EPINTEN_EPEN25_Pos (25UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPEN25 (Bit 25)

◆ USB_EPINTEN_EPEN26_Msk

#define USB_EPINTEN_EPEN26_Msk (0x4000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPEN26 (Bitfield-Mask: 0x01)

◆ USB_EPINTEN_EPEN26_Pos

#define USB_EPINTEN_EPEN26_Pos (26UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPEN26 (Bit 26)

◆ USB_EPINTEN_EPEN27_Msk

#define USB_EPINTEN_EPEN27_Msk (0x8000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPEN27 (Bitfield-Mask: 0x01)

◆ USB_EPINTEN_EPEN27_Pos

#define USB_EPINTEN_EPEN27_Pos (27UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPEN27 (Bit 27)

◆ USB_EPINTEN_EPEN28_Msk

#define USB_EPINTEN_EPEN28_Msk (0x10000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPEN28 (Bitfield-Mask: 0x01)

◆ USB_EPINTEN_EPEN28_Pos

#define USB_EPINTEN_EPEN28_Pos (28UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPEN28 (Bit 28)

◆ USB_EPINTEN_EPEN29_Msk

#define USB_EPINTEN_EPEN29_Msk (0x20000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPEN29 (Bitfield-Mask: 0x01)

◆ USB_EPINTEN_EPEN29_Pos

#define USB_EPINTEN_EPEN29_Pos (29UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPEN29 (Bit 29)

◆ USB_EPINTEN_EPEN2_Msk

#define USB_EPINTEN_EPEN2_Msk (0x4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPEN2 (Bitfield-Mask: 0x01)

◆ USB_EPINTEN_EPEN2_Pos

#define USB_EPINTEN_EPEN2_Pos (2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPEN2 (Bit 2)

◆ USB_EPINTEN_EPEN30_Msk

#define USB_EPINTEN_EPEN30_Msk (0x40000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPEN30 (Bitfield-Mask: 0x01)

◆ USB_EPINTEN_EPEN30_Pos

#define USB_EPINTEN_EPEN30_Pos (30UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPEN30 (Bit 30)

◆ USB_EPINTEN_EPEN31_Msk

#define USB_EPINTEN_EPEN31_Msk (0x80000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPEN31 (Bitfield-Mask: 0x01)

◆ USB_EPINTEN_EPEN31_Pos

#define USB_EPINTEN_EPEN31_Pos (31UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPEN31 (Bit 31)

◆ USB_EPINTEN_EPEN3_Msk

#define USB_EPINTEN_EPEN3_Msk (0x8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPEN3 (Bitfield-Mask: 0x01)

◆ USB_EPINTEN_EPEN3_Pos

#define USB_EPINTEN_EPEN3_Pos (3UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPEN3 (Bit 3)

◆ USB_EPINTEN_EPEN4_Msk

#define USB_EPINTEN_EPEN4_Msk (0x10UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPEN4 (Bitfield-Mask: 0x01)

◆ USB_EPINTEN_EPEN4_Pos

#define USB_EPINTEN_EPEN4_Pos (4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPEN4 (Bit 4)

◆ USB_EPINTEN_EPEN5_Msk

#define USB_EPINTEN_EPEN5_Msk (0x20UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPEN5 (Bitfield-Mask: 0x01)

◆ USB_EPINTEN_EPEN5_Pos

#define USB_EPINTEN_EPEN5_Pos (5UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPEN5 (Bit 5)

◆ USB_EPINTEN_EPEN6_Msk

#define USB_EPINTEN_EPEN6_Msk (0x40UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPEN6 (Bitfield-Mask: 0x01)

◆ USB_EPINTEN_EPEN6_Pos

#define USB_EPINTEN_EPEN6_Pos (6UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPEN6 (Bit 6)

◆ USB_EPINTEN_EPEN7_Msk

#define USB_EPINTEN_EPEN7_Msk (0x80UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPEN7 (Bitfield-Mask: 0x01)

◆ USB_EPINTEN_EPEN7_Pos

#define USB_EPINTEN_EPEN7_Pos (7UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPEN7 (Bit 7)

◆ USB_EPINTEN_EPEN8_Msk

#define USB_EPINTEN_EPEN8_Msk (0x100UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPEN8 (Bitfield-Mask: 0x01)

◆ USB_EPINTEN_EPEN8_Pos

#define USB_EPINTEN_EPEN8_Pos (8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPEN8 (Bit 8)

◆ USB_EPINTEN_EPEN9_Msk

#define USB_EPINTEN_EPEN9_Msk (0x200UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPEN9 (Bitfield-Mask: 0x01)

◆ USB_EPINTEN_EPEN9_Pos

#define USB_EPINTEN_EPEN9_Pos (9UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPEN9 (Bit 9)

◆ USB_EPINTPRI_EPPRI0_Msk

#define USB_EPINTPRI_EPPRI0_Msk (0x1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPPRI0 (Bitfield-Mask: 0x01)

◆ USB_EPINTPRI_EPPRI0_Pos

#define USB_EPINTPRI_EPPRI0_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPPRI0 (Bit 0)

◆ USB_EPINTPRI_EPPRI10_Msk

#define USB_EPINTPRI_EPPRI10_Msk (0x400UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPPRI10 (Bitfield-Mask: 0x01)

◆ USB_EPINTPRI_EPPRI10_Pos

#define USB_EPINTPRI_EPPRI10_Pos (10UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPPRI10 (Bit 10)

◆ USB_EPINTPRI_EPPRI11_Msk

#define USB_EPINTPRI_EPPRI11_Msk (0x800UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPPRI11 (Bitfield-Mask: 0x01)

◆ USB_EPINTPRI_EPPRI11_Pos

#define USB_EPINTPRI_EPPRI11_Pos (11UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPPRI11 (Bit 11)

◆ USB_EPINTPRI_EPPRI12_Msk

#define USB_EPINTPRI_EPPRI12_Msk (0x1000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPPRI12 (Bitfield-Mask: 0x01)

◆ USB_EPINTPRI_EPPRI12_Pos

#define USB_EPINTPRI_EPPRI12_Pos (12UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPPRI12 (Bit 12)

◆ USB_EPINTPRI_EPPRI13_Msk

#define USB_EPINTPRI_EPPRI13_Msk (0x2000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPPRI13 (Bitfield-Mask: 0x01)

◆ USB_EPINTPRI_EPPRI13_Pos

#define USB_EPINTPRI_EPPRI13_Pos (13UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPPRI13 (Bit 13)

◆ USB_EPINTPRI_EPPRI14_Msk

#define USB_EPINTPRI_EPPRI14_Msk (0x4000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPPRI14 (Bitfield-Mask: 0x01)

◆ USB_EPINTPRI_EPPRI14_Pos

#define USB_EPINTPRI_EPPRI14_Pos (14UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPPRI14 (Bit 14)

◆ USB_EPINTPRI_EPPRI15_Msk

#define USB_EPINTPRI_EPPRI15_Msk (0x8000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPPRI15 (Bitfield-Mask: 0x01)

◆ USB_EPINTPRI_EPPRI15_Pos

#define USB_EPINTPRI_EPPRI15_Pos (15UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPPRI15 (Bit 15)

◆ USB_EPINTPRI_EPPRI16_Msk

#define USB_EPINTPRI_EPPRI16_Msk (0x10000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPPRI16 (Bitfield-Mask: 0x01)

◆ USB_EPINTPRI_EPPRI16_Pos

#define USB_EPINTPRI_EPPRI16_Pos (16UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPPRI16 (Bit 16)

◆ USB_EPINTPRI_EPPRI17_Msk

#define USB_EPINTPRI_EPPRI17_Msk (0x20000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPPRI17 (Bitfield-Mask: 0x01)

◆ USB_EPINTPRI_EPPRI17_Pos

#define USB_EPINTPRI_EPPRI17_Pos (17UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPPRI17 (Bit 17)

◆ USB_EPINTPRI_EPPRI18_Msk

#define USB_EPINTPRI_EPPRI18_Msk (0x40000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPPRI18 (Bitfield-Mask: 0x01)

◆ USB_EPINTPRI_EPPRI18_Pos

#define USB_EPINTPRI_EPPRI18_Pos (18UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPPRI18 (Bit 18)

◆ USB_EPINTPRI_EPPRI19_Msk

#define USB_EPINTPRI_EPPRI19_Msk (0x80000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPPRI19 (Bitfield-Mask: 0x01)

◆ USB_EPINTPRI_EPPRI19_Pos

#define USB_EPINTPRI_EPPRI19_Pos (19UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPPRI19 (Bit 19)

◆ USB_EPINTPRI_EPPRI1_Msk

#define USB_EPINTPRI_EPPRI1_Msk (0x2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPPRI1 (Bitfield-Mask: 0x01)

◆ USB_EPINTPRI_EPPRI1_Pos

#define USB_EPINTPRI_EPPRI1_Pos (1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPPRI1 (Bit 1)

◆ USB_EPINTPRI_EPPRI20_Msk

#define USB_EPINTPRI_EPPRI20_Msk (0x100000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPPRI20 (Bitfield-Mask: 0x01)

◆ USB_EPINTPRI_EPPRI20_Pos

#define USB_EPINTPRI_EPPRI20_Pos (20UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPPRI20 (Bit 20)

◆ USB_EPINTPRI_EPPRI21_Msk

#define USB_EPINTPRI_EPPRI21_Msk (0x200000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPPRI21 (Bitfield-Mask: 0x01)

◆ USB_EPINTPRI_EPPRI21_Pos

#define USB_EPINTPRI_EPPRI21_Pos (21UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPPRI21 (Bit 21)

◆ USB_EPINTPRI_EPPRI22_Msk

#define USB_EPINTPRI_EPPRI22_Msk (0x400000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPPRI22 (Bitfield-Mask: 0x01)

◆ USB_EPINTPRI_EPPRI22_Pos

#define USB_EPINTPRI_EPPRI22_Pos (22UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPPRI22 (Bit 22)

◆ USB_EPINTPRI_EPPRI23_Msk

#define USB_EPINTPRI_EPPRI23_Msk (0x800000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPPRI23 (Bitfield-Mask: 0x01)

◆ USB_EPINTPRI_EPPRI23_Pos

#define USB_EPINTPRI_EPPRI23_Pos (23UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPPRI23 (Bit 23)

◆ USB_EPINTPRI_EPPRI24_Msk

#define USB_EPINTPRI_EPPRI24_Msk (0x1000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPPRI24 (Bitfield-Mask: 0x01)

◆ USB_EPINTPRI_EPPRI24_Pos

#define USB_EPINTPRI_EPPRI24_Pos (24UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPPRI24 (Bit 24)

◆ USB_EPINTPRI_EPPRI25_Msk

#define USB_EPINTPRI_EPPRI25_Msk (0x2000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPPRI25 (Bitfield-Mask: 0x01)

◆ USB_EPINTPRI_EPPRI25_Pos

#define USB_EPINTPRI_EPPRI25_Pos (25UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPPRI25 (Bit 25)

◆ USB_EPINTPRI_EPPRI26_Msk

#define USB_EPINTPRI_EPPRI26_Msk (0x4000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPPRI26 (Bitfield-Mask: 0x01)

◆ USB_EPINTPRI_EPPRI26_Pos

#define USB_EPINTPRI_EPPRI26_Pos (26UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPPRI26 (Bit 26)

◆ USB_EPINTPRI_EPPRI27_Msk

#define USB_EPINTPRI_EPPRI27_Msk (0x8000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPPRI27 (Bitfield-Mask: 0x01)

◆ USB_EPINTPRI_EPPRI27_Pos

#define USB_EPINTPRI_EPPRI27_Pos (27UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPPRI27 (Bit 27)

◆ USB_EPINTPRI_EPPRI28_Msk

#define USB_EPINTPRI_EPPRI28_Msk (0x10000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPPRI28 (Bitfield-Mask: 0x01)

◆ USB_EPINTPRI_EPPRI28_Pos

#define USB_EPINTPRI_EPPRI28_Pos (28UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPPRI28 (Bit 28)

◆ USB_EPINTPRI_EPPRI29_Msk

#define USB_EPINTPRI_EPPRI29_Msk (0x20000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPPRI29 (Bitfield-Mask: 0x01)

◆ USB_EPINTPRI_EPPRI29_Pos

#define USB_EPINTPRI_EPPRI29_Pos (29UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPPRI29 (Bit 29)

◆ USB_EPINTPRI_EPPRI2_Msk

#define USB_EPINTPRI_EPPRI2_Msk (0x4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPPRI2 (Bitfield-Mask: 0x01)

◆ USB_EPINTPRI_EPPRI2_Pos

#define USB_EPINTPRI_EPPRI2_Pos (2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPPRI2 (Bit 2)

◆ USB_EPINTPRI_EPPRI30_Msk

#define USB_EPINTPRI_EPPRI30_Msk (0x40000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPPRI30 (Bitfield-Mask: 0x01)

◆ USB_EPINTPRI_EPPRI30_Pos

#define USB_EPINTPRI_EPPRI30_Pos (30UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPPRI30 (Bit 30)

◆ USB_EPINTPRI_EPPRI31_Msk

#define USB_EPINTPRI_EPPRI31_Msk (0x80000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPPRI31 (Bitfield-Mask: 0x01)

◆ USB_EPINTPRI_EPPRI31_Pos

#define USB_EPINTPRI_EPPRI31_Pos (31UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPPRI31 (Bit 31)

◆ USB_EPINTPRI_EPPRI3_Msk

#define USB_EPINTPRI_EPPRI3_Msk (0x8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPPRI3 (Bitfield-Mask: 0x01)

◆ USB_EPINTPRI_EPPRI3_Pos

#define USB_EPINTPRI_EPPRI3_Pos (3UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPPRI3 (Bit 3)

◆ USB_EPINTPRI_EPPRI4_Msk

#define USB_EPINTPRI_EPPRI4_Msk (0x10UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPPRI4 (Bitfield-Mask: 0x01)

◆ USB_EPINTPRI_EPPRI4_Pos

#define USB_EPINTPRI_EPPRI4_Pos (4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPPRI4 (Bit 4)

◆ USB_EPINTPRI_EPPRI5_Msk

#define USB_EPINTPRI_EPPRI5_Msk (0x20UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPPRI5 (Bitfield-Mask: 0x01)

◆ USB_EPINTPRI_EPPRI5_Pos

#define USB_EPINTPRI_EPPRI5_Pos (5UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPPRI5 (Bit 5)

◆ USB_EPINTPRI_EPPRI6_Msk

#define USB_EPINTPRI_EPPRI6_Msk (0x40UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPPRI6 (Bitfield-Mask: 0x01)

◆ USB_EPINTPRI_EPPRI6_Pos

#define USB_EPINTPRI_EPPRI6_Pos (6UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPPRI6 (Bit 6)

◆ USB_EPINTPRI_EPPRI7_Msk

#define USB_EPINTPRI_EPPRI7_Msk (0x80UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPPRI7 (Bitfield-Mask: 0x01)

◆ USB_EPINTPRI_EPPRI7_Pos

#define USB_EPINTPRI_EPPRI7_Pos (7UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPPRI7 (Bit 7)

◆ USB_EPINTPRI_EPPRI8_Msk

#define USB_EPINTPRI_EPPRI8_Msk (0x100UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPPRI8 (Bitfield-Mask: 0x01)

◆ USB_EPINTPRI_EPPRI8_Pos

#define USB_EPINTPRI_EPPRI8_Pos (8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPPRI8 (Bit 8)

◆ USB_EPINTPRI_EPPRI9_Msk

#define USB_EPINTPRI_EPPRI9_Msk (0x200UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPPRI9 (Bitfield-Mask: 0x01)

◆ USB_EPINTPRI_EPPRI9_Pos

#define USB_EPINTPRI_EPPRI9_Pos (9UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPPRI9 (Bit 9)

◆ USB_EPINTSET_EPSET0_Msk

#define USB_EPINTSET_EPSET0_Msk (0x1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPSET0 (Bitfield-Mask: 0x01)

◆ USB_EPINTSET_EPSET0_Pos

#define USB_EPINTSET_EPSET0_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPSET0 (Bit 0)

◆ USB_EPINTSET_EPSET10_Msk

#define USB_EPINTSET_EPSET10_Msk (0x400UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPSET10 (Bitfield-Mask: 0x01)

◆ USB_EPINTSET_EPSET10_Pos

#define USB_EPINTSET_EPSET10_Pos (10UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPSET10 (Bit 10)

◆ USB_EPINTSET_EPSET11_Msk

#define USB_EPINTSET_EPSET11_Msk (0x800UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPSET11 (Bitfield-Mask: 0x01)

◆ USB_EPINTSET_EPSET11_Pos

#define USB_EPINTSET_EPSET11_Pos (11UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPSET11 (Bit 11)

◆ USB_EPINTSET_EPSET12_Msk

#define USB_EPINTSET_EPSET12_Msk (0x1000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPSET12 (Bitfield-Mask: 0x01)

◆ USB_EPINTSET_EPSET12_Pos

#define USB_EPINTSET_EPSET12_Pos (12UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPSET12 (Bit 12)

◆ USB_EPINTSET_EPSET13_Msk

#define USB_EPINTSET_EPSET13_Msk (0x2000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPSET13 (Bitfield-Mask: 0x01)

◆ USB_EPINTSET_EPSET13_Pos

#define USB_EPINTSET_EPSET13_Pos (13UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPSET13 (Bit 13)

◆ USB_EPINTSET_EPSET14_Msk

#define USB_EPINTSET_EPSET14_Msk (0x4000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPSET14 (Bitfield-Mask: 0x01)

◆ USB_EPINTSET_EPSET14_Pos

#define USB_EPINTSET_EPSET14_Pos (14UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPSET14 (Bit 14)

◆ USB_EPINTSET_EPSET15_Msk

#define USB_EPINTSET_EPSET15_Msk (0x8000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPSET15 (Bitfield-Mask: 0x01)

◆ USB_EPINTSET_EPSET15_Pos

#define USB_EPINTSET_EPSET15_Pos (15UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPSET15 (Bit 15)

◆ USB_EPINTSET_EPSET16_Msk

#define USB_EPINTSET_EPSET16_Msk (0x10000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPSET16 (Bitfield-Mask: 0x01)

◆ USB_EPINTSET_EPSET16_Pos

#define USB_EPINTSET_EPSET16_Pos (16UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPSET16 (Bit 16)

◆ USB_EPINTSET_EPSET17_Msk

#define USB_EPINTSET_EPSET17_Msk (0x20000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPSET17 (Bitfield-Mask: 0x01)

◆ USB_EPINTSET_EPSET17_Pos

#define USB_EPINTSET_EPSET17_Pos (17UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPSET17 (Bit 17)

◆ USB_EPINTSET_EPSET18_Msk

#define USB_EPINTSET_EPSET18_Msk (0x40000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPSET18 (Bitfield-Mask: 0x01)

◆ USB_EPINTSET_EPSET18_Pos

#define USB_EPINTSET_EPSET18_Pos (18UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPSET18 (Bit 18)

◆ USB_EPINTSET_EPSET19_Msk

#define USB_EPINTSET_EPSET19_Msk (0x80000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPSET19 (Bitfield-Mask: 0x01)

◆ USB_EPINTSET_EPSET19_Pos

#define USB_EPINTSET_EPSET19_Pos (19UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPSET19 (Bit 19)

◆ USB_EPINTSET_EPSET1_Msk

#define USB_EPINTSET_EPSET1_Msk (0x2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPSET1 (Bitfield-Mask: 0x01)

◆ USB_EPINTSET_EPSET1_Pos

#define USB_EPINTSET_EPSET1_Pos (1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPSET1 (Bit 1)

◆ USB_EPINTSET_EPSET20_Msk

#define USB_EPINTSET_EPSET20_Msk (0x100000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPSET20 (Bitfield-Mask: 0x01)

◆ USB_EPINTSET_EPSET20_Pos

#define USB_EPINTSET_EPSET20_Pos (20UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPSET20 (Bit 20)

◆ USB_EPINTSET_EPSET21_Msk

#define USB_EPINTSET_EPSET21_Msk (0x200000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPSET21 (Bitfield-Mask: 0x01)

◆ USB_EPINTSET_EPSET21_Pos

#define USB_EPINTSET_EPSET21_Pos (21UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPSET21 (Bit 21)

◆ USB_EPINTSET_EPSET22_Msk

#define USB_EPINTSET_EPSET22_Msk (0x400000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPSET22 (Bitfield-Mask: 0x01)

◆ USB_EPINTSET_EPSET22_Pos

#define USB_EPINTSET_EPSET22_Pos (22UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPSET22 (Bit 22)

◆ USB_EPINTSET_EPSET23_Msk

#define USB_EPINTSET_EPSET23_Msk (0x800000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPSET23 (Bitfield-Mask: 0x01)

◆ USB_EPINTSET_EPSET23_Pos

#define USB_EPINTSET_EPSET23_Pos (23UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPSET23 (Bit 23)

◆ USB_EPINTSET_EPSET24_Msk

#define USB_EPINTSET_EPSET24_Msk (0x1000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPSET24 (Bitfield-Mask: 0x01)

◆ USB_EPINTSET_EPSET24_Pos

#define USB_EPINTSET_EPSET24_Pos (24UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPSET24 (Bit 24)

◆ USB_EPINTSET_EPSET25_Msk

#define USB_EPINTSET_EPSET25_Msk (0x2000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPSET25 (Bitfield-Mask: 0x01)

◆ USB_EPINTSET_EPSET25_Pos

#define USB_EPINTSET_EPSET25_Pos (25UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPSET25 (Bit 25)

◆ USB_EPINTSET_EPSET26_Msk

#define USB_EPINTSET_EPSET26_Msk (0x4000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPSET26 (Bitfield-Mask: 0x01)

◆ USB_EPINTSET_EPSET26_Pos

#define USB_EPINTSET_EPSET26_Pos (26UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPSET26 (Bit 26)

◆ USB_EPINTSET_EPSET27_Msk

#define USB_EPINTSET_EPSET27_Msk (0x8000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPSET27 (Bitfield-Mask: 0x01)

◆ USB_EPINTSET_EPSET27_Pos

#define USB_EPINTSET_EPSET27_Pos (27UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPSET27 (Bit 27)

◆ USB_EPINTSET_EPSET28_Msk

#define USB_EPINTSET_EPSET28_Msk (0x10000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPSET28 (Bitfield-Mask: 0x01)

◆ USB_EPINTSET_EPSET28_Pos

#define USB_EPINTSET_EPSET28_Pos (28UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPSET28 (Bit 28)

◆ USB_EPINTSET_EPSET29_Msk

#define USB_EPINTSET_EPSET29_Msk (0x20000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPSET29 (Bitfield-Mask: 0x01)

◆ USB_EPINTSET_EPSET29_Pos

#define USB_EPINTSET_EPSET29_Pos (29UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPSET29 (Bit 29)

◆ USB_EPINTSET_EPSET2_Msk

#define USB_EPINTSET_EPSET2_Msk (0x4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPSET2 (Bitfield-Mask: 0x01)

◆ USB_EPINTSET_EPSET2_Pos

#define USB_EPINTSET_EPSET2_Pos (2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPSET2 (Bit 2)

◆ USB_EPINTSET_EPSET30_Msk

#define USB_EPINTSET_EPSET30_Msk (0x40000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPSET30 (Bitfield-Mask: 0x01)

◆ USB_EPINTSET_EPSET30_Pos

#define USB_EPINTSET_EPSET30_Pos (30UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPSET30 (Bit 30)

◆ USB_EPINTSET_EPSET31_Msk

#define USB_EPINTSET_EPSET31_Msk (0x80000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPSET31 (Bitfield-Mask: 0x01)

◆ USB_EPINTSET_EPSET31_Pos

#define USB_EPINTSET_EPSET31_Pos (31UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPSET31 (Bit 31)

◆ USB_EPINTSET_EPSET3_Msk

#define USB_EPINTSET_EPSET3_Msk (0x8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPSET3 (Bitfield-Mask: 0x01)

◆ USB_EPINTSET_EPSET3_Pos

#define USB_EPINTSET_EPSET3_Pos (3UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPSET3 (Bit 3)

◆ USB_EPINTSET_EPSET4_Msk

#define USB_EPINTSET_EPSET4_Msk (0x10UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPSET4 (Bitfield-Mask: 0x01)

◆ USB_EPINTSET_EPSET4_Pos

#define USB_EPINTSET_EPSET4_Pos (4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPSET4 (Bit 4)

◆ USB_EPINTSET_EPSET5_Msk

#define USB_EPINTSET_EPSET5_Msk (0x20UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPSET5 (Bitfield-Mask: 0x01)

◆ USB_EPINTSET_EPSET5_Pos

#define USB_EPINTSET_EPSET5_Pos (5UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPSET5 (Bit 5)

◆ USB_EPINTSET_EPSET6_Msk

#define USB_EPINTSET_EPSET6_Msk (0x40UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPSET6 (Bitfield-Mask: 0x01)

◆ USB_EPINTSET_EPSET6_Pos

#define USB_EPINTSET_EPSET6_Pos (6UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPSET6 (Bit 6)

◆ USB_EPINTSET_EPSET7_Msk

#define USB_EPINTSET_EPSET7_Msk (0x80UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPSET7 (Bitfield-Mask: 0x01)

◆ USB_EPINTSET_EPSET7_Pos

#define USB_EPINTSET_EPSET7_Pos (7UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPSET7 (Bit 7)

◆ USB_EPINTSET_EPSET8_Msk

#define USB_EPINTSET_EPSET8_Msk (0x100UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPSET8 (Bitfield-Mask: 0x01)

◆ USB_EPINTSET_EPSET8_Pos

#define USB_EPINTSET_EPSET8_Pos (8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPSET8 (Bit 8)

◆ USB_EPINTSET_EPSET9_Msk

#define USB_EPINTSET_EPSET9_Msk (0x200UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPSET9 (Bitfield-Mask: 0x01)

◆ USB_EPINTSET_EPSET9_Pos

#define USB_EPINTSET_EPSET9_Pos (9UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPSET9 (Bit 9)

◆ USB_EPINTST_EPST0_Msk

#define USB_EPINTST_EPST0_Msk (0x1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPST0 (Bitfield-Mask: 0x01)

◆ USB_EPINTST_EPST0_Pos

#define USB_EPINTST_EPST0_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPST0 (Bit 0)

◆ USB_EPINTST_EPST10_Msk

#define USB_EPINTST_EPST10_Msk (0x400UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPST10 (Bitfield-Mask: 0x01)

◆ USB_EPINTST_EPST10_Pos

#define USB_EPINTST_EPST10_Pos (10UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPST10 (Bit 10)

◆ USB_EPINTST_EPST11_Msk

#define USB_EPINTST_EPST11_Msk (0x800UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPST11 (Bitfield-Mask: 0x01)

◆ USB_EPINTST_EPST11_Pos

#define USB_EPINTST_EPST11_Pos (11UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPST11 (Bit 11)

◆ USB_EPINTST_EPST12_Msk

#define USB_EPINTST_EPST12_Msk (0x1000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPST12 (Bitfield-Mask: 0x01)

◆ USB_EPINTST_EPST12_Pos

#define USB_EPINTST_EPST12_Pos (12UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPST12 (Bit 12)

◆ USB_EPINTST_EPST13_Msk

#define USB_EPINTST_EPST13_Msk (0x2000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPST13 (Bitfield-Mask: 0x01)

◆ USB_EPINTST_EPST13_Pos

#define USB_EPINTST_EPST13_Pos (13UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPST13 (Bit 13)

◆ USB_EPINTST_EPST14_Msk

#define USB_EPINTST_EPST14_Msk (0x4000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPST14 (Bitfield-Mask: 0x01)

◆ USB_EPINTST_EPST14_Pos

#define USB_EPINTST_EPST14_Pos (14UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPST14 (Bit 14)

◆ USB_EPINTST_EPST15_Msk

#define USB_EPINTST_EPST15_Msk (0x8000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPST15 (Bitfield-Mask: 0x01)

◆ USB_EPINTST_EPST15_Pos

#define USB_EPINTST_EPST15_Pos (15UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPST15 (Bit 15)

◆ USB_EPINTST_EPST16_Msk

#define USB_EPINTST_EPST16_Msk (0x10000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPST16 (Bitfield-Mask: 0x01)

◆ USB_EPINTST_EPST16_Pos

#define USB_EPINTST_EPST16_Pos (16UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPST16 (Bit 16)

◆ USB_EPINTST_EPST17_Msk

#define USB_EPINTST_EPST17_Msk (0x20000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPST17 (Bitfield-Mask: 0x01)

◆ USB_EPINTST_EPST17_Pos

#define USB_EPINTST_EPST17_Pos (17UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPST17 (Bit 17)

◆ USB_EPINTST_EPST18_Msk

#define USB_EPINTST_EPST18_Msk (0x40000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPST18 (Bitfield-Mask: 0x01)

◆ USB_EPINTST_EPST18_Pos

#define USB_EPINTST_EPST18_Pos (18UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPST18 (Bit 18)

◆ USB_EPINTST_EPST19_Msk

#define USB_EPINTST_EPST19_Msk (0x80000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPST19 (Bitfield-Mask: 0x01)

◆ USB_EPINTST_EPST19_Pos

#define USB_EPINTST_EPST19_Pos (19UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPST19 (Bit 19)

◆ USB_EPINTST_EPST1_Msk

#define USB_EPINTST_EPST1_Msk (0x2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPST1 (Bitfield-Mask: 0x01)

◆ USB_EPINTST_EPST1_Pos

#define USB_EPINTST_EPST1_Pos (1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPST1 (Bit 1)

◆ USB_EPINTST_EPST20_Msk

#define USB_EPINTST_EPST20_Msk (0x100000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPST20 (Bitfield-Mask: 0x01)

◆ USB_EPINTST_EPST20_Pos

#define USB_EPINTST_EPST20_Pos (20UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPST20 (Bit 20)

◆ USB_EPINTST_EPST21_Msk

#define USB_EPINTST_EPST21_Msk (0x200000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPST21 (Bitfield-Mask: 0x01)

◆ USB_EPINTST_EPST21_Pos

#define USB_EPINTST_EPST21_Pos (21UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPST21 (Bit 21)

◆ USB_EPINTST_EPST22_Msk

#define USB_EPINTST_EPST22_Msk (0x400000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPST22 (Bitfield-Mask: 0x01)

◆ USB_EPINTST_EPST22_Pos

#define USB_EPINTST_EPST22_Pos (22UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPST22 (Bit 22)

◆ USB_EPINTST_EPST23_Msk

#define USB_EPINTST_EPST23_Msk (0x800000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPST23 (Bitfield-Mask: 0x01)

◆ USB_EPINTST_EPST23_Pos

#define USB_EPINTST_EPST23_Pos (23UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPST23 (Bit 23)

◆ USB_EPINTST_EPST24_Msk

#define USB_EPINTST_EPST24_Msk (0x1000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPST24 (Bitfield-Mask: 0x01)

◆ USB_EPINTST_EPST24_Pos

#define USB_EPINTST_EPST24_Pos (24UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPST24 (Bit 24)

◆ USB_EPINTST_EPST25_Msk

#define USB_EPINTST_EPST25_Msk (0x2000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPST25 (Bitfield-Mask: 0x01)

◆ USB_EPINTST_EPST25_Pos

#define USB_EPINTST_EPST25_Pos (25UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPST25 (Bit 25)

◆ USB_EPINTST_EPST26_Msk

#define USB_EPINTST_EPST26_Msk (0x4000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPST26 (Bitfield-Mask: 0x01)

◆ USB_EPINTST_EPST26_Pos

#define USB_EPINTST_EPST26_Pos (26UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPST26 (Bit 26)

◆ USB_EPINTST_EPST27_Msk

#define USB_EPINTST_EPST27_Msk (0x8000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPST27 (Bitfield-Mask: 0x01)

◆ USB_EPINTST_EPST27_Pos

#define USB_EPINTST_EPST27_Pos (27UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPST27 (Bit 27)

◆ USB_EPINTST_EPST28_Msk

#define USB_EPINTST_EPST28_Msk (0x10000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPST28 (Bitfield-Mask: 0x01)

◆ USB_EPINTST_EPST28_Pos

#define USB_EPINTST_EPST28_Pos (28UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPST28 (Bit 28)

◆ USB_EPINTST_EPST29_Msk

#define USB_EPINTST_EPST29_Msk (0x20000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPST29 (Bitfield-Mask: 0x01)

◆ USB_EPINTST_EPST29_Pos

#define USB_EPINTST_EPST29_Pos (29UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPST29 (Bit 29)

◆ USB_EPINTST_EPST2_Msk

#define USB_EPINTST_EPST2_Msk (0x4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPST2 (Bitfield-Mask: 0x01)

◆ USB_EPINTST_EPST2_Pos

#define USB_EPINTST_EPST2_Pos (2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPST2 (Bit 2)

◆ USB_EPINTST_EPST30_Msk

#define USB_EPINTST_EPST30_Msk (0x40000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPST30 (Bitfield-Mask: 0x01)

◆ USB_EPINTST_EPST30_Pos

#define USB_EPINTST_EPST30_Pos (30UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPST30 (Bit 30)

◆ USB_EPINTST_EPST31_Msk

#define USB_EPINTST_EPST31_Msk (0x80000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPST31 (Bitfield-Mask: 0x01)

◆ USB_EPINTST_EPST31_Pos

#define USB_EPINTST_EPST31_Pos (31UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPST31 (Bit 31)

◆ USB_EPINTST_EPST3_Msk

#define USB_EPINTST_EPST3_Msk (0x8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPST3 (Bitfield-Mask: 0x01)

◆ USB_EPINTST_EPST3_Pos

#define USB_EPINTST_EPST3_Pos (3UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPST3 (Bit 3)

◆ USB_EPINTST_EPST4_Msk

#define USB_EPINTST_EPST4_Msk (0x10UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPST4 (Bitfield-Mask: 0x01)

◆ USB_EPINTST_EPST4_Pos

#define USB_EPINTST_EPST4_Pos (4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPST4 (Bit 4)

◆ USB_EPINTST_EPST5_Msk

#define USB_EPINTST_EPST5_Msk (0x20UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPST5 (Bitfield-Mask: 0x01)

◆ USB_EPINTST_EPST5_Pos

#define USB_EPINTST_EPST5_Pos (5UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPST5 (Bit 5)

◆ USB_EPINTST_EPST6_Msk

#define USB_EPINTST_EPST6_Msk (0x40UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPST6 (Bitfield-Mask: 0x01)

◆ USB_EPINTST_EPST6_Pos

#define USB_EPINTST_EPST6_Pos (6UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPST6 (Bit 6)

◆ USB_EPINTST_EPST7_Msk

#define USB_EPINTST_EPST7_Msk (0x80UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPST7 (Bitfield-Mask: 0x01)

◆ USB_EPINTST_EPST7_Pos

#define USB_EPINTST_EPST7_Pos (7UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPST7 (Bit 7)

◆ USB_EPINTST_EPST8_Msk

#define USB_EPINTST_EPST8_Msk (0x100UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPST8 (Bitfield-Mask: 0x01)

◆ USB_EPINTST_EPST8_Pos

#define USB_EPINTST_EPST8_Pos (8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPST8 (Bit 8)

◆ USB_EPINTST_EPST9_Msk

#define USB_EPINTST_EPST9_Msk (0x200UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPST9 (Bitfield-Mask: 0x01)

◆ USB_EPINTST_EPST9_Pos

#define USB_EPINTST_EPST9_Pos (9UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPST9 (Bit 9)

◆ USB_I2C_CLKHI_CDHI_Msk

#define USB_I2C_CLKHI_CDHI_Msk (0xffUL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CDHI (Bitfield-Mask: 0xff)

◆ USB_I2C_CLKHI_CDHI_Pos

#define USB_I2C_CLKHI_CDHI_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CDHI (Bit 0)

◆ USB_I2C_CLKLO_CDLO_Msk

#define USB_I2C_CLKLO_CDLO_Msk (0xffUL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CDLO (Bitfield-Mask: 0xff)

◆ USB_I2C_CLKLO_CDLO_Pos

#define USB_I2C_CLKLO_CDLO_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CDLO (Bit 0)

◆ USB_I2C_CTL_AFIE_Msk

#define USB_I2C_CTL_AFIE_Msk (0x2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

AFIE (Bitfield-Mask: 0x01)

◆ USB_I2C_CTL_AFIE_Pos

#define USB_I2C_CTL_AFIE_Pos (1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

AFIE (Bit 1)

◆ USB_I2C_CTL_DRMIE_Msk

#define USB_I2C_CTL_DRMIE_Msk (0x8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DRMIE (Bitfield-Mask: 0x01)

◆ USB_I2C_CTL_DRMIE_Pos

#define USB_I2C_CTL_DRMIE_Pos (3UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DRMIE (Bit 3)

◆ USB_I2C_CTL_DRSIE_Msk

#define USB_I2C_CTL_DRSIE_Msk (0x10UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DRSIE (Bitfield-Mask: 0x01)

◆ USB_I2C_CTL_DRSIE_Pos

#define USB_I2C_CTL_DRSIE_Pos (4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DRSIE (Bit 4)

◆ USB_I2C_CTL_NAIE_Msk

#define USB_I2C_CTL_NAIE_Msk (0x4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

NAIE (Bitfield-Mask: 0x01)

◆ USB_I2C_CTL_NAIE_Pos

#define USB_I2C_CTL_NAIE_Pos (2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

NAIE (Bit 2)

◆ USB_I2C_CTL_REFIE_Msk

#define USB_I2C_CTL_REFIE_Msk (0x20UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

REFIE (Bitfield-Mask: 0x01)

◆ USB_I2C_CTL_REFIE_Pos

#define USB_I2C_CTL_REFIE_Pos (5UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

REFIE (Bit 5)

◆ USB_I2C_CTL_RFDAIE_Msk

#define USB_I2C_CTL_RFDAIE_Msk (0x40UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RFDAIE (Bitfield-Mask: 0x01)

◆ USB_I2C_CTL_RFDAIE_Pos

#define USB_I2C_CTL_RFDAIE_Pos (6UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RFDAIE (Bit 6)

◆ USB_I2C_CTL_SRST_Msk

#define USB_I2C_CTL_SRST_Msk (0x100UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

SRST (Bitfield-Mask: 0x01)

◆ USB_I2C_CTL_SRST_Pos

#define USB_I2C_CTL_SRST_Pos (8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

SRST (Bit 8)

◆ USB_I2C_CTL_TDIE_Msk

#define USB_I2C_CTL_TDIE_Msk (0x1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TDIE (Bitfield-Mask: 0x01)

◆ USB_I2C_CTL_TDIE_Pos

#define USB_I2C_CTL_TDIE_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TDIE (Bit 0)

◆ USB_I2C_CTL_TFFIE_Msk

#define USB_I2C_CTL_TFFIE_Msk (0x80UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TFFIE (Bitfield-Mask: 0x01)

◆ USB_I2C_CTL_TFFIE_Pos

#define USB_I2C_CTL_TFFIE_Pos (7UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TFFIE (Bit 7)

◆ USB_I2C_RX_RXDATA_Msk

#define USB_I2C_RX_RXDATA_Msk (0xffUL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RXDATA (Bitfield-Mask: 0xff)

◆ USB_I2C_RX_RXDATA_Pos

#define USB_I2C_RX_RXDATA_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RXDATA (Bit 0)

◆ USB_I2C_STS_Active_Msk

#define USB_I2C_STS_Active_Msk (0x20UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

Active (Bitfield-Mask: 0x01)

◆ USB_I2C_STS_Active_Pos

#define USB_I2C_STS_Active_Pos (5UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

Active (Bit 5)

◆ USB_I2C_STS_AFI_Msk

#define USB_I2C_STS_AFI_Msk (0x2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

AFI (Bitfield-Mask: 0x01)

◆ USB_I2C_STS_AFI_Pos

#define USB_I2C_STS_AFI_Pos (1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

AFI (Bit 1)

◆ USB_I2C_STS_DRMI_Msk

#define USB_I2C_STS_DRMI_Msk (0x8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DRMI (Bitfield-Mask: 0x01)

◆ USB_I2C_STS_DRMI_Pos

#define USB_I2C_STS_DRMI_Pos (3UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DRMI (Bit 3)

◆ USB_I2C_STS_DRSI_Msk

#define USB_I2C_STS_DRSI_Msk (0x10UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DRSI (Bitfield-Mask: 0x01)

◆ USB_I2C_STS_DRSI_Pos

#define USB_I2C_STS_DRSI_Pos (4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DRSI (Bit 4)

◆ USB_I2C_STS_NAI_Msk

#define USB_I2C_STS_NAI_Msk (0x4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

NAI (Bitfield-Mask: 0x01)

◆ USB_I2C_STS_NAI_Pos

#define USB_I2C_STS_NAI_Pos (2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

NAI (Bit 2)

◆ USB_I2C_STS_RFE_Msk

#define USB_I2C_STS_RFE_Msk (0x200UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RFE (Bitfield-Mask: 0x01)

◆ USB_I2C_STS_RFE_Pos

#define USB_I2C_STS_RFE_Pos (9UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RFE (Bit 9)

◆ USB_I2C_STS_RFF_Msk

#define USB_I2C_STS_RFF_Msk (0x100UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RFF (Bitfield-Mask: 0x01)

◆ USB_I2C_STS_RFF_Pos

#define USB_I2C_STS_RFF_Pos (8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RFF (Bit 8)

◆ USB_I2C_STS_SCL_Msk

#define USB_I2C_STS_SCL_Msk (0x40UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

SCL (Bitfield-Mask: 0x01)

◆ USB_I2C_STS_SCL_Pos

#define USB_I2C_STS_SCL_Pos (6UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

SCL (Bit 6)

◆ USB_I2C_STS_SDA_Msk

#define USB_I2C_STS_SDA_Msk (0x80UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

SDA (Bitfield-Mask: 0x01)

◆ USB_I2C_STS_SDA_Pos

#define USB_I2C_STS_SDA_Pos (7UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

SDA (Bit 7)

◆ USB_I2C_STS_TDI_Msk

#define USB_I2C_STS_TDI_Msk (0x1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TDI (Bitfield-Mask: 0x01)

◆ USB_I2C_STS_TDI_Pos

#define USB_I2C_STS_TDI_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TDI (Bit 0)

◆ USB_I2C_STS_TFE_Msk

#define USB_I2C_STS_TFE_Msk (0x800UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TFE (Bitfield-Mask: 0x01)

◆ USB_I2C_STS_TFE_Pos

#define USB_I2C_STS_TFE_Pos (11UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TFE (Bit 11)

◆ USB_I2C_STS_TFF_Msk

#define USB_I2C_STS_TFF_Msk (0x400UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TFF (Bitfield-Mask: 0x01)

◆ USB_I2C_STS_TFF_Pos

#define USB_I2C_STS_TFF_Pos (10UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TFF (Bit 10)

◆ USB_I2C_WO_START_Msk

#define USB_I2C_WO_START_Msk (0x100UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

START (Bitfield-Mask: 0x01)

◆ USB_I2C_WO_START_Pos

#define USB_I2C_WO_START_Pos (8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

START (Bit 8)

◆ USB_I2C_WO_STOP_Msk

#define USB_I2C_WO_STOP_Msk (0x200UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

STOP (Bitfield-Mask: 0x01)

◆ USB_I2C_WO_STOP_Pos

#define USB_I2C_WO_STOP_Pos (9UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

STOP (Bit 9)

◆ USB_I2C_WO_TXDATA_Msk

#define USB_I2C_WO_TXDATA_Msk (0xffUL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TXDATA (Bitfield-Mask: 0xff)

◆ USB_I2C_WO_TXDATA_Pos

#define USB_I2C_WO_TXDATA_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TXDATA (Bit 0)

◆ USB_INTCLR_HNP_FAILURE_CLR_Msk

#define USB_INTCLR_HNP_FAILURE_CLR_Msk (0x4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

HNP_FAILURE_CLR (Bitfield-Mask: 0x01)

◆ USB_INTCLR_HNP_FAILURE_CLR_Pos

#define USB_INTCLR_HNP_FAILURE_CLR_Pos (2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

HNP_FAILURE_CLR (Bit 2)

◆ USB_INTCLR_HNP_SUCCES_CLR_Msk

#define USB_INTCLR_HNP_SUCCES_CLR_Msk (0x8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

HNP_SUCCES_CLR (Bitfield-Mask: 0x01)

◆ USB_INTCLR_HNP_SUCCES_CLR_Pos

#define USB_INTCLR_HNP_SUCCES_CLR_Pos (3UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

HNP_SUCCES_CLR (Bit 3)

◆ USB_INTCLR_REMOVE_PU_CLR_Msk

#define USB_INTCLR_REMOVE_PU_CLR_Msk (0x2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

REMOVE_PU_CLR (Bitfield-Mask: 0x01)

◆ USB_INTCLR_REMOVE_PU_CLR_Pos

#define USB_INTCLR_REMOVE_PU_CLR_Pos (1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

REMOVE_PU_CLR (Bit 1)

◆ USB_INTCLR_TMR_CLR_Msk

#define USB_INTCLR_TMR_CLR_Msk (0x1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TMR_CLR (Bitfield-Mask: 0x01)

◆ USB_INTCLR_TMR_CLR_Pos

#define USB_INTCLR_TMR_CLR_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TMR_CLR (Bit 0)

◆ USB_INTEN_HNP_FAILURE_EN_Msk

#define USB_INTEN_HNP_FAILURE_EN_Msk (0x4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

HNP_FAILURE_EN (Bitfield-Mask: 0x01)

◆ USB_INTEN_HNP_FAILURE_EN_Pos

#define USB_INTEN_HNP_FAILURE_EN_Pos (2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

HNP_FAILURE_EN (Bit 2)

◆ USB_INTEN_HNP_SUCCES_EN_Msk

#define USB_INTEN_HNP_SUCCES_EN_Msk (0x8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

HNP_SUCCES_EN (Bitfield-Mask: 0x01)

◆ USB_INTEN_HNP_SUCCES_EN_Pos

#define USB_INTEN_HNP_SUCCES_EN_Pos (3UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

HNP_SUCCES_EN (Bit 3)

◆ USB_INTEN_REMOVE_PU_EN_Msk

#define USB_INTEN_REMOVE_PU_EN_Msk (0x2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

REMOVE_PU_EN (Bitfield-Mask: 0x01)

◆ USB_INTEN_REMOVE_PU_EN_Pos

#define USB_INTEN_REMOVE_PU_EN_Pos (1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

REMOVE_PU_EN (Bit 1)

◆ USB_INTEN_TMR_EN_Msk

#define USB_INTEN_TMR_EN_Msk (0x1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TMR_EN (Bitfield-Mask: 0x01)

◆ USB_INTEN_TMR_EN_Pos

#define USB_INTEN_TMR_EN_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TMR_EN (Bit 0)

◆ USB_INTSET_HNP_FAILURE_SET_Msk

#define USB_INTSET_HNP_FAILURE_SET_Msk (0x4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

HNP_FAILURE_SET (Bitfield-Mask: 0x01)

◆ USB_INTSET_HNP_FAILURE_SET_Pos

#define USB_INTSET_HNP_FAILURE_SET_Pos (2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

HNP_FAILURE_SET (Bit 2)

◆ USB_INTSET_HNP_SUCCES_SET_Msk

#define USB_INTSET_HNP_SUCCES_SET_Msk (0x8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

HNP_SUCCES_SET (Bitfield-Mask: 0x01)

◆ USB_INTSET_HNP_SUCCES_SET_Pos

#define USB_INTSET_HNP_SUCCES_SET_Pos (3UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

HNP_SUCCES_SET (Bit 3)

◆ USB_INTSET_REMOVE_PU_SET_Msk

#define USB_INTSET_REMOVE_PU_SET_Msk (0x2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

REMOVE_PU_SET (Bitfield-Mask: 0x01)

◆ USB_INTSET_REMOVE_PU_SET_Pos

#define USB_INTSET_REMOVE_PU_SET_Pos (1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

REMOVE_PU_SET (Bit 1)

◆ USB_INTSET_TMR_SET_Msk

#define USB_INTSET_TMR_SET_Msk (0x1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TMR_SET (Bitfield-Mask: 0x01)

◆ USB_INTSET_TMR_SET_Pos

#define USB_INTSET_TMR_SET_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TMR_SET (Bit 0)

◆ USB_INTST_HNP_FAILURE_Msk

#define USB_INTST_HNP_FAILURE_Msk (0x4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

HNP_FAILURE (Bitfield-Mask: 0x01)

◆ USB_INTST_HNP_FAILURE_Pos

#define USB_INTST_HNP_FAILURE_Pos (2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

HNP_FAILURE (Bit 2)

◆ USB_INTST_HNP_SUCCESS_Msk

#define USB_INTST_HNP_SUCCESS_Msk (0x8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

HNP_SUCCESS (Bitfield-Mask: 0x01)

◆ USB_INTST_HNP_SUCCESS_Pos

#define USB_INTST_HNP_SUCCESS_Pos (3UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

HNP_SUCCESS (Bit 3)

◆ USB_INTST_REMOVE_PU_Msk

#define USB_INTST_REMOVE_PU_Msk (0x2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

REMOVE_PU (Bitfield-Mask: 0x01)

◆ USB_INTST_REMOVE_PU_Pos

#define USB_INTST_REMOVE_PU_Pos (1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

REMOVE_PU (Bit 1)

◆ USB_INTST_TMR_Msk

#define USB_INTST_TMR_Msk (0x1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TMR (Bitfield-Mask: 0x01)

◆ USB_INTST_TMR_Pos

#define USB_INTST_TMR_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TMR (Bit 0)

◆ USB_MAXPSIZE_MPS_Msk

#define USB_MAXPSIZE_MPS_Msk (0x3ffUL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

MPS (Bitfield-Mask: 0x3ff)

◆ USB_MAXPSIZE_MPS_Pos

#define USB_MAXPSIZE_MPS_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

MPS (Bit 0)

◆ USB_NDDRINTCLR_EPNDDINTCLR0_Msk

#define USB_NDDRINTCLR_EPNDDINTCLR0_Msk (0x1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPNDDINTCLR0 (Bitfield-Mask: 0x01)

◆ USB_NDDRINTCLR_EPNDDINTCLR0_Pos

#define USB_NDDRINTCLR_EPNDDINTCLR0_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPNDDINTCLR0 (Bit 0)

◆ USB_NDDRINTCLR_EPNDDINTCLR10_Msk

#define USB_NDDRINTCLR_EPNDDINTCLR10_Msk (0x400UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPNDDINTCLR10 (Bitfield-Mask: 0x01)

◆ USB_NDDRINTCLR_EPNDDINTCLR10_Pos

#define USB_NDDRINTCLR_EPNDDINTCLR10_Pos (10UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPNDDINTCLR10 (Bit 10)

◆ USB_NDDRINTCLR_EPNDDINTCLR11_Msk

#define USB_NDDRINTCLR_EPNDDINTCLR11_Msk (0x800UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPNDDINTCLR11 (Bitfield-Mask: 0x01)

◆ USB_NDDRINTCLR_EPNDDINTCLR11_Pos

#define USB_NDDRINTCLR_EPNDDINTCLR11_Pos (11UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPNDDINTCLR11 (Bit 11)

◆ USB_NDDRINTCLR_EPNDDINTCLR12_Msk

#define USB_NDDRINTCLR_EPNDDINTCLR12_Msk (0x1000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPNDDINTCLR12 (Bitfield-Mask: 0x01)

◆ USB_NDDRINTCLR_EPNDDINTCLR12_Pos

#define USB_NDDRINTCLR_EPNDDINTCLR12_Pos (12UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPNDDINTCLR12 (Bit 12)

◆ USB_NDDRINTCLR_EPNDDINTCLR13_Msk

#define USB_NDDRINTCLR_EPNDDINTCLR13_Msk (0x2000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPNDDINTCLR13 (Bitfield-Mask: 0x01)

◆ USB_NDDRINTCLR_EPNDDINTCLR13_Pos

#define USB_NDDRINTCLR_EPNDDINTCLR13_Pos (13UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPNDDINTCLR13 (Bit 13)

◆ USB_NDDRINTCLR_EPNDDINTCLR14_Msk

#define USB_NDDRINTCLR_EPNDDINTCLR14_Msk (0x4000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPNDDINTCLR14 (Bitfield-Mask: 0x01)

◆ USB_NDDRINTCLR_EPNDDINTCLR14_Pos

#define USB_NDDRINTCLR_EPNDDINTCLR14_Pos (14UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPNDDINTCLR14 (Bit 14)

◆ USB_NDDRINTCLR_EPNDDINTCLR15_Msk

#define USB_NDDRINTCLR_EPNDDINTCLR15_Msk (0x8000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPNDDINTCLR15 (Bitfield-Mask: 0x01)

◆ USB_NDDRINTCLR_EPNDDINTCLR15_Pos

#define USB_NDDRINTCLR_EPNDDINTCLR15_Pos (15UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPNDDINTCLR15 (Bit 15)

◆ USB_NDDRINTCLR_EPNDDINTCLR16_Msk

#define USB_NDDRINTCLR_EPNDDINTCLR16_Msk (0x10000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPNDDINTCLR16 (Bitfield-Mask: 0x01)

◆ USB_NDDRINTCLR_EPNDDINTCLR16_Pos

#define USB_NDDRINTCLR_EPNDDINTCLR16_Pos (16UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPNDDINTCLR16 (Bit 16)

◆ USB_NDDRINTCLR_EPNDDINTCLR17_Msk

#define USB_NDDRINTCLR_EPNDDINTCLR17_Msk (0x20000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPNDDINTCLR17 (Bitfield-Mask: 0x01)

◆ USB_NDDRINTCLR_EPNDDINTCLR17_Pos

#define USB_NDDRINTCLR_EPNDDINTCLR17_Pos (17UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPNDDINTCLR17 (Bit 17)

◆ USB_NDDRINTCLR_EPNDDINTCLR18_Msk

#define USB_NDDRINTCLR_EPNDDINTCLR18_Msk (0x40000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPNDDINTCLR18 (Bitfield-Mask: 0x01)

◆ USB_NDDRINTCLR_EPNDDINTCLR18_Pos

#define USB_NDDRINTCLR_EPNDDINTCLR18_Pos (18UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPNDDINTCLR18 (Bit 18)

◆ USB_NDDRINTCLR_EPNDDINTCLR19_Msk

#define USB_NDDRINTCLR_EPNDDINTCLR19_Msk (0x80000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPNDDINTCLR19 (Bitfield-Mask: 0x01)

◆ USB_NDDRINTCLR_EPNDDINTCLR19_Pos

#define USB_NDDRINTCLR_EPNDDINTCLR19_Pos (19UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPNDDINTCLR19 (Bit 19)

◆ USB_NDDRINTCLR_EPNDDINTCLR1_Msk

#define USB_NDDRINTCLR_EPNDDINTCLR1_Msk (0x2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPNDDINTCLR1 (Bitfield-Mask: 0x01)

◆ USB_NDDRINTCLR_EPNDDINTCLR1_Pos

#define USB_NDDRINTCLR_EPNDDINTCLR1_Pos (1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPNDDINTCLR1 (Bit 1)

◆ USB_NDDRINTCLR_EPNDDINTCLR20_Msk

#define USB_NDDRINTCLR_EPNDDINTCLR20_Msk (0x100000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPNDDINTCLR20 (Bitfield-Mask: 0x01)

◆ USB_NDDRINTCLR_EPNDDINTCLR20_Pos

#define USB_NDDRINTCLR_EPNDDINTCLR20_Pos (20UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPNDDINTCLR20 (Bit 20)

◆ USB_NDDRINTCLR_EPNDDINTCLR21_Msk

#define USB_NDDRINTCLR_EPNDDINTCLR21_Msk (0x200000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPNDDINTCLR21 (Bitfield-Mask: 0x01)

◆ USB_NDDRINTCLR_EPNDDINTCLR21_Pos

#define USB_NDDRINTCLR_EPNDDINTCLR21_Pos (21UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPNDDINTCLR21 (Bit 21)

◆ USB_NDDRINTCLR_EPNDDINTCLR22_Msk

#define USB_NDDRINTCLR_EPNDDINTCLR22_Msk (0x400000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPNDDINTCLR22 (Bitfield-Mask: 0x01)

◆ USB_NDDRINTCLR_EPNDDINTCLR22_Pos

#define USB_NDDRINTCLR_EPNDDINTCLR22_Pos (22UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPNDDINTCLR22 (Bit 22)

◆ USB_NDDRINTCLR_EPNDDINTCLR23_Msk

#define USB_NDDRINTCLR_EPNDDINTCLR23_Msk (0x800000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPNDDINTCLR23 (Bitfield-Mask: 0x01)

◆ USB_NDDRINTCLR_EPNDDINTCLR23_Pos

#define USB_NDDRINTCLR_EPNDDINTCLR23_Pos (23UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPNDDINTCLR23 (Bit 23)

◆ USB_NDDRINTCLR_EPNDDINTCLR24_Msk

#define USB_NDDRINTCLR_EPNDDINTCLR24_Msk (0x1000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPNDDINTCLR24 (Bitfield-Mask: 0x01)

◆ USB_NDDRINTCLR_EPNDDINTCLR24_Pos

#define USB_NDDRINTCLR_EPNDDINTCLR24_Pos (24UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPNDDINTCLR24 (Bit 24)

◆ USB_NDDRINTCLR_EPNDDINTCLR25_Msk

#define USB_NDDRINTCLR_EPNDDINTCLR25_Msk (0x2000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPNDDINTCLR25 (Bitfield-Mask: 0x01)

◆ USB_NDDRINTCLR_EPNDDINTCLR25_Pos

#define USB_NDDRINTCLR_EPNDDINTCLR25_Pos (25UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPNDDINTCLR25 (Bit 25)

◆ USB_NDDRINTCLR_EPNDDINTCLR26_Msk

#define USB_NDDRINTCLR_EPNDDINTCLR26_Msk (0x4000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPNDDINTCLR26 (Bitfield-Mask: 0x01)

◆ USB_NDDRINTCLR_EPNDDINTCLR26_Pos

#define USB_NDDRINTCLR_EPNDDINTCLR26_Pos (26UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPNDDINTCLR26 (Bit 26)

◆ USB_NDDRINTCLR_EPNDDINTCLR27_Msk

#define USB_NDDRINTCLR_EPNDDINTCLR27_Msk (0x8000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPNDDINTCLR27 (Bitfield-Mask: 0x01)

◆ USB_NDDRINTCLR_EPNDDINTCLR27_Pos

#define USB_NDDRINTCLR_EPNDDINTCLR27_Pos (27UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPNDDINTCLR27 (Bit 27)

◆ USB_NDDRINTCLR_EPNDDINTCLR28_Msk

#define USB_NDDRINTCLR_EPNDDINTCLR28_Msk (0x10000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPNDDINTCLR28 (Bitfield-Mask: 0x01)

◆ USB_NDDRINTCLR_EPNDDINTCLR28_Pos

#define USB_NDDRINTCLR_EPNDDINTCLR28_Pos (28UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPNDDINTCLR28 (Bit 28)

◆ USB_NDDRINTCLR_EPNDDINTCLR29_Msk

#define USB_NDDRINTCLR_EPNDDINTCLR29_Msk (0x20000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPNDDINTCLR29 (Bitfield-Mask: 0x01)

◆ USB_NDDRINTCLR_EPNDDINTCLR29_Pos

#define USB_NDDRINTCLR_EPNDDINTCLR29_Pos (29UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPNDDINTCLR29 (Bit 29)

◆ USB_NDDRINTCLR_EPNDDINTCLR2_Msk

#define USB_NDDRINTCLR_EPNDDINTCLR2_Msk (0x4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPNDDINTCLR2 (Bitfield-Mask: 0x01)

◆ USB_NDDRINTCLR_EPNDDINTCLR2_Pos

#define USB_NDDRINTCLR_EPNDDINTCLR2_Pos (2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPNDDINTCLR2 (Bit 2)

◆ USB_NDDRINTCLR_EPNDDINTCLR30_Msk

#define USB_NDDRINTCLR_EPNDDINTCLR30_Msk (0x40000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPNDDINTCLR30 (Bitfield-Mask: 0x01)

◆ USB_NDDRINTCLR_EPNDDINTCLR30_Pos

#define USB_NDDRINTCLR_EPNDDINTCLR30_Pos (30UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPNDDINTCLR30 (Bit 30)

◆ USB_NDDRINTCLR_EPNDDINTCLR31_Msk

#define USB_NDDRINTCLR_EPNDDINTCLR31_Msk (0x80000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPNDDINTCLR31 (Bitfield-Mask: 0x01)

◆ USB_NDDRINTCLR_EPNDDINTCLR31_Pos

#define USB_NDDRINTCLR_EPNDDINTCLR31_Pos (31UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPNDDINTCLR31 (Bit 31)

◆ USB_NDDRINTCLR_EPNDDINTCLR3_Msk

#define USB_NDDRINTCLR_EPNDDINTCLR3_Msk (0x8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPNDDINTCLR3 (Bitfield-Mask: 0x01)

◆ USB_NDDRINTCLR_EPNDDINTCLR3_Pos

#define USB_NDDRINTCLR_EPNDDINTCLR3_Pos (3UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPNDDINTCLR3 (Bit 3)

◆ USB_NDDRINTCLR_EPNDDINTCLR4_Msk

#define USB_NDDRINTCLR_EPNDDINTCLR4_Msk (0x10UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPNDDINTCLR4 (Bitfield-Mask: 0x01)

◆ USB_NDDRINTCLR_EPNDDINTCLR4_Pos

#define USB_NDDRINTCLR_EPNDDINTCLR4_Pos (4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPNDDINTCLR4 (Bit 4)

◆ USB_NDDRINTCLR_EPNDDINTCLR5_Msk

#define USB_NDDRINTCLR_EPNDDINTCLR5_Msk (0x20UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPNDDINTCLR5 (Bitfield-Mask: 0x01)

◆ USB_NDDRINTCLR_EPNDDINTCLR5_Pos

#define USB_NDDRINTCLR_EPNDDINTCLR5_Pos (5UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPNDDINTCLR5 (Bit 5)

◆ USB_NDDRINTCLR_EPNDDINTCLR6_Msk

#define USB_NDDRINTCLR_EPNDDINTCLR6_Msk (0x40UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPNDDINTCLR6 (Bitfield-Mask: 0x01)

◆ USB_NDDRINTCLR_EPNDDINTCLR6_Pos

#define USB_NDDRINTCLR_EPNDDINTCLR6_Pos (6UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPNDDINTCLR6 (Bit 6)

◆ USB_NDDRINTCLR_EPNDDINTCLR7_Msk

#define USB_NDDRINTCLR_EPNDDINTCLR7_Msk (0x80UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPNDDINTCLR7 (Bitfield-Mask: 0x01)

◆ USB_NDDRINTCLR_EPNDDINTCLR7_Pos

#define USB_NDDRINTCLR_EPNDDINTCLR7_Pos (7UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPNDDINTCLR7 (Bit 7)

◆ USB_NDDRINTCLR_EPNDDINTCLR8_Msk

#define USB_NDDRINTCLR_EPNDDINTCLR8_Msk (0x100UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPNDDINTCLR8 (Bitfield-Mask: 0x01)

◆ USB_NDDRINTCLR_EPNDDINTCLR8_Pos

#define USB_NDDRINTCLR_EPNDDINTCLR8_Pos (8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPNDDINTCLR8 (Bit 8)

◆ USB_NDDRINTCLR_EPNDDINTCLR9_Msk

#define USB_NDDRINTCLR_EPNDDINTCLR9_Msk (0x200UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPNDDINTCLR9 (Bitfield-Mask: 0x01)

◆ USB_NDDRINTCLR_EPNDDINTCLR9_Pos

#define USB_NDDRINTCLR_EPNDDINTCLR9_Pos (9UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPNDDINTCLR9 (Bit 9)

◆ USB_NDDRINTSET_EPNDDINTSET0_Msk

#define USB_NDDRINTSET_EPNDDINTSET0_Msk (0x1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPNDDINTSET0 (Bitfield-Mask: 0x01)

◆ USB_NDDRINTSET_EPNDDINTSET0_Pos

#define USB_NDDRINTSET_EPNDDINTSET0_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPNDDINTSET0 (Bit 0)

◆ USB_NDDRINTSET_EPNDDINTSET10_Msk

#define USB_NDDRINTSET_EPNDDINTSET10_Msk (0x400UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPNDDINTSET10 (Bitfield-Mask: 0x01)

◆ USB_NDDRINTSET_EPNDDINTSET10_Pos

#define USB_NDDRINTSET_EPNDDINTSET10_Pos (10UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPNDDINTSET10 (Bit 10)

◆ USB_NDDRINTSET_EPNDDINTSET11_Msk

#define USB_NDDRINTSET_EPNDDINTSET11_Msk (0x800UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPNDDINTSET11 (Bitfield-Mask: 0x01)

◆ USB_NDDRINTSET_EPNDDINTSET11_Pos

#define USB_NDDRINTSET_EPNDDINTSET11_Pos (11UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPNDDINTSET11 (Bit 11)

◆ USB_NDDRINTSET_EPNDDINTSET12_Msk

#define USB_NDDRINTSET_EPNDDINTSET12_Msk (0x1000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPNDDINTSET12 (Bitfield-Mask: 0x01)

◆ USB_NDDRINTSET_EPNDDINTSET12_Pos

#define USB_NDDRINTSET_EPNDDINTSET12_Pos (12UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPNDDINTSET12 (Bit 12)

◆ USB_NDDRINTSET_EPNDDINTSET13_Msk

#define USB_NDDRINTSET_EPNDDINTSET13_Msk (0x2000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPNDDINTSET13 (Bitfield-Mask: 0x01)

◆ USB_NDDRINTSET_EPNDDINTSET13_Pos

#define USB_NDDRINTSET_EPNDDINTSET13_Pos (13UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPNDDINTSET13 (Bit 13)

◆ USB_NDDRINTSET_EPNDDINTSET14_Msk

#define USB_NDDRINTSET_EPNDDINTSET14_Msk (0x4000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPNDDINTSET14 (Bitfield-Mask: 0x01)

◆ USB_NDDRINTSET_EPNDDINTSET14_Pos

#define USB_NDDRINTSET_EPNDDINTSET14_Pos (14UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPNDDINTSET14 (Bit 14)

◆ USB_NDDRINTSET_EPNDDINTSET15_Msk

#define USB_NDDRINTSET_EPNDDINTSET15_Msk (0x8000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPNDDINTSET15 (Bitfield-Mask: 0x01)

◆ USB_NDDRINTSET_EPNDDINTSET15_Pos

#define USB_NDDRINTSET_EPNDDINTSET15_Pos (15UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPNDDINTSET15 (Bit 15)

◆ USB_NDDRINTSET_EPNDDINTSET16_Msk

#define USB_NDDRINTSET_EPNDDINTSET16_Msk (0x10000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPNDDINTSET16 (Bitfield-Mask: 0x01)

◆ USB_NDDRINTSET_EPNDDINTSET16_Pos

#define USB_NDDRINTSET_EPNDDINTSET16_Pos (16UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPNDDINTSET16 (Bit 16)

◆ USB_NDDRINTSET_EPNDDINTSET17_Msk

#define USB_NDDRINTSET_EPNDDINTSET17_Msk (0x20000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPNDDINTSET17 (Bitfield-Mask: 0x01)

◆ USB_NDDRINTSET_EPNDDINTSET17_Pos

#define USB_NDDRINTSET_EPNDDINTSET17_Pos (17UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPNDDINTSET17 (Bit 17)

◆ USB_NDDRINTSET_EPNDDINTSET18_Msk

#define USB_NDDRINTSET_EPNDDINTSET18_Msk (0x40000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPNDDINTSET18 (Bitfield-Mask: 0x01)

◆ USB_NDDRINTSET_EPNDDINTSET18_Pos

#define USB_NDDRINTSET_EPNDDINTSET18_Pos (18UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPNDDINTSET18 (Bit 18)

◆ USB_NDDRINTSET_EPNDDINTSET19_Msk

#define USB_NDDRINTSET_EPNDDINTSET19_Msk (0x80000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPNDDINTSET19 (Bitfield-Mask: 0x01)

◆ USB_NDDRINTSET_EPNDDINTSET19_Pos

#define USB_NDDRINTSET_EPNDDINTSET19_Pos (19UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPNDDINTSET19 (Bit 19)

◆ USB_NDDRINTSET_EPNDDINTSET1_Msk

#define USB_NDDRINTSET_EPNDDINTSET1_Msk (0x2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPNDDINTSET1 (Bitfield-Mask: 0x01)

◆ USB_NDDRINTSET_EPNDDINTSET1_Pos

#define USB_NDDRINTSET_EPNDDINTSET1_Pos (1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPNDDINTSET1 (Bit 1)

◆ USB_NDDRINTSET_EPNDDINTSET20_Msk

#define USB_NDDRINTSET_EPNDDINTSET20_Msk (0x100000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPNDDINTSET20 (Bitfield-Mask: 0x01)

◆ USB_NDDRINTSET_EPNDDINTSET20_Pos

#define USB_NDDRINTSET_EPNDDINTSET20_Pos (20UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPNDDINTSET20 (Bit 20)

◆ USB_NDDRINTSET_EPNDDINTSET21_Msk

#define USB_NDDRINTSET_EPNDDINTSET21_Msk (0x200000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPNDDINTSET21 (Bitfield-Mask: 0x01)

◆ USB_NDDRINTSET_EPNDDINTSET21_Pos

#define USB_NDDRINTSET_EPNDDINTSET21_Pos (21UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPNDDINTSET21 (Bit 21)

◆ USB_NDDRINTSET_EPNDDINTSET22_Msk

#define USB_NDDRINTSET_EPNDDINTSET22_Msk (0x400000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPNDDINTSET22 (Bitfield-Mask: 0x01)

◆ USB_NDDRINTSET_EPNDDINTSET22_Pos

#define USB_NDDRINTSET_EPNDDINTSET22_Pos (22UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPNDDINTSET22 (Bit 22)

◆ USB_NDDRINTSET_EPNDDINTSET23_Msk

#define USB_NDDRINTSET_EPNDDINTSET23_Msk (0x800000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPNDDINTSET23 (Bitfield-Mask: 0x01)

◆ USB_NDDRINTSET_EPNDDINTSET23_Pos

#define USB_NDDRINTSET_EPNDDINTSET23_Pos (23UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPNDDINTSET23 (Bit 23)

◆ USB_NDDRINTSET_EPNDDINTSET24_Msk

#define USB_NDDRINTSET_EPNDDINTSET24_Msk (0x1000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPNDDINTSET24 (Bitfield-Mask: 0x01)

◆ USB_NDDRINTSET_EPNDDINTSET24_Pos

#define USB_NDDRINTSET_EPNDDINTSET24_Pos (24UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPNDDINTSET24 (Bit 24)

◆ USB_NDDRINTSET_EPNDDINTSET25_Msk

#define USB_NDDRINTSET_EPNDDINTSET25_Msk (0x2000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPNDDINTSET25 (Bitfield-Mask: 0x01)

◆ USB_NDDRINTSET_EPNDDINTSET25_Pos

#define USB_NDDRINTSET_EPNDDINTSET25_Pos (25UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPNDDINTSET25 (Bit 25)

◆ USB_NDDRINTSET_EPNDDINTSET26_Msk

#define USB_NDDRINTSET_EPNDDINTSET26_Msk (0x4000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPNDDINTSET26 (Bitfield-Mask: 0x01)

◆ USB_NDDRINTSET_EPNDDINTSET26_Pos

#define USB_NDDRINTSET_EPNDDINTSET26_Pos (26UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPNDDINTSET26 (Bit 26)

◆ USB_NDDRINTSET_EPNDDINTSET27_Msk

#define USB_NDDRINTSET_EPNDDINTSET27_Msk (0x8000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPNDDINTSET27 (Bitfield-Mask: 0x01)

◆ USB_NDDRINTSET_EPNDDINTSET27_Pos

#define USB_NDDRINTSET_EPNDDINTSET27_Pos (27UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPNDDINTSET27 (Bit 27)

◆ USB_NDDRINTSET_EPNDDINTSET28_Msk

#define USB_NDDRINTSET_EPNDDINTSET28_Msk (0x10000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPNDDINTSET28 (Bitfield-Mask: 0x01)

◆ USB_NDDRINTSET_EPNDDINTSET28_Pos

#define USB_NDDRINTSET_EPNDDINTSET28_Pos (28UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPNDDINTSET28 (Bit 28)

◆ USB_NDDRINTSET_EPNDDINTSET29_Msk

#define USB_NDDRINTSET_EPNDDINTSET29_Msk (0x20000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPNDDINTSET29 (Bitfield-Mask: 0x01)

◆ USB_NDDRINTSET_EPNDDINTSET29_Pos

#define USB_NDDRINTSET_EPNDDINTSET29_Pos (29UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPNDDINTSET29 (Bit 29)

◆ USB_NDDRINTSET_EPNDDINTSET2_Msk

#define USB_NDDRINTSET_EPNDDINTSET2_Msk (0x4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPNDDINTSET2 (Bitfield-Mask: 0x01)

◆ USB_NDDRINTSET_EPNDDINTSET2_Pos

#define USB_NDDRINTSET_EPNDDINTSET2_Pos (2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPNDDINTSET2 (Bit 2)

◆ USB_NDDRINTSET_EPNDDINTSET30_Msk

#define USB_NDDRINTSET_EPNDDINTSET30_Msk (0x40000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPNDDINTSET30 (Bitfield-Mask: 0x01)

◆ USB_NDDRINTSET_EPNDDINTSET30_Pos

#define USB_NDDRINTSET_EPNDDINTSET30_Pos (30UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPNDDINTSET30 (Bit 30)

◆ USB_NDDRINTSET_EPNDDINTSET31_Msk

#define USB_NDDRINTSET_EPNDDINTSET31_Msk (0x80000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPNDDINTSET31 (Bitfield-Mask: 0x01)

◆ USB_NDDRINTSET_EPNDDINTSET31_Pos

#define USB_NDDRINTSET_EPNDDINTSET31_Pos (31UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPNDDINTSET31 (Bit 31)

◆ USB_NDDRINTSET_EPNDDINTSET3_Msk

#define USB_NDDRINTSET_EPNDDINTSET3_Msk (0x8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPNDDINTSET3 (Bitfield-Mask: 0x01)

◆ USB_NDDRINTSET_EPNDDINTSET3_Pos

#define USB_NDDRINTSET_EPNDDINTSET3_Pos (3UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPNDDINTSET3 (Bit 3)

◆ USB_NDDRINTSET_EPNDDINTSET4_Msk

#define USB_NDDRINTSET_EPNDDINTSET4_Msk (0x10UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPNDDINTSET4 (Bitfield-Mask: 0x01)

◆ USB_NDDRINTSET_EPNDDINTSET4_Pos

#define USB_NDDRINTSET_EPNDDINTSET4_Pos (4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPNDDINTSET4 (Bit 4)

◆ USB_NDDRINTSET_EPNDDINTSET5_Msk

#define USB_NDDRINTSET_EPNDDINTSET5_Msk (0x20UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPNDDINTSET5 (Bitfield-Mask: 0x01)

◆ USB_NDDRINTSET_EPNDDINTSET5_Pos

#define USB_NDDRINTSET_EPNDDINTSET5_Pos (5UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPNDDINTSET5 (Bit 5)

◆ USB_NDDRINTSET_EPNDDINTSET6_Msk

#define USB_NDDRINTSET_EPNDDINTSET6_Msk (0x40UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPNDDINTSET6 (Bitfield-Mask: 0x01)

◆ USB_NDDRINTSET_EPNDDINTSET6_Pos

#define USB_NDDRINTSET_EPNDDINTSET6_Pos (6UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPNDDINTSET6 (Bit 6)

◆ USB_NDDRINTSET_EPNDDINTSET7_Msk

#define USB_NDDRINTSET_EPNDDINTSET7_Msk (0x80UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPNDDINTSET7 (Bitfield-Mask: 0x01)

◆ USB_NDDRINTSET_EPNDDINTSET7_Pos

#define USB_NDDRINTSET_EPNDDINTSET7_Pos (7UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPNDDINTSET7 (Bit 7)

◆ USB_NDDRINTSET_EPNDDINTSET8_Msk

#define USB_NDDRINTSET_EPNDDINTSET8_Msk (0x100UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPNDDINTSET8 (Bitfield-Mask: 0x01)

◆ USB_NDDRINTSET_EPNDDINTSET8_Pos

#define USB_NDDRINTSET_EPNDDINTSET8_Pos (8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPNDDINTSET8 (Bit 8)

◆ USB_NDDRINTSET_EPNDDINTSET9_Msk

#define USB_NDDRINTSET_EPNDDINTSET9_Msk (0x200UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPNDDINTSET9 (Bitfield-Mask: 0x01)

◆ USB_NDDRINTSET_EPNDDINTSET9_Pos

#define USB_NDDRINTSET_EPNDDINTSET9_Pos (9UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPNDDINTSET9 (Bit 9)

◆ USB_NDDRINTST_EPNDDINTST0_Msk

#define USB_NDDRINTST_EPNDDINTST0_Msk (0x1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPNDDINTST0 (Bitfield-Mask: 0x01)

◆ USB_NDDRINTST_EPNDDINTST0_Pos

#define USB_NDDRINTST_EPNDDINTST0_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPNDDINTST0 (Bit 0)

◆ USB_NDDRINTST_EPNDDINTST10_Msk

#define USB_NDDRINTST_EPNDDINTST10_Msk (0x400UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPNDDINTST10 (Bitfield-Mask: 0x01)

◆ USB_NDDRINTST_EPNDDINTST10_Pos

#define USB_NDDRINTST_EPNDDINTST10_Pos (10UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPNDDINTST10 (Bit 10)

◆ USB_NDDRINTST_EPNDDINTST11_Msk

#define USB_NDDRINTST_EPNDDINTST11_Msk (0x800UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPNDDINTST11 (Bitfield-Mask: 0x01)

◆ USB_NDDRINTST_EPNDDINTST11_Pos

#define USB_NDDRINTST_EPNDDINTST11_Pos (11UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPNDDINTST11 (Bit 11)

◆ USB_NDDRINTST_EPNDDINTST12_Msk

#define USB_NDDRINTST_EPNDDINTST12_Msk (0x1000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPNDDINTST12 (Bitfield-Mask: 0x01)

◆ USB_NDDRINTST_EPNDDINTST12_Pos

#define USB_NDDRINTST_EPNDDINTST12_Pos (12UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPNDDINTST12 (Bit 12)

◆ USB_NDDRINTST_EPNDDINTST13_Msk

#define USB_NDDRINTST_EPNDDINTST13_Msk (0x2000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPNDDINTST13 (Bitfield-Mask: 0x01)

◆ USB_NDDRINTST_EPNDDINTST13_Pos

#define USB_NDDRINTST_EPNDDINTST13_Pos (13UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPNDDINTST13 (Bit 13)

◆ USB_NDDRINTST_EPNDDINTST14_Msk

#define USB_NDDRINTST_EPNDDINTST14_Msk (0x4000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPNDDINTST14 (Bitfield-Mask: 0x01)

◆ USB_NDDRINTST_EPNDDINTST14_Pos

#define USB_NDDRINTST_EPNDDINTST14_Pos (14UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPNDDINTST14 (Bit 14)

◆ USB_NDDRINTST_EPNDDINTST15_Msk

#define USB_NDDRINTST_EPNDDINTST15_Msk (0x8000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPNDDINTST15 (Bitfield-Mask: 0x01)

◆ USB_NDDRINTST_EPNDDINTST15_Pos

#define USB_NDDRINTST_EPNDDINTST15_Pos (15UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPNDDINTST15 (Bit 15)

◆ USB_NDDRINTST_EPNDDINTST16_Msk

#define USB_NDDRINTST_EPNDDINTST16_Msk (0x10000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPNDDINTST16 (Bitfield-Mask: 0x01)

◆ USB_NDDRINTST_EPNDDINTST16_Pos

#define USB_NDDRINTST_EPNDDINTST16_Pos (16UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPNDDINTST16 (Bit 16)

◆ USB_NDDRINTST_EPNDDINTST17_Msk

#define USB_NDDRINTST_EPNDDINTST17_Msk (0x20000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPNDDINTST17 (Bitfield-Mask: 0x01)

◆ USB_NDDRINTST_EPNDDINTST17_Pos

#define USB_NDDRINTST_EPNDDINTST17_Pos (17UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPNDDINTST17 (Bit 17)

◆ USB_NDDRINTST_EPNDDINTST18_Msk

#define USB_NDDRINTST_EPNDDINTST18_Msk (0x40000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPNDDINTST18 (Bitfield-Mask: 0x01)

◆ USB_NDDRINTST_EPNDDINTST18_Pos

#define USB_NDDRINTST_EPNDDINTST18_Pos (18UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPNDDINTST18 (Bit 18)

◆ USB_NDDRINTST_EPNDDINTST19_Msk

#define USB_NDDRINTST_EPNDDINTST19_Msk (0x80000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPNDDINTST19 (Bitfield-Mask: 0x01)

◆ USB_NDDRINTST_EPNDDINTST19_Pos

#define USB_NDDRINTST_EPNDDINTST19_Pos (19UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPNDDINTST19 (Bit 19)

◆ USB_NDDRINTST_EPNDDINTST1_Msk

#define USB_NDDRINTST_EPNDDINTST1_Msk (0x2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPNDDINTST1 (Bitfield-Mask: 0x01)

◆ USB_NDDRINTST_EPNDDINTST1_Pos

#define USB_NDDRINTST_EPNDDINTST1_Pos (1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPNDDINTST1 (Bit 1)

◆ USB_NDDRINTST_EPNDDINTST20_Msk

#define USB_NDDRINTST_EPNDDINTST20_Msk (0x100000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPNDDINTST20 (Bitfield-Mask: 0x01)

◆ USB_NDDRINTST_EPNDDINTST20_Pos

#define USB_NDDRINTST_EPNDDINTST20_Pos (20UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPNDDINTST20 (Bit 20)

◆ USB_NDDRINTST_EPNDDINTST21_Msk

#define USB_NDDRINTST_EPNDDINTST21_Msk (0x200000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPNDDINTST21 (Bitfield-Mask: 0x01)

◆ USB_NDDRINTST_EPNDDINTST21_Pos

#define USB_NDDRINTST_EPNDDINTST21_Pos (21UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPNDDINTST21 (Bit 21)

◆ USB_NDDRINTST_EPNDDINTST22_Msk

#define USB_NDDRINTST_EPNDDINTST22_Msk (0x400000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPNDDINTST22 (Bitfield-Mask: 0x01)

◆ USB_NDDRINTST_EPNDDINTST22_Pos

#define USB_NDDRINTST_EPNDDINTST22_Pos (22UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPNDDINTST22 (Bit 22)

◆ USB_NDDRINTST_EPNDDINTST23_Msk

#define USB_NDDRINTST_EPNDDINTST23_Msk (0x800000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPNDDINTST23 (Bitfield-Mask: 0x01)

◆ USB_NDDRINTST_EPNDDINTST23_Pos

#define USB_NDDRINTST_EPNDDINTST23_Pos (23UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPNDDINTST23 (Bit 23)

◆ USB_NDDRINTST_EPNDDINTST24_Msk

#define USB_NDDRINTST_EPNDDINTST24_Msk (0x1000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPNDDINTST24 (Bitfield-Mask: 0x01)

◆ USB_NDDRINTST_EPNDDINTST24_Pos

#define USB_NDDRINTST_EPNDDINTST24_Pos (24UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPNDDINTST24 (Bit 24)

◆ USB_NDDRINTST_EPNDDINTST25_Msk

#define USB_NDDRINTST_EPNDDINTST25_Msk (0x2000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPNDDINTST25 (Bitfield-Mask: 0x01)

◆ USB_NDDRINTST_EPNDDINTST25_Pos

#define USB_NDDRINTST_EPNDDINTST25_Pos (25UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPNDDINTST25 (Bit 25)

◆ USB_NDDRINTST_EPNDDINTST26_Msk

#define USB_NDDRINTST_EPNDDINTST26_Msk (0x4000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPNDDINTST26 (Bitfield-Mask: 0x01)

◆ USB_NDDRINTST_EPNDDINTST26_Pos

#define USB_NDDRINTST_EPNDDINTST26_Pos (26UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPNDDINTST26 (Bit 26)

◆ USB_NDDRINTST_EPNDDINTST27_Msk

#define USB_NDDRINTST_EPNDDINTST27_Msk (0x8000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPNDDINTST27 (Bitfield-Mask: 0x01)

◆ USB_NDDRINTST_EPNDDINTST27_Pos

#define USB_NDDRINTST_EPNDDINTST27_Pos (27UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPNDDINTST27 (Bit 27)

◆ USB_NDDRINTST_EPNDDINTST28_Msk

#define USB_NDDRINTST_EPNDDINTST28_Msk (0x10000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPNDDINTST28 (Bitfield-Mask: 0x01)

◆ USB_NDDRINTST_EPNDDINTST28_Pos

#define USB_NDDRINTST_EPNDDINTST28_Pos (28UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPNDDINTST28 (Bit 28)

◆ USB_NDDRINTST_EPNDDINTST29_Msk

#define USB_NDDRINTST_EPNDDINTST29_Msk (0x20000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPNDDINTST29 (Bitfield-Mask: 0x01)

◆ USB_NDDRINTST_EPNDDINTST29_Pos

#define USB_NDDRINTST_EPNDDINTST29_Pos (29UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPNDDINTST29 (Bit 29)

◆ USB_NDDRINTST_EPNDDINTST2_Msk

#define USB_NDDRINTST_EPNDDINTST2_Msk (0x4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPNDDINTST2 (Bitfield-Mask: 0x01)

◆ USB_NDDRINTST_EPNDDINTST2_Pos

#define USB_NDDRINTST_EPNDDINTST2_Pos (2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPNDDINTST2 (Bit 2)

◆ USB_NDDRINTST_EPNDDINTST30_Msk

#define USB_NDDRINTST_EPNDDINTST30_Msk (0x40000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPNDDINTST30 (Bitfield-Mask: 0x01)

◆ USB_NDDRINTST_EPNDDINTST30_Pos

#define USB_NDDRINTST_EPNDDINTST30_Pos (30UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPNDDINTST30 (Bit 30)

◆ USB_NDDRINTST_EPNDDINTST31_Msk

#define USB_NDDRINTST_EPNDDINTST31_Msk (0x80000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPNDDINTST31 (Bitfield-Mask: 0x01)

◆ USB_NDDRINTST_EPNDDINTST31_Pos

#define USB_NDDRINTST_EPNDDINTST31_Pos (31UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPNDDINTST31 (Bit 31)

◆ USB_NDDRINTST_EPNDDINTST3_Msk

#define USB_NDDRINTST_EPNDDINTST3_Msk (0x8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPNDDINTST3 (Bitfield-Mask: 0x01)

◆ USB_NDDRINTST_EPNDDINTST3_Pos

#define USB_NDDRINTST_EPNDDINTST3_Pos (3UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPNDDINTST3 (Bit 3)

◆ USB_NDDRINTST_EPNDDINTST4_Msk

#define USB_NDDRINTST_EPNDDINTST4_Msk (0x10UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPNDDINTST4 (Bitfield-Mask: 0x01)

◆ USB_NDDRINTST_EPNDDINTST4_Pos

#define USB_NDDRINTST_EPNDDINTST4_Pos (4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPNDDINTST4 (Bit 4)

◆ USB_NDDRINTST_EPNDDINTST5_Msk

#define USB_NDDRINTST_EPNDDINTST5_Msk (0x20UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPNDDINTST5 (Bitfield-Mask: 0x01)

◆ USB_NDDRINTST_EPNDDINTST5_Pos

#define USB_NDDRINTST_EPNDDINTST5_Pos (5UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPNDDINTST5 (Bit 5)

◆ USB_NDDRINTST_EPNDDINTST6_Msk

#define USB_NDDRINTST_EPNDDINTST6_Msk (0x40UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPNDDINTST6 (Bitfield-Mask: 0x01)

◆ USB_NDDRINTST_EPNDDINTST6_Pos

#define USB_NDDRINTST_EPNDDINTST6_Pos (6UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPNDDINTST6 (Bit 6)

◆ USB_NDDRINTST_EPNDDINTST7_Msk

#define USB_NDDRINTST_EPNDDINTST7_Msk (0x80UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPNDDINTST7 (Bitfield-Mask: 0x01)

◆ USB_NDDRINTST_EPNDDINTST7_Pos

#define USB_NDDRINTST_EPNDDINTST7_Pos (7UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPNDDINTST7 (Bit 7)

◆ USB_NDDRINTST_EPNDDINTST8_Msk

#define USB_NDDRINTST_EPNDDINTST8_Msk (0x100UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPNDDINTST8 (Bitfield-Mask: 0x01)

◆ USB_NDDRINTST_EPNDDINTST8_Pos

#define USB_NDDRINTST_EPNDDINTST8_Pos (8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPNDDINTST8 (Bit 8)

◆ USB_NDDRINTST_EPNDDINTST9_Msk

#define USB_NDDRINTST_EPNDDINTST9_Msk (0x200UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPNDDINTST9 (Bitfield-Mask: 0x01)

◆ USB_NDDRINTST_EPNDDINTST9_Pos

#define USB_NDDRINTST_EPNDDINTST9_Pos (9UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPNDDINTST9 (Bit 9)

◆ USB_OTGCLKCTRL_AHB_CLK_EN_Msk

#define USB_OTGCLKCTRL_AHB_CLK_EN_Msk (0x10UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

AHB_CLK_EN (Bitfield-Mask: 0x01)

◆ USB_OTGCLKCTRL_AHB_CLK_EN_Pos

#define USB_OTGCLKCTRL_AHB_CLK_EN_Pos (4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

AHB_CLK_EN (Bit 4)

◆ USB_OTGCLKCTRL_DEV_CLK_EN_Msk

#define USB_OTGCLKCTRL_DEV_CLK_EN_Msk (0x2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DEV_CLK_EN (Bitfield-Mask: 0x01)

◆ USB_OTGCLKCTRL_DEV_CLK_EN_Pos

#define USB_OTGCLKCTRL_DEV_CLK_EN_Pos (1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DEV_CLK_EN (Bit 1)

◆ USB_OTGCLKCTRL_HOST_CLK_EN_Msk

#define USB_OTGCLKCTRL_HOST_CLK_EN_Msk (0x1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

HOST_CLK_EN (Bitfield-Mask: 0x01)

◆ USB_OTGCLKCTRL_HOST_CLK_EN_Pos

#define USB_OTGCLKCTRL_HOST_CLK_EN_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

HOST_CLK_EN (Bit 0)

◆ USB_OTGCLKCTRL_I2C_CLK_EN_Msk

#define USB_OTGCLKCTRL_I2C_CLK_EN_Msk (0x4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

I2C_CLK_EN (Bitfield-Mask: 0x01)

◆ USB_OTGCLKCTRL_I2C_CLK_EN_Pos

#define USB_OTGCLKCTRL_I2C_CLK_EN_Pos (2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

I2C_CLK_EN (Bit 2)

◆ USB_OTGCLKCTRL_OTG_CLK_EN_Msk

#define USB_OTGCLKCTRL_OTG_CLK_EN_Msk (0x8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

OTG_CLK_EN (Bitfield-Mask: 0x01)

◆ USB_OTGCLKCTRL_OTG_CLK_EN_Pos

#define USB_OTGCLKCTRL_OTG_CLK_EN_Pos (3UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

OTG_CLK_EN (Bit 3)

◆ USB_OTGCLKST_AHB_CLK_ON_Msk

#define USB_OTGCLKST_AHB_CLK_ON_Msk (0x10UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

AHB_CLK_ON (Bitfield-Mask: 0x01)

◆ USB_OTGCLKST_AHB_CLK_ON_Pos

#define USB_OTGCLKST_AHB_CLK_ON_Pos (4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

AHB_CLK_ON (Bit 4)

◆ USB_OTGCLKST_DEV_CLK_ON_Msk

#define USB_OTGCLKST_DEV_CLK_ON_Msk (0x2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DEV_CLK_ON (Bitfield-Mask: 0x01)

◆ USB_OTGCLKST_DEV_CLK_ON_Pos

#define USB_OTGCLKST_DEV_CLK_ON_Pos (1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DEV_CLK_ON (Bit 1)

◆ USB_OTGCLKST_HOST_CLK_ON_Msk

#define USB_OTGCLKST_HOST_CLK_ON_Msk (0x1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

HOST_CLK_ON (Bitfield-Mask: 0x01)

◆ USB_OTGCLKST_HOST_CLK_ON_Pos

#define USB_OTGCLKST_HOST_CLK_ON_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

HOST_CLK_ON (Bit 0)

◆ USB_OTGCLKST_I2C_CLK_ON_Msk

#define USB_OTGCLKST_I2C_CLK_ON_Msk (0x4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

I2C_CLK_ON (Bitfield-Mask: 0x01)

◆ USB_OTGCLKST_I2C_CLK_ON_Pos

#define USB_OTGCLKST_I2C_CLK_ON_Pos (2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

I2C_CLK_ON (Bit 2)

◆ USB_OTGCLKST_OTG_CLK_ON_Msk

#define USB_OTGCLKST_OTG_CLK_ON_Msk (0x8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

OTG_CLK_ON (Bitfield-Mask: 0x01)

◆ USB_OTGCLKST_OTG_CLK_ON_Pos

#define USB_OTGCLKST_OTG_CLK_ON_Pos (3UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

OTG_CLK_ON (Bit 3)

◆ USB_REEP_EPR0_Msk

#define USB_REEP_EPR0_Msk (0x1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPR0 (Bitfield-Mask: 0x01)

◆ USB_REEP_EPR0_Pos

#define USB_REEP_EPR0_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPR0 (Bit 0)

◆ USB_REEP_EPR10_Msk

#define USB_REEP_EPR10_Msk (0x400UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPR10 (Bitfield-Mask: 0x01)

◆ USB_REEP_EPR10_Pos

#define USB_REEP_EPR10_Pos (10UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPR10 (Bit 10)

◆ USB_REEP_EPR11_Msk

#define USB_REEP_EPR11_Msk (0x800UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPR11 (Bitfield-Mask: 0x01)

◆ USB_REEP_EPR11_Pos

#define USB_REEP_EPR11_Pos (11UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPR11 (Bit 11)

◆ USB_REEP_EPR12_Msk

#define USB_REEP_EPR12_Msk (0x1000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPR12 (Bitfield-Mask: 0x01)

◆ USB_REEP_EPR12_Pos

#define USB_REEP_EPR12_Pos (12UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPR12 (Bit 12)

◆ USB_REEP_EPR13_Msk

#define USB_REEP_EPR13_Msk (0x2000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPR13 (Bitfield-Mask: 0x01)

◆ USB_REEP_EPR13_Pos

#define USB_REEP_EPR13_Pos (13UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPR13 (Bit 13)

◆ USB_REEP_EPR14_Msk

#define USB_REEP_EPR14_Msk (0x4000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPR14 (Bitfield-Mask: 0x01)

◆ USB_REEP_EPR14_Pos

#define USB_REEP_EPR14_Pos (14UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPR14 (Bit 14)

◆ USB_REEP_EPR15_Msk

#define USB_REEP_EPR15_Msk (0x8000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPR15 (Bitfield-Mask: 0x01)

◆ USB_REEP_EPR15_Pos

#define USB_REEP_EPR15_Pos (15UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPR15 (Bit 15)

◆ USB_REEP_EPR16_Msk

#define USB_REEP_EPR16_Msk (0x10000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPR16 (Bitfield-Mask: 0x01)

◆ USB_REEP_EPR16_Pos

#define USB_REEP_EPR16_Pos (16UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPR16 (Bit 16)

◆ USB_REEP_EPR17_Msk

#define USB_REEP_EPR17_Msk (0x20000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPR17 (Bitfield-Mask: 0x01)

◆ USB_REEP_EPR17_Pos

#define USB_REEP_EPR17_Pos (17UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPR17 (Bit 17)

◆ USB_REEP_EPR18_Msk

#define USB_REEP_EPR18_Msk (0x40000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPR18 (Bitfield-Mask: 0x01)

◆ USB_REEP_EPR18_Pos

#define USB_REEP_EPR18_Pos (18UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPR18 (Bit 18)

◆ USB_REEP_EPR19_Msk

#define USB_REEP_EPR19_Msk (0x80000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPR19 (Bitfield-Mask: 0x01)

◆ USB_REEP_EPR19_Pos

#define USB_REEP_EPR19_Pos (19UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPR19 (Bit 19)

◆ USB_REEP_EPR1_Msk

#define USB_REEP_EPR1_Msk (0x2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPR1 (Bitfield-Mask: 0x01)

◆ USB_REEP_EPR1_Pos

#define USB_REEP_EPR1_Pos (1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPR1 (Bit 1)

◆ USB_REEP_EPR20_Msk

#define USB_REEP_EPR20_Msk (0x100000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPR20 (Bitfield-Mask: 0x01)

◆ USB_REEP_EPR20_Pos

#define USB_REEP_EPR20_Pos (20UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPR20 (Bit 20)

◆ USB_REEP_EPR21_Msk

#define USB_REEP_EPR21_Msk (0x200000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPR21 (Bitfield-Mask: 0x01)

◆ USB_REEP_EPR21_Pos

#define USB_REEP_EPR21_Pos (21UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPR21 (Bit 21)

◆ USB_REEP_EPR22_Msk

#define USB_REEP_EPR22_Msk (0x400000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPR22 (Bitfield-Mask: 0x01)

◆ USB_REEP_EPR22_Pos

#define USB_REEP_EPR22_Pos (22UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPR22 (Bit 22)

◆ USB_REEP_EPR23_Msk

#define USB_REEP_EPR23_Msk (0x800000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPR23 (Bitfield-Mask: 0x01)

◆ USB_REEP_EPR23_Pos

#define USB_REEP_EPR23_Pos (23UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPR23 (Bit 23)

◆ USB_REEP_EPR24_Msk

#define USB_REEP_EPR24_Msk (0x1000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPR24 (Bitfield-Mask: 0x01)

◆ USB_REEP_EPR24_Pos

#define USB_REEP_EPR24_Pos (24UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPR24 (Bit 24)

◆ USB_REEP_EPR25_Msk

#define USB_REEP_EPR25_Msk (0x2000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPR25 (Bitfield-Mask: 0x01)

◆ USB_REEP_EPR25_Pos

#define USB_REEP_EPR25_Pos (25UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPR25 (Bit 25)

◆ USB_REEP_EPR26_Msk

#define USB_REEP_EPR26_Msk (0x4000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPR26 (Bitfield-Mask: 0x01)

◆ USB_REEP_EPR26_Pos

#define USB_REEP_EPR26_Pos (26UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPR26 (Bit 26)

◆ USB_REEP_EPR27_Msk

#define USB_REEP_EPR27_Msk (0x8000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPR27 (Bitfield-Mask: 0x01)

◆ USB_REEP_EPR27_Pos

#define USB_REEP_EPR27_Pos (27UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPR27 (Bit 27)

◆ USB_REEP_EPR28_Msk

#define USB_REEP_EPR28_Msk (0x10000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPR28 (Bitfield-Mask: 0x01)

◆ USB_REEP_EPR28_Pos

#define USB_REEP_EPR28_Pos (28UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPR28 (Bit 28)

◆ USB_REEP_EPR29_Msk

#define USB_REEP_EPR29_Msk (0x20000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPR29 (Bitfield-Mask: 0x01)

◆ USB_REEP_EPR29_Pos

#define USB_REEP_EPR29_Pos (29UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPR29 (Bit 29)

◆ USB_REEP_EPR2_Msk

#define USB_REEP_EPR2_Msk (0x4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPR2 (Bitfield-Mask: 0x01)

◆ USB_REEP_EPR2_Pos

#define USB_REEP_EPR2_Pos (2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPR2 (Bit 2)

◆ USB_REEP_EPR30_Msk

#define USB_REEP_EPR30_Msk (0x40000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPR30 (Bitfield-Mask: 0x01)

◆ USB_REEP_EPR30_Pos

#define USB_REEP_EPR30_Pos (30UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPR30 (Bit 30)

◆ USB_REEP_EPR31_Msk

#define USB_REEP_EPR31_Msk (0x80000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPR31 (Bitfield-Mask: 0x01)

◆ USB_REEP_EPR31_Pos

#define USB_REEP_EPR31_Pos (31UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPR31 (Bit 31)

◆ USB_REEP_EPR3_Msk

#define USB_REEP_EPR3_Msk (0x8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPR3 (Bitfield-Mask: 0x01)

◆ USB_REEP_EPR3_Pos

#define USB_REEP_EPR3_Pos (3UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPR3 (Bit 3)

◆ USB_REEP_EPR4_Msk

#define USB_REEP_EPR4_Msk (0x10UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPR4 (Bitfield-Mask: 0x01)

◆ USB_REEP_EPR4_Pos

#define USB_REEP_EPR4_Pos (4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPR4 (Bit 4)

◆ USB_REEP_EPR5_Msk

#define USB_REEP_EPR5_Msk (0x20UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPR5 (Bitfield-Mask: 0x01)

◆ USB_REEP_EPR5_Pos

#define USB_REEP_EPR5_Pos (5UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPR5 (Bit 5)

◆ USB_REEP_EPR6_Msk

#define USB_REEP_EPR6_Msk (0x40UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPR6 (Bitfield-Mask: 0x01)

◆ USB_REEP_EPR6_Pos

#define USB_REEP_EPR6_Pos (6UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPR6 (Bit 6)

◆ USB_REEP_EPR7_Msk

#define USB_REEP_EPR7_Msk (0x80UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPR7 (Bitfield-Mask: 0x01)

◆ USB_REEP_EPR7_Pos

#define USB_REEP_EPR7_Pos (7UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPR7 (Bit 7)

◆ USB_REEP_EPR8_Msk

#define USB_REEP_EPR8_Msk (0x100UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPR8 (Bitfield-Mask: 0x01)

◆ USB_REEP_EPR8_Pos

#define USB_REEP_EPR8_Pos (8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPR8 (Bit 8)

◆ USB_REEP_EPR9_Msk

#define USB_REEP_EPR9_Msk (0x200UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPR9 (Bitfield-Mask: 0x01)

◆ USB_REEP_EPR9_Pos

#define USB_REEP_EPR9_Pos (9UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPR9 (Bit 9)

◆ USB_RXDATA_RX_DATA_Msk

#define USB_RXDATA_RX_DATA_Msk (0xffffffffUL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RX_DATA (Bitfield-Mask: 0xffffffff)

◆ USB_RXDATA_RX_DATA_Pos

#define USB_RXDATA_RX_DATA_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

RX_DATA (Bit 0)

◆ USB_RXPLEN_DV_Msk

#define USB_RXPLEN_DV_Msk (0x400UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DV (Bitfield-Mask: 0x01)

◆ USB_RXPLEN_DV_Pos

#define USB_RXPLEN_DV_Pos (10UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DV (Bit 10)

◆ USB_RXPLEN_PKT_LNGTH_Msk

#define USB_RXPLEN_PKT_LNGTH_Msk (0x3ffUL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PKT_LNGTH (Bitfield-Mask: 0x3ff)

◆ USB_RXPLEN_PKT_LNGTH_Pos

#define USB_RXPLEN_PKT_LNGTH_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PKT_LNGTH (Bit 0)

◆ USB_RXPLEN_PKT_RDY_Msk

#define USB_RXPLEN_PKT_RDY_Msk (0x800UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PKT_RDY (Bitfield-Mask: 0x01)

◆ USB_RXPLEN_PKT_RDY_Pos

#define USB_RXPLEN_PKT_RDY_Pos (11UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PKT_RDY (Bit 11)

◆ USB_STCTRL_A_HNP_TRACK_Msk

#define USB_STCTRL_A_HNP_TRACK_Msk (0x200UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

A_HNP_TRACK (Bitfield-Mask: 0x01)

◆ USB_STCTRL_A_HNP_TRACK_Pos

#define USB_STCTRL_A_HNP_TRACK_Pos (9UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

A_HNP_TRACK (Bit 9)

◆ USB_STCTRL_B_HNP_TRACK_Msk

#define USB_STCTRL_B_HNP_TRACK_Msk (0x100UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

B_HNP_TRACK (Bitfield-Mask: 0x01)

◆ USB_STCTRL_B_HNP_TRACK_Pos

#define USB_STCTRL_B_HNP_TRACK_Pos (8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

B_HNP_TRACK (Bit 8)

◆ USB_STCTRL_PORT_FUNC_Msk

#define USB_STCTRL_PORT_FUNC_Msk (0x3UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PORT_FUNC (Bitfield-Mask: 0x03)

◆ USB_STCTRL_PORT_FUNC_Pos

#define USB_STCTRL_PORT_FUNC_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PORT_FUNC (Bit 0)

◆ USB_STCTRL_PU_REMOVED_Msk

#define USB_STCTRL_PU_REMOVED_Msk (0x400UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PU_REMOVED (Bitfield-Mask: 0x01)

◆ USB_STCTRL_PU_REMOVED_Pos

#define USB_STCTRL_PU_REMOVED_Pos (10UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PU_REMOVED (Bit 10)

◆ USB_STCTRL_TMR_CNT_Msk

#define USB_STCTRL_TMR_CNT_Msk (0xffff0000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TMR_CNT (Bitfield-Mask: 0xffff)

◆ USB_STCTRL_TMR_CNT_Pos

#define USB_STCTRL_TMR_CNT_Pos (16UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TMR_CNT (Bit 16)

◆ USB_STCTRL_TMR_EN_Msk

#define USB_STCTRL_TMR_EN_Msk (0x20UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TMR_EN (Bitfield-Mask: 0x01)

◆ USB_STCTRL_TMR_EN_Pos

#define USB_STCTRL_TMR_EN_Pos (5UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TMR_EN (Bit 5)

◆ USB_STCTRL_TMR_MODE_Msk

#define USB_STCTRL_TMR_MODE_Msk (0x10UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TMR_MODE (Bitfield-Mask: 0x01)

◆ USB_STCTRL_TMR_MODE_Pos

#define USB_STCTRL_TMR_MODE_Pos (4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TMR_MODE (Bit 4)

◆ USB_STCTRL_TMR_RST_Msk

#define USB_STCTRL_TMR_RST_Msk (0x40UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TMR_RST (Bitfield-Mask: 0x01)

◆ USB_STCTRL_TMR_RST_Pos

#define USB_STCTRL_TMR_RST_Pos (6UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TMR_RST (Bit 6)

◆ USB_STCTRL_TMR_SCALE_Msk

#define USB_STCTRL_TMR_SCALE_Msk (0xcUL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TMR_SCALE (Bitfield-Mask: 0x03)

◆ USB_STCTRL_TMR_SCALE_Pos

#define USB_STCTRL_TMR_SCALE_Pos (2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TMR_SCALE (Bit 2)

◆ USB_SYSERRINTCLR_EPERRINTCLR0_Msk

#define USB_SYSERRINTCLR_EPERRINTCLR0_Msk (0x1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPERRINTCLR0 (Bitfield-Mask: 0x01)

◆ USB_SYSERRINTCLR_EPERRINTCLR0_Pos

#define USB_SYSERRINTCLR_EPERRINTCLR0_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPERRINTCLR0 (Bit 0)

◆ USB_SYSERRINTCLR_EPERRINTCLR10_Msk

#define USB_SYSERRINTCLR_EPERRINTCLR10_Msk (0x400UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPERRINTCLR10 (Bitfield-Mask: 0x01)

◆ USB_SYSERRINTCLR_EPERRINTCLR10_Pos

#define USB_SYSERRINTCLR_EPERRINTCLR10_Pos (10UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPERRINTCLR10 (Bit 10)

◆ USB_SYSERRINTCLR_EPERRINTCLR11_Msk

#define USB_SYSERRINTCLR_EPERRINTCLR11_Msk (0x800UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPERRINTCLR11 (Bitfield-Mask: 0x01)

◆ USB_SYSERRINTCLR_EPERRINTCLR11_Pos

#define USB_SYSERRINTCLR_EPERRINTCLR11_Pos (11UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPERRINTCLR11 (Bit 11)

◆ USB_SYSERRINTCLR_EPERRINTCLR12_Msk

#define USB_SYSERRINTCLR_EPERRINTCLR12_Msk (0x1000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPERRINTCLR12 (Bitfield-Mask: 0x01)

◆ USB_SYSERRINTCLR_EPERRINTCLR12_Pos

#define USB_SYSERRINTCLR_EPERRINTCLR12_Pos (12UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPERRINTCLR12 (Bit 12)

◆ USB_SYSERRINTCLR_EPERRINTCLR13_Msk

#define USB_SYSERRINTCLR_EPERRINTCLR13_Msk (0x2000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPERRINTCLR13 (Bitfield-Mask: 0x01)

◆ USB_SYSERRINTCLR_EPERRINTCLR13_Pos

#define USB_SYSERRINTCLR_EPERRINTCLR13_Pos (13UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPERRINTCLR13 (Bit 13)

◆ USB_SYSERRINTCLR_EPERRINTCLR14_Msk

#define USB_SYSERRINTCLR_EPERRINTCLR14_Msk (0x4000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPERRINTCLR14 (Bitfield-Mask: 0x01)

◆ USB_SYSERRINTCLR_EPERRINTCLR14_Pos

#define USB_SYSERRINTCLR_EPERRINTCLR14_Pos (14UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPERRINTCLR14 (Bit 14)

◆ USB_SYSERRINTCLR_EPERRINTCLR15_Msk

#define USB_SYSERRINTCLR_EPERRINTCLR15_Msk (0x8000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPERRINTCLR15 (Bitfield-Mask: 0x01)

◆ USB_SYSERRINTCLR_EPERRINTCLR15_Pos

#define USB_SYSERRINTCLR_EPERRINTCLR15_Pos (15UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPERRINTCLR15 (Bit 15)

◆ USB_SYSERRINTCLR_EPERRINTCLR16_Msk

#define USB_SYSERRINTCLR_EPERRINTCLR16_Msk (0x10000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPERRINTCLR16 (Bitfield-Mask: 0x01)

◆ USB_SYSERRINTCLR_EPERRINTCLR16_Pos

#define USB_SYSERRINTCLR_EPERRINTCLR16_Pos (16UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPERRINTCLR16 (Bit 16)

◆ USB_SYSERRINTCLR_EPERRINTCLR17_Msk

#define USB_SYSERRINTCLR_EPERRINTCLR17_Msk (0x20000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPERRINTCLR17 (Bitfield-Mask: 0x01)

◆ USB_SYSERRINTCLR_EPERRINTCLR17_Pos

#define USB_SYSERRINTCLR_EPERRINTCLR17_Pos (17UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPERRINTCLR17 (Bit 17)

◆ USB_SYSERRINTCLR_EPERRINTCLR18_Msk

#define USB_SYSERRINTCLR_EPERRINTCLR18_Msk (0x40000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPERRINTCLR18 (Bitfield-Mask: 0x01)

◆ USB_SYSERRINTCLR_EPERRINTCLR18_Pos

#define USB_SYSERRINTCLR_EPERRINTCLR18_Pos (18UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPERRINTCLR18 (Bit 18)

◆ USB_SYSERRINTCLR_EPERRINTCLR19_Msk

#define USB_SYSERRINTCLR_EPERRINTCLR19_Msk (0x80000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPERRINTCLR19 (Bitfield-Mask: 0x01)

◆ USB_SYSERRINTCLR_EPERRINTCLR19_Pos

#define USB_SYSERRINTCLR_EPERRINTCLR19_Pos (19UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPERRINTCLR19 (Bit 19)

◆ USB_SYSERRINTCLR_EPERRINTCLR1_Msk

#define USB_SYSERRINTCLR_EPERRINTCLR1_Msk (0x2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPERRINTCLR1 (Bitfield-Mask: 0x01)

◆ USB_SYSERRINTCLR_EPERRINTCLR1_Pos

#define USB_SYSERRINTCLR_EPERRINTCLR1_Pos (1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPERRINTCLR1 (Bit 1)

◆ USB_SYSERRINTCLR_EPERRINTCLR20_Msk

#define USB_SYSERRINTCLR_EPERRINTCLR20_Msk (0x100000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPERRINTCLR20 (Bitfield-Mask: 0x01)

◆ USB_SYSERRINTCLR_EPERRINTCLR20_Pos

#define USB_SYSERRINTCLR_EPERRINTCLR20_Pos (20UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPERRINTCLR20 (Bit 20)

◆ USB_SYSERRINTCLR_EPERRINTCLR21_Msk

#define USB_SYSERRINTCLR_EPERRINTCLR21_Msk (0x200000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPERRINTCLR21 (Bitfield-Mask: 0x01)

◆ USB_SYSERRINTCLR_EPERRINTCLR21_Pos

#define USB_SYSERRINTCLR_EPERRINTCLR21_Pos (21UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPERRINTCLR21 (Bit 21)

◆ USB_SYSERRINTCLR_EPERRINTCLR22_Msk

#define USB_SYSERRINTCLR_EPERRINTCLR22_Msk (0x400000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPERRINTCLR22 (Bitfield-Mask: 0x01)

◆ USB_SYSERRINTCLR_EPERRINTCLR22_Pos

#define USB_SYSERRINTCLR_EPERRINTCLR22_Pos (22UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPERRINTCLR22 (Bit 22)

◆ USB_SYSERRINTCLR_EPERRINTCLR23_Msk

#define USB_SYSERRINTCLR_EPERRINTCLR23_Msk (0x800000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPERRINTCLR23 (Bitfield-Mask: 0x01)

◆ USB_SYSERRINTCLR_EPERRINTCLR23_Pos

#define USB_SYSERRINTCLR_EPERRINTCLR23_Pos (23UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPERRINTCLR23 (Bit 23)

◆ USB_SYSERRINTCLR_EPERRINTCLR24_Msk

#define USB_SYSERRINTCLR_EPERRINTCLR24_Msk (0x1000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPERRINTCLR24 (Bitfield-Mask: 0x01)

◆ USB_SYSERRINTCLR_EPERRINTCLR24_Pos

#define USB_SYSERRINTCLR_EPERRINTCLR24_Pos (24UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPERRINTCLR24 (Bit 24)

◆ USB_SYSERRINTCLR_EPERRINTCLR25_Msk

#define USB_SYSERRINTCLR_EPERRINTCLR25_Msk (0x2000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPERRINTCLR25 (Bitfield-Mask: 0x01)

◆ USB_SYSERRINTCLR_EPERRINTCLR25_Pos

#define USB_SYSERRINTCLR_EPERRINTCLR25_Pos (25UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPERRINTCLR25 (Bit 25)

◆ USB_SYSERRINTCLR_EPERRINTCLR26_Msk

#define USB_SYSERRINTCLR_EPERRINTCLR26_Msk (0x4000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPERRINTCLR26 (Bitfield-Mask: 0x01)

◆ USB_SYSERRINTCLR_EPERRINTCLR26_Pos

#define USB_SYSERRINTCLR_EPERRINTCLR26_Pos (26UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPERRINTCLR26 (Bit 26)

◆ USB_SYSERRINTCLR_EPERRINTCLR27_Msk

#define USB_SYSERRINTCLR_EPERRINTCLR27_Msk (0x8000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPERRINTCLR27 (Bitfield-Mask: 0x01)

◆ USB_SYSERRINTCLR_EPERRINTCLR27_Pos

#define USB_SYSERRINTCLR_EPERRINTCLR27_Pos (27UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPERRINTCLR27 (Bit 27)

◆ USB_SYSERRINTCLR_EPERRINTCLR28_Msk

#define USB_SYSERRINTCLR_EPERRINTCLR28_Msk (0x10000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPERRINTCLR28 (Bitfield-Mask: 0x01)

◆ USB_SYSERRINTCLR_EPERRINTCLR28_Pos

#define USB_SYSERRINTCLR_EPERRINTCLR28_Pos (28UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPERRINTCLR28 (Bit 28)

◆ USB_SYSERRINTCLR_EPERRINTCLR29_Msk

#define USB_SYSERRINTCLR_EPERRINTCLR29_Msk (0x20000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPERRINTCLR29 (Bitfield-Mask: 0x01)

◆ USB_SYSERRINTCLR_EPERRINTCLR29_Pos

#define USB_SYSERRINTCLR_EPERRINTCLR29_Pos (29UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPERRINTCLR29 (Bit 29)

◆ USB_SYSERRINTCLR_EPERRINTCLR2_Msk

#define USB_SYSERRINTCLR_EPERRINTCLR2_Msk (0x4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPERRINTCLR2 (Bitfield-Mask: 0x01)

◆ USB_SYSERRINTCLR_EPERRINTCLR2_Pos

#define USB_SYSERRINTCLR_EPERRINTCLR2_Pos (2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPERRINTCLR2 (Bit 2)

◆ USB_SYSERRINTCLR_EPERRINTCLR30_Msk

#define USB_SYSERRINTCLR_EPERRINTCLR30_Msk (0x40000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPERRINTCLR30 (Bitfield-Mask: 0x01)

◆ USB_SYSERRINTCLR_EPERRINTCLR30_Pos

#define USB_SYSERRINTCLR_EPERRINTCLR30_Pos (30UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPERRINTCLR30 (Bit 30)

◆ USB_SYSERRINTCLR_EPERRINTCLR31_Msk

#define USB_SYSERRINTCLR_EPERRINTCLR31_Msk (0x80000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPERRINTCLR31 (Bitfield-Mask: 0x01)

◆ USB_SYSERRINTCLR_EPERRINTCLR31_Pos

#define USB_SYSERRINTCLR_EPERRINTCLR31_Pos (31UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPERRINTCLR31 (Bit 31)

◆ USB_SYSERRINTCLR_EPERRINTCLR3_Msk

#define USB_SYSERRINTCLR_EPERRINTCLR3_Msk (0x8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPERRINTCLR3 (Bitfield-Mask: 0x01)

◆ USB_SYSERRINTCLR_EPERRINTCLR3_Pos

#define USB_SYSERRINTCLR_EPERRINTCLR3_Pos (3UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPERRINTCLR3 (Bit 3)

◆ USB_SYSERRINTCLR_EPERRINTCLR4_Msk

#define USB_SYSERRINTCLR_EPERRINTCLR4_Msk (0x10UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPERRINTCLR4 (Bitfield-Mask: 0x01)

◆ USB_SYSERRINTCLR_EPERRINTCLR4_Pos

#define USB_SYSERRINTCLR_EPERRINTCLR4_Pos (4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPERRINTCLR4 (Bit 4)

◆ USB_SYSERRINTCLR_EPERRINTCLR5_Msk

#define USB_SYSERRINTCLR_EPERRINTCLR5_Msk (0x20UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPERRINTCLR5 (Bitfield-Mask: 0x01)

◆ USB_SYSERRINTCLR_EPERRINTCLR5_Pos

#define USB_SYSERRINTCLR_EPERRINTCLR5_Pos (5UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPERRINTCLR5 (Bit 5)

◆ USB_SYSERRINTCLR_EPERRINTCLR6_Msk

#define USB_SYSERRINTCLR_EPERRINTCLR6_Msk (0x40UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPERRINTCLR6 (Bitfield-Mask: 0x01)

◆ USB_SYSERRINTCLR_EPERRINTCLR6_Pos

#define USB_SYSERRINTCLR_EPERRINTCLR6_Pos (6UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPERRINTCLR6 (Bit 6)

◆ USB_SYSERRINTCLR_EPERRINTCLR7_Msk

#define USB_SYSERRINTCLR_EPERRINTCLR7_Msk (0x80UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPERRINTCLR7 (Bitfield-Mask: 0x01)

◆ USB_SYSERRINTCLR_EPERRINTCLR7_Pos

#define USB_SYSERRINTCLR_EPERRINTCLR7_Pos (7UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPERRINTCLR7 (Bit 7)

◆ USB_SYSERRINTCLR_EPERRINTCLR8_Msk

#define USB_SYSERRINTCLR_EPERRINTCLR8_Msk (0x100UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPERRINTCLR8 (Bitfield-Mask: 0x01)

◆ USB_SYSERRINTCLR_EPERRINTCLR8_Pos

#define USB_SYSERRINTCLR_EPERRINTCLR8_Pos (8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPERRINTCLR8 (Bit 8)

◆ USB_SYSERRINTCLR_EPERRINTCLR9_Msk

#define USB_SYSERRINTCLR_EPERRINTCLR9_Msk (0x200UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPERRINTCLR9 (Bitfield-Mask: 0x01)

◆ USB_SYSERRINTCLR_EPERRINTCLR9_Pos

#define USB_SYSERRINTCLR_EPERRINTCLR9_Pos (9UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPERRINTCLR9 (Bit 9)

◆ USB_SYSERRINTSET_EPERRINTSET0_Msk

#define USB_SYSERRINTSET_EPERRINTSET0_Msk (0x1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPERRINTSET0 (Bitfield-Mask: 0x01)

◆ USB_SYSERRINTSET_EPERRINTSET0_Pos

#define USB_SYSERRINTSET_EPERRINTSET0_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPERRINTSET0 (Bit 0)

◆ USB_SYSERRINTSET_EPERRINTSET10_Msk

#define USB_SYSERRINTSET_EPERRINTSET10_Msk (0x400UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPERRINTSET10 (Bitfield-Mask: 0x01)

◆ USB_SYSERRINTSET_EPERRINTSET10_Pos

#define USB_SYSERRINTSET_EPERRINTSET10_Pos (10UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPERRINTSET10 (Bit 10)

◆ USB_SYSERRINTSET_EPERRINTSET11_Msk

#define USB_SYSERRINTSET_EPERRINTSET11_Msk (0x800UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPERRINTSET11 (Bitfield-Mask: 0x01)

◆ USB_SYSERRINTSET_EPERRINTSET11_Pos

#define USB_SYSERRINTSET_EPERRINTSET11_Pos (11UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPERRINTSET11 (Bit 11)

◆ USB_SYSERRINTSET_EPERRINTSET12_Msk

#define USB_SYSERRINTSET_EPERRINTSET12_Msk (0x1000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPERRINTSET12 (Bitfield-Mask: 0x01)

◆ USB_SYSERRINTSET_EPERRINTSET12_Pos

#define USB_SYSERRINTSET_EPERRINTSET12_Pos (12UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPERRINTSET12 (Bit 12)

◆ USB_SYSERRINTSET_EPERRINTSET13_Msk

#define USB_SYSERRINTSET_EPERRINTSET13_Msk (0x2000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPERRINTSET13 (Bitfield-Mask: 0x01)

◆ USB_SYSERRINTSET_EPERRINTSET13_Pos

#define USB_SYSERRINTSET_EPERRINTSET13_Pos (13UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPERRINTSET13 (Bit 13)

◆ USB_SYSERRINTSET_EPERRINTSET14_Msk

#define USB_SYSERRINTSET_EPERRINTSET14_Msk (0x4000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPERRINTSET14 (Bitfield-Mask: 0x01)

◆ USB_SYSERRINTSET_EPERRINTSET14_Pos

#define USB_SYSERRINTSET_EPERRINTSET14_Pos (14UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPERRINTSET14 (Bit 14)

◆ USB_SYSERRINTSET_EPERRINTSET15_Msk

#define USB_SYSERRINTSET_EPERRINTSET15_Msk (0x8000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPERRINTSET15 (Bitfield-Mask: 0x01)

◆ USB_SYSERRINTSET_EPERRINTSET15_Pos

#define USB_SYSERRINTSET_EPERRINTSET15_Pos (15UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPERRINTSET15 (Bit 15)

◆ USB_SYSERRINTSET_EPERRINTSET16_Msk

#define USB_SYSERRINTSET_EPERRINTSET16_Msk (0x10000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPERRINTSET16 (Bitfield-Mask: 0x01)

◆ USB_SYSERRINTSET_EPERRINTSET16_Pos

#define USB_SYSERRINTSET_EPERRINTSET16_Pos (16UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPERRINTSET16 (Bit 16)

◆ USB_SYSERRINTSET_EPERRINTSET17_Msk

#define USB_SYSERRINTSET_EPERRINTSET17_Msk (0x20000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPERRINTSET17 (Bitfield-Mask: 0x01)

◆ USB_SYSERRINTSET_EPERRINTSET17_Pos

#define USB_SYSERRINTSET_EPERRINTSET17_Pos (17UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPERRINTSET17 (Bit 17)

◆ USB_SYSERRINTSET_EPERRINTSET18_Msk

#define USB_SYSERRINTSET_EPERRINTSET18_Msk (0x40000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPERRINTSET18 (Bitfield-Mask: 0x01)

◆ USB_SYSERRINTSET_EPERRINTSET18_Pos

#define USB_SYSERRINTSET_EPERRINTSET18_Pos (18UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPERRINTSET18 (Bit 18)

◆ USB_SYSERRINTSET_EPERRINTSET19_Msk

#define USB_SYSERRINTSET_EPERRINTSET19_Msk (0x80000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPERRINTSET19 (Bitfield-Mask: 0x01)

◆ USB_SYSERRINTSET_EPERRINTSET19_Pos

#define USB_SYSERRINTSET_EPERRINTSET19_Pos (19UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPERRINTSET19 (Bit 19)

◆ USB_SYSERRINTSET_EPERRINTSET1_Msk

#define USB_SYSERRINTSET_EPERRINTSET1_Msk (0x2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPERRINTSET1 (Bitfield-Mask: 0x01)

◆ USB_SYSERRINTSET_EPERRINTSET1_Pos

#define USB_SYSERRINTSET_EPERRINTSET1_Pos (1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPERRINTSET1 (Bit 1)

◆ USB_SYSERRINTSET_EPERRINTSET20_Msk

#define USB_SYSERRINTSET_EPERRINTSET20_Msk (0x100000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPERRINTSET20 (Bitfield-Mask: 0x01)

◆ USB_SYSERRINTSET_EPERRINTSET20_Pos

#define USB_SYSERRINTSET_EPERRINTSET20_Pos (20UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPERRINTSET20 (Bit 20)

◆ USB_SYSERRINTSET_EPERRINTSET21_Msk

#define USB_SYSERRINTSET_EPERRINTSET21_Msk (0x200000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPERRINTSET21 (Bitfield-Mask: 0x01)

◆ USB_SYSERRINTSET_EPERRINTSET21_Pos

#define USB_SYSERRINTSET_EPERRINTSET21_Pos (21UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPERRINTSET21 (Bit 21)

◆ USB_SYSERRINTSET_EPERRINTSET22_Msk

#define USB_SYSERRINTSET_EPERRINTSET22_Msk (0x400000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPERRINTSET22 (Bitfield-Mask: 0x01)

◆ USB_SYSERRINTSET_EPERRINTSET22_Pos

#define USB_SYSERRINTSET_EPERRINTSET22_Pos (22UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPERRINTSET22 (Bit 22)

◆ USB_SYSERRINTSET_EPERRINTSET23_Msk

#define USB_SYSERRINTSET_EPERRINTSET23_Msk (0x800000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPERRINTSET23 (Bitfield-Mask: 0x01)

◆ USB_SYSERRINTSET_EPERRINTSET23_Pos

#define USB_SYSERRINTSET_EPERRINTSET23_Pos (23UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPERRINTSET23 (Bit 23)

◆ USB_SYSERRINTSET_EPERRINTSET24_Msk

#define USB_SYSERRINTSET_EPERRINTSET24_Msk (0x1000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPERRINTSET24 (Bitfield-Mask: 0x01)

◆ USB_SYSERRINTSET_EPERRINTSET24_Pos

#define USB_SYSERRINTSET_EPERRINTSET24_Pos (24UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPERRINTSET24 (Bit 24)

◆ USB_SYSERRINTSET_EPERRINTSET25_Msk

#define USB_SYSERRINTSET_EPERRINTSET25_Msk (0x2000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPERRINTSET25 (Bitfield-Mask: 0x01)

◆ USB_SYSERRINTSET_EPERRINTSET25_Pos

#define USB_SYSERRINTSET_EPERRINTSET25_Pos (25UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPERRINTSET25 (Bit 25)

◆ USB_SYSERRINTSET_EPERRINTSET26_Msk

#define USB_SYSERRINTSET_EPERRINTSET26_Msk (0x4000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPERRINTSET26 (Bitfield-Mask: 0x01)

◆ USB_SYSERRINTSET_EPERRINTSET26_Pos

#define USB_SYSERRINTSET_EPERRINTSET26_Pos (26UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPERRINTSET26 (Bit 26)

◆ USB_SYSERRINTSET_EPERRINTSET27_Msk

#define USB_SYSERRINTSET_EPERRINTSET27_Msk (0x8000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPERRINTSET27 (Bitfield-Mask: 0x01)

◆ USB_SYSERRINTSET_EPERRINTSET27_Pos

#define USB_SYSERRINTSET_EPERRINTSET27_Pos (27UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPERRINTSET27 (Bit 27)

◆ USB_SYSERRINTSET_EPERRINTSET28_Msk

#define USB_SYSERRINTSET_EPERRINTSET28_Msk (0x10000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPERRINTSET28 (Bitfield-Mask: 0x01)

◆ USB_SYSERRINTSET_EPERRINTSET28_Pos

#define USB_SYSERRINTSET_EPERRINTSET28_Pos (28UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPERRINTSET28 (Bit 28)

◆ USB_SYSERRINTSET_EPERRINTSET29_Msk

#define USB_SYSERRINTSET_EPERRINTSET29_Msk (0x20000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPERRINTSET29 (Bitfield-Mask: 0x01)

◆ USB_SYSERRINTSET_EPERRINTSET29_Pos

#define USB_SYSERRINTSET_EPERRINTSET29_Pos (29UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPERRINTSET29 (Bit 29)

◆ USB_SYSERRINTSET_EPERRINTSET2_Msk

#define USB_SYSERRINTSET_EPERRINTSET2_Msk (0x4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPERRINTSET2 (Bitfield-Mask: 0x01)

◆ USB_SYSERRINTSET_EPERRINTSET2_Pos

#define USB_SYSERRINTSET_EPERRINTSET2_Pos (2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPERRINTSET2 (Bit 2)

◆ USB_SYSERRINTSET_EPERRINTSET30_Msk

#define USB_SYSERRINTSET_EPERRINTSET30_Msk (0x40000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPERRINTSET30 (Bitfield-Mask: 0x01)

◆ USB_SYSERRINTSET_EPERRINTSET30_Pos

#define USB_SYSERRINTSET_EPERRINTSET30_Pos (30UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPERRINTSET30 (Bit 30)

◆ USB_SYSERRINTSET_EPERRINTSET31_Msk

#define USB_SYSERRINTSET_EPERRINTSET31_Msk (0x80000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPERRINTSET31 (Bitfield-Mask: 0x01)

◆ USB_SYSERRINTSET_EPERRINTSET31_Pos

#define USB_SYSERRINTSET_EPERRINTSET31_Pos (31UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPERRINTSET31 (Bit 31)

◆ USB_SYSERRINTSET_EPERRINTSET3_Msk

#define USB_SYSERRINTSET_EPERRINTSET3_Msk (0x8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPERRINTSET3 (Bitfield-Mask: 0x01)

◆ USB_SYSERRINTSET_EPERRINTSET3_Pos

#define USB_SYSERRINTSET_EPERRINTSET3_Pos (3UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPERRINTSET3 (Bit 3)

◆ USB_SYSERRINTSET_EPERRINTSET4_Msk

#define USB_SYSERRINTSET_EPERRINTSET4_Msk (0x10UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPERRINTSET4 (Bitfield-Mask: 0x01)

◆ USB_SYSERRINTSET_EPERRINTSET4_Pos

#define USB_SYSERRINTSET_EPERRINTSET4_Pos (4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPERRINTSET4 (Bit 4)

◆ USB_SYSERRINTSET_EPERRINTSET5_Msk

#define USB_SYSERRINTSET_EPERRINTSET5_Msk (0x20UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPERRINTSET5 (Bitfield-Mask: 0x01)

◆ USB_SYSERRINTSET_EPERRINTSET5_Pos

#define USB_SYSERRINTSET_EPERRINTSET5_Pos (5UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPERRINTSET5 (Bit 5)

◆ USB_SYSERRINTSET_EPERRINTSET6_Msk

#define USB_SYSERRINTSET_EPERRINTSET6_Msk (0x40UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPERRINTSET6 (Bitfield-Mask: 0x01)

◆ USB_SYSERRINTSET_EPERRINTSET6_Pos

#define USB_SYSERRINTSET_EPERRINTSET6_Pos (6UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPERRINTSET6 (Bit 6)

◆ USB_SYSERRINTSET_EPERRINTSET7_Msk

#define USB_SYSERRINTSET_EPERRINTSET7_Msk (0x80UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPERRINTSET7 (Bitfield-Mask: 0x01)

◆ USB_SYSERRINTSET_EPERRINTSET7_Pos

#define USB_SYSERRINTSET_EPERRINTSET7_Pos (7UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPERRINTSET7 (Bit 7)

◆ USB_SYSERRINTSET_EPERRINTSET8_Msk

#define USB_SYSERRINTSET_EPERRINTSET8_Msk (0x100UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPERRINTSET8 (Bitfield-Mask: 0x01)

◆ USB_SYSERRINTSET_EPERRINTSET8_Pos

#define USB_SYSERRINTSET_EPERRINTSET8_Pos (8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPERRINTSET8 (Bit 8)

◆ USB_SYSERRINTSET_EPERRINTSET9_Msk

#define USB_SYSERRINTSET_EPERRINTSET9_Msk (0x200UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPERRINTSET9 (Bitfield-Mask: 0x01)

◆ USB_SYSERRINTSET_EPERRINTSET9_Pos

#define USB_SYSERRINTSET_EPERRINTSET9_Pos (9UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPERRINTSET9 (Bit 9)

◆ USB_SYSERRINTST_EPERRINTST0_Msk

#define USB_SYSERRINTST_EPERRINTST0_Msk (0x1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPERRINTST0 (Bitfield-Mask: 0x01)

◆ USB_SYSERRINTST_EPERRINTST0_Pos

#define USB_SYSERRINTST_EPERRINTST0_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPERRINTST0 (Bit 0)

◆ USB_SYSERRINTST_EPERRINTST10_Msk

#define USB_SYSERRINTST_EPERRINTST10_Msk (0x400UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPERRINTST10 (Bitfield-Mask: 0x01)

◆ USB_SYSERRINTST_EPERRINTST10_Pos

#define USB_SYSERRINTST_EPERRINTST10_Pos (10UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPERRINTST10 (Bit 10)

◆ USB_SYSERRINTST_EPERRINTST11_Msk

#define USB_SYSERRINTST_EPERRINTST11_Msk (0x800UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPERRINTST11 (Bitfield-Mask: 0x01)

◆ USB_SYSERRINTST_EPERRINTST11_Pos

#define USB_SYSERRINTST_EPERRINTST11_Pos (11UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPERRINTST11 (Bit 11)

◆ USB_SYSERRINTST_EPERRINTST12_Msk

#define USB_SYSERRINTST_EPERRINTST12_Msk (0x1000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPERRINTST12 (Bitfield-Mask: 0x01)

◆ USB_SYSERRINTST_EPERRINTST12_Pos

#define USB_SYSERRINTST_EPERRINTST12_Pos (12UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPERRINTST12 (Bit 12)

◆ USB_SYSERRINTST_EPERRINTST13_Msk

#define USB_SYSERRINTST_EPERRINTST13_Msk (0x2000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPERRINTST13 (Bitfield-Mask: 0x01)

◆ USB_SYSERRINTST_EPERRINTST13_Pos

#define USB_SYSERRINTST_EPERRINTST13_Pos (13UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPERRINTST13 (Bit 13)

◆ USB_SYSERRINTST_EPERRINTST14_Msk

#define USB_SYSERRINTST_EPERRINTST14_Msk (0x4000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPERRINTST14 (Bitfield-Mask: 0x01)

◆ USB_SYSERRINTST_EPERRINTST14_Pos

#define USB_SYSERRINTST_EPERRINTST14_Pos (14UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPERRINTST14 (Bit 14)

◆ USB_SYSERRINTST_EPERRINTST15_Msk

#define USB_SYSERRINTST_EPERRINTST15_Msk (0x8000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPERRINTST15 (Bitfield-Mask: 0x01)

◆ USB_SYSERRINTST_EPERRINTST15_Pos

#define USB_SYSERRINTST_EPERRINTST15_Pos (15UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPERRINTST15 (Bit 15)

◆ USB_SYSERRINTST_EPERRINTST16_Msk

#define USB_SYSERRINTST_EPERRINTST16_Msk (0x10000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPERRINTST16 (Bitfield-Mask: 0x01)

◆ USB_SYSERRINTST_EPERRINTST16_Pos

#define USB_SYSERRINTST_EPERRINTST16_Pos (16UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPERRINTST16 (Bit 16)

◆ USB_SYSERRINTST_EPERRINTST17_Msk

#define USB_SYSERRINTST_EPERRINTST17_Msk (0x20000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPERRINTST17 (Bitfield-Mask: 0x01)

◆ USB_SYSERRINTST_EPERRINTST17_Pos

#define USB_SYSERRINTST_EPERRINTST17_Pos (17UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPERRINTST17 (Bit 17)

◆ USB_SYSERRINTST_EPERRINTST18_Msk

#define USB_SYSERRINTST_EPERRINTST18_Msk (0x40000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPERRINTST18 (Bitfield-Mask: 0x01)

◆ USB_SYSERRINTST_EPERRINTST18_Pos

#define USB_SYSERRINTST_EPERRINTST18_Pos (18UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPERRINTST18 (Bit 18)

◆ USB_SYSERRINTST_EPERRINTST19_Msk

#define USB_SYSERRINTST_EPERRINTST19_Msk (0x80000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPERRINTST19 (Bitfield-Mask: 0x01)

◆ USB_SYSERRINTST_EPERRINTST19_Pos

#define USB_SYSERRINTST_EPERRINTST19_Pos (19UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPERRINTST19 (Bit 19)

◆ USB_SYSERRINTST_EPERRINTST1_Msk

#define USB_SYSERRINTST_EPERRINTST1_Msk (0x2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPERRINTST1 (Bitfield-Mask: 0x01)

◆ USB_SYSERRINTST_EPERRINTST1_Pos

#define USB_SYSERRINTST_EPERRINTST1_Pos (1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPERRINTST1 (Bit 1)

◆ USB_SYSERRINTST_EPERRINTST20_Msk

#define USB_SYSERRINTST_EPERRINTST20_Msk (0x100000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPERRINTST20 (Bitfield-Mask: 0x01)

◆ USB_SYSERRINTST_EPERRINTST20_Pos

#define USB_SYSERRINTST_EPERRINTST20_Pos (20UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPERRINTST20 (Bit 20)

◆ USB_SYSERRINTST_EPERRINTST21_Msk

#define USB_SYSERRINTST_EPERRINTST21_Msk (0x200000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPERRINTST21 (Bitfield-Mask: 0x01)

◆ USB_SYSERRINTST_EPERRINTST21_Pos

#define USB_SYSERRINTST_EPERRINTST21_Pos (21UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPERRINTST21 (Bit 21)

◆ USB_SYSERRINTST_EPERRINTST22_Msk

#define USB_SYSERRINTST_EPERRINTST22_Msk (0x400000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPERRINTST22 (Bitfield-Mask: 0x01)

◆ USB_SYSERRINTST_EPERRINTST22_Pos

#define USB_SYSERRINTST_EPERRINTST22_Pos (22UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPERRINTST22 (Bit 22)

◆ USB_SYSERRINTST_EPERRINTST23_Msk

#define USB_SYSERRINTST_EPERRINTST23_Msk (0x800000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPERRINTST23 (Bitfield-Mask: 0x01)

◆ USB_SYSERRINTST_EPERRINTST23_Pos

#define USB_SYSERRINTST_EPERRINTST23_Pos (23UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPERRINTST23 (Bit 23)

◆ USB_SYSERRINTST_EPERRINTST24_Msk

#define USB_SYSERRINTST_EPERRINTST24_Msk (0x1000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPERRINTST24 (Bitfield-Mask: 0x01)

◆ USB_SYSERRINTST_EPERRINTST24_Pos

#define USB_SYSERRINTST_EPERRINTST24_Pos (24UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPERRINTST24 (Bit 24)

◆ USB_SYSERRINTST_EPERRINTST25_Msk

#define USB_SYSERRINTST_EPERRINTST25_Msk (0x2000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPERRINTST25 (Bitfield-Mask: 0x01)

◆ USB_SYSERRINTST_EPERRINTST25_Pos

#define USB_SYSERRINTST_EPERRINTST25_Pos (25UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPERRINTST25 (Bit 25)

◆ USB_SYSERRINTST_EPERRINTST26_Msk

#define USB_SYSERRINTST_EPERRINTST26_Msk (0x4000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPERRINTST26 (Bitfield-Mask: 0x01)

◆ USB_SYSERRINTST_EPERRINTST26_Pos

#define USB_SYSERRINTST_EPERRINTST26_Pos (26UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPERRINTST26 (Bit 26)

◆ USB_SYSERRINTST_EPERRINTST27_Msk

#define USB_SYSERRINTST_EPERRINTST27_Msk (0x8000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPERRINTST27 (Bitfield-Mask: 0x01)

◆ USB_SYSERRINTST_EPERRINTST27_Pos

#define USB_SYSERRINTST_EPERRINTST27_Pos (27UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPERRINTST27 (Bit 27)

◆ USB_SYSERRINTST_EPERRINTST28_Msk

#define USB_SYSERRINTST_EPERRINTST28_Msk (0x10000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPERRINTST28 (Bitfield-Mask: 0x01)

◆ USB_SYSERRINTST_EPERRINTST28_Pos

#define USB_SYSERRINTST_EPERRINTST28_Pos (28UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPERRINTST28 (Bit 28)

◆ USB_SYSERRINTST_EPERRINTST29_Msk

#define USB_SYSERRINTST_EPERRINTST29_Msk (0x20000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPERRINTST29 (Bitfield-Mask: 0x01)

◆ USB_SYSERRINTST_EPERRINTST29_Pos

#define USB_SYSERRINTST_EPERRINTST29_Pos (29UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPERRINTST29 (Bit 29)

◆ USB_SYSERRINTST_EPERRINTST2_Msk

#define USB_SYSERRINTST_EPERRINTST2_Msk (0x4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPERRINTST2 (Bitfield-Mask: 0x01)

◆ USB_SYSERRINTST_EPERRINTST2_Pos

#define USB_SYSERRINTST_EPERRINTST2_Pos (2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPERRINTST2 (Bit 2)

◆ USB_SYSERRINTST_EPERRINTST30_Msk

#define USB_SYSERRINTST_EPERRINTST30_Msk (0x40000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPERRINTST30 (Bitfield-Mask: 0x01)

◆ USB_SYSERRINTST_EPERRINTST30_Pos

#define USB_SYSERRINTST_EPERRINTST30_Pos (30UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPERRINTST30 (Bit 30)

◆ USB_SYSERRINTST_EPERRINTST31_Msk

#define USB_SYSERRINTST_EPERRINTST31_Msk (0x80000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPERRINTST31 (Bitfield-Mask: 0x01)

◆ USB_SYSERRINTST_EPERRINTST31_Pos

#define USB_SYSERRINTST_EPERRINTST31_Pos (31UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPERRINTST31 (Bit 31)

◆ USB_SYSERRINTST_EPERRINTST3_Msk

#define USB_SYSERRINTST_EPERRINTST3_Msk (0x8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPERRINTST3 (Bitfield-Mask: 0x01)

◆ USB_SYSERRINTST_EPERRINTST3_Pos

#define USB_SYSERRINTST_EPERRINTST3_Pos (3UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPERRINTST3 (Bit 3)

◆ USB_SYSERRINTST_EPERRINTST4_Msk

#define USB_SYSERRINTST_EPERRINTST4_Msk (0x10UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPERRINTST4 (Bitfield-Mask: 0x01)

◆ USB_SYSERRINTST_EPERRINTST4_Pos

#define USB_SYSERRINTST_EPERRINTST4_Pos (4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPERRINTST4 (Bit 4)

◆ USB_SYSERRINTST_EPERRINTST5_Msk

#define USB_SYSERRINTST_EPERRINTST5_Msk (0x20UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPERRINTST5 (Bitfield-Mask: 0x01)

◆ USB_SYSERRINTST_EPERRINTST5_Pos

#define USB_SYSERRINTST_EPERRINTST5_Pos (5UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPERRINTST5 (Bit 5)

◆ USB_SYSERRINTST_EPERRINTST6_Msk

#define USB_SYSERRINTST_EPERRINTST6_Msk (0x40UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPERRINTST6 (Bitfield-Mask: 0x01)

◆ USB_SYSERRINTST_EPERRINTST6_Pos

#define USB_SYSERRINTST_EPERRINTST6_Pos (6UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPERRINTST6 (Bit 6)

◆ USB_SYSERRINTST_EPERRINTST7_Msk

#define USB_SYSERRINTST_EPERRINTST7_Msk (0x80UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPERRINTST7 (Bitfield-Mask: 0x01)

◆ USB_SYSERRINTST_EPERRINTST7_Pos

#define USB_SYSERRINTST_EPERRINTST7_Pos (7UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPERRINTST7 (Bit 7)

◆ USB_SYSERRINTST_EPERRINTST8_Msk

#define USB_SYSERRINTST_EPERRINTST8_Msk (0x100UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPERRINTST8 (Bitfield-Mask: 0x01)

◆ USB_SYSERRINTST_EPERRINTST8_Pos

#define USB_SYSERRINTST_EPERRINTST8_Pos (8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPERRINTST8 (Bit 8)

◆ USB_SYSERRINTST_EPERRINTST9_Msk

#define USB_SYSERRINTST_EPERRINTST9_Msk (0x200UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPERRINTST9 (Bitfield-Mask: 0x01)

◆ USB_SYSERRINTST_EPERRINTST9_Pos

#define USB_SYSERRINTST_EPERRINTST9_Pos (9UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

EPERRINTST9 (Bit 9)

◆ USB_TMR_TIMEOUT_CNT_Msk

#define USB_TMR_TIMEOUT_CNT_Msk (0xffffUL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TIMEOUT_CNT (Bitfield-Mask: 0xffff)

◆ USB_TMR_TIMEOUT_CNT_Pos

#define USB_TMR_TIMEOUT_CNT_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TIMEOUT_CNT (Bit 0)

◆ USB_TXDATA_TX_DATA_Msk

#define USB_TXDATA_TX_DATA_Msk (0xffffffffUL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TX_DATA (Bitfield-Mask: 0xffffffff)

◆ USB_TXDATA_TX_DATA_Pos

#define USB_TXDATA_TX_DATA_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

TX_DATA (Bit 0)

◆ USB_TXPLEN_PKT_LNGTH_Msk

#define USB_TXPLEN_PKT_LNGTH_Msk (0x3ffUL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PKT_LNGTH (Bitfield-Mask: 0x3ff)

◆ USB_TXPLEN_PKT_LNGTH_Pos

#define USB_TXPLEN_PKT_LNGTH_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PKT_LNGTH (Bit 0)

◆ USB_UDCAH_UDCA_ADDR_Msk

#define USB_UDCAH_UDCA_ADDR_Msk (0xffffff80UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

UDCA_ADDR (Bitfield-Mask: 0x1ffffff)

◆ USB_UDCAH_UDCA_ADDR_Pos

#define USB_UDCAH_UDCA_ADDR_Pos (7UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

UDCA_ADDR (Bit 7)

◆ USB_USBCLKCTRL_AHB_CLK_EN_Msk

#define USB_USBCLKCTRL_AHB_CLK_EN_Msk (0x10UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

AHB_CLK_EN (Bitfield-Mask: 0x01)

◆ USB_USBCLKCTRL_AHB_CLK_EN_Pos

#define USB_USBCLKCTRL_AHB_CLK_EN_Pos (4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

AHB_CLK_EN (Bit 4)

◆ USB_USBCLKCTRL_DEV_CLK_EN_Msk

#define USB_USBCLKCTRL_DEV_CLK_EN_Msk (0x2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DEV_CLK_EN (Bitfield-Mask: 0x01)

◆ USB_USBCLKCTRL_DEV_CLK_EN_Pos

#define USB_USBCLKCTRL_DEV_CLK_EN_Pos (1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DEV_CLK_EN (Bit 1)

◆ USB_USBCLKCTRL_PORTSEL_CLK_EN_Msk

#define USB_USBCLKCTRL_PORTSEL_CLK_EN_Msk (0x8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PORTSEL_CLK_EN (Bitfield-Mask: 0x01)

◆ USB_USBCLKCTRL_PORTSEL_CLK_EN_Pos

#define USB_USBCLKCTRL_PORTSEL_CLK_EN_Pos (3UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PORTSEL_CLK_EN (Bit 3)

◆ USB_USBCLKST_AHB_CLK_ON_Msk

#define USB_USBCLKST_AHB_CLK_ON_Msk (0x10UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

AHB_CLK_ON (Bitfield-Mask: 0x01)

◆ USB_USBCLKST_AHB_CLK_ON_Pos

#define USB_USBCLKST_AHB_CLK_ON_Pos (4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

AHB_CLK_ON (Bit 4)

◆ USB_USBCLKST_DEV_CLK_ON_Msk

#define USB_USBCLKST_DEV_CLK_ON_Msk (0x2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DEV_CLK_ON (Bitfield-Mask: 0x01)

◆ USB_USBCLKST_DEV_CLK_ON_Pos

#define USB_USBCLKST_DEV_CLK_ON_Pos (1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

DEV_CLK_ON (Bit 1)

◆ USB_USBCLKST_PORTSEL_CLK_ON_Msk

#define USB_USBCLKST_PORTSEL_CLK_ON_Msk (0x8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PORTSEL_CLK_ON (Bitfield-Mask: 0x01)

◆ USB_USBCLKST_PORTSEL_CLK_ON_Pos

#define USB_USBCLKST_PORTSEL_CLK_ON_Pos (3UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

PORTSEL_CLK_ON (Bit 3)

◆ WDT_CLKSEL_CLKSEL_Msk

#define WDT_CLKSEL_CLKSEL_Msk (0x3UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CLKSEL (Bitfield-Mask: 0x03)

◆ WDT_CLKSEL_CLKSEL_Pos

#define WDT_CLKSEL_CLKSEL_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

CLKSEL (Bit 0)

◆ WDT_CLKSEL_LOCK_Msk

#define WDT_CLKSEL_LOCK_Msk (0x80000000UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

LOCK (Bitfield-Mask: 0x01)

◆ WDT_CLKSEL_LOCK_Pos

#define WDT_CLKSEL_LOCK_Pos (31UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

LOCK (Bit 31)

◆ WDT_FEED_Feed_Msk

#define WDT_FEED_Feed_Msk (0xffUL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

Feed (Bitfield-Mask: 0xff)

◆ WDT_FEED_Feed_Pos

#define WDT_FEED_Feed_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

Feed (Bit 0)

◆ WDT_MOD_WDEN_Msk

#define WDT_MOD_WDEN_Msk (0x1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

WDEN (Bitfield-Mask: 0x01)

◆ WDT_MOD_WDEN_Pos

#define WDT_MOD_WDEN_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

WDEN (Bit 0)

◆ WDT_MOD_WDINT_Msk

#define WDT_MOD_WDINT_Msk (0x8UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

WDINT (Bitfield-Mask: 0x01)

◆ WDT_MOD_WDINT_Pos

#define WDT_MOD_WDINT_Pos (3UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

WDINT (Bit 3)

◆ WDT_MOD_WDRESET_Msk

#define WDT_MOD_WDRESET_Msk (0x2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

WDRESET (Bitfield-Mask: 0x01)

◆ WDT_MOD_WDRESET_Pos

#define WDT_MOD_WDRESET_Pos (1UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

WDRESET (Bit 1)

◆ WDT_MOD_WDTOF_Msk

#define WDT_MOD_WDTOF_Msk (0x4UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

WDTOF (Bitfield-Mask: 0x01)

◆ WDT_MOD_WDTOF_Pos

#define WDT_MOD_WDTOF_Pos (2UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

WDTOF (Bit 2)

◆ WDT_TC_Count_Msk

#define WDT_TC_Count_Msk (0xffffffffUL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

Count (Bitfield-Mask: 0xffffffff)

◆ WDT_TC_Count_Pos

#define WDT_TC_Count_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

Count (Bit 0)

◆ WDT_TV_Count_Msk

#define WDT_TV_Count_Msk (0xffffffffUL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

Count (Bitfield-Mask: 0xffffffff)

◆ WDT_TV_Count_Pos

#define WDT_TV_Count_Pos (0UL)

#include <port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h>

Count (Bit 0)

Macros

Detailed Description

Macro Definition Documentation

◆ ADC_CR_BURST_Msk

◆ ADC_CR_BURST_Pos

◆ ADC_CR_CLKDIV_Msk

◆ ADC_CR_CLKDIV_Pos

◆ ADC_CR_EDGE_Msk

◆ ADC_CR_EDGE_Pos

◆ ADC_CR_PDN_Msk

◆ ADC_CR_PDN_Pos

◆ ADC_CR_SEL_Msk

◆ ADC_CR_SEL_Pos

◆ ADC_CR_START_Msk

◆ ADC_CR_START_Pos

◆ ADC_GDR_CHN_Msk

◆ ADC_GDR_CHN_Pos

◆ ADC_GDR_DONE_Msk

◆ ADC_GDR_DONE_Pos

◆ ADC_GDR_OVERRUN_Msk

◆ ADC_GDR_OVERRUN_Pos

◆ ADC_GDR_RESULT_Msk

◆ ADC_GDR_RESULT_Pos

◆ ADC_INTEN_ADGINTEN_Msk

◆ ADC_INTEN_ADGINTEN_Pos

◆ ADC_INTEN_ADINTEN0_Msk

◆ ADC_INTEN_ADINTEN0_Pos

◆ ADC_INTEN_ADINTEN1_Msk

◆ ADC_INTEN_ADINTEN1_Pos

◆ ADC_INTEN_ADINTEN2_Msk

◆ ADC_INTEN_ADINTEN2_Pos

◆ ADC_INTEN_ADINTEN3_Msk

◆ ADC_INTEN_ADINTEN3_Pos

◆ ADC_INTEN_ADINTEN4_Msk

◆ ADC_INTEN_ADINTEN4_Pos

◆ ADC_INTEN_ADINTEN5_Msk

◆ ADC_INTEN_ADINTEN5_Pos

◆ ADC_INTEN_ADINTEN6_Msk

◆ ADC_INTEN_ADINTEN6_Pos

◆ ADC_INTEN_ADINTEN7_Msk

◆ ADC_INTEN_ADINTEN7_Pos

◆ ADC_STAT_ADINT_Msk

◆ ADC_STAT_ADINT_Pos

◆ ADC_STAT_DONE0_Msk

◆ ADC_STAT_DONE0_Pos

◆ ADC_STAT_DONE1_Msk

◆ ADC_STAT_DONE1_Pos

◆ ADC_STAT_DONE2_Msk

◆ ADC_STAT_DONE2_Pos

◆ ADC_STAT_DONE3_Msk

◆ ADC_STAT_DONE3_Pos

◆ ADC_STAT_DONE4_Msk

◆ ADC_STAT_DONE4_Pos

◆ ADC_STAT_DONE5_Msk

◆ ADC_STAT_DONE5_Pos

◆ ADC_STAT_DONE6_Msk

◆ ADC_STAT_DONE6_Pos

◆ ADC_STAT_DONE7_Msk

◆ ADC_STAT_DONE7_Pos

◆ ADC_STAT_OVERRUN0_Msk

◆ ADC_STAT_OVERRUN0_Pos

◆ ADC_STAT_OVERRUN1_Msk

◆ ADC_STAT_OVERRUN1_Pos

◆ ADC_STAT_OVERRUN2_Msk

◆ ADC_STAT_OVERRUN2_Pos

◆ ADC_STAT_OVERRUN3_Msk

◆ ADC_STAT_OVERRUN3_Pos

◆ ADC_STAT_OVERRUN4_Msk

◆ ADC_STAT_OVERRUN4_Pos

◆ ADC_STAT_OVERRUN5_Msk

◆ ADC_STAT_OVERRUN5_Pos

◆ ADC_STAT_OVERRUN6_Msk

◆ ADC_STAT_OVERRUN6_Pos

◆ ADC_STAT_OVERRUN7_Msk

◆ ADC_STAT_OVERRUN7_Pos

◆ ADC_TRM_ADCOFFS_Msk

◆ ADC_TRM_ADCOFFS_Pos

◆ ADC_TRM_TRIM_Msk

◆ ADC_TRM_TRIM_Pos

◆ CAN1_BTR_BRP_Msk