openMMC
Open Source Modular MMC for AMCs
Loading...
Searching...
No Matches
Topics
Here is a list of all topics with brief descriptions:
[detail level
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
]
▼
Peripheral ICs
ADN4604 16x16 Digital Crosspoint Switch
AT24MACx02 2kbit Serial EEPROM
24xx02 2kbit Serial EEPROM
24xx64 64kbit Serial EEPROM
▼
MCP23016 16-bit I2C/SMBus I/O Expander Module
MCP23016 Registers
▼
PCA9554 8-bit I2C/SMBus I/O Expander Module
PCA9554 Registers
▼
Sensors
Hotswap Sensor
▼
INA220 - High- or Low-Side, Bidirectional Current and Power Monitor
INA220 Registers
▼
INA3221 - High- or Low-Side, Bidirectional Current and Power Monitor
INA3221 Registers
LM75 - Temperature Sensor
MAX6642 Remote/Local Temperature Sensor with Overtemperature Alarm
▼
Board Ports
▼
AFC Timing Board Port
AFC-Timing IPMI OEM Commands
AFC Timing Pin Mapping
▼
AFCv4.0 Board Port
AFCv4.0 IPMI OEM Commands
▼
AFCv4 Payload Control
Payload Messages Codes
AFCv4.0 Pin Mapping
▼
IPMI - Intelligent Platform Management Interface
▼
IPMI Commands
IPMI Net Functions
IPMI Commands - Chassis (0x00)
IPMI Commands - Brigde (0x02)
IPMI Commands - Sensor (0x04)
IPMI Commands - Application (0x06)
IPMI Commands - Storage (0x0A)
IPMI Commands - Storage (0x0C)
IPMI Commands - PICMG (0x2C)
IPMI Commands - Custom (0x32)
IPMI Completion Codes
▼
AFCv3.1 Payload Control
Payload Messages Codes
CMSIS Global Defines
▼
Defines and Type Definitions
Type definitions and defines for Cortex-M processor based devices
▼
Status and Control Registers
Core Register type definitions
▼
Nested Vectored Interrupt Controller (NVIC)
Type definitions for the NVIC Registers
▼
System Control Block (SCB)
Type definitions for the System Control Block Registers
▼
System Controls not in SCB (SCnSCB)
Type definitions for the System Control and ID Register not in the SCB
▼
System Tick Timer (SysTick)
Type definitions for the System Timer Registers
▼
Instrumentation Trace Macrocell (ITM)
Type definitions for the Instrumentation Trace Macrocell (ITM)
▼
Data Watchpoint and Trace (DWT)
Type definitions for the Data Watchpoint and Trace (DWT)
▼
Trace Port Interface (TPI)
Type definitions for the Trace Port Interface (TPI)
▼
Core Debug Registers (CoreDebug)
Type definitions for the Core Debug Registers
▼
Core register bit field macros
Macros for use with bit field definitions (xxx_Pos, xxx_Msk)
▼
Core Definitions
Definitions for base addresses, unions, and structures
▼
Functions and Instructions Reference
▼
CMSIS Core Register Access Functions
▼
CMSIS Core Instruction Interface
CMSIS SIMD Intrinsics
▼
NVIC Functions
Functions that manage interrupts and exceptions via the NVIC
▼
FPU Functions
Function that provides FPU type
▼
SysTick Functions
Functions that configure the System
ITM Functions
Functions that access the ITM debug interface
▼
NVIC Functions
Functions that manage interrupts and exceptions via the NVIC
▼
FPU Functions
Function that provides FPU type
▼
SysTick Functions
Functions that configure the System
ITM Functions
Functions that access the ITM debug interface
▼
LPC176x5x
Configuration_of_CMSIS
Device_Peripheral_peripherals
Device_Peripheral_peripheralAddr
Device_Peripheral_declaration
PosMask_peripherals
Generated on Wed Jul 24 2024 08:15:57 for openMMC by
1.11.0