openMMC
Open Source Modular MMC for AMCs
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Here is a list of all topics with brief descriptions:
[detail level 1234567891011121314151617]
 ▼Peripheral ICs
 ADN4604 16x16 Digital Crosspoint Switch
 AT24MACx02 2kbit Serial EEPROM
 24xx02 2kbit Serial EEPROM
 24xx64 64kbit Serial EEPROM
 ▼MCP23016 16-bit I2C/SMBus I/O Expander Module
 MCP23016 Registers
 ▼PCA9554 8-bit I2C/SMBus I/O Expander Module
 PCA9554 Registers
 ▼Sensors
 Hotswap Sensor
 ▼INA220 - High- or Low-Side, Bidirectional Current and Power Monitor
 INA220 Registers
 ▼INA3221 - High- or Low-Side, Bidirectional Current and Power Monitor
 INA3221 Registers
 LM75 - Temperature Sensor
 MAX6642 Remote/Local Temperature Sensor with Overtemperature Alarm
 ▼Board Ports
 ▼AFC Timing Board Port
 AFC-Timing IPMI OEM Commands
 AFC Timing Pin Mapping
 ▼AFCv4.0 Board Port
 AFCv4.0 IPMI OEM Commands
 ▼AFCv4 Payload Control
 Payload Messages Codes
 AFCv4.0 Pin Mapping
 ▼IPMI - Intelligent Platform Management Interface
 ▼IPMI Commands
 IPMI Net Functions
 IPMI Commands - Chassis (0x00)
 IPMI Commands - Brigde (0x02)
 IPMI Commands - Sensor (0x04)
 IPMI Commands - Application (0x06)
 IPMI Commands - Storage (0x0A)
 IPMI Commands - Storage (0x0C)
 IPMI Commands - PICMG (0x2C)
 IPMI Commands - Custom (0x32)
 IPMI Completion Codes
 ▼AFCv3.1 Payload Control
 Payload Messages Codes
 CMSIS Global Defines
 ▼Defines and Type DefinitionsType definitions and defines for Cortex-M processor based devices
 ▼Status and Control RegistersCore Register type definitions
 ▼Nested Vectored Interrupt Controller (NVIC)Type definitions for the NVIC Registers
 ▼System Control Block (SCB)Type definitions for the System Control Block Registers
 ▼System Controls not in SCB (SCnSCB)Type definitions for the System Control and ID Register not in the SCB
 ▼System Tick Timer (SysTick)Type definitions for the System Timer Registers
 ▼Instrumentation Trace Macrocell (ITM)Type definitions for the Instrumentation Trace Macrocell (ITM)
 ▼Data Watchpoint and Trace (DWT)Type definitions for the Data Watchpoint and Trace (DWT)
 ▼Trace Port Interface (TPI)Type definitions for the Trace Port Interface (TPI)
 ▼Core Debug Registers (CoreDebug)Type definitions for the Core Debug Registers
 ▼Core register bit field macrosMacros for use with bit field definitions (xxx_Pos, xxx_Msk)
 ▼Core DefinitionsDefinitions for base addresses, unions, and structures
 ▼Functions and Instructions Reference
 ▼CMSIS Core Register Access Functions
 ▼CMSIS Core Instruction Interface
 CMSIS SIMD Intrinsics
 ▼NVIC FunctionsFunctions that manage interrupts and exceptions via the NVIC
 ▼FPU FunctionsFunction that provides FPU type
 ▼SysTick FunctionsFunctions that configure the System
 ITM FunctionsFunctions that access the ITM debug interface
 ▼NVIC FunctionsFunctions that manage interrupts and exceptions via the NVIC
 ▼FPU FunctionsFunction that provides FPU type
 ▼SysTick FunctionsFunctions that configure the System
 ITM FunctionsFunctions that access the ITM debug interface
 ▼LPC176x5x
 Configuration_of_CMSIS
 Device_Peripheral_peripherals
 Device_Peripheral_peripheralAddr
 Device_Peripheral_declaration
 PosMask_peripherals