openMMC
Open Source Modular MMC for AMCs
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pin_mapping.h
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1/*
2 * openMMC -- Open Source modular IPM Controller firmware
3 *
4 * Copyright (C) 2016 Henrique Silva <henrique.silva@lnls.br>
5 * Copyright (C) 2021 Krzysztof Macias <krzysztof.macias@creotech.pl>
6 *
7 * This program is free software: you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation, either version 3 of the License, or
10 * (at your option) any later version.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program. If not, see <http://www.gnu.org/licenses/>.
19 *
20 * @license GPL-3.0+ <http://spdx.org/licenses/GPL-3.0+>
21 */
22
41#ifndef PIN_MAPPING_H_
42#define PIN_MAPPING_H_
43
44/* SPI Interfaces */
45#define FPGA_SPI 0
46
47/* UART Interfaces */
48#define UART_DEBUG 0
49
50/* Pin definitions */
51
52/* I2C ports */
53#define I2C0_SDA PIN_DEF( PORT0, 27, (IOCON_FUNC1 | IOCON_MODE_INACT), NON_GPIO )
54#define I2C0_SCL PIN_DEF( PORT0, 28, (IOCON_FUNC1 | IOCON_MODE_INACT), NON_GPIO )
55#define I2C1_SDA PIN_DEF( PORT0, 0, (IOCON_FUNC3 | IOCON_MODE_INACT), NON_GPIO )
56#define I2C1_SCL PIN_DEF( PORT0, 1, (IOCON_FUNC3 | IOCON_MODE_INACT), NON_GPIO )
57#define I2C2_SDA PIN_DEF( PORT0, 10, (IOCON_FUNC2 | IOCON_MODE_INACT), NON_GPIO )
58#define I2C2_SCL PIN_DEF( PORT0, 11, (IOCON_FUNC2 | IOCON_MODE_INACT), NON_GPIO )
59
60/* UART Debug port */
61#define UART_DEBUG_TXD PIN_DEF( PORT0, 2, (IOCON_FUNC1 | IOCON_MODE_INACT), NON_GPIO )
62#define UART_DEBUG_RXD PIN_DEF( PORT0, 3, (IOCON_FUNC1 | IOCON_MODE_INACT), NON_GPIO )
63
64/* FPGA SPI Port (SSEL is GPIO for word transfers larger than 8bits) */
65#define SSP0_SCK PIN_DEF( PORT1, 20, (IOCON_FUNC3 | IOCON_MODE_INACT), NON_GPIO )
66#define SSP0_SSEL PIN_DEF( PORT1, 21, (IOCON_FUNC0 | IOCON_MODE_INACT), GPIO_DIR_OUTPUT )
67#define SSP0_MISO PIN_DEF( PORT1, 23, (IOCON_FUNC3 | IOCON_MODE_INACT), NON_GPIO )
68#define SSP0_MOSI PIN_DEF( PORT1, 24, (IOCON_FUNC3 | IOCON_MODE_INACT), NON_GPIO )
69
70/* SPI Legacy port - should be updated to SSP interface */
71/* DAC SPI Port (SSEL is GPIO for word transfers larger than 8bits) */
72#define SPI_SCK PIN_DEF( PORT0, 15, (IOCON_FUNC3 | IOCON_MODE_INACT), NON_GPIO )
73#define SPI_SSEL PIN_DEF( PORT0, 16, (IOCON_FUNC0 | IOCON_MODE_INACT), GPIO_DIR_OUTPUT )
74#define SPI_MOSI PIN_DEF( PORT0, 18, (IOCON_FUNC3 | IOCON_MODE_INACT), NON_GPIO )
75
76/* Tracedata */
77#define TRACEDATA3 PIN_DEF( PORT2, 2, (IOCON_FUNC3 | IOCON_MODE_INACT), NON_GPIO )
78#define TRACEDATA2 PIN_DEF( PORT2, 3, (IOCON_FUNC3 | IOCON_MODE_INACT), NON_GPIO )
79#define TRACEDATA1 PIN_DEF( PORT2, 4, (IOCON_FUNC3 | IOCON_MODE_INACT), NON_GPIO )
80#define TRACEDATA0 PIN_DEF( PORT2, 5, (IOCON_FUNC3 | IOCON_MODE_INACT), NON_GPIO )
81#define TRACECLK PIN_DEF( PORT2, 6, (IOCON_FUNC3 | IOCON_MODE_INACT), NON_GPIO )
82
83/*ADC Payload detector*/
84#define ADC_PAYLOAD_DETECTOR PIN_DEF( PORT0, 24, (IOCON_FUNC1 | IOCON_MODE_INACT), NON_GPIO )
85
86
87/* GPIO definitions */
88
89/* I2C MUX control pins */
90#define GPIO_I2C_MUX_ADDR1 PIN_DEF( PORT0, 4, (IOCON_FUNC0 | IOCON_MODE_PULLDOWN), GPIO_DIR_OUTPUT )
91#define GPIO_I2C_MUX_ADDR2 PIN_DEF( PORT0, 5, (IOCON_FUNC0 | IOCON_MODE_PULLDOWN), GPIO_DIR_OUTPUT )
92#define GPIO_I2C_SW_RESETn PIN_DEF( PORT0, 19, (IOCON_FUNC0 | IOCON_MODE_INACT), GPIO_DIR_OUTPUT )
93
94/* LPC_ISPn RTS */
95#define GPIO_RTS PIN_DEF( PORT2, 10, (IOCON_FUNC0 | IOCON_MODE_INACT), GPIO_DIR_INPUT )
96
97/* Power Good pins */
98#define GPIO_PG_RESETn PIN_DEF( PORT1, 22, (IOCON_FUNC0 | IOCON_MODE_INACT), GPIO_DIR_INPUT )
99#define GPIO_PGOOD_P1V0 PIN_DEF( PORT3, 26, (IOCON_FUNC0 | IOCON_MODE_INACT), GPIO_DIR_INPUT )
100
101#define GPIO_AMC_RTM_CRITICAL PIN_DEF( PORT1, 26, (IOCON_FUNC0 | IOCON_MODE_INACT), GPIO_DIR_INPUT )
102#define GPIO_AMC_RTM_TC PIN_DEF( PORT1, 28, (IOCON_FUNC0 | IOCON_MODE_INACT), GPIO_DIR_INPUT )
103#define GPIO_AMC_RTM_WARNING PIN_DEF( PORT1, 29, (IOCON_FUNC0 | IOCON_MODE_INACT), GPIO_DIR_INPUT )
104#define GPIO_AMC_RTM_PV PIN_DEF( PORT1, 27, (IOCON_FUNC0 | IOCON_MODE_INACT), GPIO_DIR_INPUT )
105
106/* FMC Power Good pins */
107#define GPIO_FMC1_PG_M2C PIN_DEF( PORT1, 16, (IOCON_FUNC0 | IOCON_MODE_INACT), GPIO_DIR_INPUT )
108#define GPIO_FMC2_PG_M2C PIN_DEF( PORT1, 17, (IOCON_FUNC0 | IOCON_MODE_INACT), GPIO_DIR_INPUT )
109#define GPIO_FMC1_PG_C2M PIN_DEF( PORT1, 18, (IOCON_FUNC0 | IOCON_MODE_INACT), GPIO_DIR_OUTPUT )
110#define GPIO_FMC2_PG_C2M PIN_DEF( PORT1, 19, (IOCON_FUNC0 | IOCON_MODE_INACT), GPIO_DIR_OUTPUT )
111
112#define GPIO_FMC1_CRITICAL PIN_DEF( PORT0, 23, (IOCON_FUNC0 | IOCON_MODE_INACT), GPIO_DIR_INPUT )
113#define GPIO_FMC1_TC PIN_DEF( PORT0, 25, (IOCON_FUNC0 | IOCON_MODE_INACT), GPIO_DIR_INPUT )
114#define GPIO_FMC1_WARNING PIN_DEF( PORT0, 26, (IOCON_FUNC0 | IOCON_MODE_INACT), GPIO_DIR_INPUT )
115#define GPIO_FMC1_PV PIN_DEF( PORT1, 31, (IOCON_FUNC0 | IOCON_MODE_INACT), GPIO_DIR_INPUT )
116
117#define GPIO_FMC2_CRITICAL PIN_DEF( PORT2, 7, (IOCON_FUNC0 | IOCON_MODE_INACT), GPIO_DIR_INPUT )
118#define GPIO_FMC2_TC PIN_DEF( PORT4, 28, (IOCON_FUNC0 | IOCON_MODE_INACT), GPIO_DIR_INPUT )
119#define GPIO_FMC2_WARNING PIN_DEF( PORT4, 29, (IOCON_FUNC0 | IOCON_MODE_INACT), GPIO_DIR_INPUT )
120#define GPIO_FMC2_PV PIN_DEF( PORT3, 25, (IOCON_FUNC0 | IOCON_MODE_INACT), GPIO_DIR_INPUT )
121
122/* Geographic Address pin definitions */
123#define GPIO_GA0 PIN_DEF( PORT1, 0, (IOCON_FUNC0 | IOCON_MODE_INACT), GPIO_DIR_INPUT )
124#define GPIO_GA1 PIN_DEF( PORT1, 1, (IOCON_FUNC0 | IOCON_MODE_INACT), GPIO_DIR_INPUT )
125#define GPIO_GA2 PIN_DEF( PORT1, 4, (IOCON_FUNC0 | IOCON_MODE_INACT), GPIO_DIR_INPUT )
126#define GPIO_GA_TEST PIN_DEF( PORT1, 8, (IOCON_FUNC0 | IOCON_MODE_INACT), GPIO_DIR_OUTPUT )
127
128/* Board LEDs */
129#define GPIO_LEDBLUE PIN_DEF( PORT1, 9, (IOCON_FUNC0 | IOCON_MODE_PULLUP), GPIO_DIR_OUTPUT )
130#define GPIO_LEDGREEN PIN_DEF( PORT1, 10, (IOCON_FUNC0 | IOCON_MODE_PULLDOWN), GPIO_DIR_OUTPUT )
131#define GPIO_LEDRED PIN_DEF( PORT1, 25, (IOCON_FUNC0 | IOCON_MODE_PULLDOWN), GPIO_DIR_OUTPUT )
132
133/* Front Panel BUTTON */
134#define GPIO_FRONT_BUTTON PIN_DEF( PORT2, 12, (IOCON_FUNC0 | IOCON_MODE_INACT), GPIO_DIR_INPUT )
135
136/* Hot swap handle */
137#define GPIO_HOT_SWAP_HANDLE PIN_DEF( PORT2, 13, (IOCON_FUNC0 | IOCON_MODE_INACT), GPIO_DIR_INPUT )
138
139/* FPGA Control */
140#define GPIO_FPGA_DONE_B PIN_DEF( PORT0, 22, (IOCON_FUNC0 | IOCON_MODE_INACT), GPIO_DIR_INPUT )
141#define GPIO_FPGA_INITB PIN_DEF( PORT0, 20, (IOCON_FUNC0 | IOCON_MODE_INACT), GPIO_DIR_OUTPUT )
142#define GPIO_FPGA_RESET PIN_DEF( PORT2, 9, (IOCON_FUNC0 | IOCON_MODE_INACT), GPIO_DIR_OUTPUT )
143
144/* VADJ DAC */
145#define GPIO_DAC_VADJ_RST PIN_DEF( PORT0, 21, (IOCON_FUNC0 | IOCON_MODE_PULLUP), GPIO_DIR_OUTPUT )
146
147/* MMC ENABLE# */
148#define GPIO_MMC_ENABLE PIN_DEF( PORT2, 8, (IOCON_FUNC0 | IOCON_MODE_INACT), GPIO_DIR_INPUT )
149
150/* Overtemp signal */
151#define GPIO_OVERTEMPn PIN_DEF( PORT2, 11, (IOCON_FUNC0 | IOCON_MODE_INACT), GPIO_DIR_INPUT )
152
153/* JTAG */
154#define GPIO_FMC1_JTAG_Override PIN_DEF( PORT2, 1, (IOCON_FUNC0 | IOCON_MODE_INACT), GPIO_DIR_OUTPUT )
155#define GPIO_FMC2_JTAG_Override PIN_DEF( PORT0, 8, (IOCON_FUNC0 | IOCON_MODE_INACT), GPIO_DIR_OUTPUT )
156#define GPIO_RTM_JTAG_Override PIN_DEF( PORT2, 0, (IOCON_FUNC0 | IOCON_MODE_INACT), GPIO_DIR_OUTPUT )
157
158/* EEPROM WP signal */
159#define GPIO_EEPROM_WP PIN_DEF( PORT1, 30, (IOCON_FUNC0 | IOCON_MODE_INACT), GPIO_DIR_OUTPUT )
160
161/* FMC CLK signals */
162#define GPIO_CLK_DIR_FMC2 PIN_DEF( PORT0, 6, (IOCON_FUNC0 | IOCON_MODE_INACT), GPIO_DIR_INPUT )
163#define GPIO_CLK_DIR_FMC1 PIN_DEF( PORT0, 7, (IOCON_FUNC0 | IOCON_MODE_INACT), GPIO_DIR_INPUT )
164
165/* FMC Present signals */
166#define GPIO_FMC1_PRSNT_M2C PIN_DEF( PORT1, 14, (IOCON_FUNC0 | IOCON_MODE_INACT), GPIO_DIR_INPUT )
167#define GPIO_FMC2_PRSNT_M2C PIN_DEF( PORT1, 15, (IOCON_FUNC0 | IOCON_MODE_INACT), GPIO_DIR_INPUT )
168
169/* RTM */
170#define GPIO_RTM_PS PIN_DEF( PORT0, 29, (IOCON_FUNC0 | IOCON_MODE_INACT), GPIO_DIR_INPUT )
171
172
173/* Pin initialization (config) list */
174#define PIN_CFG_LIST \
175 I2C0_SDA, \
176 I2C0_SCL, \
177 I2C1_SDA, \
178 I2C1_SCL, \
179 I2C2_SDA, \
180 I2C2_SCL, \
181 UART_DEBUG_TXD, \
182 UART_DEBUG_RXD, \
183 SSP0_SCK, \
184 SSP0_SSEL, \
185 SSP0_MISO, \
186 SSP0_MOSI, \
187 SPI_SCK, \
188 SPI_SSEL, \
189 SPI_MOSI, \
190 TRACEDATA3, \
191 TRACEDATA2, \
192 TRACEDATA1, \
193 TRACEDATA0, \
194 TRACECLK, \
195 ADC_PAYLOAD_DETECTOR, \
196 GPIO_I2C_MUX_ADDR1, \
197 GPIO_I2C_MUX_ADDR2, \
198 GPIO_I2C_SW_RESETn, \
199 GPIO_RTS, \
200 GPIO_PG_RESETn, \
201 GPIO_PGOOD_P1V0, \
202 GPIO_AMC_RTM_CRITICAL, \
203 GPIO_AMC_RTM_TC, \
204 GPIO_AMC_RTM_WARNING, \
205 GPIO_AMC_RTM_PV, \
206 GPIO_FMC1_PG_M2C, \
207 GPIO_FMC2_PG_M2C, \
208 GPIO_FMC1_PG_C2M, \
209 GPIO_FMC2_PG_C2M, \
210 GPIO_FMC1_CRITICAL, \
211 GPIO_FMC1_TC, \
212 GPIO_FMC1_WARNING, \
213 GPIO_FMC1_PV, \
214 GPIO_FMC2_CRITICAL, \
215 GPIO_FMC2_TC, \
216 GPIO_FMC2_WARNING, \
217 GPIO_FMC2_PV, \
218 GPIO_GA0, \
219 GPIO_GA1, \
220 GPIO_GA2, \
221 GPIO_GA_TEST, \
222 GPIO_LEDBLUE, \
223 GPIO_LEDGREEN, \
224 GPIO_LEDRED, \
225 GPIO_FRONT_BUTTON, \
226 GPIO_HOT_SWAP_HANDLE, \
227 GPIO_FPGA_DONE_B, \
228 GPIO_FPGA_INITB, \
229 GPIO_FPGA_RESET, \
230 GPIO_DAC_VADJ_RST, \
231 GPIO_MMC_ENABLE, \
232 GPIO_OVERTEMPn, \
233 GPIO_FMC1_JTAG_Override, \
234 GPIO_FMC2_JTAG_Override, \
235 GPIO_RTM_JTAG_Override, \
236 GPIO_EEPROM_WP, \
237 GPIO_CLK_DIR_FMC2, \
238 GPIO_CLK_DIR_FMC1, \
239 GPIO_FMC1_PRSNT_M2C, \
240 GPIO_FMC2_PRSNT_M2C, \
241 GPIO_RTM_PS
242
246#include <stdint.h>
247
248typedef struct external_gpio {
249 uint8_t port_num;
250 uint8_t pin_num;
251} external_gpio_t;
252
253extern const external_gpio_t ext_gpios[16];
254
255enum {
256 EXT_GPIO_EN_P1V0,
257 EXT_GPIO_EN_P1V8,
258 EXT_GPIO_EN_P3V3,
259 EXT_GPIO_EN_FMC1_PVADJ,
260 EXT_GPIO_EN_FMC2_PVADJ,
261 EXT_GPIO_P1V5_VTT_EN,
262 EXT_GPIO_EN_P1V2,
263 EXT_GPIO_EN_FMC1_P12V,
264 EXT_GPIO_EN_FMC1_P3V3,
265 EXT_GPIO_EN_FMC2_P12V,
266 EXT_GPIO_EN_FMC2_P3V3,
267 EXT_GPIO_EN_RTM_PWR,
268 EXT_GPIO_EN_RTM_MP,
269 EXT_GPIO_FPGA_I2C_RESET,
270 EXT_GPIO_DAC_VADJ_RSTn,
271 EXT_GPIO_PROGRAM_B,
272};
273
274#endif
EXT_GPIO_EN_FMC2_PVADJ
@ EXT_GPIO_EN_FMC2_PVADJ
Definition pin_mapping.h:260
EXT_GPIO_FPGA_I2C_RESET
@ EXT_GPIO_FPGA_I2C_RESET
Definition pin_mapping.h:269
EXT_GPIO_EN_P1V8
@ EXT_GPIO_EN_P1V8
Definition pin_mapping.h:257
EXT_GPIO_EN_P1V0
@ EXT_GPIO_EN_P1V0
Definition pin_mapping.h:256
EXT_GPIO_EN_FMC2_P3V3
@ EXT_GPIO_EN_FMC2_P3V3
Definition pin_mapping.h:266
EXT_GPIO_EN_FMC1_P3V3
@ EXT_GPIO_EN_FMC1_P3V3
Definition pin_mapping.h:264
EXT_GPIO_EN_RTM_MP
@ EXT_GPIO_EN_RTM_MP
Definition pin_mapping.h:268
EXT_GPIO_EN_FMC2_P12V
@ EXT_GPIO_EN_FMC2_P12V
Definition pin_mapping.h:265
EXT_GPIO_DAC_VADJ_RSTn
@ EXT_GPIO_DAC_VADJ_RSTn
Definition pin_mapping.h:270
EXT_GPIO_EN_P3V3
@ EXT_GPIO_EN_P3V3
Definition pin_mapping.h:258
EXT_GPIO_EN_FMC1_P12V
@ EXT_GPIO_EN_FMC1_P12V
Definition pin_mapping.h:263
EXT_GPIO_EN_FMC1_PVADJ
@ EXT_GPIO_EN_FMC1_PVADJ
Definition pin_mapping.h:259
EXT_GPIO_PROGRAM_B
@ EXT_GPIO_PROGRAM_B
Definition pin_mapping.h:271
EXT_GPIO_EN_P1V2
@ EXT_GPIO_EN_P1V2
Definition pin_mapping.h:262
EXT_GPIO_P1V5_VTT_EN
@ EXT_GPIO_P1V5_VTT_EN
Definition pin_mapping.h:261
EXT_GPIO_EN_RTM_PWR
@ EXT_GPIO_EN_RTM_PWR
Definition pin_mapping.h:267
external_gpio_t
struct external_gpio external_gpio_t
ext_gpios
const external_gpio_t ext_gpios[16]
Definition pin_mapping.c:8
external_gpio
Definition pin_mapping.h:248
external_gpio::pin_num
uint8_t pin_num
Definition pin_mapping.h:250
external_gpio::port_num
uint8_t port_num
Definition pin_mapping.h:249