Board specific definitions used in IPMB Layer. More...

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Macros
#define	IPMB_I2C I2C0
	Default I2C interface to use in IPMB protocol.

#define	IPMB_I2C_FREQ 100000
	I2C Clock Frequency for IPMB - 100kHz.

#define	GPIO_GA_DELAY 10
	Minimum clock cycles to the GPIO pin change take effect on some boards.

Functions
uint8_t	get_ipmb_addr (void)
	Reads own I2C slave address using GA pins.

Detailed Description

Board specific definitions used in IPMB Layer.

Author: Henrique Silva henri.nosp@m.que..nosp@m.silva.nosp@m.@lnl.nosp@m.s.br, LNLS

Macro Definition Documentation

◆ GPIO_GA_DELAY

#define GPIO_GA_DELAY 10

Minimum clock cycles to the GPIO pin change take effect on some boards.

◆ IPMB_I2C

#define IPMB_I2C I2C0

Default I2C interface to use in IPMB protocol.

◆ IPMB_I2C_FREQ

#define IPMB_I2C_FREQ 100000

I2C Clock Frequency for IPMB - 100kHz.

Function Documentation

◆ get_ipmb_addr()

uint8_t get_ipmb_addr ( void )

Reads own I2C slave address using GA pins.

Based on coreipm/coreipm/mmc.c

Author: Gokhan Sozmen

The state of each GA signal is represented by G (grounded), U (unconnected), or P (pulled up to Management Power).

The MMC drives P1 low and reads the GA lines. The MMC then drives P1 high and reads the GA lines. Any line that changes state between the two reads indicate an unconnected (U) pin.

The IPMB-L address of a Module can be calculated as (70h + Site Number x 2).
G = 0, P = 1, U = 2

Pin	Ternary	Decimal	Address
GGG	000	0	0x70
GGP	001	1	0x8A
GGU	002	2	0x72
GPG	010	3	0x8E
GPP	011	4	0x92
GPU	012	5	0x90
GUG	020	6	0x74
GUP	021	7	0x8C
GUU	022	8	0x76
PGG	100	9	0x98
PGP	101	10	0x9C
PGU	102	11	0x9A
PPG	110	12	0xA0
PPP	111	13	0xA4
PPU	112	14	0x88
PUG	120	15	0x9E
PUP	121	16	0x86
PUU	122	17	0x84
UGG	200	18	0x78
UGP	201	19	0x94
UGU	202	20	0x7A
UPG	210	21	0x96
UPP	211	22	0x82
UPU	212	23	0x80
UUG	220	24	0x7C
UUP	221	25	0x7E
UUU	222	26	0xA2

Returns: 7-bit Slave Address

Macros