fru_editor.h File Reference

#include "FreeRTOS.h"
#include "string.h"
#include "ipmi.h"

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Data Structures
struct	fru_common_header
struct	fru_multirecord_area_header
struct	fru_internal_use_area
struct	fru_module_current_record_t
struct	amc_p2p_descriptor_t
struct	amc_point_to_point_record
struct	indirect_clock_descriptor
struct	direct_clock_descriptor
struct	clock_config_descriptor
struct	amc_clock_config_record
struct	zone3_compatibility_rec
struct	fmc_subtype_rec
struct	dc_load_rec
struct	dc_output_rec

Macros
#define	PCIE   (0x02)
#define	PCIE_ADV_SWITCHING   (0x03)
#define	ETHERNET   (0x05)
#define	SERIAL_RAPID_IO   (0x06)
#define	STORAGE   (0x07)
#define	NO_EXT   (0x00)
#define	GEN1_NO_SSC   (0x00)
#define	GEN1_SSC   (0x01)
#define	GEN2_NO_SSC   (0x02)
#define	GEN2_SSC   (0x03)
#define	BASE_1G_BX   (0x00)
#define	BASE_10G_BX4   (0x01)
#define	MBAUD_1250   (0x00)
#define	MBAUD_2500   (0x01)
#define	MBAUD_3125   (0x02)
#define	MBAUD_5000   (0x03)
#define	MBAUD_6250   (0x04)
#define	TCLKA   (1)
#define	TCLKB   (2)
#define	TCLKC   (3)
#define	TCLKD   (4)
#define	FCLKA   (5)
#define	PLL_PRSNT   (0x02)
#define	NO_PLL   (0x00)
#define	APP   (0x01)
#define	CIPMC   (0x00)
#define	RECEIVER   (0x00)
#define	SOURCE   (0x01)
#define	UNSPEC_FAMILY   (0x00)
#define	SONET   (0x01)
#define	SDH   (0x01)
#define	PDH   (0x01)
#define	PCI_RESERVED   (0x02)
#define	KHz(v)   (v*1000)
#define	MHz(v)   (v*1000000)
#define	GHz(v)   (v*1000000000)
#define	EXACT_MATCHES   (0x00)
#define	MATCHES_01   (0x01)
#define	MATCHES_10   (0x02)
#define	PORT(n)   n
#define	UNUSED_PORT   0x1F
#define	current_in_ma(curr)   (uint8_t)(curr/100)
#define	FMC_SINGLE_WIDTH   (0x00)
#define	FMC_DOUBLE_WIDTH   (0x01)
#define	FMC_CONN_LPC   (0x00)
#define	FMC_CONN_HPC   (0x01)
#define	FMC_CONN_NOT_FITTED   (0x03)
#define	MEZZANINE_TO_CARRIER   (0x00)
#define	CARRIER_TO_MEZZANINE   (0x01)
#define	DIRECT_CLOCK_CONNECTION(id, activation_control, pll_use, clock_source_receiver, family, accuracy, freq_Hz, min_Hz, max_Hz)
#define	INDIRECT_CLOCK_CONNECTION(id, activation_control, pll_use, clock_source_receiver, indirect_id)
#define	GENERIC_POINT_TO_POINT_RECORD(id, port0, port1, port2, port3, protocol, extension, matches)

Typedefs
typedef struct fru_common_header	fru_common_header_t
typedef struct fru_multirecord_area_header	fru_multirecord_area_header_t
typedef struct fru_internal_use_area	fru_internal_use_area_t
typedef struct amc_point_to_point_record	amc_point_to_point_record_t
typedef struct indirect_clock_descriptor	indirect_clock_descriptor_t
typedef struct direct_clock_descriptor	direct_clock_descriptor_t
typedef struct clock_config_descriptor	clock_config_descriptor_t
typedef struct amc_clock_config_record	amc_clock_config_record_t
typedef struct zone3_compatibility_rec	zone3_compatibility_rec_t
typedef struct fmc_subtype_rec	fmc_subtype_rec_t
typedef struct dc_load_rec	dc_load_rec_t
typedef struct dc_output_rec	dc_output_rec_t

Functions
struct	__attribute__ ((__packed__))
uint8_t	fru_header_build (uint8_t **buffer, size_t int_use_off, size_t chassis_off, size_t board_off, size_t product_off, size_t multirecord_off)
uint8_t	board_info_area_build (uint8_t **buffer, uint8_t lang, uint32_t mfg_time, const char *manuf, const char *name, const char *sn, const char *pn, const char *file_id)
uint8_t	chassis_info_area_build (uint8_t **buffer, uint8_t type, const char *pn, const char *sn, uint8_t *custom_data, size_t custom_data_sz)
uint8_t	product_info_area_build (uint8_t **buffer, uint8_t lang, const char *manuf, const char *name, const char *part_model, const char *version, const char *serial, const char *asset_tag, const char *file_id)
uint8_t	amc_point_to_point_record_build (uint8_t **buffer, amc_p2p_descriptor_t *p2p_desc, uint8_t desc_count)
uint8_t	amc_point_to_point_clock_build (uint8_t **buffer, clock_config_descriptor_t *clk_desc, uint8_t desc_count)
uint8_t	module_current_record_build (uint8_t **buffer, uint8_t current)
uint8_t	zone3_compatibility_record_build (uint8_t **buffer, uint32_t compat_code)
uint8_t	fmc_subtype_record_build (uint8_t **buffer, uint8_t clock_dir, uint8_t module_size, uint8_t p1_conn_size, uint8_t p2_conn_size, uint8_t p1_a_count, uint8_t p1_b_count, uint8_t p2_a_count, uint8_t p2_b_count, uint8_t p1_gbt, uint8_t p2_gbt, uint8_t eol)
uint8_t	dc_load_record_build (uint8_t **buffer, uint16_t nominal_volt, uint16_t min_volt, uint16_t max_volt, uint16_t ripple_noise, uint16_t min_load, uint16_t max_load, uint8_t eol)
uint8_t	dc_output_record_build (uint8_t **buffer, uint16_t nominal_volt, uint16_t neg_dev, uint16_t pos_dev, uint16_t ripple_noise, uint16_t min_draw, uint16_t max_draw, uint8_t eol)
size_t	amc_fru_info_build (uint8_t **buffer)

Variables
	amc_channel_descriptor_t
	amc_link_descriptor_t

Macro Definition Documentation

APP

#define APP   (0x01)

BASE_10G_BX4

#define BASE_10G_BX4   (0x01)

BASE_1G_BX

#define BASE_1G_BX   (0x00)

CARRIER_TO_MEZZANINE

#define CARRIER_TO_MEZZANINE   (0x01)

CIPMC

#define CIPMC   (0x00)

current_in_ma

#define current_in_ma

(

curr

)

(uint8_t)(curr/100)

DIRECT_CLOCK_CONNECTION

#define DIRECT_CLOCK_CONNECTION	(		id,
			activation_control,
			pll_use,
			clock_source_receiver,
			family,
			accuracy,
			freq_Hz,
			min_Hz,
			max_Hz )

Value:

    {   .clock_id = id,                                                 \
            .clock_activation_control = activation_control,             \
            .indirect_clock_descriptor_cnt = 0,                         \
            .direct_clock_descriptor_cnt = 1,                           \
            .direct_descriptor = { .pll_connection = pll_use,           \
                                   .clock_assymetric_match = clock_source_receiver, \
                                   .clock_family = family,              \
                                   .accuracy_level = accuracy,          \
                                   .clock_frequency = { (uint8_t)(((uint32_t)freq_Hz) & 0xFF), (uint8_t)((((uint32_t)freq_Hz) & 0xFF00) >> 8), (uint8_t)((((uint32_t)freq_Hz) & 0xFF0000) >> 16), (uint8_t)((((uint32_t)freq_Hz) & 0xFF000000) >> 24) }, \
                                   .clock_minimum_frequency = { (uint8_t)(((uint32_t)min_Hz) & 0xFF), (uint8_t)((((uint32_t)min_Hz) & 0xFF00) >> 8), (uint8_t)((((uint32_t)min_Hz) & 0xFF0000) >> 16), (uint8_t)((((uint32_t)min_Hz) & 0xFF000000) >> 24) }, \
                                   .clock_maximum_frequency = { (uint8_t)(((uint32_t)max_Hz) & 0xFF), (uint8_t)((((uint32_t)max_Hz) & 0xFF00) >> 8), (uint8_t)((((uint32_t)max_Hz) & 0xFF0000) >> 16), (uint8_t)((((uint32_t)max_Hz) & 0xFF000000) >> 24) } } \
    },

ETHERNET

#define ETHERNET   (0x05)

EXACT_MATCHES

#define EXACT_MATCHES   (0x00)

FCLKA

#define FCLKA   (5)

FMC_CONN_HPC

#define FMC_CONN_HPC   (0x01)

FMC_CONN_LPC

#define FMC_CONN_LPC   (0x00)

FMC_CONN_NOT_FITTED

#define FMC_CONN_NOT_FITTED   (0x03)

FMC_DOUBLE_WIDTH

#define FMC_DOUBLE_WIDTH   (0x01)

FMC_SINGLE_WIDTH

#define FMC_SINGLE_WIDTH   (0x00)

GEN1_NO_SSC

#define GEN1_NO_SSC   (0x00)

GEN1_SSC

#define GEN1_SSC   (0x01)

GEN2_NO_SSC

#define GEN2_NO_SSC   (0x02)

GEN2_SSC

#define GEN2_SSC   (0x03)

GENERIC_POINT_TO_POINT_RECORD

#define GENERIC_POINT_TO_POINT_RECORD	(		id,
			port0,
			port1,
			port2,
			port3,
			protocol,
			extension,
			matches )

Value:

    {                                                                   \
        .channel_desc = {                                               \
            .lane0 = port0,                                             \
            .lane1 = port1,                                             \
            .lane2 = port2,                                             \
            .lane3 = port3,                                             \
            .reserved = 0xF                                             \
        },                                                              \
            .link_desc = {                                              \
            .amc_channel_id = id,                                       \
            .lane_bit_flag = 0xF,                                       \
            .link_type = protocol,                                      \
            .link_type_ext = extension,                                 \
            .link_grouping_id = 0,                                      \
            .assymetric_match = matches,                                \
            .reserved = 0x3F                                            \
        }                                                               \
    },

GHz

#define GHz

(

v

)

(v*1000000000)

INDIRECT_CLOCK_CONNECTION

#define INDIRECT_CLOCK_CONNECTION	(		id,
			activation_control,
			pll_use,
			clock_source_receiver,
			indirect_id )

Value:

    {   .clock_id = id,                                                 \
            .clock_activation_control = activation_control,             \
            .indirect_clock_descriptor_cnt = 1,                         \
            .direct_clock_descriptor_cnt = 0,                           \
            .indirect_descriptor = { .pll_connection = pll_use,         \
                                     .clock_assymetric_match = clock_source_receiver, \
                                     .dependent_clock_id = indirect_id, \
        }                                                               \
    },

KHz

#define KHz

(

v

)

(v*1000)

MATCHES_01

#define MATCHES_01   (0x01)

MATCHES_10

#define MATCHES_10   (0x02)

MBAUD_1250

#define MBAUD_1250   (0x00)

MBAUD_2500

#define MBAUD_2500   (0x01)

MBAUD_3125

#define MBAUD_3125   (0x02)

MBAUD_5000

#define MBAUD_5000   (0x03)

MBAUD_6250

#define MBAUD_6250   (0x04)

MEZZANINE_TO_CARRIER

#define MEZZANINE_TO_CARRIER   (0x00)

MHz

#define MHz

(

v

)

(v*1000000)

NO_EXT

#define NO_EXT   (0x00)

NO_PLL

#define NO_PLL   (0x00)

PCI_RESERVED

#define PCI_RESERVED   (0x02)

PCIE

#define PCIE   (0x02)

E-Keying

PCIE_ADV_SWITCHING

#define PCIE_ADV_SWITCHING   (0x03)

PDH

#define PDH   (0x01)

PLL_PRSNT

#define PLL_PRSNT   (0x02)

PORT

#define PORT

(

n

)

n

RECEIVER

#define RECEIVER   (0x00)

SDH

#define SDH   (0x01)

SERIAL_RAPID_IO

#define SERIAL_RAPID_IO   (0x06)

SONET

#define SONET   (0x01)

SOURCE

#define SOURCE   (0x01)

STORAGE

#define STORAGE   (0x07)

TCLKA

#define TCLKA   (1)

Clock configuration

TCLKB

#define TCLKB   (2)

TCLKC

#define TCLKC   (3)

TCLKD

#define TCLKD   (4)

UNSPEC_FAMILY

#define UNSPEC_FAMILY   (0x00)

UNUSED_PORT

#define UNUSED_PORT   0x1F

Typedef Documentation

amc_clock_config_record_t

typedef struct amc_clock_config_record amc_clock_config_record_t

amc_point_to_point_record_t

typedef struct amc_point_to_point_record amc_point_to_point_record_t

clock_config_descriptor_t

typedef struct clock_config_descriptor clock_config_descriptor_t

dc_load_rec_t

typedef struct dc_load_rec dc_load_rec_t

dc_output_rec_t

typedef struct dc_output_rec dc_output_rec_t

direct_clock_descriptor_t

typedef struct direct_clock_descriptor direct_clock_descriptor_t

fmc_subtype_rec_t

typedef struct fmc_subtype_rec fmc_subtype_rec_t

fru_common_header_t

typedef struct fru_common_header fru_common_header_t

fru_internal_use_area_t

typedef struct fru_internal_use_area fru_internal_use_area_t

fru_multirecord_area_header_t

typedef struct fru_multirecord_area_header fru_multirecord_area_header_t

indirect_clock_descriptor_t

typedef struct indirect_clock_descriptor indirect_clock_descriptor_t

zone3_compatibility_rec_t

typedef struct zone3_compatibility_rec zone3_compatibility_rec_t

Function Documentation

__attribute__()

struct __attribute__

(

(__packed__)

)

amc_fru_info_build()

size_t amc_fru_info_build

(

uint8_t **

buffer

)

amc_point_to_point_clock_build()

uint8_t amc_point_to_point_clock_build	(	uint8_t **	buffer,
		clock_config_descriptor_t *	clk_desc,
		uint8_t	desc_count )

amc_point_to_point_record_build()

uint8_t amc_point_to_point_record_build	(	uint8_t **	buffer,
		amc_p2p_descriptor_t *	p2p_desc,
		uint8_t	desc_count )

board_info_area_build()

uint8_t board_info_area_build	(	uint8_t **	buffer,
		uint8_t	lang,
		uint32_t	mfg_time,
		const char *	manuf,
		const char *	name,
		const char *	sn,
		const char *	pn,
		const char *	file_id )

chassis_info_area_build()

uint8_t chassis_info_area_build	(	uint8_t **	buffer,
		uint8_t	type,
		const char *	pn,
		const char *	sn,
		uint8_t *	custom_data,
		size_t	custom_data_sz )

dc_load_record_build()

uint8_t dc_load_record_build	(	uint8_t **	buffer,
		uint16_t	nominal_volt,
		uint16_t	min_volt,
		uint16_t	max_volt,
		uint16_t	ripple_noise,
		uint16_t	min_load,
		uint16_t	max_load,
		uint8_t	eol )

dc_output_record_build()

uint8_t dc_output_record_build	(	uint8_t **	buffer,
		uint16_t	nominal_volt,
		uint16_t	neg_dev,
		uint16_t	pos_dev,
		uint16_t	ripple_noise,
		uint16_t	min_draw,
		uint16_t	max_draw,
		uint8_t	eol )

fmc_subtype_record_build()

uint8_t fmc_subtype_record_build	(	uint8_t **	buffer,
		uint8_t	clock_dir,
		uint8_t	module_size,
		uint8_t	p1_conn_size,
		uint8_t	p2_conn_size,
		uint8_t	p1_a_count,
		uint8_t	p1_b_count,
		uint8_t	p2_a_count,
		uint8_t	p2_b_count,
		uint8_t	p1_gbt,
		uint8_t	p2_gbt,
		uint8_t	eol )

fru_header_build()

uint8_t fru_header_build	(	uint8_t **	buffer,
		size_t	int_use_off,
		size_t	chassis_off,
		size_t	board_off,
		size_t	product_off,
		size_t	multirecord_off )

module_current_record_build()

uint8_t module_current_record_build	(	uint8_t **	buffer,
		uint8_t	current )

product_info_area_build()

uint8_t product_info_area_build	(	uint8_t **	buffer,
		uint8_t	lang,
		const char *	manuf,
		const char *	name,
		const char *	part_model,
		const char *	version,
		const char *	serial,
		const char *	asset_tag,
		const char *	file_id )

zone3_compatibility_record_build()

uint8_t zone3_compatibility_record_build	(	uint8_t **	buffer,
		uint32_t	compat_code )

Variable Documentation

amc_channel_descriptor_t

amc_channel_descriptor_t

amc_link_descriptor_t

amc_link_descriptor_t