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Data Fields
LPC_EMAC_Type Struct Reference
LPC176x5x » Device_Peripheral_peripherals

Ethernet (EMAC) More...

#include <LPC176x5x.h>

Data Fields

__IOM uint32_t MAC1
 
__IOM uint32_t MAC2
 
__IOM uint32_t IPGT
 
__IOM uint32_t IPGR
 
__IOM uint32_t CLRT
 
__IOM uint32_t MAXF
 
__IOM uint32_t SUPP
 
__IOM uint32_t TEST
 
__IOM uint32_t MCFG
 
__IOM uint32_t MCMD
 
__IOM uint32_t MADR
 
__OM uint32_t MWTD
 
__IM uint32_t MRDD
 
__IM uint32_t MIND
 
__IM uint32_t RESERVED [2]
 
__IOM uint32_t SA0
 
__IOM uint32_t SA1
 
__IOM uint32_t SA2
 
__IM uint32_t RESERVED1 [45]
 
__IOM uint32_t COMMAND
 
__IM uint32_t STATUS
 
__IOM uint32_t RXDESCRIPTOR
 
__IOM uint32_t RXSTATUS
 
__IOM uint32_t RXDESCRIPTORNUMBER
 
__IM uint32_t RXPRODUCEINDEX
 
__IOM uint32_t RXCONSUMEINDEX
 
__IOM uint32_t TXDESCRIPTOR
 
__IOM uint32_t TXSTATUS
 
__IOM uint32_t TXDESCRIPTORNUMBER
 
__IOM uint32_t TXPRODUCEINDEX
 
__IM uint32_t TXCONSUMEINDEX
 
__IM uint32_t RESERVED2 [10]
 
__IM uint32_t TSV0
 
__IM uint32_t TSV1
 
__IM uint32_t RSV
 
__IM uint32_t RESERVED3 [3]
 
__IOM uint32_t FLOWCONTROLCOUNTER
 
__IM uint32_t FLOWCONTROLSTATUS
 
__IM uint32_t RESERVED4 [34]
 
__IOM uint32_t RXFILTERCTRL
 
__IM uint32_t RXFILTERWOLSTATUS
 
__OM uint32_t RXFILTERWOLCLEAR
 
__IM uint32_t RESERVED5
 
__IOM uint32_t HASHFILTERL
 
__IOM uint32_t HASHFILTERH
 
__IM uint32_t RESERVED6 [882]
 
__IM uint32_t INTSTATUS
 
__IOM uint32_t INTENABLE
 
__OM uint32_t INTCLEAR
 
__OM uint32_t INTSET
 
__IM uint32_t RESERVED7
 
__IOM uint32_t POWERDOWN
 

Detailed Description

Ethernet (EMAC)

Field Documentation

◆ CLRT

__IOM uint32_t LPC_EMAC_Type::CLRT

(@ 0x00000010) Collision window / Retry register.

◆ COMMAND

__IOM uint32_t LPC_EMAC_Type::COMMAND

(@ 0x00000100) Command register.

◆ FLOWCONTROLCOUNTER

__IOM uint32_t LPC_EMAC_Type::FLOWCONTROLCOUNTER

(@ 0x00000170) Flow control counter register.

◆ FLOWCONTROLSTATUS

__IM uint32_t LPC_EMAC_Type::FLOWCONTROLSTATUS

(@ 0x00000174) Flow control status register.

◆ HASHFILTERH

__IOM uint32_t LPC_EMAC_Type::HASHFILTERH

(@ 0x00000214) Hash filter table MSBs register.

◆ HASHFILTERL

__IOM uint32_t LPC_EMAC_Type::HASHFILTERL

(@ 0x00000210) Hash filter table LSBs register.

◆ INTCLEAR

__OM uint32_t LPC_EMAC_Type::INTCLEAR

(@ 0x00000FE8) Interrupt clear register.

◆ INTENABLE

__IOM uint32_t LPC_EMAC_Type::INTENABLE

(@ 0x00000FE4) Interrupt enable register.

◆ INTSET

__OM uint32_t LPC_EMAC_Type::INTSET

(@ 0x00000FEC) Interrupt set register.

◆ INTSTATUS

__IM uint32_t LPC_EMAC_Type::INTSTATUS

(@ 0x00000FE0) Interrupt status register.

◆ IPGR

__IOM uint32_t LPC_EMAC_Type::IPGR

(@ 0x0000000C) Non Back-to-Back Inter-Packet-Gap register.

◆ IPGT

__IOM uint32_t LPC_EMAC_Type::IPGT

(@ 0x00000008) Back-to-Back Inter-Packet-Gap register.

◆ MAC1

__IOM uint32_t LPC_EMAC_Type::MAC1

< (@ 0x50000000) EMAC Structure
(@ 0x00000000) MAC configuration register 1.

◆ MAC2

__IOM uint32_t LPC_EMAC_Type::MAC2

(@ 0x00000004) MAC configuration register 2.

◆ MADR

__IOM uint32_t LPC_EMAC_Type::MADR

(@ 0x00000028) MII Mgmt Address register.

◆ MAXF

__IOM uint32_t LPC_EMAC_Type::MAXF

(@ 0x00000014) Maximum Frame register.

◆ MCFG

__IOM uint32_t LPC_EMAC_Type::MCFG

(@ 0x00000020) MII Mgmt Configuration register.

◆ MCMD

__IOM uint32_t LPC_EMAC_Type::MCMD

(@ 0x00000024) MII Mgmt Command register.

◆ MIND

__IM uint32_t LPC_EMAC_Type::MIND

(@ 0x00000034) MII Mgmt Indicators register.

◆ MRDD

__IM uint32_t LPC_EMAC_Type::MRDD

(@ 0x00000030) MII Mgmt Read Data register.

◆ MWTD

__OM uint32_t LPC_EMAC_Type::MWTD

(@ 0x0000002C) MII Mgmt Write Data register.

◆ POWERDOWN

__IOM uint32_t LPC_EMAC_Type::POWERDOWN

(@ 0x00000FF4) Power-down register.

◆ RESERVED

__IM uint32_t LPC_EMAC_Type::RESERVED[2]

◆ RESERVED1

__IM uint32_t LPC_EMAC_Type::RESERVED1[45]

◆ RESERVED2

__IM uint32_t LPC_EMAC_Type::RESERVED2[10]

◆ RESERVED3

__IM uint32_t LPC_EMAC_Type::RESERVED3[3]

◆ RESERVED4

__IM uint32_t LPC_EMAC_Type::RESERVED4[34]

◆ RESERVED5

__IM uint32_t LPC_EMAC_Type::RESERVED5

◆ RESERVED6

__IM uint32_t LPC_EMAC_Type::RESERVED6[882]

◆ RESERVED7

__IM uint32_t LPC_EMAC_Type::RESERVED7

◆ RSV

__IM uint32_t LPC_EMAC_Type::RSV

(@ 0x00000160) Receive status vector register.

◆ RXCONSUMEINDEX

__IOM uint32_t LPC_EMAC_Type::RXCONSUMEINDEX

(@ 0x00000118) Receive consume index register.

◆ RXDESCRIPTOR

__IOM uint32_t LPC_EMAC_Type::RXDESCRIPTOR

(@ 0x00000108) Receive descriptor base address register.

◆ RXDESCRIPTORNUMBER

__IOM uint32_t LPC_EMAC_Type::RXDESCRIPTORNUMBER

(@ 0x00000110) Receive number of descriptors register.

◆ RXFILTERCTRL

__IOM uint32_t LPC_EMAC_Type::RXFILTERCTRL

(@ 0x00000200) Receive filter control register.

◆ RXFILTERWOLCLEAR

__OM uint32_t LPC_EMAC_Type::RXFILTERWOLCLEAR

(@ 0x00000208) Receive filter WoL clear register.

◆ RXFILTERWOLSTATUS

__IM uint32_t LPC_EMAC_Type::RXFILTERWOLSTATUS

(@ 0x00000204) Receive filter WoL status register.

◆ RXPRODUCEINDEX

__IM uint32_t LPC_EMAC_Type::RXPRODUCEINDEX

(@ 0x00000114) Receive produce index register.

◆ RXSTATUS

__IOM uint32_t LPC_EMAC_Type::RXSTATUS

(@ 0x0000010C) Receive status base address register.

◆ SA0

__IOM uint32_t LPC_EMAC_Type::SA0

(@ 0x00000040) Station Address 0 register.

◆ SA1

__IOM uint32_t LPC_EMAC_Type::SA1

(@ 0x00000044) Station Address 1 register.

◆ SA2

__IOM uint32_t LPC_EMAC_Type::SA2

(@ 0x00000048) Station Address 2 register.

◆ STATUS

__IM uint32_t LPC_EMAC_Type::STATUS

(@ 0x00000104) Status register.

◆ SUPP

__IOM uint32_t LPC_EMAC_Type::SUPP

(@ 0x00000018) PHY Support register.

◆ TEST

__IOM uint32_t LPC_EMAC_Type::TEST

(@ 0x0000001C) Test register.

◆ TSV0

__IM uint32_t LPC_EMAC_Type::TSV0

(@ 0x00000158) Transmit status vector 0 register.

◆ TSV1

__IM uint32_t LPC_EMAC_Type::TSV1

(@ 0x0000015C) Transmit status vector 1 register.

◆ TXCONSUMEINDEX

__IM uint32_t LPC_EMAC_Type::TXCONSUMEINDEX

(@ 0x0000012C) Transmit consume index register.

◆ TXDESCRIPTOR

__IOM uint32_t LPC_EMAC_Type::TXDESCRIPTOR

(@ 0x0000011C) Transmit descriptor base address register.

◆ TXDESCRIPTORNUMBER

__IOM uint32_t LPC_EMAC_Type::TXDESCRIPTORNUMBER

(@ 0x00000124) Transmit number of descriptors register.

◆ TXPRODUCEINDEX

__IOM uint32_t LPC_EMAC_Type::TXPRODUCEINDEX

(@ 0x00000128) Transmit produce index register.

◆ TXSTATUS

__IOM uint32_t LPC_EMAC_Type::TXSTATUS

(@ 0x00000120) Transmit status base address register.

The documentation for this struct was generated from the following file: