General Purpose I/O (GPIO) More...

#include <LPC176x5x.h>

Data Fields
__IOM uint32_t	DIR0

__IM uint32_t	RESERVED [3]

__IOM uint32_t	MASK0

__IOM uint32_t	PIN0

__IOM uint32_t	SET0

__OM uint32_t	CLR0

__IOM uint32_t	DIR1

__IM uint32_t	RESERVED1 [3]

__IOM uint32_t	MASK1

__IOM uint32_t	PIN1

__IOM uint32_t	SET1

__OM uint32_t	CLR1

__IOM uint32_t	DIR2

__IM uint32_t	RESERVED2 [3]

__IOM uint32_t	MASK2

__IOM uint32_t	PIN2

__IOM uint32_t	SET2

__OM uint32_t	CLR2

__IOM uint32_t	DIR3

__IM uint32_t	RESERVED3 [3]

__IOM uint32_t	MASK3

__IOM uint32_t	PIN3

__IOM uint32_t	SET3

__OM uint32_t	CLR3

__IOM uint32_t	DIR4

__IM uint32_t	RESERVED4 [3]

__IOM uint32_t	MASK4

__IOM uint32_t	PIN4

__IOM uint32_t	SET4

__OM uint32_t	CLR4

Detailed Description

General Purpose I/O (GPIO)

Field Documentation

◆ CLR0

__OM uint32_t LPC_GPIO_Type::CLR0

(@ 0x0000001C) Port Output Clear register using FIOMASK.

◆ CLR1

__OM uint32_t LPC_GPIO_Type::CLR1

(@ 0x0000003C) Port Output Clear register using FIOMASK.

◆ CLR2

__OM uint32_t LPC_GPIO_Type::CLR2

(@ 0x0000005C) Port Output Clear register using FIOMASK.

◆ CLR3

__OM uint32_t LPC_GPIO_Type::CLR3

(@ 0x0000007C) Port Output Clear register using FIOMASK.

◆ CLR4

__OM uint32_t LPC_GPIO_Type::CLR4

(@ 0x0000009C) Port Output Clear register using FIOMASK.

◆ DIR0

__IOM uint32_t LPC_GPIO_Type::DIR0

< (@ 0x2009C000) GPIO Structure
(@ 0x00000000) GPIO Port Direction control register.

◆ DIR1

__IOM uint32_t LPC_GPIO_Type::DIR1

(@ 0x00000020) GPIO Port Direction control register.

◆ DIR2

__IOM uint32_t LPC_GPIO_Type::DIR2

(@ 0x00000040) GPIO Port Direction control register.

◆ DIR3

__IOM uint32_t LPC_GPIO_Type::DIR3

(@ 0x00000060) GPIO Port Direction control register.

◆ DIR4

__IOM uint32_t LPC_GPIO_Type::DIR4

(@ 0x00000080) GPIO Port Direction control register.

◆ MASK0

__IOM uint32_t LPC_GPIO_Type::MASK0

(@ 0x00000010) Mask register for Port.

◆ MASK1

__IOM uint32_t LPC_GPIO_Type::MASK1

(@ 0x00000030) Mask register for Port.

◆ MASK2

__IOM uint32_t LPC_GPIO_Type::MASK2

(@ 0x00000050) Mask register for Port.

◆ MASK3

__IOM uint32_t LPC_GPIO_Type::MASK3

(@ 0x00000070) Mask register for Port.

◆ MASK4

__IOM uint32_t LPC_GPIO_Type::MASK4

(@ 0x00000090) Mask register for Port.

◆ PIN0

__IOM uint32_t LPC_GPIO_Type::PIN0

(@ 0x00000014) Port Pin value register using FIOMASK.

◆ PIN1

__IOM uint32_t LPC_GPIO_Type::PIN1

(@ 0x00000034) Port Pin value register using FIOMASK.

◆ PIN2

__IOM uint32_t LPC_GPIO_Type::PIN2

(@ 0x00000054) Port Pin value register using FIOMASK.

◆ PIN3

__IOM uint32_t LPC_GPIO_Type::PIN3

(@ 0x00000074) Port Pin value register using FIOMASK.

◆ PIN4

__IOM uint32_t LPC_GPIO_Type::PIN4

(@ 0x00000094) Port Pin value register using FIOMASK.

◆ RESERVED

__IM uint32_t LPC_GPIO_Type::RESERVED[3]

◆ RESERVED1

__IM uint32_t LPC_GPIO_Type::RESERVED1[3]

◆ RESERVED2

__IM uint32_t LPC_GPIO_Type::RESERVED2[3]

◆ RESERVED3

__IM uint32_t LPC_GPIO_Type::RESERVED3[3]

◆ RESERVED4

__IM uint32_t LPC_GPIO_Type::RESERVED4[3]

◆ SET0

__IOM uint32_t LPC_GPIO_Type::SET0

(@ 0x00000018) Port Output Set register using FIOMASK.

◆ SET1

__IOM uint32_t LPC_GPIO_Type::SET1

(@ 0x00000038) Port Output Set register using FIOMASK.

◆ SET2

__IOM uint32_t LPC_GPIO_Type::SET2

(@ 0x00000058) Port Output Set register using FIOMASK.

◆ SET3

__IOM uint32_t LPC_GPIO_Type::SET3

(@ 0x00000078) Port Output Set register using FIOMASK.

◆ SET4

__IOM uint32_t LPC_GPIO_Type::SET4

(@ 0x00000098) Port Output Set register using FIOMASK.

The documentation for this struct was generated from the following file:

port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h

Data Fields