LPC_MCPWM_Type Struct Reference

Motor Control PWM (MCPWM) More...

#include <LPC176x5x.h>

Data Fields
__IM uint32_t	CON
__OM uint32_t	CON_SET
__OM uint32_t	CON_CLR
__IM uint32_t	CAPCON
__OM uint32_t	CAPCON_SET
__OM uint32_t	CAPCON_CLR
__IOM uint32_t	TC [3]
__IOM uint32_t	LIM [3]
__IOM uint32_t	MAT [3]
__IOM uint32_t	DT
__IOM uint32_t	CP
__IM uint32_t	CAP [3]
__IM uint32_t	INTEN
__OM uint32_t	INTEN_SET
__OM uint32_t	INTEN_CLR
__IM uint32_t	CNTCON
__OM uint32_t	CNTCON_SET
__OM uint32_t	CNTCON_CLR
__IM uint32_t	INTF
__OM uint32_t	INTF_SET
__OM uint32_t	INTF_CLR
__OM uint32_t	CAP_CLR

Detailed Description

Motor Control PWM (MCPWM)

Field Documentation

CAP

__IM uint32_t LPC_MCPWM_Type::CAP[3]

(@ 0x00000044) Capture register

CAP_CLR

__OM uint32_t LPC_MCPWM_Type::CAP_CLR

(@ 0x00000074) Capture clear address

CAPCON

__IM uint32_t LPC_MCPWM_Type::CAPCON

(@ 0x0000000C) Capture Control read address

CAPCON_CLR

__OM uint32_t LPC_MCPWM_Type::CAPCON_CLR

(@ 0x00000014) Event Control clear address

CAPCON_SET

__OM uint32_t LPC_MCPWM_Type::CAPCON_SET

(@ 0x00000010) Capture Control set address

CNTCON

__IM uint32_t LPC_MCPWM_Type::CNTCON

(@ 0x0000005C) Count Control read address

CNTCON_CLR

__OM uint32_t LPC_MCPWM_Type::CNTCON_CLR

(@ 0x00000064) Count Control clear address

CNTCON_SET

__OM uint32_t LPC_MCPWM_Type::CNTCON_SET

(@ 0x00000060) Count Control set address

CON

__IM uint32_t LPC_MCPWM_Type::CON

< (@ 0x400B8000) MCPWM Structure
(@ 0x00000000) PWM Control read address

CON_CLR

__OM uint32_t LPC_MCPWM_Type::CON_CLR

(@ 0x00000008) PWM Control clear address

CON_SET

__OM uint32_t LPC_MCPWM_Type::CON_SET

(@ 0x00000004) PWM Control set address

CP

__IOM uint32_t LPC_MCPWM_Type::CP

(@ 0x00000040) Communication Pattern register

DT

__IOM uint32_t LPC_MCPWM_Type::DT

(@ 0x0000003C) Dead time register

INTEN

__IM uint32_t LPC_MCPWM_Type::INTEN

(@ 0x00000050) Interrupt Enable read address

INTEN_CLR

__OM uint32_t LPC_MCPWM_Type::INTEN_CLR

(@ 0x00000058) Interrupt Enable clear address

INTEN_SET

__OM uint32_t LPC_MCPWM_Type::INTEN_SET

(@ 0x00000054) Interrupt Enable set address

INTF

__IM uint32_t LPC_MCPWM_Type::INTF

(@ 0x00000068) Interrupt flags read address

INTF_CLR

__OM uint32_t LPC_MCPWM_Type::INTF_CLR

(@ 0x00000070) Interrupt flags clear address

INTF_SET

__OM uint32_t LPC_MCPWM_Type::INTF_SET

(@ 0x0000006C) Interrupt flags set address

LIM

__IOM uint32_t LPC_MCPWM_Type::LIM[3]

(@ 0x00000024) Limit register

MAT

__IOM uint32_t LPC_MCPWM_Type::MAT[3]

(@ 0x00000030) Match register

TC

__IOM uint32_t LPC_MCPWM_Type::TC[3]

(@ 0x00000018) Timer Counter register

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The documentation for this struct was generated from the following file:

• port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h