LPC_PWM1_Type Struct Reference

Pulse Width Modulators (PWM1) (PWM1) More...

#include <LPC176x5x.h>

Data Fields
__IOM uint32_t	IR
__IOM uint32_t	TCR
__IOM uint32_t	TC
__IOM uint32_t	PR
__IOM uint32_t	PC
__IOM uint32_t	MCR
__IOM uint32_t	MR0
__IOM uint32_t	MR1
__IOM uint32_t	MR2
__IOM uint32_t	MR3
__IOM uint32_t	CCR
__IOM uint32_t	CR [2]
__IM uint32_t	RESERVED [3]
__IOM uint32_t	MR4
__IOM uint32_t	MR5
__IOM uint32_t	MR6
__IOM uint32_t	PCR
__IOM uint32_t	LER
__IM uint32_t	RESERVED1 [7]
__IOM uint32_t	CTCR

Detailed Description

Pulse Width Modulators (PWM1) (PWM1)

Field Documentation

CCR

__IOM uint32_t LPC_PWM1_Type::CCR

(@ 0x00000028) Capture Control Register. The CCR controls which edges of the capture inputs are used to load the Capture Registers and whether or not an interrupt is generated for a capture event.

CR

__IOM uint32_t LPC_PWM1_Type::CR[2]

(@ 0x0000002C) PWM Control Register. Enables PWM outputs and selects either single edge or double edge controlled PWM outputs.

CTCR

__IOM uint32_t LPC_PWM1_Type::CTCR

(@ 0x00000070) Count Control Register. The CTCR selects between Timer and Counter mode, and in Counter mode selects the signal and edge(s) for counting.

IR

__IOM uint32_t LPC_PWM1_Type::IR

< (@ 0x40018000) PWM1 Structure
(@ 0x00000000) Interrupt Register. The IR can be written to clear interrupts, or read to identify which PWM interrupt sources are pending.

LER

__IOM uint32_t LPC_PWM1_Type::LER

(@ 0x00000050) Load Enable Register. Enables use of updated PWM match values.

MCR

__IOM uint32_t LPC_PWM1_Type::MCR

(@ 0x00000014) Match Control Register. The MCR is used to control whether an interrupt is generated and if the PWM counter is reset when a Match occurs.

MR0

__IOM uint32_t LPC_PWM1_Type::MR0

(@ 0x00000018) Match Register. Match registersare continuously compared to the PWM counter in order to control PWMoutput edges.

MR1

__IOM uint32_t LPC_PWM1_Type::MR1

(@ 0x0000001C) Match Register. Match registersare continuously compared to the PWM counter in order to control PWMoutput edges.

MR2

__IOM uint32_t LPC_PWM1_Type::MR2

(@ 0x00000020) Match Register. Match registersare continuously compared to the PWM counter in order to control PWMoutput edges.

MR3

__IOM uint32_t LPC_PWM1_Type::MR3

(@ 0x00000024) Match Register. Match registersare continuously compared to the PWM counter in order to control PWMoutput edges.

MR4

__IOM uint32_t LPC_PWM1_Type::MR4

(@ 0x00000040) Match Register. Match registersare continuously compared to the PWM counter in order to control PWMoutput edges.

MR5

__IOM uint32_t LPC_PWM1_Type::MR5

(@ 0x00000044) Match Register. Match registersare continuously compared to the PWM counter in order to control PWMoutput edges.

MR6

__IOM uint32_t LPC_PWM1_Type::MR6

(@ 0x00000048) Match Register. Match registersare continuously compared to the PWM counter in order to control PWMoutput edges.

PC

__IOM uint32_t LPC_PWM1_Type::PC

(@ 0x00000010) Prescale Counter. Prescaler for the main PWM counter.

PCR

__IOM uint32_t LPC_PWM1_Type::PCR

(@ 0x0000004C) PWM Control Register. Enables PWM outputs and selects either single edge or double edge controlled PWM outputs.

PR

__IOM uint32_t LPC_PWM1_Type::PR

(@ 0x0000000C) Prescale Register. Determines how often the PWM counter is incremented.

RESERVED

__IM uint32_t LPC_PWM1_Type::RESERVED[3]

RESERVED1

__IM uint32_t LPC_PWM1_Type::RESERVED1[7]

TC

__IOM uint32_t LPC_PWM1_Type::TC

(@ 0x00000008) Timer Counter. The 32 bit TC is incremented every PR+1 cycles of PCLK. The TC is controlled through the TCR.

TCR

__IOM uint32_t LPC_PWM1_Type::TCR

(@ 0x00000004) Timer Control Register. The TCR is used to control the Timer Counter functions.

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The documentation for this struct was generated from the following file:

• port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h