System and clock control (SYSCON) More...

#include <LPC176x5x.h>

Data Fields
__IOM uint32_t	FLASHCFG

__IM uint32_t	RESERVED [31]

__IOM uint32_t	PLL0CON

__IOM uint32_t	PLL0CFG

__IM uint32_t	PLL0STAT

__OM uint32_t	PLL0FEED

__IM uint32_t	RESERVED1 [4]

__IOM uint32_t	PLL1CON

__IOM uint32_t	PLL1CFG

__IM uint32_t	PLL1STAT

__OM uint32_t	PLL1FEED

__IM uint32_t	RESERVED2 [4]

__IOM uint32_t	PCON

__IOM uint32_t	PCONP

__IM uint32_t	RESERVED3 [15]

__IOM uint32_t	CCLKCFG

__IOM uint32_t	USBCLKCFG

__IOM uint32_t	CLKSRCSEL

__IOM uint32_t	CANSLEEPCLR

__IOM uint32_t	CANWAKEFLAGS

__IM uint32_t	RESERVED4 [10]

__IOM uint32_t	EXTINT

__IM uint32_t	RESERVED5

__IOM uint32_t	EXTMODE

__IOM uint32_t	EXTPOLAR

__IM uint32_t	RESERVED6 [12]

__IOM uint32_t	RSID

__IM uint32_t	RESERVED7 [7]

__IOM uint32_t	SCS

__IM uint32_t	RESERVED8

__IOM uint32_t	PCLKSEL0

__IOM uint32_t	PCLKSEL1

__IM uint32_t	RESERVED9 [4]

__IOM uint32_t	USBINTST

__IOM uint32_t	DMACREQSEL

__IOM uint32_t	CLKOUTCFG

Detailed Description

System and clock control (SYSCON)

Field Documentation

◆ CANSLEEPCLR

__IOM uint32_t LPC_SYSCON_Type::CANSLEEPCLR

(@ 0x00000110) Allows clearing the current CAN channel sleep state as well as reading that state.

◆ CANWAKEFLAGS

__IOM uint32_t LPC_SYSCON_Type::CANWAKEFLAGS

(@ 0x00000114) Allows reading the wake-up state of the CAN channels.

◆ CCLKCFG

__IOM uint32_t LPC_SYSCON_Type::CCLKCFG

(@ 0x00000104) CPU Clock Configuration Register

◆ CLKOUTCFG

__IOM uint32_t LPC_SYSCON_Type::CLKOUTCFG

(@ 0x000001C8) Clock Output Configuration Register

◆ CLKSRCSEL

__IOM uint32_t LPC_SYSCON_Type::CLKSRCSEL

(@ 0x0000010C) Clock Source Select Register

◆ DMACREQSEL

__IOM uint32_t LPC_SYSCON_Type::DMACREQSEL

(@ 0x000001C4) Selects between alternative requests on DMA channels 0 through 7 and 10 through 15

◆ EXTINT

__IOM uint32_t LPC_SYSCON_Type::EXTINT

(@ 0x00000140) External Interrupt Flag Register

◆ EXTMODE

__IOM uint32_t LPC_SYSCON_Type::EXTMODE

(@ 0x00000148) External Interrupt Mode register

◆ EXTPOLAR

__IOM uint32_t LPC_SYSCON_Type::EXTPOLAR

(@ 0x0000014C) External Interrupt Polarity Register

◆ FLASHCFG

__IOM uint32_t LPC_SYSCON_Type::FLASHCFG

< (@ 0x400FC000) SYSCON Structure
(@ 0x00000000) Flash Accelerator Configuration Register. Controls flash access timing.

◆ PCLKSEL0

__IOM uint32_t LPC_SYSCON_Type::PCLKSEL0

(@ 0x000001A8) Peripheral Clock Selection register 0.

◆ PCLKSEL1

__IOM uint32_t LPC_SYSCON_Type::PCLKSEL1

(@ 0x000001AC) Peripheral Clock Selection register 1.

◆ PCON

__IOM uint32_t LPC_SYSCON_Type::PCON

(@ 0x000000C0) Power Control Register

◆ PCONP

__IOM uint32_t LPC_SYSCON_Type::PCONP

(@ 0x000000C4) Power Control for Peripherals Register

◆ PLL0CFG

__IOM uint32_t LPC_SYSCON_Type::PLL0CFG

(@ 0x00000084) PLL0 Configuration Register

◆ PLL0CON

__IOM uint32_t LPC_SYSCON_Type::PLL0CON

(@ 0x00000080) PLL0 Control Register

◆ PLL0FEED

__OM uint32_t LPC_SYSCON_Type::PLL0FEED

(@ 0x0000008C) PLL0 Feed Register

◆ PLL0STAT

__IM uint32_t LPC_SYSCON_Type::PLL0STAT

(@ 0x00000088) PLL0 Status Register

◆ PLL1CFG

__IOM uint32_t LPC_SYSCON_Type::PLL1CFG

(@ 0x000000A4) PLL1 Configuration Register

◆ PLL1CON

__IOM uint32_t LPC_SYSCON_Type::PLL1CON

(@ 0x000000A0) PLL1 Control Register

◆ PLL1FEED

__OM uint32_t LPC_SYSCON_Type::PLL1FEED

(@ 0x000000AC) PLL1 Feed Register

◆ PLL1STAT

__IM uint32_t LPC_SYSCON_Type::PLL1STAT

(@ 0x000000A8) PLL1 Status Register

◆ RESERVED

__IM uint32_t LPC_SYSCON_Type::RESERVED[31]

◆ RESERVED1

__IM uint32_t LPC_SYSCON_Type::RESERVED1[4]

◆ RESERVED2

__IM uint32_t LPC_SYSCON_Type::RESERVED2[4]

◆ RESERVED3

__IM uint32_t LPC_SYSCON_Type::RESERVED3[15]

◆ RESERVED4

__IM uint32_t LPC_SYSCON_Type::RESERVED4[10]

◆ RESERVED5

__IM uint32_t LPC_SYSCON_Type::RESERVED5

◆ RESERVED6

__IM uint32_t LPC_SYSCON_Type::RESERVED6[12]

◆ RESERVED7

__IM uint32_t LPC_SYSCON_Type::RESERVED7[7]

◆ RESERVED8

__IM uint32_t LPC_SYSCON_Type::RESERVED8

◆ RESERVED9

__IM uint32_t LPC_SYSCON_Type::RESERVED9[4]

◆ RSID

__IOM uint32_t LPC_SYSCON_Type::RSID

(@ 0x00000180) Reset Source Identification Register

◆ SCS

__IOM uint32_t LPC_SYSCON_Type::SCS

(@ 0x000001A0) System control and status

◆ USBCLKCFG

__IOM uint32_t LPC_SYSCON_Type::USBCLKCFG

(@ 0x00000108) USB Clock Configuration Register

◆ USBINTST

__IOM uint32_t LPC_SYSCON_Type::USBINTST

(@ 0x000001C0) USB Interrupt Status

The documentation for this struct was generated from the following file:

port/ucontroller/nxp/lpc17xx/bootloader/inc/LPC176x5x.h

Data Fields